August 2020 - U-Boot

[PATCH] arm: socfpga: soc64: Document down boot_scratch_cold register usage
by Siew Chin Lim 10 Aug '20

10 Aug '20

From: Chin Liang See <chin.liang.see(a)intel.com> Document down the usage of boot_scratch_cold register to avoid overlapping of usage in the code for S10 & Agilex. The boot_scratch_cold register is generally used for passing critical system info between SPL, U-Boot and Linux. Signed-off-by: Chin Liang See <chin.liang.see(a)intel.com> Signed-off-by: Siew Chin Lim <elly.siew.chin.lim(a)intel.com> --- arch/arm/mach-socfpga/include/mach/system_manager_soc64.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h index c90f63a754..0b0eb7a259 100644 --- a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h +++ b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h @@ -46,13 +46,20 @@ void sysmgr_pinmux_table_delay(const u32 **table, unsigned int *table_len); #define SYSMGR_SOC64_GPO 0xe4 #define SYSMGR_SOC64_GPI 0xe8 #define SYSMGR_SOC64_MPU 0xf0 +/* store qspi ref clock */ #define SYSMGR_SOC64_BOOT_SCRATCH_COLD0 0x200 +/* store osc1 clock freq */ #define SYSMGR_SOC64_BOOT_SCRATCH_COLD1 0x204 +/* store fpga clock freq */ #define SYSMGR_SOC64_BOOT_SCRATCH_COLD2 0x208 #define SYSMGR_SOC64_BOOT_SCRATCH_COLD3 0x20c +/* store PSCI_CPU_ON value */ #define SYSMGR_SOC64_BOOT_SCRATCH_COLD4 0x210 +/* store PSCI_CPU_ON value */ #define SYSMGR_SOC64_BOOT_SCRATCH_COLD5 0x214 +/* store VBAR_EL3 value */ #define SYSMGR_SOC64_BOOT_SCRATCH_COLD6 0x218 +/* store VBAR_EL3 value */ #define SYSMGR_SOC64_BOOT_SCRATCH_COLD7 0x21c #define SYSMGR_SOC64_BOOT_SCRATCH_COLD8 0x220 #define SYSMGR_SOC64_BOOT_SCRATCH_COLD9 0x224 -- 2.19.0

2 1

master u-boot broken for HiFive Unleashed
by Atish Patra 09 Aug '20

09 Aug '20

Hi, The latest master (423e08cb7701 (origin/master, origin/HEAD) Merge branch '2020-07-28-misc-soc-improvements') seems to be broken for HiFive Unleashed. It already has Bin's fix for unleashed. a0018fc8209c riscv: Make SiFive HiFive Unleashed board boot again dram start and size is corrupted for some reason. I have verified that it was initialized properly during DT parsing. However, it shows random values in the U-Boot console. => bdinfo boot_params = 0x0000000000000000 memstart = 0x0000000000000000 memsize = 0x00000000 flashstart = 0x0000000000000000 flashsize = 0x0000000000000000 flashoffset = 0x0000000000000000 baudrate = 115200 bps relocaddr = 0x00000000fff84000 reloc off = 0x000000007fd84000 Build = 64-bit => bdinfo boot_params = 0x9a26a361c16aa601 DRAM bank = 0x0000000000000000 -> start = 0x974515c3bda965ef -> size = 0x79b6f0fb37923036 memstart = 0x574587c7f00570f9 memsize = 0xCFD8C0F4D42668AB flashstart = 0x67f9fbb06586658b flashsize = 0xf91aed913c99b9e1 flashoffset = 0x9ddbf00d69e870fa baudrate = 115200 bps v2020.07 seems to work fine. I couldn't bisect between those two as the number of commits didn't compile. -- Regards, Atish

3 6

MAIX: CONFIG_SYS_INIT_SP_ADDR
by Heinrich Schuchardt 09 Aug '20

09 Aug '20

Hello Sean, while trying to understand the handling of SMP I stumbled of this question: Why did you define CONFIG_SYS_INIT_SP_ADDR as an odd number on the MAIX in commit a7c81fc85326 ("riscv: Add Sipeed Maix support") while the other RISC-V boards use an even number: include/configs/sifive-fu540.h:29: 29 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) include/configs/qemu-riscv.h:22: 22 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) include/configs/sipeed-maix.h:13: 13 | #define CONFIG_SYS_INIT_SP_ADDR 0x803FFFFF I always thought that RISC-V stack pointers must be 16 byte aligned: Cf. https://riscv.org/wp-content/uploads/2015/01/riscv-calling.pdf "In the standard RISC-V calling convention, the stack grows downward and the stack pointer is always kept 16-byte aligned." Best regards Heinrich

2 3

[PATCH] serial: sh: Improve FIFO empty check on RX
by Marek Vasut 09 Aug '20

09 Aug '20

If the SCIF is receiving data quickly enough, it may happen that the SCxSR_RDxF flag is cleared in sh_serial_getc_generic(), while the FIFO still contains data. If that happens, the serial_getc_check() reports no data in the FIFO as the flag is no longer set. Add one more check, if the SCxSR_RDxF is not set, read out the FIFO level and if there are still characters in the FIFO, permit reading them out. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- drivers/serial/serial_sh.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c index 13b179f03d..e27d256574 100644 --- a/drivers/serial/serial_sh.c +++ b/drivers/serial/serial_sh.c @@ -116,7 +116,10 @@ static int serial_getc_check(struct uart_port *port) handle_error(port); if (sci_in(port, SCLSR) & SCxSR_ORER(port)) handle_error(port); - return status & (SCIF_DR | SCxSR_RDxF(port)); + status &= (SCIF_DR | SCxSR_RDxF(port)); + if (status) + return status; + return scif_rxfill(port); } static int sh_serial_getc_generic(struct uart_port *port) -- 2.28.0

1 0

[PATCH] sunxi: Enable ethernet on newer Olimex OLinuXino-A20-Lime2-eMMC
by Jonas Smedegaard 09 Aug '20

09 Aug '20

Olimex OLinuXino LIME2 rev. H through L uses Micrel KSZ9031 PHY. This enables the Micrel PHY for A20-OLinuXino-Lime2-eMMC_defconfig. Signed-off-by: Jonas Smedegaard <dr(a)jones.dk> --- configs/A20-OLinuXino-Lime2-eMMC_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig index b1a38d7a4d..f9f8f14151 100644 --- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig +++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig @@ -19,6 +19,8 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_SCSI_AHCI=y CONFIG_DFU_RAM=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y -- 2.28.0

1 0

[PATCH 1/1] lib/crypto: simplify public_key_verify_signature
by Heinrich Schuchardt 08 Aug '20

08 Aug '20

The variable region is filled but never used. Remove it. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- lib/crypto/public_key.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/lib/crypto/public_key.c b/lib/crypto/public_key.c index a8f7fbed45..df6033cdb4 100644 --- a/lib/crypto/public_key.c +++ b/lib/crypto/public_key.c @@ -97,7 +97,6 @@ int public_key_verify_signature(const struct public_key *pkey, const struct public_key_signature *sig) { struct image_sign_info info; - struct image_region region; int ret; pr_devel("==>%s()\n", __func__); @@ -137,9 +136,6 @@ int public_key_verify_signature(const struct public_key *pkey, info.key = pkey->key; info.keylen = pkey->keylen; - region.data = sig->digest; - region.size = sig->digest_size; - if (rsa_verify_with_pkey(&info, sig->digest, sig->s, sig->s_size)) ret = -EKEYREJECTED; else -- 2.28.0

1 0

[PATCH 1/1] lib: hang() must be __efi_runtime
by Heinrich Schuchardt 08 Aug '20

08 Aug '20

On RISC-V we use hang() to stop all harts except the boot hart. The loop in which these harts run must not be overwritten by the UEFI payload after BootExit(). Extract the endless loop into a function hang_no_msg() which we define as __efi_runtime. Use it when preparing to call OpenSBI. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- common/spl/spl_opensbi.c | 2 +- include/hang.h | 10 ++++++++++ lib/hang.c | 10 ++++++++-- 3 files changed, 19 insertions(+), 3 deletions(-) diff --git a/common/spl/spl_opensbi.c b/common/spl/spl_opensbi.c index 14f335f75f0..dc129c194e6 100644 --- a/common/spl/spl_opensbi.c +++ b/common/spl/spl_opensbi.c @@ -93,7 +93,7 @@ void spl_invoke_opensbi(struct spl_image_info *spl_image) (ulong)spl_image->fdt_addr, (ulong)&opensbi_info, 1); if (ret) - hang(); + hang_no_msg(); #endif opensbi_entry(gd->arch.boot_hart, (ulong)spl_image->fdt_addr, (ulong)&opensbi_info); diff --git a/include/hang.h b/include/hang.h index 27cda493592..7a92f809164 100644 --- a/include/hang.h +++ b/include/hang.h @@ -17,6 +17,16 @@ * This function does not return. */ void hang(void) __attribute__ ((noreturn)); + +/** + * hang_no_msg() - stop executions + * + * This function provides an infinite loop. It is located in the __efi_runtime + * section to allow usage for letting secondary cores/harts wait until the + * UEFI payload takes care of them. + */ +void hang_no_msg(void) __attribute__ ((noreturn)); + #endif #endif diff --git a/lib/hang.c b/lib/hang.c index 578ac78d453..d131ce7cec9 100644 --- a/lib/hang.c +++ b/lib/hang.c @@ -9,9 +9,16 @@ #include <common.h> #include <bootstage.h> +#include <efi_loader.h> #include <hang.h> #include <os.h> +__efi_runtime void hang_no_msg(void) +{ + for(;;) + ; +} + /** * hang - stop processing by staying in an endless loop * @@ -30,6 +37,5 @@ void hang(void) bootstage_error(BOOTSTAGE_ID_NEED_RESET); if (IS_ENABLED(CONFIG_SANDBOX)) os_exit(1); - for (;;) - ; + hang_no_msg(); } -- 2.20.1

1 0

Please pull u-boot-marvell/master
by Stefan Roese 08 Aug '20

08 Aug '20

Hi Tom, please pull these MVEBU related patches: ---------------------------------------------------------------- - Cleanup in Marvell bubt cmd (Tom & Jagan) - Add a series of MikroTik CRS3xx, 98DX3236 based switches (Luka) ---------------------------------------------------------------- Here the Azure build, without any issues: https://dev.azure.com/sr0718/u-boot/_build/results?buildId=15&view=results Thanks, Stefan The following changes since commit 89150a9314bd432ed8cca9a03034435346fb0b16: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh (2020-08-05 16:06:42 -0400) are available in the Git repository at: git@gitlab.denx.de:u-boot/custodians/u-boot-marvell.git for you to fetch changes up to 96be2f072768a91eb0df3767b9c8c880dd1e4b5b: mvebu: bubt: Drop dead code (2020-08-06 14:12:14 +0200) ---------------------------------------------------------------- Jagan Teki (1): cmd: mvebu/bubt: Drop unused SPI_FLASH_PROTECTION Luka Kovacic (5): arm: mvebu: Add CRS305-1G-4S Bit board arm: mvebu: Add CRS326-24G-2S board arm: mvebu: Add CRS328-4C-20S-4S board arm: mvebu: crs3xx-98dx3236: Add a maintainer arm: mvebu: Update CRS305-1G-4S board flash layout Tom Rini (1): mvebu: bubt: Drop dead code arch/arm/dts/Makefile | 5 + arch/arm/dts/armada-xp-crs305-1g-4s-bit.dts | 43 ++++++++ arch/arm/dts/armada-xp-crs305-1g-4s.dtsi | 10 +- arch/arm/dts/armada-xp-crs326-24g-2s-bit.dts | 43 ++++++++ arch/arm/dts/armada-xp-crs326-24g-2s-u-boot.dtsi | 13 +++ arch/arm/dts/armada-xp-crs326-24g-2s.dts | 17 ++++ arch/arm/dts/armada-xp-crs326-24g-2s.dtsi | 110 +++++++++++++++++++++ arch/arm/dts/armada-xp-crs328-4c-20s-4s-bit.dts | 43 ++++++++ .../arm/dts/armada-xp-crs328-4c-20s-4s-u-boot.dtsi | 13 +++ arch/arm/dts/armada-xp-crs328-4c-20s-4s.dts | 17 ++++ arch/arm/dts/armada-xp-crs328-4c-20s-4s.dtsi | 110 +++++++++++++++++++++ board/mikrotik/crs3xx-98dx3236/MAINTAINERS | 22 +++++ cmd/mvebu/bubt.c | 22 ----- configs/crs305-1g-4s-bit_defconfig | 54 ++++++++++ configs/crs305-1g-4s_defconfig | 9 +- configs/crs326-24g-2s-bit_defconfig | 54 ++++++++++ configs/crs326-24g-2s_defconfig | 54 ++++++++++ configs/crs328-4c-20s-4s-bit_defconfig | 54 ++++++++++ configs/crs328-4c-20s-4s_defconfig | 54 ++++++++++ 19 files changed, 719 insertions(+), 28 deletions(-) create mode 100644 arch/arm/dts/armada-xp-crs305-1g-4s-bit.dts create mode 100644 arch/arm/dts/armada-xp-crs326-24g-2s-bit.dts create mode 100644 arch/arm/dts/armada-xp-crs326-24g-2s-u-boot.dtsi create mode 100644 arch/arm/dts/armada-xp-crs326-24g-2s.dts create mode 100644 arch/arm/dts/armada-xp-crs326-24g-2s.dtsi create mode 100644 arch/arm/dts/armada-xp-crs328-4c-20s-4s-bit.dts create mode 100644 arch/arm/dts/armada-xp-crs328-4c-20s-4s-u-boot.dtsi create mode 100644 arch/arm/dts/armada-xp-crs328-4c-20s-4s.dts create mode 100644 arch/arm/dts/armada-xp-crs328-4c-20s-4s.dtsi create mode 100644 configs/crs305-1g-4s-bit_defconfig create mode 100644 configs/crs326-24g-2s-bit_defconfig create mode 100644 configs/crs326-24g-2s_defconfig create mode 100644 configs/crs328-4c-20s-4s-bit_defconfig create mode 100644 configs/crs328-4c-20s-4s_defconfig

2 2

[PATCH] Makefile: sunxi: Don't use binman to build ATF image
by Simon Glass 08 Aug '20

08 Aug '20

At present with sunxi 64-bit, the Makefile builds u-boot-sunxi-with-spl.bin and then binman overwrites it with its own version. But the binman definition lacks some parts, in particular BL31. For now, work around this with a hack. Signed-off-by: Simon Glass <sjg(a)chromium.org> Fixes: 42b18df80fd ("x86: Makefile: Drop explicit targets built by binman") --- Makefile | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Makefile b/Makefile index 2629a741f1e..4483a9bc8a3 100644 --- a/Makefile +++ b/Makefile @@ -1024,9 +1024,13 @@ PHONY += inputs inputs: $(INPUTS-y) all: .binman_stamp inputs + # Hack for sunxi which doesn't have a proper binman definition for + # 64-bit boards +ifneq ($(CONFIG_ARCH_SUNXI)$(CONFIG_ARM64),yy) ifeq ($(CONFIG_BINMAN),y) $(call if_changed,binman) endif +endif # Timestamp file to make sure that binman always runs .binman_stamp: FORCE -- 2.28.0.236.gb10cc79966-goog

4 4

[PATCH 1/1] test/py: serial# cannot be overwritten on some devices
by Heinrich Schuchardt 08 Aug '20

08 Aug '20

On some devices the environment variable serial# cannot be overwritten. Set the variable only if it is not set. For our unit test it is sufficient to test if any value for serial-number is set. Fixes: 8a5cdf601f8d ("test: efi_selftest: Do not force serial# setting") Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- test/py/tests/test_efi_selftest.py | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/test/py/tests/test_efi_selftest.py b/test/py/tests/test_efi_selftest.py index 9b520c2070..63218efbc2 100644 --- a/test/py/tests/test_efi_selftest.py +++ b/test/py/tests/test_efi_selftest.py @@ -23,6 +23,7 @@ def test_efi_selftest(u_boot_console): u_boot_console.restart_uboot() @pytest.mark.buildconfigspec('cmd_bootefi_selftest') +(a)pytest.mark.buildconfigspec('hush_parser') @pytest.mark.buildconfigspec('of_control') @pytest.mark.notbuildconfigspec('generate_acpi_table') def test_efi_selftest_device_tree(u_boot_console): @@ -36,9 +37,11 @@ def test_efi_selftest_device_tree(u_boot_console): output = u_boot_console.run_command('bootefi selftest') assert '\'device tree\'' in output u_boot_console.run_command(cmd='setenv efi_selftest device tree') - u_boot_console.run_command(cmd='setenv serial# Testing DT') + # Set serial# if it is not already set. + u_boot_console.run_command(cmd='setenv efi_test "${serial#}x"') + u_boot_console.run_command(cmd='test "${efi_test}" = x && setenv serial# 0') u_boot_console.run_command(cmd='bootefi selftest ${fdtcontroladdr}', wait_for_prompt=False) - m = u_boot_console.p.expect(['serial-number: Testing DT', 'U-Boot']) + m = u_boot_console.p.expect(['serial-number:', 'U-Boot']) if m != 0: raise Exception('serial-number missing in device tree') u_boot_console.restart_uboot() -- 2.20.1

2 1