July 2020 - U-Boot

[PATCH] arm: stm32mp: protect DBGMCU_IDC access with BSEC
by Patrick Delaunay 02 Jul '20

02 Jul '20

As debugger must be totally closed on Sec closed chip, the DBGMCU_IDC register is no more accessible (self hosted debug is disabled with OTP). This patch adds a function bsec_dbgswenable() to check if the DBGMCU registers are available before to access them: BSEC_DENABLE.DBGSWENABLE = self hosted debug status. Signed-off-by: Patrick Delaunay <patrick.delaunay(a)st.com> --- arch/arm/mach-stm32mp/bsec.c | 25 +++++++++++++++++++++++ arch/arm/mach-stm32mp/cpu.c | 22 ++++++++++++++++---- arch/arm/mach-stm32mp/include/mach/bsec.h | 7 +++++++ 3 files changed, 50 insertions(+), 4 deletions(-) create mode 100644 arch/arm/mach-stm32mp/include/mach/bsec.h diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index fc39230113..c4b33ff241 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -8,6 +8,7 @@ #include <log.h> #include <misc.h> #include <asm/io.h> +#include <asm/arch/bsec.h> #include <asm/arch/stm32mp1_smc.h> #include <linux/arm-smccc.h> #include <linux/iopoll.h> @@ -21,6 +22,7 @@ #define BSEC_OTP_WRDATA_OFF 0x008 #define BSEC_OTP_STATUS_OFF 0x00C #define BSEC_OTP_LOCK_OFF 0x010 +#define BSEC_DENABLE_OFF 0x014 #define BSEC_DISTURBED_OFF 0x01C #define BSEC_ERROR_OFF 0x034 #define BSEC_WRLOCK_OFF 0x04C /* OTP write permananet lock */ @@ -46,6 +48,9 @@ #define BSEC_MODE_PROGFAIL_MASK 0x10 #define BSEC_MODE_PWR_MASK 0x20 +/* DENABLE Register */ +#define BSEC_DENABLE_DBGSWENABLE BIT(10) + /* * OTP Lock services definition * Value must corresponding to the bit number in the register @@ -505,3 +510,23 @@ U_BOOT_DRIVER(stm32mp_bsec) = { .probe = stm32mp_bsec_probe, #endif }; + +bool bsec_dbgswenable(void) +{ + struct udevice *dev; + struct stm32mp_bsec_platdata *plat; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stm32mp_bsec), &dev); + if (ret || !dev) { + pr_debug("bsec driver not available\n"); + return false; + } + + plat = dev_get_platdata(dev); + if (readl(plat->base + BSEC_DENABLE_OFF) & BSEC_DENABLE_DBGSWENABLE) + return true; + + return false; +} diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index 472b140321..382067190c 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -12,6 +12,7 @@ #include <misc.h> #include <net.h> #include <asm/io.h> +#include <asm/arch/bsec.h> #include <asm/arch/stm32.h> #include <asm/arch/sys_proto.h> #include <dm/device.h> @@ -155,8 +156,13 @@ static void dbgmcu_init(void) { setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); - /* Freeze IWDG2 if Cortex-A7 is in debug mode */ - setbits_le32(DBGMCU_APB4FZ1, DBGMCU_APB4FZ1_IWDG2); + /* + * Freeze IWDG2 if Cortex-A7 is in debug mode + * done in TF-A for TRUSTED boot and + * DBGMCU access is controlled by BSEC_DENABLE.DBGSWENABLE + */ + if (!IS_ENABLED(CONFIG_TFABOOT) && bsec_dbgswenable()) + setbits_le32(DBGMCU_APB4FZ1, DBGMCU_APB4FZ1_IWDG2); } #endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */ @@ -276,9 +282,17 @@ void enable_caches(void) static u32 read_idc(void) { - setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); + /* DBGMCU access is controlled by BSEC_DENABLE.DBGSWENABLE */ + if (bsec_dbgswenable()) { + setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); - return readl(DBGMCU_IDC); + return readl(DBGMCU_IDC); + } + + if (CONFIG_IS_ENABLED(STM32MP15x)) + return CPU_DEV_STM32MP15; /* STM32MP15x and unknown revision */ + else + return 0x0; } u32 get_cpu_dev(void) diff --git a/arch/arm/mach-stm32mp/include/mach/bsec.h b/arch/arm/mach-stm32mp/include/mach/bsec.h new file mode 100644 index 0000000000..252eac3946 --- /dev/null +++ b/arch/arm/mach-stm32mp/include/mach/bsec.h @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */ +/* + * Copyright (C) 2020, STMicroelectronics - All Rights Reserved + */ + +/* check self hosted debug status = BSEC_DENABLE.DBGSWENABLE */ +bool bsec_dbgswenable(void); -- 2.17.1

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[PATCH] configs: stm32mp1: only support SD card after NOR in bootcmd_stm32mp
by Patrick Delaunay 02 Jul '20

02 Jul '20

In the boot command used in ST boards, bootcmd_stm32mp, only support the SD card as second stage, where is found the bootfs with DISTRO. Signed-off-by: Patrick Delaunay <patrick.delaunay(a)st.com> --- include/configs/stm32mp1.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index f271b84a59..baaf2ff89c 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -123,7 +123,7 @@ * for serial/usb: execute the stm32prog command * for mmc boot (eMMC, SD card), boot only on the same device * for nand or spi-nand boot, boot with on ubifs partition on UBI partition - * for nor boot, use the default order + * for nor boot, use SD card = mmc0 */ #define STM32MP_BOOTCMD "bootcmd_stm32mp=" \ "echo \"Boot over ${boot_device}${boot_instance}!\";" \ @@ -136,6 +136,8 @@ "if test ${boot_device} = nand ||" \ " test ${boot_device} = spi-nand ;" \ "then env set boot_targets ubifs0; fi;" \ + "if test ${boot_device} = nor;" \ + "then env set boot_targets mmc0; fi;" \ "run distro_bootcmd;" \ "fi;\0" -- 2.17.1

2 1

[PATCH] board: st: move type-c stusb1600 controller code in a driver
by Patrick Delaunay 02 Jul '20

02 Jul '20

Migrate the ST Microelectronics STUSB160X Type-C controller code in a generic I2C driver in st/common, based on Linux one in : drivers/usb/typec/stusb160x.c This patch simplifies the stm32mp1 board code and allows to reuse this STUSB160X driver in other boards. Signed-off-by: Patrick Delaunay <patrick.delaunay(a)st.com> --- board/st/common/Kconfig | 7 ++++ board/st/common/Makefile | 2 + board/st/common/stusb160x.c | 46 +++++++++++++++++++++++ board/st/common/stusb160x.h | 10 +++++ board/st/stm32mp1/stm32mp1.c | 58 +++-------------------------- configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + 7 files changed, 73 insertions(+), 52 deletions(-) create mode 100644 board/st/common/stusb160x.c create mode 100644 board/st/common/stusb160x.h diff --git a/board/st/common/Kconfig b/board/st/common/Kconfig index 015ba40939..5280d0f9ed 100644 --- a/board/st/common/Kconfig +++ b/board/st/common/Kconfig @@ -69,3 +69,10 @@ config DFU_ALT_RAM0 depends on ARCH_STM32MP && SET_DFU_ALT_INFO help This defines the partitions of ram used to build dfu dynamically. + +config TYPEC_STUSB160X + tristate "STMicroelectronics STUSB160X Type-C controller driver" + depends on DM_I2C + help + Say Y if your system has STMicroelectronics STUSB160X Type-C port + controller. diff --git a/board/st/common/Makefile b/board/st/common/Makefile index aa030bacd8..1a5280e139 100644 --- a/board/st/common/Makefile +++ b/board/st/common/Makefile @@ -9,3 +9,5 @@ ifeq ($(CONFIG_ARCH_STM32MP),y) obj-$(CONFIG_SYS_MTDPARTS_RUNTIME) += stm32mp_mtdparts.o obj-$(CONFIG_SET_DFU_ALT_INFO) += stm32mp_dfu.o endif + +obj-$(CONFIG_TYPEC_STUSB160X) += stusb160x.o diff --git a/board/st/common/stusb160x.c b/board/st/common/stusb160x.c new file mode 100644 index 0000000000..f1197f9faa --- /dev/null +++ b/board/st/common/stusb160x.c @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * STMicroelectronics STUSB Type-C controller driver + * based on Linux drivers/usb/typec/stusb160x.c + * + * Copyright (C) 2020, STMicroelectronics - All Rights Reserved + */ + +#include <common.h> +#include <dm.h> +#include <i2c.h> + +/* REGISTER */ +#define STUSB160X_CC_CONNECTION_STATUS 0x0E + +/* STUSB160X_CC_CONNECTION_STATUS bitfields */ +#define STUSB160X_CC_ATTACH BIT(0) + +int stusb160x_cable_connected(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_I2C_GENERIC, + DM_GET_DRIVER(stusb160x), + &dev); + if (ret < 0) + return ret; + + ret = dm_i2c_reg_read(dev, STUSB160X_CC_CONNECTION_STATUS); + if (ret < 0) + return 0; + + return ret & STUSB160X_CC_ATTACH; +} + +static const struct udevice_id stusb160x_ids[] = { + { .compatible = "st,stusb1600" }, + {} +}; + +U_BOOT_DRIVER(stusb160x) = { + .name = "stusb160x", + .id = UCLASS_I2C_GENERIC, + .of_match = stusb160x_ids, +}; diff --git a/board/st/common/stusb160x.h b/board/st/common/stusb160x.h new file mode 100644 index 0000000000..fe39840b41 --- /dev/null +++ b/board/st/common/stusb160x.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2020, STMicroelectronics + */ + +#ifdef CONFIG_TYPEC_STUSB160X +int stusb160x_cable_connected(void); +#else +int stusb160x_cable_connected(void) { return -ENODEV; } +#endif diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 4553329b25..a257375807 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -41,6 +41,8 @@ #include <power/regulator.h> #include <usb/dwc2_udc.h> +#include "../../st/common/stusb160x.h" + /* SYSCFG registers */ #define SYSCFG_BOOTR 0x00 #define SYSCFG_PMCSETR 0x04 @@ -175,64 +177,16 @@ static void board_key_check(void) } #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) - -/* STMicroelectronics STUSB1600 Type-C controller */ -#define STUSB1600_CC_CONNECTION_STATUS 0x0E - -/* STUSB1600_CC_CONNECTION_STATUS bitfields */ -#define STUSB1600_CC_ATTACH BIT(0) - -static int stusb1600_init(struct udevice **dev_stusb1600) -{ - ofnode node; - struct udevice *dev, *bus; - int ret; - u32 chip_addr; - - *dev_stusb1600 = NULL; - - /* if node stusb1600 is present, means DK1 or DK2 board */ - node = ofnode_by_compatible(ofnode_null(), "st,stusb1600"); - if (!ofnode_valid(node)) - return -ENODEV; - - ret = ofnode_read_u32(node, "reg", &chip_addr); - if (ret) - return -EINVAL; - - ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node), - &bus); - if (ret) { - printf("bus for stusb1600 not found\n"); - return -ENODEV; - } - - ret = dm_i2c_probe(bus, chip_addr, 0, &dev); - if (!ret) - *dev_stusb1600 = dev; - - return ret; -} - -static int stusb1600_cable_connected(struct udevice *dev) -{ - u8 status; - - if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1)) - return 0; - - return status & STUSB1600_CC_ATTACH; -} - #include <usb/dwc2_udc.h> int g_dnl_board_usb_cable_connected(void) { - struct udevice *stusb1600; struct udevice *dwc2_udc_otg; int ret; - if (!stusb1600_init(&stusb1600)) - return stusb1600_cable_connected(stusb1600); + /* if typec stusb160x is present, means DK1 or DK2 board */ + ret = stusb160x_cable_connected(); + if (ret >= 0) + return ret; ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC, DM_GET_DRIVER(dwc2_udc_otg), diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index c7dd2926c9..7d41606a98 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_TARGET_ST_STM32MP15x=y CONFIG_CMD_STM32PROG=y +CONFIG_TYPEC_STUSB160X=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index ca4a10813b..decdc2c1de 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x280000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_TARGET_ST_STM32MP15x=y CONFIG_CMD_STM32PROG=y +CONFIG_TYPEC_STUSB160X=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y -- 2.17.1

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[PATCH 1/1] test: correct time stamps for UEFI authentication
by Heinrich Schuchardt 02 Jul '20

02 Jul '20

A time authenticated variable cannot be overwritten with another value with the same time stamp. So we must ensure the correct sequence of time stamps when generating out test data. Using parameter -t for sign-efi-sig-list gives reproducible results and avoids sleep statements. In test_authvar.py test 1g loading a variable with the same time stamp fails. Correct the expected result. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- test/py/tests/test_efi_secboot/conftest.py | 16 ++++++++-------- test/py/tests/test_efi_secboot/test_authvar.py | 3 ++- 2 files changed, 10 insertions(+), 9 deletions(-) diff --git a/test/py/tests/test_efi_secboot/conftest.py b/test/py/tests/test_efi_secboot/conftest.py index 5d99b8b718..ac5a780fdb 100644 --- a/test/py/tests/test_efi_secboot/conftest.py +++ b/test/py/tests/test_efi_secboot/conftest.py @@ -76,37 +76,37 @@ def efi_boot_env(request, u_boot_config): ## PK check_call('cd %s; openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_PK/ -keyout PK.key -out PK.crt -nodes -days 365' % mnt_point, shell=True) - check_call('cd %s; %scert-to-efi-sig-list -g %s PK.crt PK.esl; %ssign-efi-sig-list -c PK.crt -k PK.key PK PK.esl PK.auth' + check_call('cd %s; %scert-to-efi-sig-list -g %s PK.crt PK.esl; %ssign-efi-sig-list -t "2020-04-01" -c PK.crt -k PK.key PK PK.esl PK.auth' % (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH), shell=True) ## PK_null for deletion - check_call('cd %s; sleep 2; touch PK_null.esl; %ssign-efi-sig-list -c PK.crt -k PK.key PK PK_null.esl PK_null.auth' + check_call('cd %s; touch PK_null.esl; %ssign-efi-sig-list -t "2020-04-02" -c PK.crt -k PK.key PK PK_null.esl PK_null.auth' % (mnt_point, EFITOOLS_PATH), shell=True) ## KEK check_call('cd %s; openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_KEK/ -keyout KEK.key -out KEK.crt -nodes -days 365' % mnt_point, shell=True) - check_call('cd %s; %scert-to-efi-sig-list -g %s KEK.crt KEK.esl; %ssign-efi-sig-list -c PK.crt -k PK.key KEK KEK.esl KEK.auth' + check_call('cd %s; %scert-to-efi-sig-list -g %s KEK.crt KEK.esl; %ssign-efi-sig-list -t "2020-04-03" -c PK.crt -k PK.key KEK KEK.esl KEK.auth' % (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH), shell=True) ## db check_call('cd %s; openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_db/ -keyout db.key -out db.crt -nodes -days 365' % mnt_point, shell=True) - check_call('cd %s; %scert-to-efi-sig-list -g %s db.crt db.esl; %ssign-efi-sig-list -c KEK.crt -k KEK.key db db.esl db.auth' + check_call('cd %s; %scert-to-efi-sig-list -g %s db.crt db.esl; %ssign-efi-sig-list -t "2020-04-04" -c KEK.crt -k KEK.key db db.esl db.auth' % (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH), shell=True) ## db1 check_call('cd %s; openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_db1/ -keyout db1.key -out db1.crt -nodes -days 365' % mnt_point, shell=True) - check_call('cd %s; %scert-to-efi-sig-list -g %s db1.crt db1.esl; %ssign-efi-sig-list -c KEK.crt -k KEK.key db db1.esl db1.auth' + check_call('cd %s; %scert-to-efi-sig-list -g %s db1.crt db1.esl; %ssign-efi-sig-list -t "2020-04-05" -c KEK.crt -k KEK.key db db1.esl db1.auth' % (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH), shell=True) ## db1-update - check_call('cd %s; %ssign-efi-sig-list -a -c KEK.crt -k KEK.key db db1.esl db1-update.auth' + check_call('cd %s; %ssign-efi-sig-list -t "2020-04-06" -a -c KEK.crt -k KEK.key db db1.esl db1-update.auth' % (mnt_point, EFITOOLS_PATH), shell=True) ## dbx check_call('cd %s; openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_dbx/ -keyout dbx.key -out dbx.crt -nodes -days 365' % mnt_point, shell=True) - check_call('cd %s; %scert-to-efi-sig-list -g %s dbx.crt dbx.esl; %ssign-efi-sig-list -c KEK.crt -k KEK.key dbx dbx.esl dbx.auth' + check_call('cd %s; %scert-to-efi-sig-list -g %s dbx.crt dbx.esl; %ssign-efi-sig-list -t "2020-04-05" -c KEK.crt -k KEK.key dbx dbx.esl dbx.auth' % (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH), shell=True) @@ -117,7 +117,7 @@ def efi_boot_env(request, u_boot_config): check_call('cd %s; sbsign --key db.key --cert db.crt helloworld.efi' % mnt_point, shell=True) ## Digest image - check_call('cd %s; %shash-to-efi-sig-list helloworld.efi db_hello.hash; %ssign-efi-sig-list -c KEK.crt -k KEK.key db db_hello.hash db_hello.auth' + check_call('cd %s; %shash-to-efi-sig-list helloworld.efi db_hello.hash; %ssign-efi-sig-list -t "2020-04-07" -c KEK.crt -k KEK.key db db_hello.hash db_hello.auth' % (mnt_point, EFITOOLS_PATH, EFITOOLS_PATH), shell=True) diff --git a/test/py/tests/test_efi_secboot/test_authvar.py b/test/py/tests/test_efi_secboot/test_authvar.py index 9912694a3e..e28bb280e6 100644 --- a/test/py/tests/test_efi_secboot/test_authvar.py +++ b/test/py/tests/test_efi_secboot/test_authvar.py @@ -111,11 +111,12 @@ class TestEfiAuthVar(object): 'setenv -e -nv -bs -rt -i 4000000,$filesize db']) assert(re.search('Failed to set EFI variable', ''.join(output))) + # We cannot load the variable twice with the same time stamp. output = u_boot_console.run_command_list([ 'fatload host 0:1 4000000 db.auth', 'setenv -e -nv -bs -rt -at -i 4000000,$filesize db', 'printenv -e -n -guid d719b2cb-3d3a-4596-a3bc-dad00e67656f db']) - assert(not re.search('Failed to set EFI variable', ''.join(output))) + assert(re.search('Failed to set EFI variable', ''.join(output))) assert(re.search('db:', ''.join(output))) output = u_boot_console.run_command( -- 2.27.0

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[PATCH] omap3_beagle: Finish current outstanding DM migrations
by Tom Rini 02 Jul '20

02 Jul '20

At this point in time we can now remove our legacy code and switch to enabling DM for USB and Ethernet. Cc: Derald D. Woods <woods.technical(a)gmail.com> Cc: Adam Ford <aford173(a)gmail.com> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- board/ti/beagle/beagle.c | 70 ---------------------------------- configs/omap3_beagle_defconfig | 5 ++- 2 files changed, 4 insertions(+), 71 deletions(-) diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 9139ad87d400..9ccd566da370 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -40,11 +40,6 @@ #include "beagle.h" #include <command.h> -#ifdef CONFIG_USB_EHCI_HCD -#include <usb.h> -#include <asm/ehci-omap.h> -#endif - #define TWL4030_I2C_BUS 0 #define EXPANSION_EEPROM_I2C_BUS 1 #define EXPANSION_EEPROM_I2C_ADDRESS 0x50 @@ -297,33 +292,6 @@ static void beagle_dvi_pup(void) } #endif -#ifdef CONFIG_USB_MUSB_OMAP2PLUS -static struct musb_hdrc_config musb_config = { - .multipoint = 1, - .dyn_fifo = 1, - .num_eps = 16, - .ram_bits = 12, -}; - -static struct omap_musb_board_data musb_board_data = { - .interface_type = MUSB_INTERFACE_ULPI, -}; - -static struct musb_hdrc_platform_data musb_plat = { -#if defined(CONFIG_USB_MUSB_HOST) - .mode = MUSB_HOST, -#elif defined(CONFIG_USB_MUSB_GADGET) - .mode = MUSB_PERIPHERAL, -#else -#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET" -#endif - .config = &musb_config, - .power = 100, - .platform_ops = &omap2430_ops, - .board_data = &musb_board_data, -}; -#endif - /* * Routine: misc_init_r * Description: Configure board specific parts @@ -506,10 +474,6 @@ int misc_init_r(void) omap3_dss_enable(); #endif -#ifdef CONFIG_USB_MUSB_OMAP2PLUS - musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE); -#endif - if (generate_fake_mac) omap_die_id_usbethaddr(); @@ -548,37 +512,3 @@ void board_mmc_power_init(void) twl4030_power_mmc_init(0); } #endif - -#if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD) -/* Call usb_stop() before starting the kernel */ -void show_boot_progress(int val) -{ - if (val == BOOTSTAGE_ID_RUN_OS) - usb_stop(); -} - -static struct omap_usbhs_board_data usbhs_bdata = { - .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED -}; - -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); -} - -int ehci_hcd_stop(int index) -{ - return omap_ehci_hcd_stop(); -} - -#endif /* CONFIG_USB_EHCI_HCD */ - -#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) -int board_eth_init(bd_t *bis) -{ - return usb_eth_initialize(bis); -} -#endif diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index ed7cb8f2ff63..b08ffc062d29 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -3,11 +3,11 @@ CONFIG_ARM=y # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_BEAGLE=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y -CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_USE_PREBOOT=y @@ -73,10 +73,13 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 CONFIG_SPL_NAND_SIMPLE=y +CONFIG_DM_ETH=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_OMAP3_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y +# CONFIG_SPL_DM_USB is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_OMAP3=y CONFIG_USB_MUSB_GADGET=y -- 2.17.1

3 5

[1/5] i2c: mxc: move i2c_early_init_f to common function
by Biwen Li 02 Jul '20

02 Jul '20

From: Biwen Li <biwen.li(a)nxp.com> Move i2c_early_init_f to common function to initialize baudrate of i2c Signed-off-by: Biwen Li <biwen.li(a)nxp.com> --- drivers/i2c/mxc_i2c.c | 138 +++++++++++++++++++++++++------------------------- 1 file changed, 70 insertions(+), 68 deletions(-) diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index a03c465..1cc1f50 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -4,6 +4,7 @@ * * (c) 2007 Pengutronix, Sascha Hauer <s.hauer(a)pengutronix.de> * (c) 2011 Marek Vasut <marek.vasut(a)gmail.com> + * Copyright 2020 NXP * * Based on i2c-imx.c from linux kernel: * Copyright (C) 2005 Torsten Koschorrek <koschorrek at synertronixx.de> @@ -338,6 +339,57 @@ static int i2c_init_transfer_(struct mxc_i2c_bus *i2c_bus, u8 chip, return 0; } +#if !defined(I2C2_BASE_ADDR) +#define I2C2_BASE_ADDR 0 +#endif + +#if !defined(I2C3_BASE_ADDR) +#define I2C3_BASE_ADDR 0 +#endif + +#if !defined(I2C4_BASE_ADDR) +#define I2C4_BASE_ADDR 0 +#endif + +#if !defined(I2C5_BASE_ADDR) +#define I2C5_BASE_ADDR 0 +#endif + +#if !defined(I2C6_BASE_ADDR) +#define I2C6_BASE_ADDR 0 +#endif + +#if !defined(I2C7_BASE_ADDR) +#define I2C7_BASE_ADDR 0 +#endif + +#if !defined(I2C8_BASE_ADDR) +#define I2C8_BASE_ADDR 0 +#endif + +static struct mxc_i2c_bus mxc_i2c_buses[] = { +#if defined(CONFIG_ARCH_LS1021A) || defined(CONFIG_VF610) || \ + defined(CONFIG_FSL_LAYERSCAPE) + { 0, I2C1_BASE_ADDR, I2C_QUIRK_FLAG }, + { 1, I2C2_BASE_ADDR, I2C_QUIRK_FLAG }, + { 2, I2C3_BASE_ADDR, I2C_QUIRK_FLAG }, + { 3, I2C4_BASE_ADDR, I2C_QUIRK_FLAG }, + { 4, I2C5_BASE_ADDR, I2C_QUIRK_FLAG }, + { 5, I2C6_BASE_ADDR, I2C_QUIRK_FLAG }, + { 6, I2C7_BASE_ADDR, I2C_QUIRK_FLAG }, + { 7, I2C8_BASE_ADDR, I2C_QUIRK_FLAG }, +#else + { 0, I2C1_BASE_ADDR, 0 }, + { 1, I2C2_BASE_ADDR, 0 }, + { 2, I2C3_BASE_ADDR, 0 }, + { 3, I2C4_BASE_ADDR, 0 }, + { 4, I2C5_BASE_ADDR, 0 }, + { 5, I2C6_BASE_ADDR, 0 }, + { 6, I2C7_BASE_ADDR, 0 }, + { 7, I2C8_BASE_ADDR, 0 }, +#endif +}; + #ifndef CONFIG_DM_I2C int i2c_idle_bus(struct mxc_i2c_bus *i2c_bus) { @@ -431,6 +483,24 @@ exit: return ret; } #endif +/* + * Early init I2C for prepare read the clk through I2C. + */ +void i2c_early_init_f(void) +{ + ulong base = mxc_i2c_buses[I2C_EARLY_INIT_INDEX].base; + bool quirk = mxc_i2c_buses[I2C_EARLY_INIT_INDEX].driver_data + & I2C_QUIRK_FLAG ? true : false; + int reg_shift = quirk ? VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; + + /* Set I2C divider value */ + writeb(I2C_IFDR_DIV_CONSERVATIVE, base + (IFDR << reg_shift)); + /* Reset module */ + writeb(I2CR_IDIS, base + (I2CR << reg_shift)); + writeb(0, base + (I2SR << reg_shift)); + /* Enable I2C */ + writeb(I2CR_IEN, base + (I2CR << reg_shift)); +} static int i2c_init_transfer(struct mxc_i2c_bus *i2c_bus, u8 chip, u32 addr, int alen) @@ -659,57 +729,6 @@ static int bus_i2c_write(struct mxc_i2c_bus *i2c_bus, u8 chip, u32 addr, return ret; } -#if !defined(I2C2_BASE_ADDR) -#define I2C2_BASE_ADDR 0 -#endif - -#if !defined(I2C3_BASE_ADDR) -#define I2C3_BASE_ADDR 0 -#endif - -#if !defined(I2C4_BASE_ADDR) -#define I2C4_BASE_ADDR 0 -#endif - -#if !defined(I2C5_BASE_ADDR) -#define I2C5_BASE_ADDR 0 -#endif - -#if !defined(I2C6_BASE_ADDR) -#define I2C6_BASE_ADDR 0 -#endif - -#if !defined(I2C7_BASE_ADDR) -#define I2C7_BASE_ADDR 0 -#endif - -#if !defined(I2C8_BASE_ADDR) -#define I2C8_BASE_ADDR 0 -#endif - -static struct mxc_i2c_bus mxc_i2c_buses[] = { -#if defined(CONFIG_ARCH_LS1021A) || defined(CONFIG_VF610) || \ - defined(CONFIG_FSL_LAYERSCAPE) - { 0, I2C1_BASE_ADDR, I2C_QUIRK_FLAG }, - { 1, I2C2_BASE_ADDR, I2C_QUIRK_FLAG }, - { 2, I2C3_BASE_ADDR, I2C_QUIRK_FLAG }, - { 3, I2C4_BASE_ADDR, I2C_QUIRK_FLAG }, - { 4, I2C5_BASE_ADDR, I2C_QUIRK_FLAG }, - { 5, I2C6_BASE_ADDR, I2C_QUIRK_FLAG }, - { 6, I2C7_BASE_ADDR, I2C_QUIRK_FLAG }, - { 7, I2C8_BASE_ADDR, I2C_QUIRK_FLAG }, -#else - { 0, I2C1_BASE_ADDR, 0 }, - { 1, I2C2_BASE_ADDR, 0 }, - { 2, I2C3_BASE_ADDR, 0 }, - { 3, I2C4_BASE_ADDR, 0 }, - { 4, I2C5_BASE_ADDR, 0 }, - { 5, I2C6_BASE_ADDR, 0 }, - { 6, I2C7_BASE_ADDR, 0 }, - { 7, I2C8_BASE_ADDR, 0 }, -#endif -}; - struct mxc_i2c_bus *i2c_get_base(struct i2c_adapter *adap) { return &mxc_i2c_buses[adap->hwadapnr]; @@ -767,24 +786,7 @@ void bus_i2c_init(int index, int speed, int unused, bus_i2c_set_bus_speed(&mxc_i2c_buses[index], speed); } -/* - * Early init I2C for prepare read the clk through I2C. - */ -void i2c_early_init_f(void) -{ - ulong base = mxc_i2c_buses[I2C_EARLY_INIT_INDEX].base; - bool quirk = mxc_i2c_buses[I2C_EARLY_INIT_INDEX].driver_data - & I2C_QUIRK_FLAG ? true : false; - int reg_shift = quirk ? VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; - /* Set I2C divider value */ - writeb(I2C_IFDR_DIV_CONSERVATIVE, base + (IFDR << reg_shift)); - /* Reset module */ - writeb(I2CR_IDIS, base + (I2CR << reg_shift)); - writeb(0, base + (I2SR << reg_shift)); - /* Enable I2C */ - writeb(I2CR_IEN, base + (I2CR << reg_shift)); -} /* * Init I2C Bus -- 2.7.4

1 4

[PATCH 1/1] efi_loader: time based authentication
by Heinrich Schuchardt 01 Jul '20

01 Jul '20

When overwriting an existing time base authenticated variable we should compare to the preceding time value and not to the start of the epoch. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- lib/efi_loader/efi_variable.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c index c262cb5972..974b710fec 100644 --- a/lib/efi_loader/efi_variable.c +++ b/lib/efi_loader/efi_variable.c @@ -35,7 +35,8 @@ static u8 efi_vendor_keys; static efi_status_t efi_get_variable_common(u16 *variable_name, const efi_guid_t *vendor, u32 *attributes, - efi_uintn_t *data_size, void *data); + efi_uintn_t *data_size, void *data, + u64 *timep); static efi_status_t efi_set_variable_common(u16 *variable_name, const efi_guid_t *vendor, @@ -308,7 +309,7 @@ static efi_status_t efi_init_secure_state(void) size = 0; ret = efi_get_variable_common(L"PK", &efi_global_variable_guid, - NULL, &size, NULL); + NULL, &size, NULL, NULL); if (ret == EFI_BUFFER_TOO_SMALL) { if (IS_ENABLED(CONFIG_EFI_SECURE_BOOT)) mode = EFI_MODE_USER; @@ -596,7 +597,8 @@ static efi_status_t efi_variable_authenticate(u16 *variable, static efi_status_t efi_get_variable_common(u16 *variable_name, const efi_guid_t *vendor, u32 *attributes, - efi_uintn_t *data_size, void *data) + efi_uintn_t *data_size, void *data, + u64 *timep) { char *native_name; efi_status_t ret; @@ -621,6 +623,9 @@ static efi_status_t efi_get_variable_common(u16 *variable_name, val = parse_attr(val, &attr, &time); + if (timep) + *timep = time; + in_size = *data_size; if ((s = prefix(val, "(blob)"))) { @@ -704,7 +709,7 @@ efi_status_t EFIAPI efi_get_variable(u16 *variable_name, data_size, data); ret = efi_get_variable_common(variable_name, vendor, attributes, - data_size, data); + data_size, data, NULL); return EFI_EXIT(ret); } @@ -900,7 +905,7 @@ static efi_status_t efi_set_variable_common(u16 *variable_name, old_size = 0; attr = 0; ret = efi_get_variable_common(variable_name, vendor, &attr, - &old_size, NULL); + &old_size, NULL, &time); append = !!(attributes & EFI_VARIABLE_APPEND_WRITE); attributes &= ~(u32)EFI_VARIABLE_APPEND_WRITE; delete = !append && (!data_size || !attributes); @@ -991,7 +996,7 @@ static efi_status_t efi_set_variable_common(u16 *variable_name, goto err; } ret = efi_get_variable_common(variable_name, vendor, - &attr, &old_size, old_data); + &attr, &old_size, old_data, NULL); if (ret != EFI_SUCCESS) goto err; } else { -- 2.27.0

1 0

[PATCH 0/2] efi_loader: fix efi_image_region_add()
by Heinrich Schuchardt 01 Jul '20

01 Jul '20

Handle start and end of the half-open intervals correctly. Provide unit tests. Heinrich Schuchardt (2): efi_loader: fix efi_image_region_add() test: provide tests for efi_image_region_add() MAINTAINERS | 1 + lib/efi_loader/efi_signature.c | 35 +++---- test/lib/Makefile | 1 + test/lib/efi_image_region.c | 163 +++++++++++++++++++++++++++++++++ 4 files changed, 184 insertions(+), 16 deletions(-) create mode 100644 test/lib/efi_image_region.c -- 2.27.0

1 2

[PATCH v3] ARM: dts: stm32: add seeed studio odyssey-stm32mp157c board
by Marcin Sloniewski 01 Jul '20

01 Jul '20

This commit adds device tree files supporting SBC from Seeed Studio based on STM32MP157C. This works with generic stm32mp1 config. Right now only booting from SD card is supported. Signed-off-by: Marcin Sloniewski <marcin.sloniewski(a)gmail.com> --- Changes in v3: - changed name of dts files from odyssey-stm32mp157c... to stm32mp157c-odyssey... - removed usbotg node config - add new board in dts/Makefile in alphabetical order Changes in v2: - removed `st,adc_usb_pd` from config since that adc connection is non-existent which caused warning or hang during boot arch/arm/dts/Makefile | 1 + .../dts/stm32mp157c-odyssey-som-u-boot.dtsi | 134 +++++++ arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 364 ++++++++++++++++++ arch/arm/dts/stm32mp157c-odyssey-u-boot.dtsi | 60 +++ arch/arm/dts/stm32mp157c-odyssey.dts | 161 ++++++++ 5 files changed, 720 insertions(+) create mode 100644 arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi create mode 100644 arch/arm/dts/stm32mp157c-odyssey-som.dtsi create mode 100644 arch/arm/dts/stm32mp157c-odyssey-u-boot.dtsi create mode 100644 arch/arm/dts/stm32mp157c-odyssey.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 9900b44274..af94ed5aef 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -917,6 +917,7 @@ dtb-$(CONFIG_STM32MP15x) += \ stm32mp157c-dk2.dtb \ stm32mp157c-ed1.dtb \ stm32mp157c-ev1.dtb \ + stm32mp157c-odyssey.dtb \ stm32mp15xx-dhcom-pdk2.dtb \ stm32mp15xx-dhcor-avenger96.dtb diff --git a/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi new file mode 100644 index 0000000000..cf08efae09 --- /dev/null +++ b/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Copyright (C) 2020 Marcin Sloniewski <marcin.sloniewski(a)gmail.com> + */ + +#include <dt-bindings/clock/stm32mp1-clksrc.h> +#include "stm32mp15-u-boot.dtsi" +#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi" + +/ { + config { + u-boot,boot-led = "heartbeat"; + }; +}; + +&clk_hse { + st,digbypass; +}; + +&i2c2 { + u-boot,dm-pre-reloc; +}; + +&i2c2_pins_a { + u-boot,dm-pre-reloc; + pins { + u-boot,dm-pre-reloc; + }; +}; + +&pmic { + u-boot,dm-pre-reloc; +}; + +&rcc { + st,clksrc = < + CLK_MPU_PLL1P + CLK_AXI_PLL2P + CLK_MCU_PLL3P + CLK_PLL12_HSE + CLK_PLL3_HSE + CLK_PLL4_HSE + CLK_RTC_LSE + CLK_MCO1_DISABLED + CLK_MCO2_DISABLED + >; + + st,clkdiv = < + 1 /*MPU*/ + 0 /*AXI*/ + 0 /*MCU*/ + 1 /*APB1*/ + 1 /*APB2*/ + 1 /*APB3*/ + 1 /*APB4*/ + 2 /*APB5*/ + 23 /*RTC*/ + 0 /*MCO1*/ + 0 /*MCO2*/ + >; + + st,pkcs = < + CLK_CKPER_HSE + CLK_FMC_ACLK + CLK_QSPI_ACLK + CLK_ETH_DISABLED + CLK_SDMMC12_PLL4P + CLK_DSI_DSIPLL + CLK_STGEN_HSE + CLK_USBPHY_HSE + CLK_SPI2S1_PLL3Q + CLK_SPI2S23_PLL3Q + CLK_SPI45_HSI + CLK_SPI6_HSI + CLK_I2C46_HSI + CLK_SDMMC3_PLL4P + CLK_USBO_USBPHY + CLK_ADC_CKPER + CLK_CEC_LSE + CLK_I2C12_HSI + CLK_I2C35_HSI + CLK_UART1_HSI + CLK_UART24_HSI + CLK_UART35_HSI + CLK_UART6_HSI + CLK_UART78_HSI + CLK_SPDIF_PLL4P + CLK_FDCAN_PLL4R + CLK_SAI1_PLL3Q + CLK_SAI2_PLL3Q + CLK_SAI3_PLL3Q + CLK_SAI4_PLL3Q + CLK_RNG1_LSI + CLK_RNG2_LSI + CLK_LPTIM1_PCLK1 + CLK_LPTIM23_PCLK3 + CLK_LPTIM45_LSE + >; + + /* VCO = 1300.0 MHz => P = 650 (CPU) */ + pll1: st,pll@0 { + compatible = "st,stm32mp1-pll"; + reg = <0>; + cfg = < 2 80 0 0 0 PQR(1,0,0) >; + frac = < 0x800 >; + u-boot,dm-pre-reloc; + }; + + /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */ + pll2: st,pll@1 { + compatible = "st,stm32mp1-pll"; + reg = <1>; + cfg = < 2 65 1 0 0 PQR(1,1,1) >; + frac = < 0x1400 >; + u-boot,dm-pre-reloc; + }; + + /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ + pll3: st,pll@2 { + compatible = "st,stm32mp1-pll"; + reg = <2>; + cfg = < 1 33 1 16 36 PQR(1,1,1) >; + frac = < 0x1a04 >; + u-boot,dm-pre-reloc; + }; + + /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ + pll4: st,pll@3 { + compatible = "st,stm32mp1-pll"; + reg = <3>; + cfg = < 3 98 5 7 7 PQR(1,1,1) >; + u-boot,dm-pre-reloc; + }; +}; diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi new file mode 100644 index 0000000000..855de9523c --- /dev/null +++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi @@ -0,0 +1,364 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) 2020 Marcin Sloniewski <marcin.sloniewski(a)gmail.com> + */ + +/dts-v1/; + +#include "stm32mp157.dtsi" +#include "stm32mp15xc.dtsi" +#include "stm32mp15-pinctrl.dtsi" +#include "stm32mp15xxac-pinctrl.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/mfd/st,stpmic1.h> + +/ { + + model = "Seeed Studio Odyssey-STM32MP157C SOM"; + compatible = "seeed,odyssey-stm32mp157c-som", "st,stm32mp157"; + + memory@c0000000 { + device_type = "memory"; + reg = <0xc0000000 0x20000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + mcuram2: mcuram2@10000000 { + compatible = "shared-dma-pool"; + reg = <0x10000000 0x40000>; + no-map; + }; + + vdev0vring0: vdev0vring0@10040000 { + compatible = "shared-dma-pool"; + reg = <0x10040000 0x1000>; + no-map; + }; + + vdev0vring1: vdev0vring1@10041000 { + compatible = "shared-dma-pool"; + reg = <0x10041000 0x1000>; + no-map; + }; + + vdev0buffer: vdev0buffer@10042000 { + compatible = "shared-dma-pool"; + reg = <0x10042000 0x4000>; + no-map; + }; + + mcuram: mcuram@30000000 { + compatible = "shared-dma-pool"; + reg = <0x30000000 0x40000>; + no-map; + }; + + retram: retram@38000000 { + compatible = "shared-dma-pool"; + reg = <0x38000000 0x10000>; + no-map; + }; + + gpu_reserved: gpu@d4000000 { + reg = <0xd4000000 0x4000000>; + no-map; + }; + + optee@de000000 { + reg = <0xde000000 0x02000000>; + no-map; + }; + }; + + led { + compatible = "gpio-leds"; + blue { + label = "heartbeat"; + gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + }; + +}; + +&gpu { + contiguous-area = <&gpu_reserved>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c2_pins_a>; + pinctrl-1 = <&i2c2_pins_sleep_a>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + clock-frequency = <400000>; + status = "okay"; + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + pmic: stpmic@33 { + compatible = "st,stpmic1"; + reg = <0x33>; + interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells = <2>; + status = "okay"; + + regulators { + compatible = "st,stpmic1-regulators"; + ldo1-supply = <&v3v3>; + ldo3-supply = <&vdd_ddr>; + ldo6-supply = <&v3v3>; + pwr_sw1-supply = <&bst_out>; + pwr_sw2-supply = <&bst_out>; + + vddcore: buck1 { + regulator-name = "vddcore"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + vdd_ddr: buck2 { + regulator-name = "vdd_ddr"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + vdd: buck3 { + regulator-name = "vdd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + st,mask-reset; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + v3v3: buck4 { + regulator-name = "v3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-over-current-protection; + regulator-initial-mode = <0>; + }; + + v1v8_audio: ldo1 { + regulator-name = "v1v8_audio"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + interrupts = <IT_CURLIM_LDO1 0>; + }; + + v3v3_hdmi: ldo2 { + regulator-name = "v3v3_hdmi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + interrupts = <IT_CURLIM_LDO2 0>; + }; + + vtt_ddr: ldo3 { + regulator-name = "vtt_ddr"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <750000>; + regulator-always-on; + regulator-over-current-protection; + }; + + vdd_usb: ldo4 { + regulator-name = "vdd_usb"; + interrupts = <IT_CURLIM_LDO4 0>; + }; + + vdda: ldo5 { + regulator-name = "vdda"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + interrupts = <IT_CURLIM_LDO5 0>; + regulator-boot-on; + }; + + v1v2_hdmi: ldo6 { + regulator-name = "v1v2_hdmi"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + interrupts = <IT_CURLIM_LDO6 0>; + }; + + vref_ddr: vref_ddr { + regulator-name = "vref_ddr"; + regulator-always-on; + }; + + bst_out: boost { + regulator-name = "bst_out"; + interrupts = <IT_OCP_BOOST 0>; + }; + + vbus_otg: pwr_sw1 { + regulator-name = "vbus_otg"; + interrupts = <IT_OCP_OTG 0>; + }; + + vbus_sw: pwr_sw2 { + regulator-name = "vbus_sw"; + interrupts = <IT_OCP_SWOUT 0>; + regulator-active-discharge = <1>; + }; + }; + + onkey { + compatible = "st,stpmic1-onkey"; + interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>; + interrupt-names = "onkey-falling", "onkey-rising"; + power-off-time-sec = <10>; + status = "okay"; + }; + + watchdog { + compatible = "st,stpmic1-wdt"; + status = "disabled"; + }; + }; +}; + +&ipcc { + status = "okay"; +}; + +&iwdg2 { + timeout-sec = <32>; + status = "okay"; +}; + +&m4_rproc { + memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, + <&vdev0vring1>, <&vdev0buffer>; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; + mbox-names = "vq0", "vq1", "shutdown"; + interrupt-parent = <&exti>; + interrupts = <68 1>; + status = "okay"; +}; + +&sdmmc2 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc2_b4_pins_a>; + pinctrl-1 = <&sdmmc2_b4_od_pins_a>; + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>; + broken-cd; + disable-wp; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&v3v3>; + status = "okay"; +}; + +&timers1 { + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + status = "disabled"; + pwm { + pinctrl-0 = <&pwm1_pins_a>; + pinctrl-1 = <&pwm1_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; + timer@0 { + status = "okay"; + }; +}; + +&timers3 { + /delete-property/dmas; + /delete-property/dma-names; + status = "disabled"; + pwm { + pinctrl-0 = <&pwm3_pins_a>; + pinctrl-1 = <&pwm3_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; + timer@2 { + status = "okay"; + }; +}; + +&timers4 { + /delete-property/dmas; + /delete-property/dma-names; + status = "disabled"; + pwm { + pinctrl-0 = <&pwm4_pins_a &pwm4_pins_b>; + pinctrl-1 = <&pwm4_sleep_pins_a &pwm4_sleep_pins_b>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; + timer@3 { + status = "okay"; + }; +}; + +&timers5 { + /delete-property/dmas; + /delete-property/dma-names; + status = "disabled"; + pwm { + pinctrl-0 = <&pwm5_pins_a>; + pinctrl-1 = <&pwm5_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; + timer@4 { + status = "okay"; + }; +}; + +&timers6 { + /delete-property/dmas; + /delete-property/dma-names; + status = "disabled"; + timer@5 { + status = "okay"; + }; +}; + +&timers12 { + /delete-property/dmas; + /delete-property/dma-names; + status = "disabled"; + pwm { + pinctrl-0 = <&pwm12_pins_a>; + pinctrl-1 = <&pwm12_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; + timer@11 { + status = "okay"; + }; +}; + +&vrefbuf { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + vdda-supply = <&vdd>; + status = "okay"; +}; diff --git a/arch/arm/dts/stm32mp157c-odyssey-u-boot.dtsi b/arch/arm/dts/stm32mp157c-odyssey-u-boot.dtsi new file mode 100644 index 0000000000..606c74fb53 --- /dev/null +++ b/arch/arm/dts/stm32mp157c-odyssey-u-boot.dtsi @@ -0,0 +1,60 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Copyright (C) 2020 Marcin Sloniewski <marcin.sloniewski(a)gmail.com> + */ + + #include "stm32mp157c-odyssey-som-u-boot.dtsi" + +/ { + aliases { + mmc0 = &sdmmc1; + usb0 = &usbotg_hs; + }; + config { + u-boot,boot-led = "heartbeat"; + u-boot,error-led = "error"; + }; + led { + red { + label = "error"; + gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; + default-state = "off"; + status = "okay"; + }; + }; +}; + +&adc { + status = "okay"; +}; + +&sdmmc1 { + u-boot,dm-spl; +}; + +&sdmmc1_b4_pins_a { + u-boot,dm-spl; + pins1 { + u-boot,dm-spl; + }; + pins2 { + u-boot,dm-spl; + }; +}; + +&uart4 { + u-boot,dm-pre-reloc; +}; + +&uart4_pins_a { + u-boot,dm-pre-reloc; + pins1 { + u-boot,dm-pre-reloc; + }; + pins2 { + u-boot,dm-pre-reloc; + /* pull-up on rx to avoid floating level */ + bias-pull-up; + }; +}; + diff --git a/arch/arm/dts/stm32mp157c-odyssey.dts b/arch/arm/dts/stm32mp157c-odyssey.dts new file mode 100644 index 0000000000..1ea340d9a8 --- /dev/null +++ b/arch/arm/dts/stm32mp157c-odyssey.dts @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) 2020 Marcin Sloniewski <marcin.sloniewski(a)gmail.com> + */ + +/dts-v1/; + +#include "stm32mp157c-odyssey-som.dtsi" + +/ { + + model = "Seeed Studio Odyssey-STM32MP157C Board"; + compatible = "seeed,odyssey-stm32mp157c", "st,stm32mp157"; + + aliases { + ethernet0 = &ethernet0; + serial0 = &uart4; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + led { + compatible = "gpio-leds"; + blue { + label = "heartbeat"; + gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + }; + +}; + +&adc { + pinctrl-names = "default"; + pinctrl-0 = <&adc12_ain_pins_a>, <&adc12_usb_cc_pins_a>; + vdd-supply = <&vdd>; + vdda-supply = <&vdd>; + vref-supply = <&vrefbuf>; + status = "disabled"; + adc1: adc@0 { + /* + * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19. + * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C: + * 5 * (56 + 47kOhms) * 5pF => 2.5us. + * Use arbitrary margin here (e.g. 5us). + */ + st,min-sample-time-nsecs = <5000>; + /* AIN connector, USB Type-C CC1 & CC2 */ + st,adc-channels = <0 1 6 13 18 19>; + status = "okay"; + }; + adc2: adc@100 { + /* AIN connector, USB Type-C CC1 & CC2 */ + st,adc-channels = <0 1 2 6 18 19>; + st,min-sample-time-nsecs = <5000>; + status = "okay"; + }; +}; + +&cec { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cec_pins_b>; + pinctrl-1 = <&cec_pins_sleep_b>; + status = "okay"; +}; + +&ethernet0 { + status = "okay"; + pinctrl-0 = <&ethernet0_rgmii_pins_a>; + pinctrl-1 = <&ethernet0_rgmii_pins_sleep_a>; + pinctrl-names = "default", "sleep"; + phy-mode = "rgmii-id"; + max-speed = <1000>; + phy-handle = <&phy0>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy0: ethernet-phy@0 { + reg = <0>; + }; + }; +}; + +&gpu { + contiguous-area = <&gpu_reserved>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c1_pins_a>; + pinctrl-1 = <&i2c1_pins_sleep_a>; + i2c-scl-rising-time-ns = <100>; + i2c-scl-falling-time-ns = <7>; + status = "okay"; + /delete-property/dmas; + /delete-property/dma-names; +}; + +&i2s2 { + clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>; + clock-names = "pclk", "i2sclk", "x8k", "x11k"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2s2_pins_a>; + pinctrl-1 = <&i2s2_pins_sleep_a>; + status = "okay"; +}; + +&pwr_regulators { + vdd-supply = <&vdd>; + vdd_3v3_usbfs-supply = <&vdd_usb>; +}; + +&sdmmc1 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; + cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + disable-wp; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&v3v3>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins_a>; + status = "okay"; +}; + +&usbh_ehci { + phys = <&usbphyc_port0>; + status = "okay"; +}; + +&usbotg_hs { + dr_mode = "peripheral"; + phys = <&usbphyc_port1 0>; + phy-names = "usb2-phy"; + status = "okay"; +}; + +&usbphyc { + status = "okay"; +}; + +&usbphyc_port0 { + phy-supply = <&vdd_usb>; +}; + +&usbphyc_port1 { + phy-supply = <&vdd_usb>; +}; + -- 2.26.2

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[PATCH] tbs2910: migrate to DM_VIDEO
by Anatolij Gustschin 01 Jul '20

01 Jul '20

Migration to DM_VIDEO driver is long overdue, configure it in board config files. To enable the display set stdout like: setenv stdout serial,vidconsole Signed-off-by: Anatolij Gustschin <agust(a)denx.de> --- This is only build tested. configs/tbs2910_defconfig | 7 ++++++- include/configs/tbs2910.h | 2 -- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 2ff0e160f7..b40641c17b 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 CONFIG_TARGET_TBS2910=y @@ -84,7 +85,11 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_I2C_EDID=y +CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP32 is not set +# CONFIG_VIDEO_ANSI is not set CONFIG_VIDEO_IPUV3=y -CONFIG_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_OF_LIBFDT_ASSUME_MASK=0xff # CONFIG_EFI_LOADER is not set diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 7376b91f55..8ab3fcfe3e 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -37,11 +37,9 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */ /* Framebuffer */ -#ifdef CONFIG_VIDEO #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP -#endif /* PCI */ #ifdef CONFIG_CMD_PCI -- 2.17.1

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