July 2020 - U-Boot

[PATCH] arm: socfpga: soc64: Initialize timer in SPL only
by Chee Hong Ang 14 Jul '20

14 Jul '20

Timer only need to be initialized once in SPL. This patch remove the redundancy of initializing the timer again in U-Boot proper Signed-off-by: Chee Hong Ang <chee.hong.ang(a)intel.com> --- arch/arm/mach-socfpga/timer_s10.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-socfpga/timer_s10.c b/arch/arm/mach-socfpga/timer_s10.c index 3ad98bdb25..7d5598e1a3 100644 --- a/arch/arm/mach-socfpga/timer_s10.c +++ b/arch/arm/mach-socfpga/timer_s10.c @@ -14,6 +14,7 @@ */ int timer_init(void) { +#ifdef CONFIG_SPL_BUILD int enable = 0x3; /* timer enable + output signal masked */ int loadval = ~0; @@ -22,6 +23,6 @@ int timer_init(void) /* enable processor pysical counter */ asm volatile("msr cntp_ctl_el0, %0" : : "r" (enable)); asm volatile("msr cntp_tval_el0, %0" : : "r" (loadval)); - +#endif return 0; } -- 2.19.0

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[PATCH] arm: socfpga: soc64: Remove PHY interface setup from misc arch init
by Chee Hong Ang 14 Jul '20

14 Jul '20

'dwmac_socfpga' driver will setup the PHY interface during probe. PHY interface setup in arch_misc_init() is no longer needed. Signed-off-by: Chee Hong Ang <chee.hong.ang(a)intel.com> --- arch/arm/mach-socfpga/misc_s10.c | 84 +------------------------------- 1 file changed, 1 insertion(+), 83 deletions(-) diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c index 670bfa1a31..77c2b7764e 100644 --- a/arch/arm/mach-socfpga/misc_s10.c +++ b/arch/arm/mach-socfpga/misc_s10.c @@ -8,20 +8,12 @@ #include <common.h> #include <env.h> #include <errno.h> -#include <fdtdec.h> #include <init.h> #include <log.h> -#include <miiphy.h> -#include <netdev.h> #include <asm/io.h> -#include <asm/arch/reset_manager.h> -#include <asm/arch/system_manager.h> #include <asm/arch/misc.h> -#include <asm/pl310.h> -#include <linux/libfdt.h> #include <asm/arch/mailbox_s10.h> - -#include <dt-bindings/reset/altr,rst-mgr-s10.h> +#include <asm/arch/reset_manager.h> DECLARE_GLOBAL_DATA_PTR; @@ -45,79 +37,6 @@ static Altera_desc altera_fpga[] = { }, }; -/* - * DesignWare Ethernet initialization - */ -#ifdef CONFIG_ETH_DESIGNWARE - -static u32 socfpga_phymode_setup(u32 gmac_index, const char *phymode) -{ - u32 modereg; - - if (!phymode) - return -EINVAL; - - if (!strcmp(phymode, "mii") || !strcmp(phymode, "gmii") || - !strcmp(phymode, "sgmii")) - modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII; - else if (!strcmp(phymode, "rgmii")) - modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII; - else if (!strcmp(phymode, "rmii")) - modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII; - else - return -EINVAL; - - clrsetbits_le32(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_EMAC0 + - (gmac_index * sizeof(u32)), - SYSMGR_EMACGRP_CTRL_PHYSEL_MASK, modereg); - - return 0; -} - -static int socfpga_set_phymode(void) -{ - const void *fdt = gd->fdt_blob; - struct fdtdec_phandle_args args; - const char *phy_mode; - u32 gmac_index; - int nodes[3]; /* Max. 3 GMACs */ - int ret, count; - int i, node; - - count = fdtdec_find_aliases_for_id(fdt, "ethernet", - COMPAT_ALTERA_SOCFPGA_DWMAC, - nodes, ARRAY_SIZE(nodes)); - for (i = 0; i < count; i++) { - node = nodes[i]; - if (node <= 0) - continue; - - ret = fdtdec_parse_phandle_with_args(fdt, node, "resets", - "#reset-cells", 1, 0, - &args); - if (ret || args.args_count != 1) { - debug("GMAC%i: Failed to parse DT 'resets'!\n", i); - continue; - } - - gmac_index = args.args[0] - EMAC0_RESET; - - phy_mode = fdt_getprop(fdt, node, "phy-mode", NULL); - ret = socfpga_phymode_setup(gmac_index, phy_mode); - if (ret) { - debug("GMAC%i: Failed to parse DT 'phy-mode'!\n", i); - continue; - } - } - - return 0; -} -#else -static int socfpga_set_phymode(void) -{ - return 0; -}; -#endif /* * Print CPU information @@ -139,7 +58,6 @@ int arch_misc_init(void) sprintf(qspi_string, "<0x%08x>", cm_get_qspi_controller_clk_hz()); env_set("qspi_clock", qspi_string); - socfpga_set_phymode(); return 0; } #endif -- 2.19.0

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[GIT PULL] please pull NXP i.MX
by Peng Fan 14 Jul '20

14 Jul '20

Hi Stefano, This is collect of patches that pending in patchwork and some new patches posted recently. The PR is rebased on Tom's master branch since imx/master was not up to date, should I do the PR based on imx/master? CI: https://travis-ci.org/github/MrVan/u-boot/builds/707889918 ------------------------------------------------ i.MX DDR driver fix/update for i.MX8M i.MX pinctrl driver fix. Use arm_smccc_smc to remove imx sip function i.MX8M clk update support booting aarch32 kernel on aarch64 hardware fused part support for i.MX8MP ------------------------------------------------ Thanks, Peng. The following changes since commit 497c7598c4e713eb9ad88fd7963e57b21b8b35e1: Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi (2020-07-11 17:40:00 -0400) are available in the Git repository at: https://github.com/MrVan/u-boot.git tags/nxp-imx-7-14-2020 for you to fetch changes up to 86e9d7e8143eab4cfe4b74628153af9006bb1ad2: imx8mm_evk: enlarge CONFIG_SYS_BOOTM_LEN (2020-07-14 15:23:48 +0800) ---------------------------------------------------------------- Jacky Bai (2): driver: ddr: imx: skip ddr_ss_gpr config on imx8mn driver: ddr: imx: correct the pwrctl setting of selfref_en on imx8m Jian Li (3): imx8mp: enable rd_port_urgent imx8mp: DDR performance tunning imx8mp: Disables use of MR4 TUF flag (MR4[7]) bit Oliver Chen (1): drivers: ddr: imx Workaround for i.MX8M DDRPHY rank to rank issue Peng Fan (22): pinctrl: imx7: move soc info to data section pinctrl: imx8m: move soc info to data section pinctrl: imx5: move soc info to data section imx8: misc: use arm_smccc_smc imx8m: soc: use arm_smccc_smc imx: bootaux: use arm_smccc_smc imx8: fuse: use arm_smccc_smc imx: power-domain: use arm_smccc_smc imx: remove imx sip file clk: imx8mm: fix clk set parent clk: imx8mm: Add qspi clock imx8m: configure arm clk sources from PLL imx8m: configure NoC clk imx8m: add sdhc/nand/ecspi clk api imx8m: add eqos clk imx8m: workaround ROM serror imx8m: power down fused cores imx8m: disable nodes before kernel/mfgtool boot for fused part clk: imx8m: drop clk settings imx8m: Refactor the OPTEE memory removal imx8m: implement armv8_el2_to_aarch32 imx8mm_evk: enlarge CONFIG_SYS_BOOTM_LEN Sherry Sun (1): drivers: ddr: imx8mp: Add inline ECC feature support Ye Li (5): clk: clk-imx8mn: Update clock tree and support set parent clk: imx8mm/8mn: Add USB clocks clk: imx8mp: Update imx8mp ccf clock driver imx8mp: Add fused parts support imx8mn/imx8mp: override env_get_offset and env_get_location arch/arm/include/asm/arch-imx/cpu.h | 5 ++ arch/arm/include/asm/arch-imx8m/ddr.h | 10 +++ arch/arm/include/asm/arch-imx8m/imx-regs.h | 158 +++++++++++++++++++++++++++++++++ arch/arm/include/asm/mach-imx/sys_proto.h | 9 +- arch/arm/mach-imx/Makefile | 2 +- arch/arm/mach-imx/cpu.c | 12 ++- arch/arm/mach-imx/imx8/misc.c | 7 +- arch/arm/mach-imx/imx8m/clock_imx8mm.c | 299 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- arch/arm/mach-imx/imx8m/lowlevel_init.S | 12 +++ arch/arm/mach-imx/imx8m/soc.c | 612 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++--- arch/arm/mach-imx/imx_bootaux.c | 11 ++- arch/arm/mach-imx/sip.c | 48 ---------- board/beacon/imx8mm/imx8mm_beacon.c | 11 --- board/freescale/imx8mm_evk/imx8mm_evk.c | 11 --- board/freescale/imx8mn_evk/imx8mn_evk.c | 7 -- board/freescale/imx8mp_evk/imx8mp_evk.c | 40 --------- board/freescale/imx8mp_evk/lpddr4_timing.c | 5 +- board/freescale/imx8mq_evk/imx8mq_evk.c | 11 --- board/google/imx8mq_phanbell/imx8mq_phanbell.c | 11 --- board/technexion/pico-imx8mq/pico-imx8mq.c | 26 +++--- board/toradex/verdin-imx8mm/verdin-imx8mm.c | 11 --- configs/imx8mp_evk_defconfig | 1 - drivers/clk/imx/clk-imx8mm.c | 63 ++++++------- drivers/clk/imx/clk-imx8mn.c | 108 +++++++++++++++------- drivers/clk/imx/clk-imx8mp.c | 52 +++++++++++ drivers/ddr/imx/imx8m/Kconfig | 7 ++ drivers/ddr/imx/imx8m/ddr_init.c | 79 ++++++++++++++++- drivers/ddr/imx/imx8m/ddrphy_train.c | 7 ++ drivers/ddr/imx/imx8m/ddrphy_utils.c | 164 ++++++++++++++++++++++++++++++++++ drivers/misc/imx8/fuse.c | 19 ++-- drivers/pinctrl/nxp/pinctrl-imx5.c | 2 +- drivers/pinctrl/nxp/pinctrl-imx7.c | 2 +- drivers/pinctrl/nxp/pinctrl-imx8m.c | 2 +- drivers/power/domain/imx8m-power-domain.c | 10 ++- include/configs/imx8mm_evk.h | 1 + 35 files changed, 1566 insertions(+), 269 deletions(-) delete mode 100644 arch/arm/mach-imx/sip.c

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[PATCH] arm: dts: ls1028a: Add dspi flash device node to qds
by Qiang Zhao 14 Jul '20

14 Jul '20

From: Zhao Qiang <qiang.zhao(a)nxp.com> Add dspi flash device node to fsl-ls1028a-qds.dtsi Signed-off-by: Zhao Qiang <qiang.zhao(a)nxp.com> --- arch/arm/dts/fsl-ls1028a-qds.dtsi | 74 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/arch/arm/dts/fsl-ls1028a-qds.dtsi b/arch/arm/dts/fsl-ls1028a-qds.dtsi index 4f56f40..6cdcce1 100644 --- a/arch/arm/dts/fsl-ls1028a-qds.dtsi +++ b/arch/arm/dts/fsl-ls1028a-qds.dtsi @@ -15,20 +15,94 @@ compatible = "fsl,ls1028a-qds", "fsl,ls1028a"; aliases { spi0 = &fspi; + spi1 = &dspi0; + spi2 = &dspi1; + spi3 = &dspi2; }; }; &dspi0 { + bus-num = <0>; status = "okay"; + + dflash0: sst25wf040b { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <0>; + }; + + dflash1: en25s64 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <1>; + }; + dflash2: n25q128a { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <2>; + }; }; &dspi1 { + bus-num = <0>; status = "okay"; + + dflash3: sst25wf040b { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <0>; + }; + + dflash4: en25s64 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <1>; + }; + dflash5: n25q128a { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <2>; + }; }; &dspi2 { + bus-num = <0>; status = "okay"; + + dflash8: en25s64 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <0>; + }; }; &esdhc0 { -- 2.7.4

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[PATCH] ARM: da850-evm: Unify config options with Kconfig
by Adam Ford 14 Jul '20

14 Jul '20

There are two options that are currently whitelisted, but they are redundant, because there are not necessary since Kconfig options exist to basically state the same thing. CONFIG_DIRECT_NOR_BOOT and CONFIG_USE_NOR are both set together and only used by the da850 when booting from NOR, however the only time CONFIG_MTD_NOR_FLASH is configured is when booting from NOR. Since NOR doesn't need SPL, the options for SPL can be moved to a check for building SPL instead of checking for NOR. This patch removes the checks for these two config options and unifies the checks around the Kconfig option of CONFIG_MTD_NOR_FLASH. Since this board is the only board that uses these two config options, they can be removed from the whitelist table. Signed-off-by: Adam Ford <aford173(a)gmail.com> diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index a3b0f8bf09..c91aeb8dbf 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -205,7 +205,7 @@ int misc_init_r(void) } static const struct pinmux_config gpio_pins[] = { -#ifdef CONFIG_USE_NOR +#ifdef CONFIG_MTD_NOR_FLASH /* GP0[11] is required for NOR to work on Rev 3 EVMs */ { pinmux(0), 8, 4 }, /* GP0[11] */ #endif @@ -235,7 +235,7 @@ const struct pinmux_resource pinmuxes[] = { PINMUX_ITEM(emifa_pins_cs3), PINMUX_ITEM(emifa_pins_cs4), PINMUX_ITEM(emifa_pins_nand), -#elif defined(CONFIG_USE_NOR) +#elif defined(CONFIG_MTD_NOR_FLASH) PINMUX_ITEM(emifa_pins_cs2), PINMUX_ITEM(emifa_pins_nor), #endif @@ -341,7 +341,7 @@ int board_init(void) DAVINCI_SYSCFG_SUSPSRC_UART2), &davinci_syscfg_regs->suspsrc); -#ifdef CONFIG_USE_NOR +#ifdef CONFIG_MTD_NOR_FLASH /* Set the GPIO direction as output */ clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11)); diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index ab86108d66..b46ab3c2cf 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -10,7 +10,6 @@ CONFIG_ENV_SIZE=0x2800 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_EXTRA_OPTIONS="USE_NOR,DIRECT_NOR_BOOT" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp" diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 4d651264dd..c825a0440b 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -13,10 +13,6 @@ /* * Board */ -/* check if direct NOR boot config is used */ -#ifndef CONFIG_DIRECT_NOR_BOOT -#define CONFIG_USE_SPIFLASH -#endif /* * SoC Configuration @@ -28,7 +24,7 @@ #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY -#ifdef CONFIG_DIRECT_NOR_BOOT +#ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11) #endif @@ -107,10 +103,6 @@ #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) -#ifdef CONFIG_USE_SPIFLASH -#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 -#endif - /* * I2C Configuration */ @@ -171,7 +163,7 @@ #define CONFIG_NET_RETRY_COUNT 10 #endif -#ifdef CONFIG_USE_NOR +#ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ #define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ #define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE @@ -224,16 +216,11 @@ #define CONFIG_CLOCKS #endif -#if !defined(CONFIG_MTD_RAW_NAND) && \ - !defined(CONFIG_USE_NOR) && \ - !defined(CONFIG_USE_SPIFLASH) -#endif - /* USB Configs */ #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 -#ifndef CONFIG_DIRECT_NOR_BOOT +#ifdef CONFIG_SPL_BUILD /* defines for SPL */ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ CONFIG_SYS_MALLOC_LEN) @@ -248,12 +235,12 @@ /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 -#ifdef CONFIG_DIRECT_NOR_BOOT +#ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_SYS_INIT_SP_ADDR 0x8001ff00 #else #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \ GENERATED_GBL_DATA_SIZE) -#endif /* CONFIG_DIRECT_NOR_BOOT */ +#endif /* CONFIG_MTD_NOR_FLASH */ #include <asm/arch/hardware.h> diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 916768f361..770bcaf223 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -313,7 +313,6 @@ CONFIG_DFU_ENV_SETTINGS CONFIG_DHCP_MIN_EXT_LEN CONFIG_DIALOG_POWER CONFIG_DIMM_SLOTS_PER_CTLR -CONFIG_DIRECT_NOR_BOOT CONFIG_DISCONTIGMEM CONFIG_DISCOVER_PHY CONFIG_DISPLAY_AER_xxxx @@ -4161,7 +4160,6 @@ CONFIG_USB_XHCI_EXYNOS CONFIG_USB_XHCI_OMAP CONFIG_USER_LOWLEVEL_INIT CONFIG_USE_INTERRUPT -CONFIG_USE_NOR CONFIG_USE_ONENAND_BOARD_INIT CONFIG_USE_SPIFLASH CONFIG_UTBIPAR_INIT_TBIPA -- 2.25.1

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[PATCH v2] arm: k3: Consolidate and silence k3_fit_atf.sh call
by Jan Kiszka 14 Jul '20

14 Jul '20

From: Jan Kiszka <jan.kiszka(a)siemens.com> Buiding u-boot-spl-k3[_HS].its is currently unconditionally verbose about what it does. Change that by wrapping the call to k3_fit_atf.sh into a cmd, also using that chance to reduce duplicate lines of makefile code - only IS_HS=1 is different when CONFIG_TI_SECURE_DEVICE is on. Signed-off-by: Jan Kiszka <jan.kiszka(a)siemens.com> Acked-by: Lokesh Vutla <lokeshvutla(a)ti.com> --- Change in v2: - add a commit message arch/arm/mach-k3/config.mk | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk index f6b63db349..f7afef610c 100644 --- a/arch/arm/mach-k3/config.mk +++ b/arch/arm/mach-k3/config.mk @@ -48,22 +48,23 @@ ALL-y += tiboot3.bin endif ifdef CONFIG_ARM64 + ifeq ($(CONFIG_TI_SECURE_DEVICE),y) SPL_ITS := u-boot-spl-k3_HS.its -$(SPL_ITS): FORCE - IS_HS=1 \ - $(srctree)/tools/k3_fit_atf.sh \ - $(patsubst %,$(obj)/dts/%.dtb,$(subst ",,$(CONFIG_SPL_OF_LIST))) > $@ - +$(SPL_ITS): export IS_HS=1 ALL-y += tispl.bin_HS else SPL_ITS := u-boot-spl-k3.its -$(SPL_ITS): FORCE +ALL-y += tispl.bin +endif + +quiet_cmd_k3_mkits = MKITS $@ +cmd_k3_mkits = \ $(srctree)/tools/k3_fit_atf.sh \ $(patsubst %,$(obj)/dts/%.dtb,$(subst ",,$(CONFIG_SPL_OF_LIST))) > $@ -ALL-y += tispl.bin -endif +$(SPL_ITS): FORCE + $(call cmd,k3_mkits) endif else -- 2.26.2

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[PATCH] arm: k3: use correct weak function name spl_board_prepare_for_linux
by Patrick Delaunay 14 Jul '20

14 Jul '20

Replace the function spl_board_prepare_for_boot_linux by the correct name of the weak function spl_board_prepare_for_linux defined in spl.h. Signed-off-by: Patrick Delaunay <patrick.delaunay(a)st.com> --- arch/arm/mach-k3/common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index 9695b2236e..63bf060616 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -440,7 +440,7 @@ void spl_board_prepare_for_boot(void) dcache_disable(); } -void spl_board_prepare_for_boot_linux(void) +void spl_board_prepare_for_linux(void) { dcache_disable(); } -- 2.17.1

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[PATCH 0/5] TI: AM654/J721e: Sync CPSW DT node from kernel
by Vignesh Raghavendra 14 Jul '20

14 Jul '20

Make necessary driver changes to sync DT nodes from kernel. Depends on [1] Due to the dependencies, I would like this entire series to be merged via TI tree. Tested on AM654 and J721e boards [1] https://patchwork.ozlabs.org/project/uboot/list/?series=186589 Vignesh Raghavendra (5): net: ti: am65-cpsw-nuss: Remove dead code net: ti: am65-cpsw-nuss: Set ALE default thread enable net: ti: am65-cpsw-nuss: Update driver to use kernel DT arm: dts: k3-j721e: Sync CPSW DT node from kernel arm: dts: k3-am65: Sync CPSW DT node from kernel arch/arm/dts/k3-am65-mcu.dtsi | 84 +++++++++++++++++++ arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 54 +----------- .../k3-j721e-common-proc-board-u-boot.dtsi | 74 +--------------- arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 74 ++++++++++++++++ drivers/net/ti/am65-cpsw-nuss.c | 15 ++-- 5 files changed, 167 insertions(+), 134 deletions(-) -- 2.27.0

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[PATCH 0/6] TI: AM654/j721e: Ringacc and UDMA updates
by Vignesh Raghavendra 14 Jul '20

14 Jul '20

Align Ringacc and UDMA driver with kernel updates. Depends on [1] [1] https://patchwork.ozlabs.org/project/uboot/list/?series=186589 Vignesh Raghavendra (6): soc: ti: k3-ringacc: Move state tracking variables under a struct soc: ti: k3-ringacc: Add an API to request pair of rings soc: ti: k3-ringacc: Separate soc specific initialization dma: ti: k3-udma: Introduce udma_chan_config struct dma: ti: k3-udma: Move RX descriptor ring entries to rflow struct dma: ti: k3-udma: Switch to k3_ringacc_request_rings_pair drivers/dma/ti/k3-udma.c | 281 ++++++++++++------------ drivers/soc/ti/k3-navss-ringacc.c | 161 +++++++++----- include/linux/soc/ti/k3-navss-ringacc.h | 4 + 3 files changed, 254 insertions(+), 192 deletions(-) -- 2.27.0

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[PATCH v3 0/3] Sync UDMA bindings from kernel
by Vignesh Raghavendra 14 Jul '20

14 Jul '20

UDMA DT bindings have deviated from kernel's DT for AM654 and J721e. This series updates UDMA driver and sync DT bindings Tested OSPI and CPSW on AM654 and J721e after the changes v3: Drop unused PSIL entries in 1/3 and compile files that are required for given SoC to reduce memory footprint. v2: Collect R-by Update patch 2/3 to note about DT incompatibility Vignesh Raghavendra (3): dma: ti: Add static PSIL endpoint information dma: ti: k3-udma: Update driver to use static endpoint Data arm: dts: k3-am65/j721e: Sync DMA DT bindings from Kernel DT arch/arm/dts/k3-am65-mcu.dtsi | 44 ++++++ arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 121 ++------------- .../k3-j721e-common-proc-board-u-boot.dtsi | 118 ++------------ arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 43 ++++++ drivers/dma/ti/Kconfig | 4 + drivers/dma/ti/Makefile | 4 + drivers/dma/ti/k3-psil-am654.c | 89 +++++++++++ drivers/dma/ti/k3-psil-j721e.c | 47 ++++++ drivers/dma/ti/k3-psil-priv.h | 43 ++++++ drivers/dma/ti/k3-psil.c | 42 +++++ drivers/dma/ti/k3-psil.h | 67 ++++++++ drivers/dma/ti/k3-udma.c | 145 ++++++++++++------ include/dt-bindings/dma/k3-udma.h | 31 ---- 13 files changed, 510 insertions(+), 288 deletions(-) create mode 100644 drivers/dma/ti/k3-psil-am654.c create mode 100644 drivers/dma/ti/k3-psil-j721e.c create mode 100644 drivers/dma/ti/k3-psil-priv.h create mode 100644 drivers/dma/ti/k3-psil.c create mode 100644 drivers/dma/ti/k3-psil.h delete mode 100644 include/dt-bindings/dma/k3-udma.h -- 2.27.0

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