July 2020 - U-Boot

[PATCH v10 1/2] spi: ca_sflash: Add CAxxxx SPI Flash Controller
by Alex Nemirovsky 24 Oct '20

24 Oct '20

From: Pengpeng Chen <pengpeng.chen(a)cortina-access.com> Add SPI Flash controller driver for Cortina Access CAxxxx SoCs Signed-off-by: Pengpeng Chen <pengpeng.chen(a)cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky(a)cortina-access.com> CC: Jagan Teki <jagan(a)amarulasolutions.com> CC: Vignesh R <vigneshr(a)ti.com> CC: Tom Rini <trini(a)konsulko.com> --- (no changes since v9) Changes in v9: - Clean up MAINTAINERS changes Changes in v8: - No code change - Split out individual driver from Cortina Package 2 patch series to help streamline acceptence into master Changes in v7: - Replace substring "OPCODE" with "OP" in MACROs to help reduce code line lengths - Replace substring "_MASK" with "_MSK" in MACROs to help reduce code line lengths Changes in v3: - Fixup syntax issues related to checkpatch.pl cleanup MAINTAINERS | 2 + drivers/spi/Kconfig | 8 + drivers/spi/Makefile | 1 + drivers/spi/ca_sflash.c | 576 ++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 587 insertions(+) create mode 100644 drivers/spi/ca_sflash.c diff --git a/MAINTAINERS b/MAINTAINERS index db8cecd..203fcac 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -182,6 +182,7 @@ F: drivers/gpio/cortina_gpio.c F: drivers/watchdog/cortina_wdt.c F: drivers/serial/serial_cortina.c F: drivers/mmc/ca_dw_mmc.c +F: drivers/spi/ca_sflash.c ARM/CZ.NIC TURRIS MOX SUPPORT M: Marek Behun <marek.behun(a)nic.cz> @@ -738,6 +739,7 @@ F: drivers/gpio/cortina_gpio.c F: drivers/watchdog/cortina_wdt.c F: drivers/serial/serial_cortina.c F: drivers/mmc/ca_dw_mmc.c +F: drivers/spi/ca_sflash.c MIPS MSCC M: Gregory CLEMENT <gregory.clement(a)bootlin.com> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 09b9cb1..a921935 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -106,6 +106,14 @@ config BCMSTB_SPI be used to access the SPI flash on platforms embedding this Broadcom SPI core. +config CORTINA_SFLASH + bool "Cortina-Access Serial Flash controller driver" + depends on DM_SPI && SPI_MEM + help + Enable the Cortina-Access Serial Flash controller driver. This driver + can be used to access the SPI NOR/NAND flash on platforms embedding this + Cortina-Access IP core. + config CADENCE_QSPI bool "Cadence QSPI driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 54881a7..ae16691 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -24,6 +24,7 @@ obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o obj-$(CONFIG_CF_SPI) += cf_spi.o +obj-$(CONFIG_CORTINA_SFLASH) += ca_sflash.o obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o obj-$(CONFIG_DESIGNWARE_SPI) += designware_spi.o obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o diff --git a/drivers/spi/ca_sflash.c b/drivers/spi/ca_sflash.c new file mode 100644 index 0000000..00af6bf --- /dev/null +++ b/drivers/spi/ca_sflash.c @@ -0,0 +1,576 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Driver for Cortina SPI-FLASH Controller + * + * Copyright (C) 2020 Cortina Access Inc. All Rights Reserved. + * + * Author: PengPeng Chen <pengpeng.chen(a)cortina-access.com> + */ + +#include <common.h> +#include <malloc.h> +#include <clk.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h> +#include <linux/compat.h> +#include <linux/io.h> +#include <linux/iopoll.h> +#include <linux/ioport.h> +#include <linux/sizes.h> +#include <spi.h> +#include <spi-mem.h> +#include <reset.h> + +DECLARE_GLOBAL_DATA_PTR; + +struct ca_sflash_regs { + u32 idr; /* 0x00:Flash word ID Register */ + u32 tc; /* 0x04:Flash Timeout Counter Register */ + u32 sr; /* 0x08:Flash Status Register */ + u32 tr; /* 0x0C:Flash Type Register */ + u32 asr; /* 0x10:Flash ACCESS START/BUSY Register */ + u32 isr; /* 0x14:Flash Interrupt Status Register */ + u32 imr; /* 0x18:Flash Interrupt Mask Register */ + u32 fcr; /* 0x1C:NAND Flash FIFO Control Register */ + u32 ffsr; /* 0x20:Flash FIFO Status Register */ + u32 ffar; /* 0x24:Flash FIFO ADDRESS Register */ + u32 ffmar; /* 0x28:Flash FIFO MATCHING ADDRESS Register */ + u32 ffdr; /* 0x2C:Flash FIFO Data Register */ + u32 ar; /* 0x30:Serial Flash Access Register */ + u32 ear; /* 0x34:Serial Flash Extend Access Register */ + u32 adr; /* 0x38:Serial Flash ADdress Register */ + u32 dr; /* 0x3C:Serial Flash Data Register */ + u32 tmr; /* 0x40:Serial Flash Timing Register */ +}; + +/* + * FLASH_TYPE + */ +#define CA_FLASH_TR_PIN BIT(15) +#define CA_FLASH_TR_TYPE_MSK GENMASK(14, 12) +#define CA_FLASH_TR_TYPE(tp) (((tp) << 12) & CA_FLASH_TR_TYPE_MSK) +#define CA_FLASH_TR_WIDTH BIT(11) +#define CA_FLASH_TR_SIZE_MSK GENMASK(10, 9) +#define CA_FLASH_TR_SIZE(sz) (((sz) << 9) & CA_FLASH_TR_SIZE_MSK) + +/* + * FLASH_FLASH_ACCESS_START + */ +#define CA_FLASH_ASR_IND_START_EN BIT(1) +#define CA_FLASH_ASR_DMA_START_EN BIT(3) +#define CA_FLASH_ASR_WR_ACCESS_EN BIT(9) + +/* + * FLASH_FLASH_INTERRUPT + */ +#define CA_FLASH_ISR_REG_IRQ BIT(1) +#define CA_FLASH_ISR_FIFO_IRQ BIT(2) + +/* + * FLASH_SF_ACCESS + */ +#define CA_SF_AR_OP_MSK GENMASK(7, 0) +#define CA_SF_AR_OP(op) ((op) << 0 & CA_SF_AR_OP_MSK) +#define CA_SF_AR_ACCODE_MSK GENMASK(11, 8) +#define CA_SF_AR_ACCODE(ac) (((ac) << 8) & CA_SF_AR_ACCODE_MSK) +#define CA_SF_AR_FORCE_TERM BIT(12) +#define CA_SF_AR_FORCE_BURST BIT(13) +#define CA_SF_AR_AUTO_MODE_EN BIT(15) +#define CA_SF_AR_CHIP_EN_ALT BIT(16) +#define CA_SF_AR_HI_SPEED_RD BIT(17) +#define CA_SF_AR_MIO_INF_DC BIT(24) +#define CA_SF_AR_MIO_INF_AC BIT(25) +#define CA_SF_AR_MIO_INF_CC BIT(26) +#define CA_SF_AR_DDR_MSK GENMASK(29, 28) +#define CA_SF_AR_DDR(ddr) (((ddr) << 28) & CA_SF_AR_DDR_MSK) +#define CA_SF_AR_MIO_INF_MSK GENMASK(31, 30) +#define CA_SF_AR_MIO_INF(io) (((io) << 30) & CA_SF_AR_MIO_INF_MSK) + +/* + * FLASH_SF_EXT_ACCESS + */ +#define CA_SF_EAR_OP_MSK GENMASK(7, 0) +#define CA_SF_EAR_OP(op) (((op) << 0) & CA_SF_EAR_OP_MSK) +#define CA_SF_EAR_DATA_CNT_MSK GENMASK(20, 8) +#define CA_SF_EAR_DATA_CNT(cnt) (((cnt) << 8) & CA_SF_EAR_DATA_CNT_MSK) +#define CA_SF_EAR_DATA_CNT_MAX (4096) +#define CA_SF_EAR_ADDR_CNT_MSK GENMASK(23, 21) +#define CA_SF_EAR_ADDR_CNT(cnt) (((cnt) << 21) & CA_SF_EAR_ADDR_CNT_MSK) +#define CA_SF_EAR_ADDR_CNT_MAX (5) +#define CA_SF_EAR_DUMY_CNT_MSK GENMASK(29, 24) +#define CA_SF_EAR_DUMY_CNT(cnt) (((cnt) << 24) & CA_SF_EAR_DUMY_CNT_MSK) +#define CA_SF_EAR_DUMY_CNT_MAX (32) +#define CA_SF_EAR_DRD_CMD_EN BIT(31) + +/* + * FLASH_SF_ADDRESS + */ +#define CA_SF_ADR_REG_MSK GENMASK(31, 0) +#define CA_SF_ADR_REG(addr) (((addr) << 0) & CA_SF_ADR_REG_MSK) + +/* + * FLASH_SF_DATA + */ +#define CA_SF_DR_REG_MSK GENMASK(31, 0) +#define CA_SF_DR_REG(addr) (((addr) << 0) & CA_SF_DR_REG_MSK) + +/* + * FLASH_SF_TIMING + */ +#define CA_SF_TMR_IDLE_MSK GENMASK(7, 0) +#define CA_SF_TMR_IDLE(idle) (((idle) << 0) & CA_SF_TMR_IDLE_MSK) +#define CA_SF_TMR_HOLD_MSK GENMASK(15, 8) +#define CA_SF_TMR_HOLD(hold) (((hold) << 8) & CA_SF_TMR_HOLD_MSK) +#define CA_SF_TMR_SETUP_MSK GENMASK(23, 16) +#define CA_SF_TMR_SETUP(setup) (((setup) << 16) & CA_SF_TMR_SETUP_MSK) +#define CA_SF_TMR_CLK_MSK GENMASK(26, 24) +#define CA_SF_TMR_CLK(clk) (((clk) << 24) & CA_SF_TMR_CLK_MSK) + +#define CA_SFLASH_IND_WRITE 0 +#define CA_SFLASH_IND_READ 1 +#define CA_SFLASH_MEM_MAP 3 +#define CA_SFLASH_FIFO_TIMEOUT_US 30000 +#define CA_SFLASH_BUSY_TIMEOUT_US 40000 + +#define CA_SF_AC_OP 0x00 +#define CA_SF_AC_OP_1_DATA 0x01 +#define CA_SF_AC_OP_2_DATA 0x02 +#define CA_SF_AC_OP_3_DATA 0x03 +#define CA_SF_AC_OP_4_DATA 0x04 +#define CA_SF_AC_OP_3_ADDR 0x05 +#define CA_SF_AC_OP_4_ADDR (CA_SF_AC_OP_3_ADDR) +#define CA_SF_AC_OP_3_ADDR_1_DATA 0x06 +#define CA_SF_AC_OP_4_ADDR_1_DATA (CA_SF_AC_OP_3_ADDR_1_DATA << 2) +#define CA_SF_AC_OP_3_ADDR_2_DATA 0x07 +#define CA_SF_AC_OP_4_ADDR_2_DATA (CA_SF_AC_OP_3_ADDR_2_DATA << 2) +#define CA_SF_AC_OP_3_ADDR_3_DATA 0x08 +#define CA_SF_AC_OP_4_ADDR_3_DATA (CA_SF_AC_OP_3_ADDR_3_DATA << 2) +#define CA_SF_AC_OP_3_ADDR_4_DATA 0x09 +#define CA_SF_AC_OP_4_ADDR_4_DATA (CA_SF_AC_OP_3_ADDR_4_DATA << 2) +#define CA_SF_AC_OP_3_ADDR_X_1_DATA 0x0A +#define CA_SF_AC_OP_4_ADDR_X_1_DATA (CA_SF_AC_OP_3_ADDR_X_1_DATA << 2) +#define CA_SF_AC_OP_3_ADDR_X_2_DATA 0x0B +#define CA_SF_AC_OP_4_ADDR_X_2_DATA (CA_SF_AC_OP_3_ADDR_X_2_DATA << 2) +#define CA_SF_AC_OP_3_ADDR_X_3_DATA 0x0C +#define CA_SF_AC_OP_4_ADDR_X_3_DATA (CA_SF_AC_OP_3_ADDR_X_3_DATA << 2) +#define CA_SF_AC_OP_3_ADDR_X_4_DATA 0x0D +#define CA_SF_AC_OP_4_ADDR_X_4_DATA (CA_SF_AC_OP_3_ADDR_X_4_DATA << 2) +#define CA_SF_AC_OP_3_ADDR_4X_1_DATA 0x0E +#define CA_SF_AC_OP_4_ADDR_4X_1_DATA (CA_SF_AC_OP_3_ADDR_4X_1_DATA << 2) +#define CA_SF_AC_OP_EXTEND 0x0F + +#define CA_SF_ACCESS_MIO_SINGLE 0 +#define CA_SF_ACCESS_MIO_DUAL 1 +#define CA_SF_ACCESS_MIO_QUARD 2 + +enum access_type { + RD_ACCESS, + WR_ACCESS, +}; + +struct ca_sflash_priv { + struct ca_sflash_regs *regs; + u8 rx_width; + u8 tx_width; +}; + +/* + * This function doesn't do anything except help with debugging + */ +static int ca_sflash_claim_bus(struct udevice *dev) +{ + debug("%s:\n", __func__); + return 0; +} + +static int ca_sflash_release_bus(struct udevice *dev) +{ + debug("%s:\n", __func__); + return 0; +} + +static int ca_sflash_set_speed(struct udevice *dev, uint speed) +{ + debug("%s:\n", __func__); + return 0; +} + +static int ca_sflash_set_mode(struct udevice *dev, uint mode) +{ + struct ca_sflash_priv *priv = dev_get_priv(dev); + + if (mode & SPI_RX_QUAD) + priv->rx_width = 4; + else if (mode & SPI_RX_DUAL) + priv->rx_width = 2; + else + priv->rx_width = 1; + + if (mode & SPI_TX_QUAD) + priv->tx_width = 4; + else if (mode & SPI_TX_DUAL) + priv->tx_width = 2; + else + priv->tx_width = 1; + + debug("%s: mode=%d, rx_width=%d, tx_width=%d\n", + __func__, mode, priv->rx_width, priv->tx_width); + + return 0; +} + +static int _ca_sflash_wait_for_not_busy(struct ca_sflash_priv *priv) +{ + u32 asr; + + if (readl_poll_timeout(&priv->regs->asr, asr, + !(asr & CA_FLASH_ASR_IND_START_EN), + CA_SFLASH_BUSY_TIMEOUT_US)) { + pr_err("busy timeout (stat:%#x)\n", asr); + return -1; + } + + return 0; +} + +static int _ca_sflash_wait_cmd(struct ca_sflash_priv *priv, + enum access_type type) +{ + if (type == WR_ACCESS) { + /* Enable write access and start the sflash indirect access */ + clrsetbits_le32(&priv->regs->asr, GENMASK(31, 0), + CA_FLASH_ASR_WR_ACCESS_EN + | CA_FLASH_ASR_IND_START_EN); + } else if (type == RD_ACCESS) { + /* Start the sflash indirect access */ + clrsetbits_le32(&priv->regs->asr, GENMASK(31, 0), + CA_FLASH_ASR_IND_START_EN); + } else { + printf("%s: !error access type.\n", __func__); + return -1; + } + + /* Wait til the action(rd/wr) completed */ + return _ca_sflash_wait_for_not_busy(priv); +} + +static int _ca_sflash_read(struct ca_sflash_priv *priv, + u8 *buf, unsigned int data_len) +{ + u32 reg_data; + int len; + + len = data_len; + while (len >= 4) { + if (_ca_sflash_wait_cmd(priv, RD_ACCESS)) + return -1; + reg_data = readl(&priv->regs->dr); + *buf++ = reg_data & 0xFF; + *buf++ = (reg_data >> 8) & 0xFF; + *buf++ = (reg_data >> 16) & 0xFF; + *buf++ = (reg_data >> 24) & 0xFF; + len -= 4; + debug("%s: reg_data=%#08x\n", + __func__, reg_data); + } + + if (len > 0) { + if (_ca_sflash_wait_cmd(priv, RD_ACCESS)) + return -1; + reg_data = readl(&priv->regs->dr); + debug("%s: reg_data=%#08x\n", + __func__, reg_data); + } + + switch (len) { + case 3: + *buf++ = reg_data & 0xFF; + *buf++ = (reg_data >> 8) & 0xFF; + *buf++ = (reg_data >> 16) & 0xFF; + break; + case 2: + *buf++ = reg_data & 0xFF; + *buf++ = (reg_data >> 8) & 0xFF; + break; + case 1: + *buf++ = reg_data & 0xFF; + break; + case 0: + break; + default: + printf("%s: error data_length %d!\n", __func__, len); + } + + return 0; +} + +static int _ca_sflash_mio_set(struct ca_sflash_priv *priv, + u8 width) +{ + if (width == 4) { + setbits_le32(&priv->regs->ar, + CA_SF_AR_MIO_INF_DC + | CA_SF_AR_MIO_INF(CA_SF_ACCESS_MIO_QUARD) + | CA_SF_AR_FORCE_BURST); + } else if (width == 2) { + setbits_le32(&priv->regs->ar, + CA_SF_AR_MIO_INF_DC + | CA_SF_AR_MIO_INF(CA_SF_ACCESS_MIO_DUAL) + | CA_SF_AR_FORCE_BURST); + } else if (width == 1) { + setbits_le32(&priv->regs->ar, + CA_SF_AR_MIO_INF(CA_SF_ACCESS_MIO_SINGLE) + | CA_SF_AR_FORCE_BURST); + } else { + printf("%s: error rx/tx width %d!\n", __func__, width); + return -1; + } + + return 0; +} + +static int _ca_sflash_write(struct ca_sflash_priv *priv, + u8 *buf, unsigned int data_len) +{ + u32 reg_data; + int len; + + len = data_len; + while (len > 0) { + reg_data = buf[0] + | (buf[1] << 8) + | (buf[2] << 16) + | (buf[3] << 24); + + debug("%s: reg_data=%#08x\n", + __func__, reg_data); + /* Fill data */ + clrsetbits_le32(&priv->regs->dr, GENMASK(31, 0), reg_data); + + if (_ca_sflash_wait_cmd(priv, WR_ACCESS)) + return -1; + + len -= 4; + buf += 4; + } + + return 0; +} + +static int _ca_sflash_access_data(struct ca_sflash_priv *priv, + struct spi_mem_op *op) +{ + int total_cnt; + unsigned int len; + unsigned int data_cnt = op->data.nbytes; + u64 addr_offset = op->addr.val; + u8 addr_cnt = op->addr.nbytes; + u8 *data_buf = NULL; + u8 *buf = NULL; + + if (op->data.dir == SPI_MEM_DATA_IN) + data_buf = (u8 *)op->data.buf.in; + else + data_buf = (u8 *)op->data.buf.out; + + if (data_cnt > CA_SF_EAR_DATA_CNT_MAX) + buf = malloc(CA_SF_EAR_DATA_CNT_MAX); + else + buf = malloc(data_cnt); + + total_cnt = data_cnt; + while (total_cnt > 0) { + /* Fill address */ + if (addr_cnt > 0) + clrsetbits_le32(&priv->regs->adr, + GENMASK(31, 0), (u32)addr_offset); + + if (total_cnt > CA_SF_EAR_DATA_CNT_MAX) { + len = CA_SF_EAR_DATA_CNT_MAX; + addr_offset += CA_SF_EAR_DATA_CNT_MAX; + /* Clear start bit before next bulk read */ + clrbits_le32(&priv->regs->asr, GENMASK(31, 0)); + } else { + len = total_cnt; + } + + memset(buf, 0, len); + if (op->data.dir == SPI_MEM_DATA_IN) { + if (_ca_sflash_read(priv, buf, len)) + break; + memcpy(data_buf, buf, len); + } else { + memcpy(buf, data_buf, len); + if (_ca_sflash_write(priv, buf, len)) + break; + } + + total_cnt -= len; + data_buf += len; + } + if (buf) + free(buf); + + return total_cnt > 0 ? -1 : 0; +} + +static int _ca_sflash_issue_cmd(struct ca_sflash_priv *priv, + struct spi_mem_op *op, u8 opcode) +{ + u8 dummy_cnt = op->dummy.nbytes; + u8 addr_cnt = op->addr.nbytes; + u8 mio_width; + unsigned int data_cnt = op->data.nbytes; + u64 addr_offset = op->addr.val; + + /* Set the access register */ + clrsetbits_le32(&priv->regs->ar, + GENMASK(31, 0), CA_SF_AR_ACCODE(opcode)); + + if (opcode == CA_SF_AC_OP_EXTEND) { /* read_data, write_data */ + if (data_cnt > 6) { + if (op->data.dir == SPI_MEM_DATA_IN) + mio_width = priv->rx_width; + else + mio_width = priv->tx_width; + if (_ca_sflash_mio_set(priv, mio_width)) + return -1; + } + debug("%s: FLASH ACCESS reg=%#08x\n", + __func__, readl(&priv->regs->ar)); + + /* Use command in extend_access register */ + clrsetbits_le32(&priv->regs->ear, + GENMASK(31, 0), CA_SF_EAR_OP(op->cmd.opcode) + | CA_SF_EAR_DUMY_CNT(dummy_cnt * 8 - 1) + | CA_SF_EAR_ADDR_CNT(addr_cnt - 1) + | CA_SF_EAR_DATA_CNT(4 - 1) + | CA_SF_EAR_DRD_CMD_EN); + debug("%s: FLASH EXT ACCESS reg=%#08x\n", + __func__, readl(&priv->regs->ear)); + + if (_ca_sflash_access_data(priv, op)) + return -1; + } else { /* reset_op, wr_enable, wr_disable */ + setbits_le32(&priv->regs->ar, + CA_SF_AR_OP(op->cmd.opcode)); + debug("%s: FLASH ACCESS reg=%#08x\n", + __func__, readl(&priv->regs->ar)); + + if (opcode == CA_SF_AC_OP_4_ADDR) { /* erase_op */ + /* Configure address length */ + if (addr_cnt > 3) /* 4 Bytes address */ + setbits_le32(&priv->regs->tr, + CA_FLASH_TR_SIZE(2)); + else /* 3 Bytes address */ + clrbits_le32(&priv->regs->tr, + CA_FLASH_TR_SIZE_MSK); + + /* Fill address */ + if (addr_cnt > 0) + clrsetbits_le32(&priv->regs->adr, + GENMASK(31, 0), + (u32)addr_offset); + } + + if (_ca_sflash_wait_cmd(priv, RD_ACCESS)) + return -1; + } + /* elapse 10us before issuing any other command */ + udelay(10); + + return 0; +} + +static int ca_sflash_exec_op(struct spi_slave *slave, + const struct spi_mem_op *op) +{ + struct ca_sflash_priv *priv = dev_get_priv(slave->dev->parent); + u8 opcode; + + debug("%s: cmd:%#02x addr.val:%#llx addr.len:%#x data.len:%#x data.dir:%#x\n", + __func__, op->cmd.opcode, op->addr.val, + op->addr.nbytes, op->data.nbytes, op->data.dir); + + if (op->data.nbytes == 0 && op->addr.nbytes == 0) { + opcode = CA_SF_AC_OP; + } else if (op->data.nbytes == 0 && op->addr.nbytes > 0) { + opcode = CA_SF_AC_OP_4_ADDR; + } else if (op->data.nbytes > 0) { + opcode = CA_SF_AC_OP_EXTEND; + } else { + printf("%s: can't support cmd.opcode:(%#02x) type currently!\n", + __func__, op->cmd.opcode); + return -1; + } + + return _ca_sflash_issue_cmd(priv, (struct spi_mem_op *)op, opcode); +} + +static void ca_sflash_init(struct ca_sflash_priv *priv) +{ + /* Set FLASH_TYPE as serial flash, value: 0x0400*/ + clrsetbits_le32(&priv->regs->tr, + GENMASK(31, 0), CA_FLASH_TR_SIZE(2)); + debug("%s: FLASH_TYPE reg=%#x\n", + __func__, readl(&priv->regs->tr)); + + /* Minimize flash timing, value: 0x07010101 */ + clrsetbits_le32(&priv->regs->tmr, + GENMASK(31, 0), + CA_SF_TMR_CLK(0x07) + | CA_SF_TMR_SETUP(0x01) + | CA_SF_TMR_HOLD(0x01) + | CA_SF_TMR_IDLE(0x01)); + debug("%s: FLASH_TIMING reg=%#x\n", + __func__, readl(&priv->regs->tmr)); +} + +static int ca_sflash_probe(struct udevice *dev) +{ + struct ca_sflash_priv *priv = dev_get_priv(dev); + struct resource res; + int ret; + + /* Map the registers */ + ret = dev_read_resource_byname(dev, "sflash-regs", &res); + if (ret) { + dev_err(dev, "can't get regs base addresses(ret = %d)!\n", ret); + return ret; + } + priv->regs = devm_ioremap(dev, res.start, resource_size(&res)); + if (IS_ERR(priv->regs)) + return PTR_ERR(priv->regs); + + ca_sflash_init(priv); + + printf("SFLASH: Controller probed ready\n"); + return 0; +} + +static const struct spi_controller_mem_ops ca_sflash_mem_ops = { + .exec_op = ca_sflash_exec_op, +}; + +static const struct dm_spi_ops ca_sflash_ops = { + .claim_bus = ca_sflash_claim_bus, + .release_bus = ca_sflash_release_bus, + .set_speed = ca_sflash_set_speed, + .set_mode = ca_sflash_set_mode, + .mem_ops = &ca_sflash_mem_ops, +}; + +static const struct udevice_id ca_sflash_ids[] = { + {.compatible = "cortina,ca-sflash"}, + {} +}; + +U_BOOT_DRIVER(ca_sflash) = { + .name = "ca_sflash", + .id = UCLASS_SPI, + .of_match = ca_sflash_ids, + .ops = &ca_sflash_ops, + .priv_auto_alloc_size = sizeof(struct ca_sflash_priv), + .probe = ca_sflash_probe, +}; -- 2.7.4

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[PATCH 00/16] spi: dm-conversion (part3)
by Jagan Teki 23 Oct '20

23 Oct '20

This series updated boards which are using mxc_spi driver. Series has patches for 1) DM_SPI/SPI_FLASH enablement for boards which already support DM and OF_CONTROL. 2) Drop the boards which doesn't support DM or OF_CONTROL. Now it's call for board maintainers to update their board to use device tree and DM options to alive on tree before MW. thanks, Jagan. Jagan Teki (16): cl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH cm_fx6: Switch to full DM-aware dh_imx6: Switch to full DM-aware arm: Remove mx51evk board arm: Remove ts4800 board arm: Remove tqma6s_wru4_mmc_defconfig arm: Remove pfla02 board arm: Remove pcm058 board arm: Remove riotboard board arm: Remove zc5202/zc5601 board arm: Remove cgtqmx6eval board arm: Remove ot1200 board arm: Remove dms-ba16 board arm: Remove configs/mx35pdk_defconfig board arm: Remove flea3_defconfig board arm: Remove mx31pdk_defconfig board arch/arm/Kconfig | 11 - arch/arm/mach-imx/mx3/Kconfig | 12 - arch/arm/mach-imx/mx5/Kconfig | 11 - arch/arm/mach-imx/mx6/Kconfig | 59 -- board/CarMediaLab/flea3/Kconfig | 15 - board/CarMediaLab/flea3/MAINTAINERS | 6 - board/CarMediaLab/flea3/Makefile | 8 - board/CarMediaLab/flea3/flea3.c | 224 ---- board/CarMediaLab/flea3/lowlevel_init.S | 24 - board/advantech/dms-ba16/Kconfig | 31 - board/advantech/dms-ba16/MAINTAINERS | 8 - board/advantech/dms-ba16/Makefile | 6 - board/advantech/dms-ba16/clocks.cfg | 25 - board/advantech/dms-ba16/ddr-setup.cfg | 39 - board/advantech/dms-ba16/dms-ba16.c | 629 ----------- board/advantech/dms-ba16/dms-ba16_1g.cfg | 24 - board/advantech/dms-ba16/dms-ba16_2g.cfg | 24 - board/advantech/dms-ba16/micron-1g.cfg | 63 -- board/advantech/dms-ba16/samsung-2g.cfg | 63 -- board/bachmann/ot1200/Kconfig | 12 - board/bachmann/ot1200/MAINTAINERS | 6 - board/bachmann/ot1200/Makefile | 11 - board/bachmann/ot1200/README | 20 - board/bachmann/ot1200/mx6q_4x_mt41j128.cfg | 154 --- board/bachmann/ot1200/ot1200.c | 359 ------- board/bachmann/ot1200/ot1200_spl.c | 152 --- board/congatec/cgtqmx6eval/Kconfig | 12 - board/congatec/cgtqmx6eval/MAINTAINERS | 6 - board/congatec/cgtqmx6eval/Makefile | 8 - board/congatec/cgtqmx6eval/README | 74 -- board/congatec/cgtqmx6eval/cgtqmx6eval.c | 1091 -------------------- board/el/el6x/Kconfig | 25 - board/el/el6x/MAINTAINERS | 8 - board/el/el6x/Makefile | 5 - board/el/el6x/el6x.c | 636 ------------ board/embest/mx6boards/Kconfig | 12 - board/embest/mx6boards/MAINTAINERS | 8 - board/embest/mx6boards/Makefile | 7 - board/embest/mx6boards/mx6boards.c | 662 ------------ board/freescale/mx31pdk/Kconfig | 15 - board/freescale/mx31pdk/MAINTAINERS | 6 - board/freescale/mx31pdk/Makefile | 11 - board/freescale/mx31pdk/lowlevel_init.S | 76 -- board/freescale/mx31pdk/mx31pdk.c | 119 --- board/freescale/mx35pdk/Kconfig | 15 - board/freescale/mx35pdk/MAINTAINERS | 6 - board/freescale/mx35pdk/Makefile | 8 - board/freescale/mx35pdk/README | 114 -- board/freescale/mx35pdk/lowlevel_init.S | 239 ----- board/freescale/mx35pdk/mx35pdk.c | 293 ------ board/freescale/mx35pdk/mx35pdk.h | 41 - board/freescale/mx51evk/Kconfig | 15 - board/freescale/mx51evk/MAINTAINERS | 6 - board/freescale/mx51evk/Makefile | 8 - board/freescale/mx51evk/imximage.cfg | 108 -- board/freescale/mx51evk/mx51evk.c | 401 ------- board/freescale/mx51evk/mx51evk_video.c | 98 -- board/phytec/pcm058/Kconfig | 12 - board/phytec/pcm058/MAINTAINERS | 6 - board/phytec/pcm058/Makefile | 7 - board/phytec/pcm058/README | 35 - board/phytec/pcm058/pcm058.c | 571 ---------- board/phytec/pfla02/Kconfig | 18 - board/phytec/pfla02/MAINTAINERS | 6 - board/phytec/pfla02/Makefile | 7 - board/phytec/pfla02/README | 24 - board/phytec/pfla02/pfla02.c | 713 ------------- board/technologic/ts4800/Kconfig | 15 - board/technologic/ts4800/MAINTAINERS | 6 - board/technologic/ts4800/Makefile | 5 - board/technologic/ts4800/ts4800.c | 262 ----- board/technologic/ts4800/ts4800.h | 15 - configs/cgtqmx6eval_defconfig | 85 -- configs/cl-som-imx7_defconfig | 7 +- configs/cm_fx6_defconfig | 3 + configs/dh_imx6_defconfig | 3 + configs/dms-ba16-1g_defconfig | 64 -- configs/dms-ba16_defconfig | 63 -- configs/flea3_defconfig | 48 - configs/marsboard_defconfig | 44 - configs/mx31pdk_defconfig | 40 - configs/mx35pdk_defconfig | 52 - configs/mx51evk_defconfig | 42 - configs/ot1200_defconfig | 55 - configs/ot1200_spl_defconfig | 66 -- configs/pcm058_defconfig | 70 -- configs/pfla02_defconfig | 71 -- configs/riotboard_defconfig | 44 - configs/riotboard_spl_defconfig | 55 - configs/tqma6s_wru4_mmc_defconfig | 81 -- configs/ts4800_defconfig | 28 - configs/zc5202_defconfig | 56 - configs/zc5601_defconfig | 54 - include/configs/advantech_dms-ba16.h | 233 ----- include/configs/cgtqmx6eval.h | 209 ---- include/configs/cm_fx6.h | 7 - include/configs/dh_imx6.h | 6 - include/configs/embestmx6boards.h | 140 --- include/configs/flea3.h | 182 ---- include/configs/mx31pdk.h | 141 --- include/configs/mx35pdk.h | 210 ---- include/configs/mx51evk.h | 197 ---- include/configs/ot1200.h | 99 -- include/configs/pcm058.h | 77 -- include/configs/pfla02.h | 131 --- include/configs/ts4800.h | 139 --- include/configs/zc5202.h | 27 - include/configs/zc5601.h | 26 - 108 files changed, 11 insertions(+), 10675 deletions(-) delete mode 100644 board/CarMediaLab/flea3/Kconfig delete mode 100644 board/CarMediaLab/flea3/MAINTAINERS delete mode 100644 board/CarMediaLab/flea3/Makefile delete mode 100644 board/CarMediaLab/flea3/flea3.c delete mode 100644 board/CarMediaLab/flea3/lowlevel_init.S delete mode 100644 board/advantech/dms-ba16/Kconfig delete mode 100644 board/advantech/dms-ba16/MAINTAINERS delete mode 100644 board/advantech/dms-ba16/Makefile delete mode 100644 board/advantech/dms-ba16/clocks.cfg delete mode 100644 board/advantech/dms-ba16/ddr-setup.cfg delete mode 100644 board/advantech/dms-ba16/dms-ba16.c delete mode 100644 board/advantech/dms-ba16/dms-ba16_1g.cfg delete mode 100644 board/advantech/dms-ba16/dms-ba16_2g.cfg delete mode 100644 board/advantech/dms-ba16/micron-1g.cfg delete mode 100644 board/advantech/dms-ba16/samsung-2g.cfg delete mode 100644 board/bachmann/ot1200/Kconfig delete mode 100644 board/bachmann/ot1200/MAINTAINERS delete mode 100644 board/bachmann/ot1200/Makefile delete mode 100644 board/bachmann/ot1200/README delete mode 100644 board/bachmann/ot1200/mx6q_4x_mt41j128.cfg delete mode 100644 board/bachmann/ot1200/ot1200.c delete mode 100644 board/bachmann/ot1200/ot1200_spl.c delete mode 100644 board/congatec/cgtqmx6eval/Kconfig delete mode 100644 board/congatec/cgtqmx6eval/MAINTAINERS delete mode 100644 board/congatec/cgtqmx6eval/Makefile delete mode 100644 board/congatec/cgtqmx6eval/README delete mode 100644 board/congatec/cgtqmx6eval/cgtqmx6eval.c delete mode 100644 board/el/el6x/Kconfig delete mode 100644 board/el/el6x/MAINTAINERS delete mode 100644 board/el/el6x/Makefile delete mode 100644 board/el/el6x/el6x.c delete mode 100644 board/embest/mx6boards/Kconfig delete mode 100644 board/embest/mx6boards/MAINTAINERS delete mode 100644 board/embest/mx6boards/Makefile delete mode 100644 board/embest/mx6boards/mx6boards.c delete mode 100644 board/freescale/mx31pdk/Kconfig delete mode 100644 board/freescale/mx31pdk/MAINTAINERS delete mode 100644 board/freescale/mx31pdk/Makefile delete mode 100644 board/freescale/mx31pdk/lowlevel_init.S delete mode 100644 board/freescale/mx31pdk/mx31pdk.c delete mode 100644 board/freescale/mx35pdk/Kconfig delete mode 100644 board/freescale/mx35pdk/MAINTAINERS delete mode 100644 board/freescale/mx35pdk/Makefile delete mode 100644 board/freescale/mx35pdk/README delete mode 100644 board/freescale/mx35pdk/lowlevel_init.S delete mode 100644 board/freescale/mx35pdk/mx35pdk.c delete mode 100644 board/freescale/mx35pdk/mx35pdk.h delete mode 100644 board/freescale/mx51evk/Kconfig delete mode 100644 board/freescale/mx51evk/MAINTAINERS delete mode 100644 board/freescale/mx51evk/Makefile delete mode 100644 board/freescale/mx51evk/imximage.cfg delete mode 100644 board/freescale/mx51evk/mx51evk.c delete mode 100644 board/freescale/mx51evk/mx51evk_video.c delete mode 100644 board/phytec/pcm058/Kconfig delete mode 100644 board/phytec/pcm058/MAINTAINERS delete mode 100644 board/phytec/pcm058/Makefile delete mode 100644 board/phytec/pcm058/README delete mode 100644 board/phytec/pcm058/pcm058.c delete mode 100644 board/phytec/pfla02/Kconfig delete mode 100644 board/phytec/pfla02/MAINTAINERS delete mode 100644 board/phytec/pfla02/Makefile delete mode 100644 board/phytec/pfla02/README delete mode 100644 board/phytec/pfla02/pfla02.c delete mode 100644 board/technologic/ts4800/Kconfig delete mode 100644 board/technologic/ts4800/MAINTAINERS delete mode 100644 board/technologic/ts4800/Makefile delete mode 100644 board/technologic/ts4800/ts4800.c delete mode 100644 board/technologic/ts4800/ts4800.h delete mode 100644 configs/cgtqmx6eval_defconfig delete mode 100644 configs/dms-ba16-1g_defconfig delete mode 100644 configs/dms-ba16_defconfig delete mode 100644 configs/flea3_defconfig delete mode 100644 configs/marsboard_defconfig delete mode 100644 configs/mx31pdk_defconfig delete mode 100644 configs/mx35pdk_defconfig delete mode 100644 configs/mx51evk_defconfig delete mode 100644 configs/ot1200_defconfig delete mode 100644 configs/ot1200_spl_defconfig delete mode 100644 configs/pcm058_defconfig delete mode 100644 configs/pfla02_defconfig delete mode 100644 configs/riotboard_defconfig delete mode 100644 configs/riotboard_spl_defconfig delete mode 100644 configs/tqma6s_wru4_mmc_defconfig delete mode 100644 configs/ts4800_defconfig delete mode 100644 configs/zc5202_defconfig delete mode 100644 configs/zc5601_defconfig delete mode 100644 include/configs/advantech_dms-ba16.h delete mode 100644 include/configs/cgtqmx6eval.h delete mode 100644 include/configs/embestmx6boards.h delete mode 100644 include/configs/flea3.h delete mode 100644 include/configs/mx31pdk.h delete mode 100644 include/configs/mx35pdk.h delete mode 100644 include/configs/mx51evk.h delete mode 100644 include/configs/ot1200.h delete mode 100644 include/configs/pcm058.h delete mode 100644 include/configs/pfla02.h delete mode 100644 include/configs/ts4800.h delete mode 100644 include/configs/zc5202.h delete mode 100644 include/configs/zc5601.h -- 2.25.1

5 37

[PATCH V2 1/7] env: Warn on force access if ENV_ACCESS_IGNORE_FORCE set
by Marek Vasut 23 Oct '20

23 Oct '20

If the ENV_ACCESS_IGNORE_FORCE is set, inform user that the variable cannot be force-set if such attempt happens. Signed-off-by: Marek Vasut <marex(a)denx.de> --- V2: No change --- env/flags.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/env/flags.c b/env/flags.c index b88fe7ba9c..f7a53775c4 100644 --- a/env/flags.c +++ b/env/flags.c @@ -524,8 +524,10 @@ int env_flags_validate(const struct env_entry *item, const char *newval, /* check for access permission */ #ifndef CONFIG_ENV_ACCESS_IGNORE_FORCE - if (flag & H_FORCE) + if (flag & H_FORCE) { + printf("## Error: Can't force access to \"%s\"\n", name); return 0; + } #endif switch (op) { case env_op_delete: -- 2.27.0

4 26

[PATCH] configs: ls1043aqds: Configure QSPI related configs
by Kuldeep Singh 23 Oct '20

23 Oct '20

LS1043A-QDS has "s25fl128s" flash of size 16M with 64K sector size. The board requires few spi-flash related configs to be updated in TFA and QSPI _defconfigs. Following are the changes: - Define/Update CONFIG_ENV_ADDR - Unset CONFIG_SPI_FLASH_BAR - Correct CONFIG_ENV_SECT_SIZE - Enable CONFIG_SYS_RELOC_GD_ENV_ADDR Signed-off-by: Kuldeep Singh <kuldeep.singh(a)nxp.com> --- configs/ls1043aqds_qspi_defconfig | 1 + configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1043aqds_tfa_defconfig | 3 ++- 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index a018b22..bb92b4c 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -35,6 +35,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_sy CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_ENV_ADDR=0x40300000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig index 3ee5d28..a9d7131 100644 --- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig @@ -48,6 +48,7 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 +# CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig index 297788b..eb1f905 100644 --- a/configs/ls1043aqds_tfa_defconfig +++ b/configs/ls1043aqds_tfa_defconfig @@ -4,7 +4,7 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 -CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y @@ -43,6 +43,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=0 CONFIG_ENV_ADDR=0x60500000 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y -- 2.7.4

3 4

[PATCH] lib: zlib: Use post-increment only in inffast.c
by Ley Foon Tan 23 Oct '20

23 Oct '20

From: Chin Liang See <chin.liang.see(a)intel.com> This fixes CVE-2016-9841. Changes integrated from [1], with changes make for Uboot code base. An old inffast.c optimization turns out to not be optimal anymore with modern compilers, and furthermore was not compliant with the C standard, for which decrementing a pointer before its allocated memory is undefined. Per the recommendation of a security audit of the zlib code by Trail of Bits and TrustInSoft, in support of the Mozilla Foundation, this "optimization" was removed, in order to avoid the possibility of undefined behavior. [1]: https://github.com/madler/zlib/commit/9aaec95e82117c1cb0f9624264c3618fc380c… Signed-off-by: Mark Adler <madler(a)alumni.caltech.edu> Signed-off-by: Chin Liang See <chin.liang.see(a)intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan(a)intel.com> --- lib/zlib/inffast.c | 87 ++++++++++++++++++---------------------------- 1 file changed, 34 insertions(+), 53 deletions(-) diff --git a/lib/zlib/inffast.c b/lib/zlib/inffast.c index e3c7f3b892bb..cdc778eb1d6f 100644 --- a/lib/zlib/inffast.c +++ b/lib/zlib/inffast.c @@ -12,25 +12,6 @@ #ifndef ASMINF -/* Allow machine dependent optimization for post-increment or pre-increment. - Based on testing to date, - Pre-increment preferred for: - - PowerPC G3 (Adler) - - MIPS R5000 (Randers-Pehrson) - Post-increment preferred for: - - none - No measurable difference: - - Pentium III (Anderson) - - M68060 (Nikl) - */ -#ifdef POSTINC -# define OFF 0 -# define PUP(a) *(a)++ -#else -# define OFF 1 -# define PUP(a) *++(a) -#endif - /* Decode literal, length, and distance codes and write out the resulting literal and match bytes until either not enough input or output is @@ -97,7 +78,7 @@ void inflate_fast(z_streamp strm, unsigned start) /* copy state to local variables */ state = (struct inflate_state FAR *)strm->state; - in = strm->next_in - OFF; + in = strm->next_in; last = in + (strm->avail_in - 5); if (in > last && strm->avail_in > 5) { /* @@ -107,7 +88,7 @@ void inflate_fast(z_streamp strm, unsigned start) strm->avail_in = 0xffffffff - (uintptr_t)in; last = in + (strm->avail_in - 5); } - out = strm->next_out - OFF; + out = strm->next_out; beg = out - (start - strm->avail_out); end = out + (strm->avail_out - 257); #ifdef INFLATE_STRICT @@ -128,9 +109,9 @@ void inflate_fast(z_streamp strm, unsigned start) input data or output space */ do { if (bits < 15) { - hold += (unsigned long)(PUP(in)) << bits; + hold += (unsigned long)(*in++) << bits; bits += 8; - hold += (unsigned long)(PUP(in)) << bits; + hold += (unsigned long)(*in++) << bits; bits += 8; } this = lcode[hold & lmask]; @@ -143,14 +124,14 @@ void inflate_fast(z_streamp strm, unsigned start) Tracevv((stderr, this.val >= 0x20 && this.val < 0x7f ? "inflate: literal '%c'\n" : "inflate: literal 0x%02x\n", this.val)); - PUP(out) = (unsigned char)(this.val); + *out++ = (unsigned char)(this.val); } else if (op & 16) { /* length base */ len = (unsigned)(this.val); op &= 15; /* number of extra bits */ if (op) { if (bits < op) { - hold += (unsigned long)(PUP(in)) << bits; + hold += (unsigned long)(*in++) << bits; bits += 8; } len += (unsigned)hold & ((1U << op) - 1); @@ -159,9 +140,9 @@ void inflate_fast(z_streamp strm, unsigned start) } Tracevv((stderr, "inflate: length %u\n", len)); if (bits < 15) { - hold += (unsigned long)(PUP(in)) << bits; + hold += (unsigned long)(*in++) << bits; bits += 8; - hold += (unsigned long)(PUP(in)) << bits; + hold += (unsigned long)(*in++) << bits; bits += 8; } this = dcode[hold & dmask]; @@ -174,10 +155,10 @@ void inflate_fast(z_streamp strm, unsigned start) dist = (unsigned)(this.val); op &= 15; /* number of extra bits */ if (bits < op) { - hold += (unsigned long)(PUP(in)) << bits; + hold += (unsigned long)(*in++) << bits; bits += 8; if (bits < op) { - hold += (unsigned long)(PUP(in)) << bits; + hold += (unsigned long)(*in++) << bits; bits += 8; } } @@ -200,13 +181,13 @@ void inflate_fast(z_streamp strm, unsigned start) state->mode = BAD; break; } - from = window - OFF; + from = window; if (write == 0) { /* very common case */ from += wsize - op; if (op < len) { /* some from window */ len -= op; do { - PUP(out) = PUP(from); + *out++ = *from++; } while (--op); from = out - dist; /* rest from output */ } @@ -217,14 +198,14 @@ void inflate_fast(z_streamp strm, unsigned start) if (op < len) { /* some from end of window */ len -= op; do { - PUP(out) = PUP(from); + *out++ = *from++; } while (--op); - from = window - OFF; + from = window; if (write < len) { /* some from start of window */ op = write; len -= op; do { - PUP(out) = PUP(from); + *out++ = *from++; } while (--op); from = out - dist; /* rest from output */ } @@ -235,21 +216,21 @@ void inflate_fast(z_streamp strm, unsigned start) if (op < len) { /* some from window */ len -= op; do { - PUP(out) = PUP(from); + *out++ = *from++; } while (--op); from = out - dist; /* rest from output */ } } while (len > 2) { - PUP(out) = PUP(from); - PUP(out) = PUP(from); - PUP(out) = PUP(from); + *out++ = *from++; + *out++ = *from++; + *out++ = *from++; len -= 3; } if (len) { - PUP(out) = PUP(from); + *out++ = *from++; if (len > 1) - PUP(out) = PUP(from); + *out++ = *from++; } } else { @@ -259,25 +240,25 @@ void inflate_fast(z_streamp strm, unsigned start) from = out - dist; /* copy direct from output */ /* minimum length is three */ /* Align out addr */ - if (!((long)(out - 1 + OFF) & 1)) { - PUP(out) = PUP(from); + if (!((long)(out - 1) & 1)) { + *out++ = *from++; len--; } - sout = (unsigned short *)(out - OFF); + sout = (unsigned short *)(out); if (dist > 2 ) { unsigned short *sfrom; - sfrom = (unsigned short *)(from - OFF); + sfrom = (unsigned short *)(from); loops = len >> 1; do - PUP(sout) = get_unaligned(++sfrom); + *sout++ = get_unaligned(++sfrom); while (--loops); - out = (unsigned char *)sout + OFF; - from = (unsigned char *)sfrom + OFF; + out = (unsigned char *)sout; + from = (unsigned char *)sfrom; } else { /* dist == 1 or dist == 2 */ unsigned short pat16; - pat16 = *(sout-2+2*OFF); + pat16 = *(sout-2); if (dist == 1) #if defined(__BIG_ENDIAN) pat16 = (pat16 & 0xff) | ((pat16 & 0xff ) << 8); @@ -288,12 +269,12 @@ void inflate_fast(z_streamp strm, unsigned start) #endif loops = len >> 1; do - PUP(sout) = pat16; + *sout++ = pat16; while (--loops); - out = (unsigned char *)sout + OFF; + out = (unsigned char *)sout; } if (len & 1) - PUP(out) = PUP(from); + *out++ = *from++; } } else if ((op & 64) == 0) { /* 2nd level distance code */ @@ -329,8 +310,8 @@ void inflate_fast(z_streamp strm, unsigned start) hold &= (1U << bits) - 1; /* update state and return */ - strm->next_in = in + OFF; - strm->next_out = out + OFF; + strm->next_in = in; + strm->next_out = out; strm->avail_in = (unsigned)(in < last ? 5 + (last - in) : 5 - (in - last)); strm->avail_out = (unsigned)(out < end ? 257 + (end - out) : 257 - (out - end)); -- 2.19.0

4 9

[PATCH v3 1/1] arm: sunxi: increase SYS_MALLOC_F_LEN
by Heinrich Schuchardt 21 Oct '20

21 Oct '20

The current default of 0x400 for SYS_MALLOC_F_LEN is too small if any additional drivers marked as DM_FLAG_PRE_RELOC are loaded before relocation. CONFIG_RSA=y which is needed for UEFI secure boot or for FIT image verification loads the driver mod_exp_sw which has DM_FLAG_PRE_RELOC. CONFIG_LOG=Y is another setting requiring additional early malloc area, cf. log_init(). When running pine64-lts_defconfig with CONFIG_RSA=y and debug UART enabled we see as output in main U-Boot alloc_simple() alloc space exhausted With this patch the default values of SYS_MALLOC_F_LEN and SPL_SYS_MALLOC_F_LEN on ARCH_SUNXI are raised to 0x2000. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> Reviewed-by: Jagan Teki <jagan(a)amarulasolutions.com> --- v3: rebased v2: keep default for SPL_SYS_MALLOC_F_LEN at 0x400 --- Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Kconfig b/Kconfig index 566ca72c92..513ccda8f2 100644 --- a/Kconfig +++ b/Kconfig @@ -182,7 +182,7 @@ config SYS_MALLOC_F_LEN default 0x2000 if (ARCH_IMX8 || ARCH_IMX8M || ARCH_MX7 || \ ARCH_MX7ULP || ARCH_MX6 || ARCH_MX5 || \ ARCH_LS1012A || ARCH_LS1021A || ARCH_LS1043A || \ - ARCH_LS1046A || ARCH_QEMU) + ARCH_LS1046A || ARCH_QEMU || ARCH_SUNXI) default 0x400 help Before relocation, memory is very limited on many platforms. Still, -- 2.27.0

4 5

[PATCH 0/4] Some reserved memory hardenings
by Tero Kristo 20 Oct '20

20 Oct '20

Hi, This series applies some reserved memory checks to the boot commands, and enhances the bdinfo command to dump out reserved memory sections. Motivation behind these is mostly to help detecting overwriting either DTB, ramdisk or Linux image with other images. Right now, the boot in most cases just continues but will hang before anything is printed out from Linux. In some cases the boot continues even if u-boot detects something that is terribly wrong (like DTB has been overwritten.) Patch #3 has some holes in it (it does not pass the OS image / size in some cases.) I wasn't quite sure what parameter to pass in these cases so I just left them at zero, meaning no checks are done. The layout of the reserved memory section printout with patch #1 could maybe also made look bit neater, I just re-used the existing lmb debug functionality for this purpose. -Tero -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

3 12

[PATCH v2 1/1] dfu: remove UPDATE_TFTP
by Heinrich Schuchardt 15 Oct '20

15 Oct '20

Using UPDATE_TFTP the firmware can be updated from TFTP by writing to NOR flash. The same is possible by defining a dfu command in CONFIG_PREBOOT. The dfu command cannot only write to NOR but also to other devices. In README.dfutfp UPDATE_TFTP has been marked as deprecated. It is not used by any board. Remove TFTP update via CONFIG_UPDATE_TFTP. Adjust the documentation. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- v2: rework the documentation --- README | 10 +- common/Kconfig | 17 ---- common/main.c | 3 - common/update.c | 147 +-------------------------- doc/README.dfutftp | 171 ++++++++++++++++++-------------- doc/README.update | 97 ------------------ doc/uImage.FIT/update3.its | 6 +- doc/uImage.FIT/update_uboot.its | 2 +- 8 files changed, 101 insertions(+), 352 deletions(-) delete mode 100644 doc/README.update diff --git a/README b/README index 2384966a39..6c5378286b 100644 --- a/README +++ b/README @@ -2104,14 +2104,6 @@ The following options need to be configured: Please see board_init_f function. -- Automatic software updates via TFTP server - CONFIG_UPDATE_TFTP - CONFIG_UPDATE_TFTP_CNT_MAX - CONFIG_UPDATE_TFTP_MSEC_MAX - - These options enable and control the auto-update feature; - for a more detailed description refer to doc/README.update. - - MTD Support (mtdparts command, UBI support) CONFIG_MTD_UBI_WL_THRESHOLD This parameter defines the maximum difference between the highest @@ -3329,7 +3321,7 @@ List of environment variables (most likely not complete): updatefile - Location of the software update file on a TFTP server, used by the automatic software update feature. Please refer to - documentation in doc/README.update for more details. + documentation in doc/README.dfutftp for more details. autoload - if set to "no" (any string beginning with 'n'), "bootp" will just load perform a lookup of the diff --git a/common/Kconfig b/common/Kconfig index 67b3818fde..ca42ba37b7 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -1014,23 +1014,6 @@ endmenu menu "Update support" -config UPDATE_TFTP - bool "Auto-update using fitImage via TFTP" - depends on FIT - help - This option allows performing update of NOR with data in fitImage - sent via TFTP boot. - -config UPDATE_TFTP_CNT_MAX - int "The number of connection retries during auto-update" - default 0 - depends on UPDATE_TFTP - -config UPDATE_TFTP_MSEC_MAX - int "Delay in mSec to wait for the TFTP server during auto-update" - default 100 - depends on UPDATE_TFTP - config ANDROID_AB bool "Android A/B updates" default n diff --git a/common/main.c b/common/main.c index 4b3cd302c3..62ab3344e5 100644 --- a/common/main.c +++ b/common/main.c @@ -50,9 +50,6 @@ void main_loop(void) if (IS_ENABLED(CONFIG_USE_PREBOOT)) run_preboot_environment_command(); - if (IS_ENABLED(CONFIG_UPDATE_TFTP)) - update_tftp(0UL, NULL, NULL); - s = bootdelay_process(); if (cli_process_fdt(&s)) cli_secure_boot_cmd(s); diff --git a/common/update.c b/common/update.c index d8854791d2..3320ddc167 100644 --- a/common/update.c +++ b/common/update.c @@ -14,10 +14,6 @@ #error "CONFIG_FIT and CONFIG_OF_LIBFDT are required for auto-update feature" #endif -#if defined(CONFIG_UPDATE_TFTP) && !defined(CONFIG_MTD_NOR_FLASH) -#error "CONFIG_UPDATE_TFTP and !CONFIG_MTD_NOR_FLASH needed for legacy behaviour" -#endif - #include <command.h> #include <env.h> #include <flash.h> @@ -26,7 +22,6 @@ #include <malloc.h> #include <dfu.h> #include <errno.h> -#include <mtd/cfi_flash.h> /* env variable holding the location of the update file */ #define UPDATE_FILE_ENV "updatefile" @@ -46,10 +41,7 @@ extern ulong tftp_timeout_ms; extern int tftp_timeout_count_max; -#ifdef CONFIG_MTD_NOR_FLASH -extern flash_info_t flash_info[]; -static uchar *saved_prot_info; -#endif + static int update_load(char *filename, ulong msec_max, int cnt_max, ulong addr) { int size, rv; @@ -98,122 +90,6 @@ static int update_load(char *filename, ulong msec_max, int cnt_max, ulong addr) return rv; } -#ifdef CONFIG_MTD_NOR_FLASH -static int update_flash_protect(int prot, ulong addr_first, ulong addr_last) -{ - uchar *sp_info_ptr; - ulong s; - int i, bank, cnt; - flash_info_t *info; - - sp_info_ptr = NULL; - - if (prot == 0) { - saved_prot_info = - calloc(CONFIG_SYS_MAX_FLASH_BANKS * CONFIG_SYS_MAX_FLASH_SECT, 1); - if (!saved_prot_info) - return 1; - } - - for (bank = 0; bank < CONFIG_SYS_MAX_FLASH_BANKS; ++bank) { - cnt = 0; - info = &flash_info[bank]; - - /* Nothing to do if the bank doesn't exist */ - if (info->sector_count == 0) - return 0; - - /* Point to current bank protection information */ - sp_info_ptr = saved_prot_info + (bank * CONFIG_SYS_MAX_FLASH_SECT); - - /* - * Adjust addr_first or addr_last if we are on bank boundary. - * Address space between banks must be continuous for other - * flash functions (like flash_sect_erase or flash_write) to - * succeed. Banks must also be numbered in correct order, - * according to increasing addresses. - */ - if (addr_last > info->start[0] + info->size - 1) - addr_last = info->start[0] + info->size - 1; - if (addr_first < info->start[0]) - addr_first = info->start[0]; - - for (i = 0; i < info->sector_count; i++) { - /* Save current information about protected sectors */ - if (prot == 0) { - s = info->start[i]; - if ((s >= addr_first) && (s <= addr_last)) - sp_info_ptr[i] = info->protect[i]; - - } - - /* Protect/unprotect sectors */ - if (sp_info_ptr[i] == 1) { -#if defined(CONFIG_SYS_FLASH_PROTECTION) - if (flash_real_protect(info, i, prot)) - return 1; -#else - info->protect[i] = prot; -#endif - cnt++; - } - } - - if (cnt) { - printf("%sProtected %d sectors\n", - prot ? "": "Un-", cnt); - } - } - - if((prot == 1) && saved_prot_info) - free(saved_prot_info); - - return 0; -} -#endif - -static int update_flash(ulong addr_source, ulong addr_first, ulong size) -{ -#ifdef CONFIG_MTD_NOR_FLASH - ulong addr_last = addr_first + size - 1; - - /* round last address to the sector boundary */ - if (flash_sect_roundb(&addr_last) > 0) - return 1; - - if (addr_first >= addr_last) { - printf("Error: end address exceeds addressing space\n"); - return 1; - } - - /* remove protection on processed sectors */ - if (update_flash_protect(0, addr_first, addr_last) > 0) { - printf("Error: could not unprotect flash sectors\n"); - return 1; - } - - printf("Erasing 0x%08lx - 0x%08lx", addr_first, addr_last); - if (flash_sect_erase(addr_first, addr_last) > 0) { - printf("Error: could not erase flash\n"); - return 1; - } - - printf("Copying to flash..."); - if (flash_write((char *)addr_source, addr_first, size) > 0) { - printf("Error: could not copy to flash\n"); - return 1; - } - printf("done\n"); - - /* enable protection on processed sectors */ - if (update_flash_protect(1, addr_first, addr_last) > 0) { - printf("Error: could not protect flash sectors\n"); - return 1; - } -#endif - return 0; -} - static int update_fit_getparams(const void *fit, int noffset, ulong *addr, ulong *fladdr, ulong *size) { @@ -235,20 +111,9 @@ int update_tftp(ulong addr, char *interface, char *devstring) char *filename, *env_addr, *fit_image_name; ulong update_addr, update_fladdr, update_size; int images_noffset, ndepth, noffset; - bool update_tftp_dfu; int ret = 0; void *fit; - if (interface == NULL && devstring == NULL) { - update_tftp_dfu = false; - } else if (interface && devstring) { - update_tftp_dfu = true; - } else { - pr_err("Interface: %s and devstring: %s not supported!\n", - interface, devstring); - return -EINVAL; - } - /* use already present image */ if (addr) goto got_update_file; @@ -314,15 +179,7 @@ got_update_file: goto next_node; } - if (!update_tftp_dfu) { - if (update_flash(update_addr, update_fladdr, - update_size)) { - printf("Error: can't flash update, aborting\n"); - ret = 1; - goto next_node; - } - } else if (fit_image_check_type(fit, noffset, - IH_TYPE_FIRMWARE)) { + if (fit_image_check_type(fit, noffset, IH_TYPE_FIRMWARE)) { ret = dfu_tftp_write(fit_image_name, update_addr, update_size, interface, devstring); if (ret) diff --git a/doc/README.dfutftp b/doc/README.dfutftp index a3341bbb61..8653f4149c 100644 --- a/doc/README.dfutftp +++ b/doc/README.dfutftp @@ -1,114 +1,131 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2015 -# -# Lukasz Majewski <l.majewski(a)majess.pl> - -Device Firmware Upgrade (DFU) - extension to use TFTP -===================================================== - -Why? ----- - -* Update TFTP (CONFIG_UPDATE_TFTP) only supports writing -code to NAND memory via TFTP. -* DFU supports writing data to the variety of mediums (NAND, -eMMC, SD, partitions, RAM, etc) via USB. - -Combination of both solves their shortcomings! +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright (c) 2015 Lukasz Majewski <l.majewski(a)majess.pl> +Device Firmware Upgrade (DFU) from TFTP +======================================= Overview -------- -This document briefly describes how to use DFU for -upgrading firmware (e.g. kernel, u-boot, rootfs, etc.) -via TFTP protocol. +This document briefly describes how to use DFU for upgrading firmware (e.g. +kernel, u-boot, rootfs, etc.) via TFTP protocol. -By using Ethernet (TFTP protocol to be precise) it is -possible to overcome the major problem of USB based DFU - -the relatively low transfer speed for large files. -This was caused by DFU standard, which imposed utilization -of only EP0 for transfer. By using Ethernet we can circumvent -this shortcoming. - -Beagle Bone Black rev. C (BBB) powered by TI's am335x CPU has -been used as a demo board. - -To utilize this feature, one needs to first enable support -for USB based DFU (CONFIG_DFU_*) and DFU TFTP update -(CONFIG_DFU_TFTP) described in ./doc/README.update. +By using Ethernet (TFTP protocol to be precise) it is possible to overcome the +major problem of USB based DFU - the relatively low transfer speed for large +files. This was caused by DFU standard, which imposed utilization of only EP0 +for transfer. By using Ethernet we can circumvent this shortcoming. The "dfu" command has been extended to support transfer via TFTP - one -needs to type for example "dfu tftp 0 mmc 0" +needs to type for example "dfu tftp mtd nor1". For details of the target +device specification, please, refer to doc/README.dfu. + +To utilize this feature, one needs to first enable support for -As of this writing (SHA1:8d77576371381ade83de475bb639949b44941e8c v2015.10-rc2) -the update.c code is not enabled (CONFIG_UPDATE_TFTP) by any board in the -contemporary u-boot tree. +* DFU - CONFIG_DFU +* DFU TFTP - CONFIG_DFU_TFTP (which depends on CONFIG_FIT and CONFIG_LIBFDT) +* at least one of the DFU backends - CONFIG_DFU_* Environment variables --------------------- -The "dfu tftp" command can be used in the "preboot" environment variable -(when it is enabled by defining CONFIG_PREBOOT). -This is the preferable way of using this command in the early boot stage -as opposed to legacy update_tftp() function invocation. +* **dfu_alt_info**: information about available DFU entities +* **dfu_bufsiz**: variable to set buffer size [in bytes] +* **ipaddr**: IP address of the U-Boot device +* **loadaddr**: Normally, TFTP transfer of the update file is done to the + address specified in environment variable 'loadaddr'. If this variable is not + present, the transfer is made to the address given in CONFIG_UPDATE_LOAD_ADDR + (0x100000 by default). +* **preboot**: To enable automatic updates the "dfu tftp" command can be + specified in the "preboot" environment variable (when it is enabled by + defining CONFIG_PREBOOT). +* **serverip**: IP address of the TFTP server +* **updatefile**: the source path of the file to be downloaded via TFTP -Beagle Bone Black (BBB) setup +FIT image format for download ----------------------------- -1. Setup tftp env variables: - * select desired eth device - 'ethact' variable ["ethact=cpsw"] - (use "bdinfo" to check current setting) - * setup "serverip" and "ipaddr" variables - * set "loadaddr" as a fixed buffer where incoming data is placed - ["loadaddr=0x81000000"] +Since the update file is in FIT format, it is created from an \*.its file using +the mkimage tool. dtc tool with support for binary includes, e.g. in version +1.2.0 or later, must also be available on the system where the update file is +to be prepared. Refer to the doc/uImage.FIT/ directory for more details on FIT +images. -######### -# BONUS # -######### -It is possible to use USB interface to emulate ETH connection by setting -"ethact=usb_ether". In this way one can have very fast DFU transfer via USB. -For 33MiB test image the transfer rate was 1MiB/s for ETH over USB and 200KiB/s -for pure DFU USB transfer. +Example .its files +------------------ -2. Setup update_tftp variables: - * set "updatefile" - the file name to be downloaded via TFTP (stored on - the HOST at e.g. /srv/tftp) +* doc/uImage.FIT/update_uboot.its -3. If required, to update firmware on boot, put the "dfu tftp 0 mmc 0" in the - "preboot" env variable. Otherwise use this command from u-boot prompt. + A simple example that can be used to create an update file for automatically + replacing the U-Boot image on a system. -4. Inspect "dfu" specific variables: - * "dfu_alt_info" - information about available DFU entities - * "dfu_bufsiz" - variable to set buffer size [in bytes] - when it is not - possible to set large enough default buffer (8 MiB @ BBB) + Assuming that an U-Boot image u-boot.bin is present in the current working + directory, and that the address given in the 'load' property in the + 'update_uboot.its' file is where the U-Boot is stored in Flash, the + following command will create the actual update file 'update_uboot.itb':: + mkimage -f update_uboot.its update_uboot.itb + Place 'update_uboot.itb' on a TFTP server, for example as + '/tftpboot/update_uboot.itb', and set the 'updatefile' and 'preboot' variable + appropriately, for example in the U-Boot prompt:: -FIT image format for download + setenv preboot 'dfu tftp mtd nor0' + setenv updatefile /tftpboot/update_uboot.itb + saveenv + + Now, when the system boots up and the update TFTP server specified in the + 'serverip' environment variable is accessible, the new U-Boot image will be + automatically stored. + + **NOTE**: do make sure that the 'u-boot.bin' image used to create the update + file is a good, working image. Also make sure that the target address + where the update will be placed is correct. Making mistake here and + attempting the auto-update can render the system unusable. + +* doc/uImage.FIT/update3.its + + An example containing three updates. It can be used to update Linux kernel, + ramdisk and FDT blob stored in Flash. The procedure for preparing the update + file is similar to the example above. + + +Beagle Bone Black (BBB) setup ----------------------------- -To create FIT image for download one should follow the update tftp README file -(./doc/README.update) with one notable difference: +The Beagle Bone Black rev. C (BBB) powered by TI's am335x CPU has been used as a +demo board. -The original snippet of ./doc/uImage.FIT/update_uboot.its +1. Setup tftp env variables: + + * select desired eth device - 'ethact' variable ["ethact=cpsw"] + (use "bdinfo" to check current setting) + * setup "serverip" and "ipaddr" variables + * set "loadaddr" as a fixed buffer where incoming data is placed + ["loadaddr=0x81000000"] - images { - update@1 { - description = "U-Boot binary"; + It is possible to use an USB interface to emulate ETH connection by setting + "ethact=usb_ether". In this way one can have very fast DFU transfer via + USB. -should look like + For 33MiB test image the transfer rate was 1MiB/s for ETH over USB and + 200KiB/s for pure DFU USB transfer. + +2. Setup update_tftp variables: - images { - u-boot.bin@1 { - description = "U-Boot binary"; + * set "updatefile" - the file name to be downloaded via TFTP (stored on + the HOST at e.g. /srv/tftp) -where "u-boot.bin" is the DFU entity name to be stored. +3. Inspect "dfu" specific variables: + + * "dfu_alt_info" - information about available DFU entities + * "dfu_bufsiz" - variable to set buffer size [in bytes] - when it is not + possible to set large enough default buffer (8 MiB @ BBB) +4. If required, to update firmware on boot, put the "dfu tftp mmc 0" in the + "preboot" env variable. Otherwise use this command from u-boot prompt. To do diff --git a/doc/README.update b/doc/README.update deleted file mode 100644 index bf4379279e..0000000000 --- a/doc/README.update +++ /dev/null @@ -1,97 +0,0 @@ -Automatic software update from a TFTP server -============================================ - -Overview --------- - -This feature allows to automatically store software updates present on a TFTP -server in NOR Flash. In more detail: a TFTP transfer of a file given in -environment variable 'updatefile' from server 'serverip' is attempted during -boot. The update file should be a FIT file, and can contain one or more -updates. Each update in the update file has an address in NOR Flash where it -should be placed, updates are also protected with a SHA-1 checksum. If the -TFTP transfer is successful, the hash of each update is verified, and if the -verification is positive, the update is stored in Flash. - -The auto-update feature is enabled by the CONFIG_UPDATE_TFTP macro: - -#define CONFIG_UPDATE_TFTP 1 - - -Note that when enabling auto-update, Flash support must be turned on. Also, -one must enable FIT and LIBFDT support: - -#define CONFIG_FIT 1 -#define CONFIG_OF_LIBFDT 1 - -The auto-update feature uses the following configuration knobs: - -- CONFIG_UPDATE_LOAD_ADDR - - Normally, TFTP transfer of the update file is done to the address specified - in environment variable 'loadaddr'. If this variable is not present, the - transfer is made to the address given in CONFIG_UPDATE_LOAD_ADDR (0x100000 - by default). - -- CONFIG_UPDATE_TFTP_CNT_MAX - CONFIG_UPDATE_TFTP_MSEC_MAX - - These knobs control the timeouts during initial connection to the TFTP - server. Since a transfer is attempted during each boot, it is undesirable to - have a long delay when a TFTP server is not present. - CONFIG_UPDATE_TFTP_MSEC_MAX specifies the number of milliseconds to wait for - the server to respond to initial connection, and CONFIG_UPDATE_TFTP_CNT_MAX - gives the number of such connection retries. CONFIG_UPDATE_TFTP_CNT_MAX must - be non-negative and is 0 by default, CONFIG_UPDATE_TFTP_MSEC_MAX must be - positive and is 100 by default. - -Since the update file is in FIT format, it is created from an *.its file using -the mkimage tool. dtc tool with support for binary includes, e.g. in version -1.2.0 or later, must also be available on the system where the update file is -to be prepared. Refer to the doc/uImage.FIT/ directory for more details on FIT -images. - - -Example .its files ------------------- - -- doc/uImage.FIT/update_uboot.its - - A simple example that can be used to create an update file for automatically - replacing U-Boot image on a system. - - Assuming that an U-Boot image u-boot.bin is present in the current working - directory, and that the address given in the 'load' property in the - 'update_uboot.its' file is where the U-Boot is stored in Flash, the - following command will create the actual update file 'update_uboot.itb': - - mkimage -f update_uboot.its update_uboot.itb - - Place 'update_uboot.itb' on a TFTP server, for example as - '/tftpboot/update_uboot.itb', and set the 'updatefile' variable - appropriately, for example in the U-Boot prompt: - - setenv updatefile /tftpboot/update_uboot.itb - saveenv - - Now, when the system boots up and the update TFTP server specified in the - 'serverip' environment variable is accessible, the new U-Boot image will be - automatically stored in Flash. - - NOTE: do make sure that the 'u-boot.bin' image used to create the update - file is a good, working image. Also make sure that the address in Flash - where the update will be placed is correct. Making mistake here and - attempting the auto-update can render the system unusable. - -- doc/uImage.FIT/update3.its - - An example containing three updates. It can be used to update Linux kernel, - ramdisk and FDT blob stored in Flash. The procedure for preparing the update - file is similar to the example above. - -TFTP update via DFU -------------------- - -- It is now possible to update firmware (bootloader, kernel, rootfs, etc.) via - TFTP by using DFU (Device Firmware Upgrade). More information can be found in - ./doc/README.dfutftp documentation entry. diff --git a/doc/uImage.FIT/update3.its b/doc/uImage.FIT/update3.its index 0659f20002..16a0d62ad3 100644 --- a/doc/uImage.FIT/update3.its +++ b/doc/uImage.FIT/update3.its @@ -9,7 +9,7 @@ #address-cells = <1>; images { - update-1 { + u-boot.bin@1 { description = "Linux kernel binary"; data = /incbin/("./vmlinux.bin.gz"); compression = "none"; @@ -19,7 +19,7 @@ algo = "sha1"; }; }; - update-2 { + u-boot.bin@2 { description = "Ramdisk image"; data = /incbin/("./ramdisk_image.gz"); compression = "none"; @@ -30,7 +30,7 @@ }; }; - update-3 { + u-boot.bin@2 { description = "FDT blob"; data = /incbin/("./blob.fdt"); compression = "none"; diff --git a/doc/uImage.FIT/update_uboot.its b/doc/uImage.FIT/update_uboot.its index aec4826008..0c371bc54f 100644 --- a/doc/uImage.FIT/update_uboot.its +++ b/doc/uImage.FIT/update_uboot.its @@ -10,7 +10,7 @@ #address-cells = <1>; images { - update-1 { + u-boot.bin@1 { description = "U-Boot binary"; data = /incbin/("./u-boot.bin"); compression = "none"; -- 2.27.0

4 13

[PATCH v5 0/3] Add command to display or save Linux PStore dumps
by Frédéric Danis 14 Oct '20

14 Oct '20

This serie of patches adds a new pstore command allowing to display or save ramoops logs (oops, panic, console, ftrace and user) generated by a previous kernel crash. PStore parameters can be set in U-Boot configuration file, or at run-time using "pstore set" command. For kernel using Device Tree, the parameters are dynamically added to Device Tree. Records size should be the same as the ones used by kernel, and should be a power of 2. Changes in v5: - Fix test_pstore.py license - Change log level on error messages in fdt_fixup_pstore() - Replace fdt_appendprop_…() by fdt_setprop_…() when adding a new property Changes in v4: - Fix PStore memory address in sandbox defconfig files for tests Changes in v3: - Add default value for PStore memory size - Remove default value of PStore memory address - Update config entry helps - Replace calls to debug() by log_debug() - Update documentation - Replace 1M test file by 3 * 4K files and build pstore memory during test - Add fdt_fixup_pstore() to pass PStore/Ramoops parameters to kernel Changes in v2: - Fix 64bit mode build warnings - Add documentation - Add function description comments - Replace calls to pr_debug() by debug() - Add CONFIG_CMD_PSTORE to sandbox and sandbox64 - Add unit tests Frédéric Danis (3): cmd: Add command to display or save Linux PStore dumps test: Add PStore command tests cmd: Fixup DT to pass PStore Ramoops parameters cmd/Kconfig | 71 +++ cmd/Makefile | 1 + cmd/pstore.c | 543 +++++++++++++++++++++ common/image-fdt.c | 4 + configs/sandbox64_defconfig | 2 + configs/sandbox_defconfig | 2 + doc/index.rst | 7 + doc/pstore.rst | 76 +++ include/fdt_support.h | 3 + test/py/tests/test_pstore.py | 73 +++ test/py/tests/test_pstore_data_console.hex | Bin 0 -> 4096 bytes test/py/tests/test_pstore_data_panic1.hex | Bin 0 -> 4096 bytes test/py/tests/test_pstore_data_panic2.hex | Bin 0 -> 4096 bytes 13 files changed, 782 insertions(+) create mode 100644 cmd/pstore.c create mode 100644 doc/pstore.rst create mode 100644 test/py/tests/test_pstore.py create mode 100644 test/py/tests/test_pstore_data_console.hex create mode 100644 test/py/tests/test_pstore_data_panic1.hex create mode 100644 test/py/tests/test_pstore_data_panic2.hex -- 2.18.0

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[PATCH 1/1] sunxi: Pine64-LTS: SMBIOS properties
by Heinrich Schuchardt 08 Oct '20

08 Oct '20

Provide accurate values of the manufacturer and the product name. PINE Microsystems Inc. is referred to on https://www.pine64.org/contact/. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- configs/pine64-lts_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/pine64-lts_defconfig b/configs/pine64-lts_defconfig index ef108a1a31..a8ff34a376 100644 --- a/configs/pine64-lts_defconfig +++ b/configs/pine64-lts_defconfig @@ -8,8 +8,10 @@ CONFIG_DRAM_ZQ=3881949 CONFIG_MMC0_CD_PIN="" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y +CONFIG_SMBIOS_PRODUCT_NAME="PINE A64-LTS" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-lts" CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y +CONFIG_SMBIOS_MANUFACTURER="PINE Microsystems Inc." -- 2.26.2

2 5