July 2020 - U-Boot

[PATCH 1/1] doc: riscv: debug UART for MAIX
by Heinrich Schuchardt 29 Jul '20

29 Jul '20

Provide the required settings for the debug UART. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- doc/board/sipeed/maix.rst | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/doc/board/sipeed/maix.rst b/doc/board/sipeed/maix.rst index c235cb44a8..b1894f3a6f 100644 --- a/doc/board/sipeed/maix.rst +++ b/doc/board/sipeed/maix.rst @@ -262,6 +262,16 @@ Boot Sequence stage. 8. The boot hart jumps to ``0x80000000``. +Debug UART +^^^^^^^^^^ + +The Debug UART is provided with the following settings:: + + CONFIG_DEBUG_UART=y + CONFIG_DEBUG_UART_SIFIVE=y + CONFIG_DEBUG_UART_BASE=0x38000000 + CONFIG_DEBUG_UART_CLOCK=390000000 + Resetting the board ^^^^^^^^^^^^^^^^^^^ -- 2.27.0

2 1

[PATCH 1/1] x86: rename CONFIG_STACK_SIZE
by Heinrich Schuchardt 29 Jul '20

29 Jul '20

Configuration variables should have the same meaning independent of the architecture. x86 and ARM both use CONFIG_STACK_SIZE: * x86: U-Boot's runtime stack size during reboot * ARM: max stack size that can be used by U-Boot Rename the x86 configuration variable to CONFIG_STACK_SIZE_REBOOT Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- arch/x86/Kconfig | 2 +- arch/x86/lib/fsp/fsp_dram.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index ff4f06ed79..f677472501 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -802,7 +802,7 @@ config S3_VGA_ROM_RUN graphics console won't work without VGA options ROMs. Set it to N if your kernel is only on a serial console. -config STACK_SIZE +config STACK_SIZE_RESUME hex depends on HAVE_ACPI_RESUME default 0x1000 diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c index 01d498c21e..faa819fab4 100644 --- a/arch/x86/lib/fsp/fsp_dram.c +++ b/arch/x86/lib/fsp/fsp_dram.c @@ -121,7 +121,7 @@ unsigned int install_e820_map(unsigned int max_entries, ulong stack_size; stack_size = CONFIG_IS_ENABLED(HAVE_ACPI_RESUME, - (CONFIG_STACK_SIZE), (0)); + (CONFIG_STACK_SIZE_RESUME), (0)); /* * Everything between U-Boot's stack and ram top needs to be * reserved in order for ACPI S3 resume to work. -- 2.27.0

1 0

[PATCH v2 0/6] mx6cuboxi: enable OF_PLATDATA with MMC support
by Walter Lozano 29 Jul '20

29 Jul '20

The SPL in iMX6 boards is restricted to 68 KB as this is the free available space in OCRAM for most revisions. In this context, adding OF_CONTROL and DM increases the SPL size which could make it difficult to add specific features required for custom scenarios. These patches aim to take advantage of OF_PLATADATA in order to reduce the SPL size in this scenario, by parsing DT data to generate platdata structures, and thus removing the overhead caused by DT and related libraries. This series is focused in MMC driver, which is used for boot in boards such as Cubox-i. Also, in order to support CD, the OF_PLATDATA support is also implemented on GPIO driver. Changes in v2: - Improve commit message with footprint reduction Walter Lozano (6): mmc: fsl_esdhc_imx: rename driver name to match ll_entry mmc: fsl_esdhc_imx: add OF_PLATDATA support gpio: mxc_gpio: add OF_PLATDATA support mmc: fsl_esdhc_imx: add CD support when OF_PLATDATA is enabled drivers: rename more drivers to match compatible string mx6cuboxi: enable OF_PLATDATA configs/mx6cuboxi_defconfig | 1 + drivers/gpio/mxc_gpio.c | 18 +++++- drivers/mmc/fsl_esdhc_imx.c | 94 +++++++++++++++++++++++++----- drivers/pinctrl/nxp/pinctrl-imx6.c | 6 +- drivers/video/imx/mxc_ipuv3_fb.c | 4 +- 5 files changed, 103 insertions(+), 20 deletions(-) -- 2.20.1

4 16

[PATCH] mmc: sdhci: Setup HS modes based on HISPD bit
by Michal Simek 29 Jul '20

29 Jul '20

There is no reason to setup HS modes by default without checking bit in capability register. Setting up HS mode by default breaks option to disable HS mode via sdhci-caps-mask DT property. Disabling HS mode can be done via DT as: sdhci-caps-mask = <0 0x200000>; Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- drivers/mmc/sdhci.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 9af4de84dd6b..2119fdbae840 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -844,7 +844,10 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE) cfg->voltages |= host->voltages; - cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT; + if (caps & SDHCI_CAN_DO_HISPD) + cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz; + + cfg->host_caps |= MMC_MODE_4BIT; /* Since Host Controller Version3.0 */ if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) { -- 2.27.0

2 2

[PATCH 1/3] board: mediatek: fix mmc_get_boot_dev() for platforms without external SD
by David Woodhouse 29 Jul '20

29 Jul '20

On the UniElec U7623 board there is no external SD slot and the preloader doesn't fill in the magic field at 0x81dffff0 to indicate that it was booted from eMMC. Signed-off-by: David Woodhouse <dwmw2(a)infradead.org> --- board/mediatek/mt7623/mt7623_rfb.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/board/mediatek/mt7623/mt7623_rfb.c b/board/mediatek/mt7623/mt7623_rfb.c index 4ec2764976..984e75ccaf 100644 --- a/board/mediatek/mt7623/mt7623_rfb.c +++ b/board/mediatek/mt7623/mt7623_rfb.c @@ -4,6 +4,7 @@ */ #include <common.h> +#include <mmc.h> DECLARE_GLOBAL_DATA_PTR; @@ -15,10 +16,15 @@ int board_init(void) return 0; } +#ifdef CONFIG_MMC int mmc_get_boot_dev(void) { int g_mmc_devid = -1; char *uflag = (char *)0x81DFFFF0; + + if (!find_mmc_device(1)) + return 0; + if (strncmp(uflag,"eMMC",4)==0) { g_mmc_devid = 0; printf("Boot From Emmc(id:%d)\n\n", g_mmc_devid); @@ -33,3 +39,4 @@ int mmc_get_env_dev(void) { return mmc_get_boot_dev(); } +#endif -- 2.26.2

2 6

[PATCH v4 00/14] arm: add support for SoC S5P4418
by Stefan Bosch 29 Jul '20

29 Jul '20

This patch adds support for SAMSUNG's/NEXELL's ARM Cortex-A9 based S5P4418 SoC, especially FriendlyARM's NanoPi2 and NanoPC-T2 boards. It is based on the following FriendlyARM's U-Boot version: https://github.com/friendlyarm/u-boot/tree/nanopi2-v2016.01. Main changes in relation to nanopi2-v2016.01: - Cosmetic changes due to patman warnings/errors. - MMC and Video drivers changed to DM. - Configs reworked (e.g. "CONFIG_..." moved from s5p4418_nanopi2.h to s5p4418_nanopi2_defconfig) - SPL related files are not included. - MACH_TYPE_S5P4418 is not defined/used anymore. - arch/arm/mach-nexell/include/mach/boot0.h added to generate the NSIH (Nexell System Information Header), substitudes tools/nexell. - board/s5p4418/ renamed to board/friendlyarm/ - Only the NanoPi2 and NanoPC-T2 boards are supported yet because I do only have the NanoPC-T2 board to test the code (this board uses the NanoPi2 code). - USB is not supported yet. - pinctrl-driver/dt is used for mmc and i2c now instead of configuring the I/O-pins in the drivers. - '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where possible (and similar). - livetree API (dev_read_...) is used instead of fdt one (fdt...). The patch-series has been checked by buildman (all arm boards and two m68k boards = M5235EVB): buildman --step 0 -b master arm buildman --step 0 -b master M5235EVB There have been no new warnings or errors. Changes in v4: - cosmetic changes in nx_i2c.c: if-else block simplified, defines used for constant values. Changes in v3: - arch/arm/mach-nexell/Kconfig: "NEXELL_COMMON" removed, has not been used at all. NEXELL_ARMV7_COMMON and NEXELL_ARMV8_COMMON removed, has been used only in the Kconfig at ARCH_S5P4418 and ARCH_S5P6818. Used "select ..."-statements moved appropriately. Missing helps added. - arch/arm/mach-nexell/timer.c: '#include <log.h>' inserted because it has been removed from common.h. - '#ifdef...' changed to 'if (IS_ENABLED(CONFIG...))' where possible because of appropriate warnings of patman. - Changed to livetree API as proposed by patman: fdtdec_get_int() --> dev_read_s32_default() fdt_getprop() --> dev_read_string() - pinctrl-driver/dt is used now instead of configuring the i2c I/O-pins in the i2c-driver. - drivers/i2c/nx_i2c.c: '#include <log.h>' inserted because it has been removed from common.h. - Changed to livetree API as proposed by patman: fdtdec_get_int() --> dev_read_s32_default() - nexell_dw_mmc_dm.c renamed (back) to nexell_dw_mmc.c - pinctrl-driver/dt is used now instead of configuring the mmc I/O-pins in the mmc-driver. - nexell_dwmmc_ofdata_to_platdata() reworked, i.e. valid default values are used now (where possible) and the appropriate if-blocks have been removed. - "nexell," removed from dt-properties, e.g. "nexell,bus-width" changed to "bus-width". - new dt-property "mmcboost" is used now instead of "CONFIG_BOOST_MMC" which was not defined anywhere. - Boot error "Loading Environment from MMC... *** Warning - No block device, using default environment" after updating local repository. Bugfix in drivers/mmc/nexell_dw_mmc.c: "#include <clk.h>" changed to "#include <asm/arch/clk.h>". This Bug showed up now because of the commit "dm: clk: add stub when CONFIG_CLK is deactivated" where include/clk.h has been changed. - drivers/mmc/nexell_dw_mmc.c: '#include <log.h>' inserted because it has been removed from common.h. - Kconfig: Missing helps added. - Changed to livetree API as proposed by patman: fdt_stringlist_count() --> dev_read_string_count() fdt_stringlist_get() --> dev_read_string_index() fdtdec_get_int() --> dev_read_s32_default() - doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt added. - Handling of Configs for LCD backlight control reworked because (among others) not setting CONFIG_S5P4418_ONEWIRE and/or CONFIG_PWM_NX has caused errors when compiling board/friendlyarm/nanopi2/onewire.c. - pwm.h: () around macro argument x added to avoid precedence issues. - drivers/video/nexell/s5pxx18_dp_hdmi.c: '#include <log.h>' and '#include <linux/delay.h>' inserted because it has been removed from common.h. - drivers/video/nexell_display.c: '#include <command.h>' inserted because '#include <image.h>' (includes command.h) has been removed from common.h. - Changed to livetree API as proposed by patman: fdtdec_get_int() --> ofnode_read_s32_default() for (node = ...) --> ofnode_for_each_subnode() fdt_get_name() --> ofnode_get_name() fdt_getprop() --> dev_read_string() - nx_display_probe() removed, nx_display_dev_probe_uclass() renamed to nx_display_probe(). - dts: pinctrl is supported now, therefore s5p4418-pinctrl.dtsi added, mmc- and i2c-entries extended appropriately. New mmc-property "mmcboost" added. - Handling of Configs for LCD backlight control reworked because (among others) not setting CONFIG_S5P4418_ONEWIRE and/or CONFIG_PWM_NX has caused errors when compiling board/friendlyarm/nanopi2/onewire.c. - arch/arm/cpu/armv7/s5p4418/cpu.c: '#include <linux/delay.h>' inserted because it has been removed from common.h. - board/friendlyarm/nanopi2/board.c: Several includes inserted because some includes have been removed from common.h. - Several initialisations of static variables to 0 removed because of appropriate errors of patman. - CONFIG_SYS_RESERVE_MEM_SIZE removed, has not been used anymore - s5p4418_nanopi2_defconfig: "CONFIG_PINCTRL=y" added because pinctrl is supported now. "CONFIG_EFI_LOADER=n" removed (there have been boot errors "efi_runtime_relocate: Unknown relocation type 0" at a previous U-Boot Version without this). "CONFIG_DM_I2C_GPIO=y" removed because I2C-peripherial is used (Nexell I2C driver). Some configs moved down for cosmetic reason. - Handling of Configs for LCD backlight control reworked because (among others) not setting CONFIG_S5P4418_ONEWIRE and/or CONFIG_PWM_NX has caused errors when compiling board/friendlyarm/nanopi2/onewire.c. - CONFIG_SYS_MEMTEST_START, CONFIG_SYS_MEMTEST_END, CONFIG_CMDLINE_TAG and CONFIG_CMD_BMP moved from s5p4418_nanopi2.h to s5p4418_nanopi2_defconfig. - "#undef CONFIG_CMD_IMLS" removed in s5p4418_nanopi2.h Changes in v2: - arch/arm/mach-nexell/serial.c removed because this is for the UARTs of the S5P6818 SoC which is not supported yet. S5P4418 UARTs are different, here the (existing) PL011-code is used. - line '... += spl/' in in arch/arm/mach-nexell/Makefile deleted, this change has already been stated in the commit message but was missing nethertheless. - commit "i2c: mmc: add nexell driver (gpio, i2c, mmc, pwm)" splitted into separate commits for gpio, i2c, mmc, pwm. - cosmetic: line "obj-$(CONFIG_NX_GPIO) += nx_gpio.o" in drivers/gpio/Makefile moved up. - several Bugfixes in nx_i2c.c. - the i2c-driver has been for s5p6818 only. Code extended approriately in order s5p4418 is also working. - "probe_chip" added to the i2c-driver. - doc/device-tree-bindings/i2c/nx_i2c.txt added. - Since drivers/pwm/pwm-nexell.c is an adapted version of s5p-common/pwm.c an appropriately changed version of s5p-common/pwm.c is used now. Therefore arch/arm/mach-s5pc1xx/include/mach/pwm.h copied to arch/arm/mach-nexell/include/mach and s5p-common/Makefile changed appropriately. - i2c: "nexell,s5pxx18-i2c"-driver is used now instead of "i2c-gpio". i2c0 and i2c1 added. I.e. dts files changed appropriately. - dts: gmac-, ehci- and dwc2otg-entries removed because the appropriate functionality is not supported yet. - s5p4418-pinctrl.dtsi removed because there is no pinctrl-driver available. - "obj-$(CONFIG_ARCH_NEXELL) += s5p-common/" added to arch/arm/cpu/armv7/Makefile since s5p-common/pwm.c is used now instead of drivers/pwm/pwm-nexell.c. - cosmetic: additional GPL license text removed, SPDX-License-Identifier is enough. Furthermore file path removed (two files). - USB related configs removed because USB is not supported yet. - CONFIG_CMD_MEMTEST moved from s5p4418_nanopi2.h to s5p4418_nanopi2_defconfig. - MAINTAINERS: "F: drivers/pwm/pwm-nexell*" deleted because arch/arm/cpu/armv7/s5p-common/pwm.c is used now. Furthermore double line "F: drivers/video/nexell/" deleted. Stefan Bosch (14): arm: add mach-nexell (header files) arm: add mach-nexell (all files except header files) gpio: add nexell driver i2c: add nexell driver mmc: add nexell driver pinctrl: add nexell driver pwm: add driver for nexell video: add nexell video driver (soc: displaytop) video: add nexell video driver (soc: mlc, mipi) video: add nexell video driver (soc: lvds, hdmi) video: add nexell video driver (soc: dpc, makefile) video: add nexell video driver (display/video driver) arm: add support for SoC s5p4418 (cpu) / nanopi2 board arm: add (default) config for nanopi2 board MAINTAINERS | 17 + arch/arm/Kconfig | 7 + arch/arm/Makefile | 1 + arch/arm/cpu/armv7/Makefile | 2 + arch/arm/cpu/armv7/s5p-common/Makefile | 13 +- arch/arm/cpu/armv7/s5p-common/pwm.c | 57 +- arch/arm/cpu/armv7/s5p4418/Makefile | 6 + arch/arm/cpu/armv7/s5p4418/cpu.c | 121 ++ arch/arm/dts/Makefile | 3 + arch/arm/dts/s5p4418-nanopi2.dts | 110 ++ arch/arm/dts/s5p4418-pinctrl.dtsi | 135 ++ arch/arm/dts/s5p4418.dtsi | 170 ++ arch/arm/mach-nexell/Kconfig | 58 + arch/arm/mach-nexell/Makefile | 13 + arch/arm/mach-nexell/clock.c | 869 +++++++++ arch/arm/mach-nexell/cmd_boot_linux.c | 144 ++ arch/arm/mach-nexell/config.mk | 11 + arch/arm/mach-nexell/include/mach/boot0.h | 40 + arch/arm/mach-nexell/include/mach/clk.h | 24 + arch/arm/mach-nexell/include/mach/display.h | 273 +++ arch/arm/mach-nexell/include/mach/display_dev.h | 37 + arch/arm/mach-nexell/include/mach/ehci.h | 106 ++ arch/arm/mach-nexell/include/mach/gpio.h | 17 + arch/arm/mach-nexell/include/mach/mipi_display.h | 215 +++ arch/arm/mach-nexell/include/mach/nexell.h | 352 ++++ arch/arm/mach-nexell/include/mach/nx_gpio.h | 103 ++ arch/arm/mach-nexell/include/mach/pwm.h | 54 + arch/arm/mach-nexell/include/mach/reset.h | 19 + arch/arm/mach-nexell/include/mach/sec_reg.h | 15 + arch/arm/mach-nexell/include/mach/tieoff.h | 423 +++++ arch/arm/mach-nexell/nx_gpio.c | 352 ++++ arch/arm/mach-nexell/nx_sec_reg.c | 82 + arch/arm/mach-nexell/reg-call.S | 23 + arch/arm/mach-nexell/reset.c | 33 + arch/arm/mach-nexell/tieoff.c | 107 ++ arch/arm/mach-nexell/timer.c | 299 ++++ board/friendlyarm/Kconfig | 37 + board/friendlyarm/nanopi2/Kconfig | 12 + board/friendlyarm/nanopi2/MAINTAINERS | 7 + board/friendlyarm/nanopi2/Makefile | 7 + board/friendlyarm/nanopi2/board.c | 575 ++++++ board/friendlyarm/nanopi2/hwrev.c | 108 ++ board/friendlyarm/nanopi2/hwrev.h | 15 + board/friendlyarm/nanopi2/lcds.c | 697 ++++++++ board/friendlyarm/nanopi2/nxp-fb.h | 94 + board/friendlyarm/nanopi2/onewire.c | 307 ++++ board/friendlyarm/nanopi2/onewire.h | 15 + configs/s5p4418_nanopi2_defconfig | 147 ++ doc/README.s5p4418 | 63 + doc/device-tree-bindings/i2c/nx_i2c.txt | 28 + .../pinctrl/nexell,s5pxx18-pinctrl.txt | 78 + drivers/gpio/Kconfig | 9 + drivers/gpio/Makefile | 1 + drivers/gpio/nx_gpio.c | 250 +++ drivers/i2c/Kconfig | 9 + drivers/i2c/Makefile | 1 + drivers/i2c/nx_i2c.c | 626 +++++++ drivers/mmc/Kconfig | 8 + drivers/mmc/Makefile | 1 + drivers/mmc/nexell_dw_mmc.c | 237 +++ drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/nexell/Kconfig | 18 + drivers/pinctrl/nexell/Makefile | 7 + drivers/pinctrl/nexell/pinctrl-nexell.c | 66 + drivers/pinctrl/nexell/pinctrl-nexell.h | 68 + drivers/pinctrl/nexell/pinctrl-s5pxx18.c | 220 +++ drivers/pinctrl/nexell/pinctrl-s5pxx18.h | 53 + drivers/video/Kconfig | 10 + drivers/video/Makefile | 1 + drivers/video/nexell/Kconfig | 27 + drivers/video/nexell/Makefile | 12 + drivers/video/nexell/s5pxx18_dp.c | 341 ++++ drivers/video/nexell/s5pxx18_dp_hdmi.c | 545 ++++++ drivers/video/nexell/s5pxx18_dp_lvds.c | 274 +++ drivers/video/nexell/s5pxx18_dp_mipi.c | 677 +++++++ drivers/video/nexell/s5pxx18_dp_rgb.c | 69 + drivers/video/nexell/soc/Makefile | 11 + drivers/video/nexell/soc/s5pxx18_soc_disptop.c | 185 ++ drivers/video/nexell/soc/s5pxx18_soc_disptop.h | 385 ++++ drivers/video/nexell/soc/s5pxx18_soc_disptop_clk.c | 309 ++++ drivers/video/nexell/soc/s5pxx18_soc_disptop_clk.h | 59 + drivers/video/nexell/soc/s5pxx18_soc_disptype.h | 23 + drivers/video/nexell/soc/s5pxx18_soc_dpc.c | 1569 +++++++++++++++++ drivers/video/nexell/soc/s5pxx18_soc_dpc.h | 444 +++++ drivers/video/nexell/soc/s5pxx18_soc_hdmi.c | 50 + drivers/video/nexell/soc/s5pxx18_soc_hdmi.h | 488 +++++ drivers/video/nexell/soc/s5pxx18_soc_lvds.c | 278 +++ drivers/video/nexell/soc/s5pxx18_soc_lvds.h | 83 + drivers/video/nexell/soc/s5pxx18_soc_mipi.c | 580 ++++++ drivers/video/nexell/soc/s5pxx18_soc_mipi.h | 291 +++ drivers/video/nexell/soc/s5pxx18_soc_mlc.c | 1861 ++++++++++++++++++++ drivers/video/nexell/soc/s5pxx18_soc_mlc.h | 429 +++++ drivers/video/nexell_display.c | 651 +++++++ include/configs/s5p4418_nanopi2.h | 257 +++ 95 files changed, 17981 insertions(+), 5 deletions(-) create mode 100644 arch/arm/cpu/armv7/s5p4418/Makefile create mode 100644 arch/arm/cpu/armv7/s5p4418/cpu.c create mode 100644 arch/arm/dts/s5p4418-nanopi2.dts create mode 100644 arch/arm/dts/s5p4418-pinctrl.dtsi create mode 100644 arch/arm/dts/s5p4418.dtsi create mode 100644 arch/arm/mach-nexell/Kconfig create mode 100644 arch/arm/mach-nexell/Makefile create mode 100644 arch/arm/mach-nexell/clock.c create mode 100644 arch/arm/mach-nexell/cmd_boot_linux.c create mode 100644 arch/arm/mach-nexell/config.mk create mode 100644 arch/arm/mach-nexell/include/mach/boot0.h create mode 100644 arch/arm/mach-nexell/include/mach/clk.h create mode 100644 arch/arm/mach-nexell/include/mach/display.h create mode 100644 arch/arm/mach-nexell/include/mach/display_dev.h create mode 100644 arch/arm/mach-nexell/include/mach/ehci.h create mode 100644 arch/arm/mach-nexell/include/mach/gpio.h create mode 100644 arch/arm/mach-nexell/include/mach/mipi_display.h create mode 100644 arch/arm/mach-nexell/include/mach/nexell.h create mode 100644 arch/arm/mach-nexell/include/mach/nx_gpio.h create mode 100644 arch/arm/mach-nexell/include/mach/pwm.h create mode 100644 arch/arm/mach-nexell/include/mach/reset.h create mode 100644 arch/arm/mach-nexell/include/mach/sec_reg.h create mode 100644 arch/arm/mach-nexell/include/mach/tieoff.h create mode 100644 arch/arm/mach-nexell/nx_gpio.c create mode 100644 arch/arm/mach-nexell/nx_sec_reg.c create mode 100644 arch/arm/mach-nexell/reg-call.S create mode 100644 arch/arm/mach-nexell/reset.c create mode 100644 arch/arm/mach-nexell/tieoff.c create mode 100644 arch/arm/mach-nexell/timer.c create mode 100644 board/friendlyarm/Kconfig create mode 100644 board/friendlyarm/nanopi2/Kconfig create mode 100644 board/friendlyarm/nanopi2/MAINTAINERS create mode 100644 board/friendlyarm/nanopi2/Makefile create mode 100644 board/friendlyarm/nanopi2/board.c create mode 100644 board/friendlyarm/nanopi2/hwrev.c create mode 100644 board/friendlyarm/nanopi2/hwrev.h create mode 100644 board/friendlyarm/nanopi2/lcds.c create mode 100644 board/friendlyarm/nanopi2/nxp-fb.h create mode 100644 board/friendlyarm/nanopi2/onewire.c create mode 100644 board/friendlyarm/nanopi2/onewire.h create mode 100644 configs/s5p4418_nanopi2_defconfig create mode 100644 doc/README.s5p4418 create mode 100644 doc/device-tree-bindings/i2c/nx_i2c.txt create mode 100644 doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt create mode 100644 drivers/gpio/nx_gpio.c create mode 100644 drivers/i2c/nx_i2c.c create mode 100644 drivers/mmc/nexell_dw_mmc.c create mode 100644 drivers/pinctrl/nexell/Kconfig create mode 100644 drivers/pinctrl/nexell/Makefile create mode 100644 drivers/pinctrl/nexell/pinctrl-nexell.c create mode 100644 drivers/pinctrl/nexell/pinctrl-nexell.h create mode 100644 drivers/pinctrl/nexell/pinctrl-s5pxx18.c create mode 100644 drivers/pinctrl/nexell/pinctrl-s5pxx18.h create mode 100644 drivers/video/nexell/Kconfig create mode 100644 drivers/video/nexell/Makefile create mode 100644 drivers/video/nexell/s5pxx18_dp.c create mode 100644 drivers/video/nexell/s5pxx18_dp_hdmi.c create mode 100644 drivers/video/nexell/s5pxx18_dp_lvds.c create mode 100644 drivers/video/nexell/s5pxx18_dp_mipi.c create mode 100644 drivers/video/nexell/s5pxx18_dp_rgb.c create mode 100644 drivers/video/nexell/soc/Makefile create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_disptop.c create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_disptop.h create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_disptop_clk.c create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_disptop_clk.h create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_disptype.h create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_dpc.c create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_dpc.h create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_hdmi.c create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_hdmi.h create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_lvds.c create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_lvds.h create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_mipi.c create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_mipi.h create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_mlc.c create mode 100644 drivers/video/nexell/soc/s5pxx18_soc_mlc.h create mode 100644 drivers/video/nexell_display.c create mode 100644 include/configs/s5p4418_nanopi2.h -- 1.9.1

2 28

[PATCH v3 0/5] Fixes for running U-boot under QEMU/KVM
by Ard Biesheuvel 29 Jul '20

29 Jul '20

This series fixes a number of issues that exist in the QEMU/mach-virt port of u-boot, and that prevent it from executing correctly under virtualization (as opposed to TCG emulation) As the Linux EFI subsystem maintainer, I am looking to increase test coverage for the EFI related changes that are under development for Linux, and one of the things I plan to do is start using U-boot as test firmware for boot testing. This can be done under TCG emulation, but given how loosely TCG implements the architecture, it is better to test under virtualization as well. With these changes applied, u-boot can boot Linux in EFI mode under KVM. Changes since v2: - reinstate flash write accessors (patch #5) - rebase onto 2020.07 Changes since v1: - fix LPAE memory type for DCACHE_WRITETHROUGH as well, and add some comments to clarify what the values are based on (patch #1) - only override the flash accessors that we need to (patch #5) - add Heinrich's ack to #2 and #4 Cc: Tom Rini <trini(a)konsulko.com> Cc: Andre Przywara <andre.przywara(a)arm.com> Cc: Heinrich Schuchardt <xypron.glpk(a)gmx.de> Cc: Tuomas Tynkkynen <tuomas.tynkkynen(a)iki.fi> Ard Biesheuvel (5): arm: enable allocate-on-read for LPAE's DCACHE_WRITEBACK/_WRITETHROUGH arm: qemu: enable LPAE on 32-bit arm: qemu: implement enable_caches() arm: qemu: disable the EFI workaround for older GRUB arm: qemu: override flash accessors to use virtualizable instructions arch/arm/include/asm/system.h | 23 +++++++-- board/emulation/qemu-arm/qemu-arm.c | 52 ++++++++++++++++++++ configs/qemu_arm_defconfig | 2 + include/configs/qemu-arm.h | 1 + 4 files changed, 74 insertions(+), 4 deletions(-) -- 2.27.0

4 14

[PATCH 1/3] arm: Add support for Qualcomm IPQ40xx family
by Robert Marko 29 Jul '20

29 Jul '20

This introduces initial support for the popular Qualcomm IPQ40x8 and IPQ40x9 WiSoC series. IPQ40xx series have 4x Cortex A7 ARM-v7A cores. Supported are: IPQ4018, IPQ4019, IPQ4028 and IPQ4029. IPQ40x8 and IPQ40x9 use the same cores, but differ in addressable RAM size (1GB for IPQ40x9 and 256MB for IPQ40x8) and supported peripherals (IPQ40x8 lacks RGMII, LCD controller and EMMC/SDHCI controllers). IQP4028/IPQ4029 models differ from IPQ4018/IPQ4019 only by their rated temperatures rates with IPQ402X models being rated for wider temperature ranges. Initially this supports: * Simple clock driver (Only for UART1 now, will be extended) * Pinctrl driver (Supports UARTX and GPIO now, will be extended) * GPIOs already supported by msm_gpio driver with updates * UARTs already supported by serial_msm driver with updates Further peripherals will come in later patches. Signed-off-by: Robert Marko <robert.marko(a)sartura.hr> --- MAINTAINERS | 7 ++ arch/arm/Kconfig | 13 ++ arch/arm/Makefile | 1 + arch/arm/dts/qcom-ipq4019.dtsi | 79 ++++++++++++ arch/arm/mach-ipq40xx/Kconfig | 15 +++ arch/arm/mach-ipq40xx/Makefile | 9 ++ arch/arm/mach-ipq40xx/clock-ipq4019.c | 64 ++++++++++ arch/arm/mach-ipq40xx/include/mach/gpio.h | 10 ++ arch/arm/mach-ipq40xx/pinctrl-ipq4019.c | 47 +++++++ arch/arm/mach-ipq40xx/pinctrl-snapdragon.c | 137 +++++++++++++++++++++ arch/arm/mach-ipq40xx/pinctrl-snapdragon.h | 30 +++++ 11 files changed, 412 insertions(+) create mode 100644 arch/arm/dts/qcom-ipq4019.dtsi create mode 100644 arch/arm/mach-ipq40xx/Kconfig create mode 100644 arch/arm/mach-ipq40xx/Makefile create mode 100644 arch/arm/mach-ipq40xx/clock-ipq4019.c create mode 100644 arch/arm/mach-ipq40xx/include/mach/gpio.h create mode 100644 arch/arm/mach-ipq40xx/pinctrl-ipq4019.c create mode 100644 arch/arm/mach-ipq40xx/pinctrl-snapdragon.c create mode 100644 arch/arm/mach-ipq40xx/pinctrl-snapdragon.h diff --git a/MAINTAINERS b/MAINTAINERS index db8cecd5e0..e689d1ebeb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -216,6 +216,13 @@ F: arch/arm/cpu/armv8/hisilicon F: arch/arm/include/asm/arch-hi6220/ F: arch/arm/include/asm/arch-hi3660/ +ARM IPQ40XX +M: Robert Marko <robert.marko(a)sartura.hr> +M: Luka Kovacic <luka.kovacic(a)sartura.hr> +M: Luka Perkov <luka.perkov(a)sartura.hr> +S: Maintained +F: arch/arm/mach-ipq40xx/ + ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X ARMADA-37XX ARMADA-7K/8K M: Stefan Roese <sr(a)denx.de> S: Maintained diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 54d65f8488..3868c5c674 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -763,6 +763,17 @@ config ARCH_INTEGRATOR select PL01X_SERIAL imply CMD_DM +config ARCH_IPQ40XX + bool "Qualcomm IPQ40xx SoCs" + select CPU_V7A + select DM + select DM_GPIO + select DM_SERIAL + select PINCTRL + select CLK + select OF_CONTROL + imply CMD_DM + config ARCH_KEYSTONE bool "TI Keystone" select CMD_POWEROFF @@ -1772,6 +1783,8 @@ source "arch/arm/mach-highbank/Kconfig" source "arch/arm/mach-integrator/Kconfig" +source "arch/arm/mach-ipq40xx/Kconfig" + source "arch/arm/mach-k3/Kconfig" source "arch/arm/mach-keystone/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 94eb50bf72..a20b82bc8d 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -58,6 +58,7 @@ machine-$(CONFIG_ARCH_BCMSTB) += bcmstb machine-$(CONFIG_ARCH_DAVINCI) += davinci machine-$(CONFIG_ARCH_EXYNOS) += exynos machine-$(CONFIG_ARCH_HIGHBANK) += highbank +machine-$(CONFIG_ARCH_IPQ40XX) += ipq40xx machine-$(CONFIG_ARCH_K3) += k3 machine-$(CONFIG_ARCH_KEYSTONE) += keystone machine-$(CONFIG_ARCH_KIRKWOOD) += kirkwood diff --git a/arch/arm/dts/qcom-ipq4019.dtsi b/arch/arm/dts/qcom-ipq4019.dtsi new file mode 100644 index 0000000000..5f78bc5ab9 --- /dev/null +++ b/arch/arm/dts/qcom-ipq4019.dtsi @@ -0,0 +1,79 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2019 Sartura Ltd. + * + * Author: Robert Marko <robert.marko(a)sartura.hr> + */ + + /dts-v1/; + +#include "skeleton.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/pinctrl-snapdragon.h> + +/ { + #address-cells = <1>; + #size-cells = <1>; + + model = "Qualcomm Technologies, Inc. IPQ4019"; + compatible = "qcom,ipq4019"; + + aliases { + serial0 = &blsp1_uart1; + }; + + reserved-memory { + #address-cells = <0x1>; + #size-cells = <0x1>; + ranges; + + smem_mem: smem_region: smem@87e00000 { + reg = <0x87e00000 0x080000>; + no-map; + }; + + tz@87e80000 { + reg = <0x87e80000 0x180000>; + no-map; + }; + }; + + soc: soc { + #address-cells = <1>; + #size-cells = <1>; + ranges; + compatible = "simple-bus"; + + gcc: clock-controller@1800000 { + compatible = "qcom,gcc-ipq4019"; + reg = <0x1800000 0x60000>; + #clock-cells = <1>; + #reset-cells = <1>; + u-boot,dm-pre-reloc; + }; + + pinctrl: qcom,tlmm@1000000 { + compatible = "qcom,tlmm-ipq4019"; + reg = <0x1000000 0x300000>; + u-boot,dm-pre-reloc; + }; + + blsp1_uart1: serial@78af000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x78af000 0x200>; + clock = <&gcc 26>; + bit-rate = <0xFF>; + status = "disabled"; + u-boot,dm-pre-reloc; + }; + + soc_gpios: pinctrl@1000000 { + compatible = "qcom,ipq4019-pinctrl"; + reg = <0x1000000 0x300000>; + gpio-controller; + gpio-count = <100>; + gpio-bank-name="soc"; + #gpio-cells = <2>; + }; + }; +}; diff --git a/arch/arm/mach-ipq40xx/Kconfig b/arch/arm/mach-ipq40xx/Kconfig new file mode 100644 index 0000000000..4eef80e935 --- /dev/null +++ b/arch/arm/mach-ipq40xx/Kconfig @@ -0,0 +1,15 @@ +if ARCH_IPQ40XX + +config SYS_SOC + default "ipq40xx" + +config SYS_MALLOC_F_LEN + default 0x2000 + +config SYS_TEXT_BASE + default 0x87300000 + +config NR_DRAM_BANKS + default 1 + +endif diff --git a/arch/arm/mach-ipq40xx/Makefile b/arch/arm/mach-ipq40xx/Makefile new file mode 100644 index 0000000000..08a65b8854 --- /dev/null +++ b/arch/arm/mach-ipq40xx/Makefile @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2019 Sartura Ltd. +# +# Author: Robert Marko <robert.marko(a)sartura.hr> + +obj-y += clock-ipq4019.o +obj-y += pinctrl-snapdragon.o +obj-y += pinctrl-ipq4019.o diff --git a/arch/arm/mach-ipq40xx/clock-ipq4019.c b/arch/arm/mach-ipq40xx/clock-ipq4019.c new file mode 100644 index 0000000000..7cf98a203c --- /dev/null +++ b/arch/arm/mach-ipq40xx/clock-ipq4019.c @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Clock drivers for Qualcomm IPQ40xx + * + * Copyright (c) 2019 Sartura Ltd. + * + * Author: Robert Marko <robert.marko(a)sartura.hr> + * + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <errno.h> + +struct msm_clk_priv { + phys_addr_t base; +}; + +ulong msm_set_rate(struct clk *clk, ulong rate) +{ + switch (clk->id) { + case 26: /*UART1*/ + /* This clock is already initialized by SBL1 */ + return 0; + break; + default: + return 0; + } +} + +static int msm_clk_probe(struct udevice *dev) +{ + struct msm_clk_priv *priv = dev_get_priv(dev); + + priv->base = devfdt_get_addr(dev); + if (priv->base == FDT_ADDR_T_NONE) + return -EINVAL; + + return 0; +} + +static ulong msm_clk_set_rate(struct clk *clk, ulong rate) +{ + return msm_set_rate(clk, rate); +} + +static struct clk_ops msm_clk_ops = { + .set_rate = msm_clk_set_rate, +}; + +static const struct udevice_id msm_clk_ids[] = { + { .compatible = "qcom,gcc-ipq4019" }, + { } +}; + +U_BOOT_DRIVER(clk_msm) = { + .name = "clk_msm", + .id = UCLASS_CLK, + .of_match = msm_clk_ids, + .ops = &msm_clk_ops, + .priv_auto_alloc_size = sizeof(struct msm_clk_priv), + .probe = msm_clk_probe, +}; diff --git a/arch/arm/mach-ipq40xx/include/mach/gpio.h b/arch/arm/mach-ipq40xx/include/mach/gpio.h new file mode 100644 index 0000000000..a45747c0fe --- /dev/null +++ b/arch/arm/mach-ipq40xx/include/mach/gpio.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Empty gpio.h + * + * This file must stay as arch/arm/include/asm/gpio.h requires it. + * + * Copyright (c) 2019 Sartura Ltd. + * + * Author: Robert Marko <robert.marko(a)sartura.hr> + */ diff --git a/arch/arm/mach-ipq40xx/pinctrl-ipq4019.c b/arch/arm/mach-ipq40xx/pinctrl-ipq4019.c new file mode 100644 index 0000000000..06a57f2e5e --- /dev/null +++ b/arch/arm/mach-ipq40xx/pinctrl-ipq4019.c @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm IPQ40xx pinctrl + * + * Copyright (c) 2019 Sartura Ltd. + * + * Author: Robert Marko <robert.marko(a)sartura.hr> + */ + +#include "pinctrl-snapdragon.h" +#include <common.h> + +#define MAX_PIN_NAME_LEN 32 +static char pin_name[MAX_PIN_NAME_LEN]; + +static const struct pinctrl_function msm_pinctrl_functions[] = { + {"gpio", 0}, + {"blsp_uart0_0", 1}, /* Only for GPIO:16,17 */ + {"blsp_uart0_1", 2}, /* Only for GPIO:60,61 */ + {"blsp_uart1", 1}, +}; + +static const char *ipq4019_get_function_name(struct udevice *dev, + unsigned int selector) +{ + return msm_pinctrl_functions[selector].name; +} + +static const char *ipq4019_get_pin_name(struct udevice *dev, + unsigned int selector) +{ + snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector); + return pin_name; +} + +static unsigned int ipq4019_get_function_mux(unsigned int selector) +{ + return msm_pinctrl_functions[selector].val; +} + +struct msm_pinctrl_data ipq4019_data = { + .pin_count = 100, + .functions_count = ARRAY_SIZE(msm_pinctrl_functions), + .get_function_name = ipq4019_get_function_name, + .get_function_mux = ipq4019_get_function_mux, + .get_pin_name = ipq4019_get_pin_name, +}; diff --git a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c b/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c new file mode 100644 index 0000000000..64b8b049fa --- /dev/null +++ b/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * TLMM driver for Qualcomm IPQ40xx + * + * (C) Copyright 2018 Ramon Fried <ramon.fried(a)gmail.com> + * + * Copyright (c) 2020 Sartura Ltd. + * + * Author: Robert Marko <robert.marko(a)sartura.hr> + * + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <asm/io.h> +#include <dm/pinctrl.h> +#include <linux/bitops.h> +#include "pinctrl-snapdragon.h" + +struct msm_pinctrl_priv { + phys_addr_t base; + struct msm_pinctrl_data *data; +}; + +#define GPIO_CONFIG_OFFSET(x) ((x) * 0x1000) +#define TLMM_GPIO_PULL_MASK GENMASK(1, 0) +#define TLMM_FUNC_SEL_MASK GENMASK(5, 2) +#define TLMM_DRV_STRENGTH_MASK GENMASK(8, 6) +#define TLMM_GPIO_DISABLE BIT(9) + +static const struct pinconf_param msm_conf_params[] = { + { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 2 }, + { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 }, + { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 2 }, +}; + +static int msm_get_functions_count(struct udevice *dev) +{ + struct msm_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->data->functions_count; +} + +static int msm_get_pins_count(struct udevice *dev) +{ + struct msm_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->data->pin_count; +} + +static const char *msm_get_function_name(struct udevice *dev, + unsigned int selector) +{ + struct msm_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->data->get_function_name(dev, selector); +} + +static int msm_pinctrl_probe(struct udevice *dev) +{ + struct msm_pinctrl_priv *priv = dev_get_priv(dev); + + priv->base = devfdt_get_addr(dev); + priv->data = (struct msm_pinctrl_data *)dev->driver_data; + + return priv->base == FDT_ADDR_T_NONE ? -EINVAL : 0; +} + +static const char *msm_get_pin_name(struct udevice *dev, unsigned int selector) +{ + struct msm_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->data->get_pin_name(dev, selector); +} + +static int msm_pinmux_set(struct udevice *dev, unsigned int pin_selector, + unsigned int func_selector) +{ + struct msm_pinctrl_priv *priv = dev_get_priv(dev); + + clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector), + TLMM_FUNC_SEL_MASK | TLMM_GPIO_DISABLE, + priv->data->get_function_mux(func_selector) << 2); + return 0; +} + +static int msm_pinconf_set(struct udevice *dev, unsigned int pin_selector, + unsigned int param, unsigned int argument) +{ + struct msm_pinctrl_priv *priv = dev_get_priv(dev); + + switch (param) { + case PIN_CONFIG_DRIVE_STRENGTH: + clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector), + TLMM_DRV_STRENGTH_MASK, argument << 6); + break; + case PIN_CONFIG_BIAS_DISABLE: + clrbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector), + TLMM_GPIO_PULL_MASK); + break; + case PIN_CONFIG_BIAS_PULL_UP: + clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector), + TLMM_GPIO_PULL_MASK, argument); + break; + default: + return 0; + } + + return 0; +} + +static struct pinctrl_ops msm_pinctrl_ops = { + .get_pins_count = msm_get_pins_count, + .get_pin_name = msm_get_pin_name, + .set_state = pinctrl_generic_set_state, + .pinmux_set = msm_pinmux_set, + .pinconf_num_params = ARRAY_SIZE(msm_conf_params), + .pinconf_params = msm_conf_params, + .pinconf_set = msm_pinconf_set, + .get_functions_count = msm_get_functions_count, + .get_function_name = msm_get_function_name, +}; + +static const struct udevice_id msm_pinctrl_ids[] = { + { .compatible = "qcom,tlmm-ipq4019", .data = (ulong)&ipq4019_data }, + { } +}; + +U_BOOT_DRIVER(pinctrl_snapdraon) = { + .name = "pinctrl_msm", + .id = UCLASS_PINCTRL, + .of_match = msm_pinctrl_ids, + .priv_auto_alloc_size = sizeof(struct msm_pinctrl_priv), + .ops = &msm_pinctrl_ops, + .probe = msm_pinctrl_probe, +}; diff --git a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.h b/arch/arm/mach-ipq40xx/pinctrl-snapdragon.h new file mode 100644 index 0000000000..2341a71349 --- /dev/null +++ b/arch/arm/mach-ipq40xx/pinctrl-snapdragon.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Qualcomm Pin control + * + * (C) Copyright 2018 Ramon Fried <ramon.fried(a)gmail.com> + * + */ +#ifndef _PINCTRL_SNAPDRAGON_H +#define _PINCTRL_SNAPDRAGON_H + +#include <common.h> + +struct msm_pinctrl_data { + int pin_count; + int functions_count; + const char *(*get_function_name)(struct udevice *dev, + unsigned int selector); + unsigned int (*get_function_mux)(unsigned int selector); + const char *(*get_pin_name)(struct udevice *dev, + unsigned int selector); +}; + +struct pinctrl_function { + const char *name; + int val; +}; + +extern struct msm_pinctrl_data ipq4019_data; + +#endif -- 2.26.2

3 15

Can't access mmc #0 on mt7623 when booted from external SD
by David Woodhouse 29 Jul '20

29 Jul '20

The Banana Pi R2 bootloader will load U-Boot from either the internal eMMC, or the external SD card if the latter is present. If booted from the eMMC (and an SD card is subsequently inserted), both work from U-Boot. Both also work from Linux, whichever device is booted from. If booted from SD, the internal eMMC cannot be accessed from U-Boot. This makes it slightly difficult for me to write a U-Boot script which installs OpenWRT from the SD card to the internal eMMC... From SD: U-Boot 2020.07-rc4-00057-gc622afb087 (Jun 16 2020 - 17:05:55 +0100) CPU: MediaTek MT7623 E3 DRAM: 2 GiB WDT: Started with servicing (60s timeout) MMC: mmc@11230000: 0, mmc@11240000: 1 Loading Environment from FAT... ** No device specified ** ## Warning: Unknown environment variable type 'i' ## Warning: Unknown environment variable type 'i' ## Warning: Unknown environment variable type 'i' In: serial Out: serial Err: serial Hit any key to stop autoboot: 0 U-Boot> mmc list mmc@11230000: 0 mmc@11240000: 1 U-Boot> mmc dev 0 CMD_SEND:0 ARG 0x00000000 MMC_RSP_NONE CMD_SEND:8 ARG 0x000001aa RET -110 CMD_SEND:55 ARG 0x00000000 RET -110 CMD_SEND:0 ARG 0x00000000 MMC_RSP_NONE CMD_SEND:1 ARG 0x00000000 MMC_RSP_R3,4 0xffffffff CMD_SEND:2 ARG 0x00000000 RET -110 U-Boot> mmc dev 1 CMD_SEND:0 ARG 0x00000000 MMC_RSP_NONE CMD_SEND:8 ARG 0x000001aa MMC_RSP_R1,5,6,7 0x000001aa CMD_SEND:55 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000120 CMD_SEND:41 ARG 0x40300000 MMC_RSP_R3,4 0x00ff8000 CMD_SEND:55 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000120 CMD_SEND:41 ARG 0x40300000 MMC_RSP_R3,4 0x80ff8000 CMD_SEND:2 ARG 0x00000000 MMC_RSP_R2 0x744a6055 0x53442020 0x104059f3 0x34013be5 DUMPING DATA 000 - 74 4a 60 55 004 - 53 44 20 20 008 - 10 40 59 f3 012 - 34 01 3b e5 CMD_SEND:3 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x59b40520 CMD_SEND:9 ARG 0x59b40000 MMC_RSP_R2 0x007f0032 0x5b5a83bd 0x6db7ff80 0x0a80008d DUMPING DATA 000 - 00 7f 00 32 004 - 5b 5a 83 bd 008 - 6d b7 ff 80 012 - 0a 80 00 8d CMD_SEND:7 ARG 0x59b40000 MMC_RSP_R1,5,6,7 0x00000700 CMD_SEND:55 ARG 0x59b40000 MMC_RSP_R1,5,6,7 0x00000920 CMD_SEND:51 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000920 CMD_SEND:6 ARG 0x00fffff1 MMC_RSP_R1,5,6,7 0x00000900 CMD_SEND:55 ARG 0x59b40000 MMC_RSP_R1,5,6,7 0x00000920 CMD_SEND:6 ARG 0x00000002 MMC_RSP_R1,5,6,7 0x00000920 CMD_SEND:6 ARG 0x80fffff1 MMC_RSP_R1,5,6,7 0x00000900 CMD_SEND:55 ARG 0x59b40000 MMC_RSP_R1,5,6,7 0x00000920 CMD_SEND:13 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000920 CMD_SEND:16 ARG 0x00000200 MMC_RSP_R1,5,6,7 0x00000900 CMD_SEND:17 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000900 switch to partitions #0, OK mmc1 is current device From MMC: U-Boot 2020.07-rc4-00057-gc622afb087 (Jun 16 2020 - 17:05:55 +0100) CPU: MediaTek MT7623 E3 DRAM: 2 GiB WDT: Started with servicing (60s timeout) MMC: mmc@11230000: 0, mmc@11240000: 1 Loading Environment from FAT... ** No device specified ** ## Warning: Unknown environment variable type 'i' ## Warning: Unknown environment variable type 'i' ## Warning: Unknown environment variable type 'i' In: serial Out: serial Err: serial Hit any key to stop autoboot: 0 U-Boot> mmc list mmc@11230000: 0 mmc@11240000: 1 U-Boot> mmc dev 0 CMD_SEND:0 ARG 0x00000000 MMC_RSP_NONE CMD_SEND:8 ARG 0x000001aa RET -110 CMD_SEND:55 ARG 0x00000000 RET -110 CMD_SEND:0 ARG 0x00000000 MMC_RSP_NONE CMD_SEND:1 ARG 0x00000000 MMC_RSP_R3,4 0x40ff8080 CMD_SEND:1 ARG 0x40300000 MMC_RSP_R3,4 0x40ff8080 CMD_SEND:0 ARG 0x00000000 MMC_RSP_NONE CMD_SEND:1 ARG 0x40300000 MMC_RSP_R3,4 0x40ff8080 CMD_SEND:1 ARG 0x40300000 MMC_RSP_R3,4 0xc0ff8080 CMD_SEND:2 ARG 0x00000000 MMC_RSP_R2 0x15010038 0x47544634 0x5206071b 0x48de461d DUMPING DATA 000 - 15 01 00 38 004 - 47 54 46 34 008 - 52 06 07 1b 012 - 48 de 46 1d CMD_SEND:3 ARG 0x00010000 MMC_RSP_R1,5,6,7 0x00000500 CMD_SEND:9 ARG 0x00010000 MMC_RSP_R2 0xd0270132 0x0f5903ff 0xf6dbffef 0x8e40400d DUMPING DATA 000 - d0 27 01 32 004 - 0f 59 03 ff 008 - f6 db ff ef 012 - 8e 40 40 0d CMD_SEND:7 ARG 0x00010000 MMC_RSP_R1,5,6,7 0x00000700 CMD_SEND:8 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000900 CMD_SEND:6 ARG 0x03b70200 MMC_RSP_R1b 0x00000900 CMD_SEND:13 ARG 0x00010000 MMC_RSP_R1,5,6,7 0x00000900 CURR STATE:4 CMD_SEND:6 ARG 0x03b90100 MMC_RSP_R1b 0x00000900 CMD_SEND:13 ARG 0x00010000 MMC_RSP_R1,5,6,7 0x00000900 CURR STATE:4 CMD_SEND:8 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000900 CMD_SEND:8 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000900 CMD_SEND:16 ARG 0x00000200 MMC_RSP_R1,5,6,7 0x00000900 CMD_SEND:17 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000900 switch to partitions #0, OK mmc0(part 0) is current device U-Boot> mmc dev 1 CMD_SEND:0 ARG 0x00000000 MMC_RSP_NONE CMD_SEND:8 ARG 0x000001aa MMC_RSP_R1,5,6,7 0x000001aa CMD_SEND:55 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000120 CMD_SEND:41 ARG 0x40300000 MMC_RSP_R3,4 0x00ff8000 CMD_SEND:55 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000120 CMD_SEND:41 ARG 0x40300000 MMC_RSP_R3,4 0x00ff8000 CMD_SEND:55 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000120 CMD_SEND:41 ARG 0x40300000 MMC_RSP_R3,4 0x00ff8000 CMD_SEND:55 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000120 CMD_SEND:41 ARG 0x40300000 MMC_RSP_R3,4 0x00ff8000 CMD_SEND:55 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000120 CMD_SEND:41 ARG 0x40300000 MMC_RSP_R3,4 0x00ff8000 CMD_SEND:55 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000120 CMD_SEND:41 ARG 0x40300000 MMC_RSP_R3,4 0x80ff8000 CMD_SEND:2 ARG 0x00000000 MMC_RSP_R2 0x744a6055 0x53442020 0x104059f3 0x34013be5 DUMPING DATA 000 - 74 4a 60 55 004 - 53 44 20 20 008 - 10 40 59 f3 012 - 34 01 3b e5 CMD_SEND:3 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x59b40520 CMD_SEND:9 ARG 0x59b40000 MMC_RSP_R2 0x007f0032 0x5b5a83bd 0x6db7ff80 0x0a80008d DUMPING DATA 000 - 00 7f 00 32 004 - 5b 5a 83 bd 008 - 6d b7 ff 80 012 - 0a 80 00 8d CMD_SEND:7 ARG 0x59b40000 MMC_RSP_R1,5,6,7 0x00000700 CMD_SEND:55 ARG 0x59b40000 MMC_RSP_R1,5,6,7 0x00000920 CMD_SEND:51 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000920 CMD_SEND:6 ARG 0x00fffff1 MMC_RSP_R1,5,6,7 0x00000900 CMD_SEND:55 ARG 0x59b40000 MMC_RSP_R1,5,6,7 0x00000920 CMD_SEND:6 ARG 0x00000002 MMC_RSP_R1,5,6,7 0x00000920 CMD_SEND:6 ARG 0x80fffff1 MMC_RSP_R1,5,6,7 0x00000900 CMD_SEND:55 ARG 0x59b40000 MMC_RSP_R1,5,6,7 0x00000920 CMD_SEND:13 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000920 CMD_SEND:16 ARG 0x00000200 MMC_RSP_R1,5,6,7 0x00000900 CMD_SEND:17 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x00000900 switch to partitions #0, OK mmc1 is current device U-Boot>

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[U-boot,V2,0/2] Enable mt7531 switch support for MT7629
by MarkLee 29 Jul '20

29 Jul '20

This patch series enable MT7629 sgmii mode with mt7531 switch support, 1. enable mt7629 sgmii mode support in mediatek eth driver 2. enable mt7629 ethernet dts node with sgmii mode and mt7531 switch support Change since V1: - use driver private data from dts to decide the register offset (SGMSYS_GEN2_SPEED) instead of check #ifdefs in drivers. MarkLee (2): eth: mtk-eth: enable mt7629 sgmii mode support in mediatek eth driver arm: dts: mediatek: enable sgmii mode and mt7531 switch for mt7629 arch/arm/dts/mt7629-rfb.dts | 12 +++++++----- drivers/net/mtk_eth.c | 3 ++- drivers/net/mtk_eth.h | 1 + 3 files changed, 10 insertions(+), 6 deletions(-) -- 2.17.1

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