June 2020 - U-Boot

[PATCH]: cmd: part: add part block command
by razvan.becheriu＠gmail.com 05 Jun '20

05 Jun '20

The Intel Edison OTA process requires a conversion of data size from bytes to number of blocks. The following functions are used: # function ota_conv_sizes # Convert a bytes size to a block size # input bytesize : size in bytes to convert # input blksize : size of a block in bytes # output num_blk : converted size in blocks # function ota_mmc_write # Write a memory buffer to mmc drive # input floadaddr : address of buffer to write # input u_part_start : block start in mmc # input num_blk : number of block to write This patch adds the cmd part sub-command 'block' which returns the partition block size in bytes.

3 9

[PATCH] Add support for SHA384 and SHA512
by Reuben Dowle 05 Jun '20

05 Jun '20

The current recommendation for best security practice from the US government is to use SHA384 for TOP SECRET [1]. This patch adds support for SHA384 and SHA512 in the hash command, and also allows FIT images to be hashed with these algorithms, and signed with sha384,rsaXXXX and sha512,rsaXXXX The SHA implementation is adapted from the linux kernel implementation. [1] Commercial National Security Algorithm Suite http://www.iad.gov/iad/programs/iad-initiatives/cnsa-suite.cfm Signed-off-by: Reuben Dowle <reuben.dowle(a)4rf.com> --- Kconfig | 26 ++- common/hash.c | 85 +++++++++- common/image-fit.c | 9 + common/image-sig.c | 26 ++- common/spl/Kconfig | 32 +++- include/hash.h | 4 + include/image.h | 18 ++ include/u-boot/rsa-checksum.h | 1 + include/u-boot/sha512.h | 38 +++++ lib/Kconfig | 23 +++ lib/Makefile | 1 + lib/sha512.c | 383 ++++++++++++++++++++++++++++++++++++++++++ tools/Makefile | 2 + 13 files changed, 632 insertions(+), 16 deletions(-) mode change 100644 => 100755 common/image-fit.c create mode 100644 include/u-boot/sha512.h create mode 100644 lib/sha512.c diff --git a/Kconfig b/Kconfig index 1b0b699..b2adfe7 100644 --- a/Kconfig +++ b/Kconfig @@ -344,12 +344,26 @@ config FIT_ENABLE_SHA256_SUPPORT help Enable this to support SHA256 checksum of FIT image contents. A SHA256 checksum is a 256-bit (32-byte) hash value used to check that - the image contents have not been corrupted. SHA256 is recommended - for use in secure applications since (as at 2016) there is no known - feasible attack that could produce a 'collision' with differing - input data. Use this for the highest security. Note that only the - SHA256 variant is supported: SHA512 and others are not currently - supported in U-Boot. + the image contents have not been corrupted. + +config FIT_ENABLE_SHA384_SUPPORT + bool "Support SHA384 checksum of FIT image contents" + default n + select SHA384 + help + Enable this to support SHA384 checksum of FIT image contents. A + SHA384 checksum is a 384-bit (48-byte) hash value used to check that + the image contents have not been corrupted. Use this for the highest + security. + +config FIT_ENABLE_SHA512_SUPPORT + bool "Support SHA512 checksum of FIT image contents" + default n + select SHA512 + help + Enable this to support SHA512 checksum of FIT image contents. A + SHA512 checksum is a 512-bit (64-byte) hash value used to check that + the image contents have not been corrupted. config FIT_SIGNATURE bool "Enable signature verification of FIT uImages" diff --git a/common/hash.c b/common/hash.c index ff4986a..4c636a0 100644 --- a/common/hash.c +++ b/common/hash.c @@ -29,6 +29,7 @@ #include <u-boot/crc.h> #include <u-boot/sha1.h> #include <u-boot/sha256.h> +#include <u-boot/sha512.h> #include <u-boot/md5.h> #if !defined(USE_HOSTCC) && defined(CONFIG_NEEDS_MANUAL_RELOC) @@ -93,6 +94,65 @@ static int hash_finish_sha256(struct hash_algo *algo, void *ctx, void } #endif +#if defined(CONFIG_SHA384) +static int hash_init_sha384(struct hash_algo *algo, void **ctxp) +{ + sha512_context *ctx = malloc(sizeof(sha512_context)); + sha384_starts(ctx); + *ctxp = ctx; + return 0; +} + +static int hash_update_sha384(struct hash_algo *algo, void *ctx, + const void *buf, unsigned int size, int is_last) +{ + sha384_update((sha512_context *)ctx, buf, size); + return 0; +} + +static int hash_finish_sha384(struct hash_algo *algo, void *ctx, void + *dest_buf, int size) +{ + if (size < algo->digest_size) + return -1; + + sha384_finish((sha512_context *)ctx, dest_buf); + free(ctx); + return 0; +} +#endif + +#if defined(CONFIG_SHA512) +static int hash_init_sha512(struct hash_algo *algo, void **ctxp) +{ + sha512_context *ctx = malloc(sizeof(sha512_context)); + sha512_starts(ctx); + *ctxp = ctx; + return 0; +} + +static int hash_update_sha512(struct hash_algo *algo, void *ctx, + const void *buf, unsigned int size, int is_last) +{ + sha512_update((sha512_context *)ctx, buf, size); + return 0; +} + +static int hash_finish_sha512(struct hash_algo *algo, void *ctx, void + *dest_buf, int size) +{ + if (size < algo->digest_size) + return -1; + + printf("hello world\n"); + + sha512_finish((sha512_context *)ctx, dest_buf); + free(ctx); + return 0; +} +#endif + + static int hash_init_crc16_ccitt(struct hash_algo *algo, void **ctxp) { uint16_t *ctx = malloc(sizeof(uint16_t)); @@ -194,6 +254,28 @@ static struct hash_algo hash_algo[] = { #endif }, #endif +#ifdef CONFIG_SHA384 + { + .name = "sha384", + .digest_size = SHA384_SUM_LEN, + .chunk_size = CHUNKSZ_SHA384, + .hash_func_ws = sha384_csum_wd, + .hash_init = hash_init_sha384, + .hash_update = hash_update_sha384, + .hash_finish = hash_finish_sha384, + }, +#endif +#ifdef CONFIG_SHA512 + { + .name = "sha512", + .digest_size = SHA512_SUM_LEN, + .chunk_size = CHUNKSZ_SHA512, + .hash_func_ws = sha512_csum_wd, + .hash_init = hash_init_sha512, + .hash_update = hash_update_sha512, + .hash_finish = hash_finish_sha512, + }, +#endif { .name = "crc16-ccitt", .digest_size = 2, @@ -216,7 +298,8 @@ static struct hash_algo hash_algo[] = { /* Try to minimize code size for boards that don't want much hashing */ #if defined(CONFIG_SHA256) || defined(CONFIG_CMD_SHA1SUM) || \ - defined(CONFIG_CRC32_VERIFY) || defined(CONFIG_CMD_HASH) + defined(CONFIG_CRC32_VERIFY) || defined(CONFIG_CMD_HASH) || \ + defined(CONFIG_SHA384) || defined(CONFIG_SHA512) #define multi_hash() 1 #else #define multi_hash() 0 diff --git a/common/image-fit.c b/common/image-fit.c old mode 100644 new mode 100755 index 368b730..32130c3 --- a/common/image-fit.c +++ b/common/image-fit.c @@ -30,6 +30,7 @@ DECLARE_GLOBAL_DATA_PTR; #include <u-boot/md5.h> #include <u-boot/sha1.h> #include <u-boot/sha256.h> +#include <u-boot/sha512.h> /*****************************************************************************/ /* New uImage format routines */ @@ -1204,6 +1205,14 @@ int calculate_hash(const void *data, int data_len, const char *algo, sha256_csum_wd((unsigned char *)data, data_len, (unsigned char *)value, CHUNKSZ_SHA256); *value_len = SHA256_SUM_LEN; + } else if (IMAGE_ENABLE_SHA384 && strcmp(algo, "sha384") == 0) { + sha384_csum_wd((unsigned char *)data, data_len, + (unsigned char *)value, CHUNKSZ_SHA384); + *value_len = SHA384_SUM_LEN; + } else if (IMAGE_ENABLE_SHA512 && strcmp(algo, "sha512") == 0) { + sha512_csum_wd((unsigned char *)data, data_len, + (unsigned char *)value, CHUNKSZ_SHA512); + *value_len = SHA512_SUM_LEN; } else if (IMAGE_ENABLE_MD5 && strcmp(algo, "md5") == 0) { md5_wd((unsigned char *)data, data_len, value, CHUNKSZ_MD5); *value_len = 16; diff --git a/common/image-sig.c b/common/image-sig.c index 84b2c04..5e0b5b1 100644 --- a/common/image-sig.c +++ b/common/image-sig.c @@ -37,7 +37,31 @@ struct checksum_algo checksum_algos[] = { .calculate_sign = EVP_sha256, #endif .calculate = hash_calculate, - } + }, +#ifdef CONFIG_SHA384 + { + .name = "sha384", + .checksum_len = SHA384_SUM_LEN, + .der_len = SHA384_DER_LEN, + .der_prefix = sha384_der_prefix, +#if IMAGE_ENABLE_SIGN + .calculate_sign = EVP_sha384, +#endif + .calculate = hash_calculate, + }, +#endif +#ifdef CONFIG_SHA512 + { + .name = "sha512", + .checksum_len = SHA512_SUM_LEN, + .der_len = SHA512_DER_LEN, + .der_prefix = sha512_der_prefix, +#if IMAGE_ENABLE_SIGN + .calculate_sign = EVP_sha512, +#endif + .calculate = hash_calculate, + }, +#endif }; diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 9d52b75..101eae7 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -411,7 +411,7 @@ config SPL_MD5_SUPPORT secure as it is possible (with a brute-force attack) to adjust the image while still retaining the same MD5 hash value. For secure applications where images may be changed maliciously, you should - consider SHA1 or SHA256. + consider SHA256 or SHA384. config SPL_SHA1_SUPPORT bool "Support SHA1" @@ -423,7 +423,7 @@ config SPL_SHA1_SUPPORT image contents have not been corrupted or maliciously altered. While SHA1 is fairly secure it is coming to the end of its life due to the expanding computing power available to brute-force - attacks. For more security, consider SHA256. + attacks. For more security, consider SHA256 or SHA384. config SPL_SHA256_SUPPORT bool "Support SHA256" @@ -432,12 +432,28 @@ config SPL_SHA256_SUPPORT help Enable this to support SHA256 in FIT images within SPL. A SHA256 checksum is a 256-bit (32-byte) hash value used to check that the - image contents have not been corrupted. SHA256 is recommended for - use in secure applications since (as at 2016) there is no known - feasible attack that could produce a 'collision' with differing - input data. Use this for the highest security. Note that only the - SHA256 variant is supported: SHA512 and others are not currently - supported in U-Boot. + image contents have not been corrupted. + +config SPL_SHA384_SUPPORT + bool "Support SHA384" + depends on SPL_FIT + select SHA384 + select SHA512_ALGO + help + Enable this to support SHA384 in FIT images within SPL. A SHA384 + checksum is a 384-bit (48-byte) hash value used to check that the + image contents have not been corrupted. Use this for the highest + security. + +config SPL_SHA512_SUPPORT + bool "Support SHA512" + depends on SPL_FIT + select SHA512 + select SHA512_ALGO + help + Enable this to support SHA512 in FIT images within SPL. A SHA512 + checksum is a 512-bit (64-byte) hash value used to check that the + image contents have not been corrupted. config SPL_FIT_IMAGE_TINY bool "Remove functionality from SPL FIT loading to reduce size" diff --git a/include/hash.h b/include/hash.h index f4019a9..6e0cf0a 100644 --- a/include/hash.h +++ b/include/hash.h @@ -10,7 +10,11 @@ * Maximum digest size for all algorithms we support. Having this value * avoids a malloc() or C99 local declaration in common/cmd_hash.c. */ +#if defined(CONFIG_SHA384) || defined(CONFIG_SHA512) +#define HASH_MAX_DIGEST_SIZE 64 +#else #define HASH_MAX_DIGEST_SIZE 32 +#endif enum { HASH_FLAG_VERIFY = 1 << 0, /* Enable verify mode */ diff --git a/include/image.h b/include/image.h index 2388c1f..21f91bd 100644 --- a/include/image.h +++ b/include/image.h @@ -32,8 +32,12 @@ struct fdt_region; #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ #define CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT 1 #define CONFIG_FIT_ENABLE_SHA256_SUPPORT +#define CONFIG_FIT_ENABLE_SHA384_SUPPORT +#define CONFIG_FIT_ENABLE_SHA512_SUPPORT #define CONFIG_SHA1 #define CONFIG_SHA256 +#define CONFIG_SHA384 +#define CONFIG_SHA512 #define IMAGE_ENABLE_IGNORE 0 #define IMAGE_INDENT_STRING "" @@ -92,6 +96,20 @@ struct fdt_region; #define IMAGE_ENABLE_SHA256 0 #endif +#if defined(CONFIG_FIT_ENABLE_SHA384_SUPPORT) || \ + defined(CONFIG_SPL_SHA384_SUPPORT) +#define IMAGE_ENABLE_SHA384 1 +#else +#define IMAGE_ENABLE_SHA384 0 +#endif + +#if defined(CONFIG_FIT_ENABLE_SHA512_SUPPORT) || \ + defined(CONFIG_SPL_SHA512_SUPPORT) +#define IMAGE_ENABLE_SHA512 1 +#else +#define IMAGE_ENABLE_SHA512 0 +#endif + #endif /* IMAGE_ENABLE_FIT */ #ifdef CONFIG_SYS_BOOT_GET_CMDLINE diff --git a/include/u-boot/rsa-checksum.h b/include/u-boot/rsa-checksum.h index 02b814d..54e6a73 100644 --- a/include/u-boot/rsa-checksum.h +++ b/include/u-boot/rsa-checksum.h @@ -10,6 +10,7 @@ #include <image.h> #include <u-boot/sha1.h> #include <u-boot/sha256.h> +#include <u-boot/sha512.h> /** * hash_calculate() - Calculate hash over the data diff --git a/include/u-boot/sha512.h b/include/u-boot/sha512.h new file mode 100644 index 0000000..516729d --- /dev/null +++ b/include/u-boot/sha512.h @@ -0,0 +1,38 @@ +#ifndef _SHA512_H +#define _SHA512_H + +#define SHA384_SUM_LEN 48 +#define SHA384_DER_LEN 19 +#define SHA512_SUM_LEN 64 +#define SHA512_DER_LEN 19 +#define SHA512_BLOCK_SIZE 128 + +#define CHUNKSZ_SHA384 (16 * 1024) +#define CHUNKSZ_SHA512 (16 * 1024) + +typedef struct { + uint64_t state[SHA512_SUM_LEN / 8]; + uint64_t count[2]; + uint8_t buf[SHA512_BLOCK_SIZE]; +} sha512_context; + +extern const uint8_t sha512_der_prefix[]; + +void sha512_starts(sha512_context * ctx); +void sha512_update(sha512_context *ctx, const uint8_t *input, uint32_t length); +void sha512_finish(sha512_context * ctx, uint8_t digest[SHA512_SUM_LEN]); + +void sha512_csum_wd(const unsigned char *input, unsigned int ilen, + unsigned char *output, unsigned int chunk_sz); + +extern const uint8_t sha384_der_prefix[]; + +void sha384_starts(sha512_context * ctx); +void sha384_update(sha512_context *ctx, const uint8_t *input, uint32_t length); +void sha384_finish(sha512_context * ctx, uint8_t digest[SHA384_SUM_LEN]); + +void sha384_csum_wd(const unsigned char *input, unsigned int ilen, + unsigned char *output, unsigned int chunk_sz); + + +#endif /* _SHA512_H */ diff --git a/lib/Kconfig b/lib/Kconfig index 452f390..ccbdcc4 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -345,6 +345,29 @@ config SHA256 The SHA256 algorithm produces a 256-bit (32-byte) hash value (digest). +config SHA512_ALGO + bool "Enable SHA512 algorithm" + help + This option enables support of internal SHA512 algorithm. + +config SHA512 + bool "Enable SHA512 support" + depends on SHA512_ALGO + help + This option enables support of hashing using SHA512 algorithm. + The hash is calculated in software. + The SHA512 algorithm produces a 512-bit (64-byte) hash value + (digest). + +config SHA384 + bool "Enable SHA384 support" + depends on SHA512_ALGO + help + This option enables support of hashing using SHA384 algorithm. + The hash is calculated in software. + The SHA384 algorithm produces a 384-bit (48-byte) hash value + (digest). + config SHA_HW_ACCEL bool "Enable hashing using hardware" help diff --git a/lib/Makefile b/lib/Makefile index 32bf3f3..63fda8a 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -61,6 +61,7 @@ endif obj-$(CONFIG_$(SPL_)RSA) += rsa/ obj-$(CONFIG_SHA1) += sha1.o obj-$(CONFIG_SHA256) += sha256.o +obj-$(CONFIG_SHA512_ALGO) += sha512.o obj-$(CONFIG_$(SPL_)ZLIB) += zlib/ obj-$(CONFIG_$(SPL_)ZSTD) += zstd/ diff --git a/lib/sha512.c b/lib/sha512.c new file mode 100644 index 0000000..f1e2acf --- /dev/null +++ b/lib/sha512.c @@ -0,0 +1,383 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * FIPS-180-2 compliant SHA-512 and SHA-384 implementation + * + * SHA-512 code by Jean-Luc Cooke <jlcooke(a)certainkey.com> + * + * Copyright (c) Jean-Luc Cooke <jlcooke(a)certainkey.com> + * Copyright (c) Andrew McDonald <andrew(a)mcdonald.org.uk> + * Copyright (c) 2003 Kyle McMartin <kyle(a)debian.org> + * Copyright (c) 2020 Reuben Dowle <reuben.dowle(a)4rf.com> + */ + +#ifndef USE_HOSTCC +#include <common.h> +#include <linux/string.h> +#else +#include <string.h> +#endif /* USE_HOSTCC */ +#include <watchdog.h> +#include <u-boot/sha512.h> + +const uint8_t sha384_der_prefix[SHA384_DER_LEN] = { + 0x30, 0x41, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, + 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x02, 0x05, + 0x00, 0x04, 0x30 +}; + +const uint8_t sha512_der_prefix[SHA512_DER_LEN] = { + 0x30, 0x51, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, + 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03, 0x05, + 0x00, 0x04, 0x40 +}; + +#define SHA384_H0 0xcbbb9d5dc1059ed8ULL +#define SHA384_H1 0x629a292a367cd507ULL +#define SHA384_H2 0x9159015a3070dd17ULL +#define SHA384_H3 0x152fecd8f70e5939ULL +#define SHA384_H4 0x67332667ffc00b31ULL +#define SHA384_H5 0x8eb44a8768581511ULL +#define SHA384_H6 0xdb0c2e0d64f98fa7ULL +#define SHA384_H7 0x47b5481dbefa4fa4ULL + +#define SHA512_H0 0x6a09e667f3bcc908ULL +#define SHA512_H1 0xbb67ae8584caa73bULL +#define SHA512_H2 0x3c6ef372fe94f82bULL +#define SHA512_H3 0xa54ff53a5f1d36f1ULL +#define SHA512_H4 0x510e527fade682d1ULL +#define SHA512_H5 0x9b05688c2b3e6c1fULL +#define SHA512_H6 0x1f83d9abfb41bd6bULL +#define SHA512_H7 0x5be0cd19137e2179ULL + +static inline uint64_t Ch(uint64_t x, uint64_t y, uint64_t z) +{ + return z ^ (x & (y ^ z)); +} + +static inline uint64_t Maj(uint64_t x, uint64_t y, uint64_t z) +{ + return (x & y) | (z & (x | y)); +} + +static const uint64_t sha512_K[80] = { + 0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, 0xb5c0fbcfec4d3b2fULL, + 0xe9b5dba58189dbbcULL, 0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL, + 0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL, 0xd807aa98a3030242ULL, + 0x12835b0145706fbeULL, 0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL, + 0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL, 0x9bdc06a725c71235ULL, + 0xc19bf174cf692694ULL, 0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL, + 0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL, 0x2de92c6f592b0275ULL, + 0x4a7484aa6ea6e483ULL, 0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL, + 0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL, 0xb00327c898fb213fULL, + 0xbf597fc7beef0ee4ULL, 0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL, + 0x06ca6351e003826fULL, 0x142929670a0e6e70ULL, 0x27b70a8546d22ffcULL, + 0x2e1b21385c26c926ULL, 0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL, + 0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL, 0x81c2c92e47edaee6ULL, + 0x92722c851482353bULL, 0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL, + 0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL, 0xd192e819d6ef5218ULL, + 0xd69906245565a910ULL, 0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL, + 0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL, 0x2748774cdf8eeb99ULL, + 0x34b0bcb5e19b48a8ULL, 0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL, + 0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL, 0x748f82ee5defb2fcULL, + 0x78a5636f43172f60ULL, 0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL, + 0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL, 0xbef9a3f7b2c67915ULL, + 0xc67178f2e372532bULL, 0xca273eceea26619cULL, 0xd186b8c721c0c207ULL, + 0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL, 0x06f067aa72176fbaULL, + 0x0a637dc5a2c898a6ULL, 0x113f9804bef90daeULL, 0x1b710b35131c471bULL, + 0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, 0x3c9ebe0a15c9bebcULL, + 0x431d67c49c100d4cULL, 0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL, + 0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL, +}; + +static inline uint64_t ror64(uint64_t word, unsigned int shift) +{ + return (word >> (shift & 63)) | (word << ((-shift) & 63)); +} + +#define e0(x) (ror64(x,28) ^ ror64(x,34) ^ ror64(x,39)) +#define e1(x) (ror64(x,14) ^ ror64(x,18) ^ ror64(x,41)) +#define s0(x) (ror64(x, 1) ^ ror64(x, 8) ^ (x >> 7)) +#define s1(x) (ror64(x,19) ^ ror64(x,61) ^ (x >> 6)) + +/* + * 64-bit integer manipulation macros (big endian) + */ +#ifndef GET_UINT64_BE +#define GET_UINT64_BE(n,b,i) { \ + (n) = ( (unsigned long long) (b)[(i) ] << 56 ) \ + | ( (unsigned long long) (b)[(i) + 1] << 48 ) \ + | ( (unsigned long long) (b)[(i) + 2] << 40 ) \ + | ( (unsigned long long) (b)[(i) + 3] << 32 ) \ + | ( (unsigned long long) (b)[(i) + 4] << 24 ) \ + | ( (unsigned long long) (b)[(i) + 5] << 16 ) \ + | ( (unsigned long long) (b)[(i) + 6] << 8 ) \ + | ( (unsigned long long) (b)[(i) + 7] ); \ +} +#endif +#ifndef PUT_UINT64_BE +#define PUT_UINT64_BE(n,b,i) { \ + (b)[(i) ] = (unsigned char) ( (n) >> 56 ); \ + (b)[(i) + 1] = (unsigned char) ( (n) >> 48 ); \ + (b)[(i) + 2] = (unsigned char) ( (n) >> 40 ); \ + (b)[(i) + 3] = (unsigned char) ( (n) >> 32 ); \ + (b)[(i) + 4] = (unsigned char) ( (n) >> 24 ); \ + (b)[(i) + 5] = (unsigned char) ( (n) >> 16 ); \ + (b)[(i) + 6] = (unsigned char) ( (n) >> 8 ); \ + (b)[(i) + 7] = (unsigned char) ( (n) ); \ +} +#endif + +static inline void LOAD_OP(int I, uint64_t *W, const uint8_t *input) +{ + GET_UINT64_BE(W[I], input, I*8); +} + +static inline void BLEND_OP(int I, uint64_t *W) +{ + W[I & 15] += s1(W[(I-2) & 15]) + W[(I-7) & 15] + s0(W[(I-15) & 15]); +} + +static void +sha512_transform(uint64_t *state, const uint8_t *input) +{ + uint64_t a, b, c, d, e, f, g, h, t1, t2; + + int i; + uint64_t W[16]; + + /* load the state into our registers */ + a=state[0]; b=state[1]; c=state[2]; d=state[3]; + e=state[4]; f=state[5]; g=state[6]; h=state[7]; + + /* now iterate */ + for (i=0; i<80; i+=8) { + if (!(i & 8)) { + int j; + + if (i < 16) { + /* load the input */ + for (j = 0; j < 16; j++) + LOAD_OP(i + j, W, input); + } else { + for (j = 0; j < 16; j++) { + BLEND_OP(i + j, W); + } + } + } + + t1 = h + e1(e) + Ch(e,f,g) + sha512_K[i ] + W[(i & 15)]; + t2 = e0(a) + Maj(a,b,c); d+=t1; h=t1+t2; + t1 = g + e1(d) + Ch(d,e,f) + sha512_K[i+1] + W[(i & 15) + 1]; + t2 = e0(h) + Maj(h,a,b); c+=t1; g=t1+t2; + t1 = f + e1(c) + Ch(c,d,e) + sha512_K[i+2] + W[(i & 15) + 2]; + t2 = e0(g) + Maj(g,h,a); b+=t1; f=t1+t2; + t1 = e + e1(b) + Ch(b,c,d) + sha512_K[i+3] + W[(i & 15) + 3]; + t2 = e0(f) + Maj(f,g,h); a+=t1; e=t1+t2; + t1 = d + e1(a) + Ch(a,b,c) + sha512_K[i+4] + W[(i & 15) + 4]; + t2 = e0(e) + Maj(e,f,g); h+=t1; d=t1+t2; + t1 = c + e1(h) + Ch(h,a,b) + sha512_K[i+5] + W[(i & 15) + 5]; + t2 = e0(d) + Maj(d,e,f); g+=t1; c=t1+t2; + t1 = b + e1(g) + Ch(g,h,a) + sha512_K[i+6] + W[(i & 15) + 6]; + t2 = e0(c) + Maj(c,d,e); f+=t1; b=t1+t2; + t1 = a + e1(f) + Ch(f,g,h) + sha512_K[i+7] + W[(i & 15) + 7]; + t2 = e0(b) + Maj(b,c,d); e+=t1; a=t1+t2; + } + + state[0] += a; state[1] += b; state[2] += c; state[3] += d; + state[4] += e; state[5] += f; state[6] += g; state[7] += h; + + /* erase our data */ + a = b = c = d = e = f = g = h = t1 = t2 = 0; +} + +static void sha512_block_fn(sha512_context *sst, const uint8_t *src, + int blocks) +{ + while (blocks--) { + sha512_transform(sst->state, src); + src += SHA512_BLOCK_SIZE; + } +} + +static void sha512_base_do_update(sha512_context *sctx, + const uint8_t *data, + unsigned int len) +{ + unsigned int partial = sctx->count[0] % SHA512_BLOCK_SIZE; + + sctx->count[0] += len; + if (sctx->count[0] < len) + sctx->count[1]++; + + if (unlikely((partial + len) >= SHA512_BLOCK_SIZE)) { + int blocks; + + if (partial) { + int p = SHA512_BLOCK_SIZE - partial; + + memcpy(sctx->buf + partial, data, p); + data += p; + len -= p; + + sha512_block_fn(sctx, sctx->buf, 1); + } + + blocks = len / SHA512_BLOCK_SIZE; + len %= SHA512_BLOCK_SIZE; + + if (blocks) { + sha512_block_fn(sctx, data, blocks); + data += blocks * SHA512_BLOCK_SIZE; + } + partial = 0; + } + if (len) + memcpy(sctx->buf + partial, data, len); +} + +static void sha512_base_do_finalize(sha512_context *sctx) +{ + const int bit_offset = SHA512_BLOCK_SIZE - sizeof(uint64_t[2]); + uint64_t *bits = (uint64_t *)(sctx->buf + bit_offset); + unsigned int partial = sctx->count[0] % SHA512_BLOCK_SIZE; + + sctx->buf[partial++] = 0x80; + if (partial > bit_offset) { + memset(sctx->buf + partial, 0x0, SHA512_BLOCK_SIZE - partial); + partial = 0; + + sha512_block_fn(sctx, sctx->buf, 1); + } + + memset(sctx->buf + partial, 0x0, bit_offset - partial); + bits[0] = cpu_to_be64(sctx->count[1] << 3 | sctx->count[0] >> 61); + bits[1] = cpu_to_be64(sctx->count[0] << 3); + sha512_block_fn(sctx, sctx->buf, 1); +} + +#if defined(CONFIG_SHA384) +void sha384_starts(sha512_context * ctx) +{ + ctx->state[0] = SHA384_H0; + ctx->state[1] = SHA384_H1; + ctx->state[2] = SHA384_H2; + ctx->state[3] = SHA384_H3; + ctx->state[4] = SHA384_H4; + ctx->state[5] = SHA384_H5; + ctx->state[6] = SHA384_H6; + ctx->state[7] = SHA384_H7; + ctx->count[0] = ctx->count[1] = 0; +} + +void sha384_update(sha512_context *ctx, const uint8_t *input, uint32_t length) +{ + sha512_base_do_update(ctx, input, length); +} + +void sha384_finish(sha512_context * ctx, uint8_t digest[SHA384_SUM_LEN]) +{ + int i; + + sha512_base_do_finalize(ctx); + for(i=0; i<SHA384_SUM_LEN / sizeof(uint64_t); i++) + PUT_UINT64_BE(ctx->state[i], digest, i * 8); +} + +/* + * Output = SHA-512( input buffer ). Trigger the watchdog every 'chunk_sz' + * bytes of input processed. + */ +void sha384_csum_wd(const unsigned char *input, unsigned int ilen, + unsigned char *output, unsigned int chunk_sz) +{ + sha512_context ctx; +#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) + const unsigned char *end; + unsigned char *curr; + int chunk; +#endif + + sha384_starts(&ctx); + +#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) + curr = (unsigned char *)input; + end = input + ilen; + while (curr < end) { + chunk = end - curr; + if (chunk > chunk_sz) + chunk = chunk_sz; + sha384_update(&ctx, curr, chunk); + curr += chunk; + WATCHDOG_RESET(); + } +#else + sha384_update(&ctx, input, ilen); +#endif + + sha384_finish(&ctx, output); +} + +#endif + +#if defined(CONFIG_SHA512) +void sha512_starts(sha512_context * ctx) +{ + ctx->state[0] = SHA512_H0; + ctx->state[1] = SHA512_H1; + ctx->state[2] = SHA512_H2; + ctx->state[3] = SHA512_H3; + ctx->state[4] = SHA512_H4; + ctx->state[5] = SHA512_H5; + ctx->state[6] = SHA512_H6; + ctx->state[7] = SHA512_H7; + ctx->count[0] = ctx->count[1] = 0; +} + +void sha512_update(sha512_context *ctx, const uint8_t *input, uint32_t length) +{ + sha512_base_do_update(ctx, input, length); +} + +void sha512_finish(sha512_context * ctx, uint8_t digest[SHA512_SUM_LEN]) +{ + int i; + + sha512_base_do_finalize(ctx); + for(i=0; i<SHA512_SUM_LEN / sizeof(uint64_t); i++) + PUT_UINT64_BE(ctx->state[i], digest, i * 8); +} + +/* + * Output = SHA-512( input buffer ). Trigger the watchdog every 'chunk_sz' + * bytes of input processed. + */ +void sha512_csum_wd(const unsigned char *input, unsigned int ilen, + unsigned char *output, unsigned int chunk_sz) +{ + sha512_context ctx; +#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) + const unsigned char *end; + unsigned char *curr; + int chunk; +#endif + + sha512_starts(&ctx); + +#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) + curr = (unsigned char *)input; + end = input + ilen; + while (curr < end) { + chunk = end - curr; + if (chunk > chunk_sz) + chunk = chunk_sz; + sha512_update(&ctx, curr, chunk); + curr += chunk; + WATCHDOG_RESET(); + } +#else + sha512_update(&ctx, input, ilen); +#endif + + sha512_finish(&ctx, output); +} +#endif diff --git a/tools/Makefile b/tools/Makefile index c2b2634..5c33aa0 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -112,6 +112,7 @@ dumpimage-mkimage-objs := aisimage.o \ lib/crc16.o \ lib/sha1.o \ lib/sha256.o \ + lib/sha512.o \ common/hash.o \ ublimage.o \ zynqimage.o \ @@ -230,6 +231,7 @@ HOSTCFLAGS_crc8.o := -pedantic HOSTCFLAGS_md5.o := -pedantic HOSTCFLAGS_sha1.o := -pedantic HOSTCFLAGS_sha256.o := -pedantic +HOSTCFLAGS_sha512.o := -pedantic -DCONFIG_SHA512 -DCONFIG_SHA384 quiet_cmd_wrap = WRAP $@ cmd_wrap = echo "\#include <../$(patsubst $(obj)/%,%,$@)>" >$@ -- 2.7.4

2 4

[PATCH u-boot v2] eth/r8152: update the firmware
by Hayes Wang 05 Jun '20

05 Jun '20

Update the firmware to improve compatibility for none-intel USB host controller. The more information is as following. The device has auto-installed driver feature - via switch CD-ROM/NIC mode. But in some corner cases, it would switch to CD-ROM unexpected. This issue results in Lan Function Disabled. While USB PHY transits to P3 from P0 due to the absent of transmitter control, it would issues undefined signal to its link partner. Some Down Stream Port misidentify the undefined signal as wakeup signal. So the link state will not keep in suspend even the system is idle. Signed-off-by: Hayes Wang <hayeswang(a)realtek.com> --- drivers/usb/eth/r8152.h | 8 + drivers/usb/eth/r8152_fw.c | 481 ++++++++++++++++++++----------------- 2 files changed, 265 insertions(+), 224 deletions(-) diff --git a/drivers/usb/eth/r8152.h b/drivers/usb/eth/r8152.h index c7f62b8b3e..10e0da8eb1 100644 --- a/drivers/usb/eth/r8152.h +++ b/drivers/usb/eth/r8152.h @@ -25,6 +25,7 @@ #define PLA_BDC_CR 0xd1a0 #define PLA_TEREDO_TIMER 0xd2cc #define PLA_REALWOW_TIMER 0xd2e8 +#define PLA_EXTRA_STATUS 0xd398 #define PLA_LEDSEL 0xdd90 #define PLA_LED_FEATURE 0xdd92 #define PLA_PHYAR 0xde00 @@ -76,6 +77,7 @@ #define USB_DEV_STAT 0xb808 #define USB_CONNECT_TIMER 0xcbf8 #define USB_BURST_SIZE 0xcfc0 +#define USB_FW_FIX_EN1 0xcfcc #define USB_USB_CTRL 0xd406 #define USB_PHY_CTRL 0xd408 #define USB_TX_AGG 0xd40a @@ -285,6 +287,9 @@ /* PLA_BOOT_CTRL */ #define AUTOLOAD_DONE 0x0002 +/* PLA_EXTRA_STATUS */ +#define U3P3_CHECK_EN BIT(7) + /* USB_USB2PHY */ #define USB2PHY_SUSPEND 0x0001 #define USB2PHY_L1 0x0002 @@ -304,6 +309,9 @@ #define STAT_SPEED_HIGH 0x0000 #define STAT_SPEED_FULL 0x0002 +/* USB_FW_FIX_EN1 */ +#define FW_IP_RESET_EN BIT(9) + /* USB_TX_AGG */ #define TX_AGG_MAX_THRESHOLD 0x03 diff --git a/drivers/usb/eth/r8152_fw.c b/drivers/usb/eth/r8152_fw.c index 3ebbd533cc..f953b0384b 100644 --- a/drivers/usb/eth/r8152_fw.c +++ b/drivers/usb/eth/r8152_fw.c @@ -293,7 +293,7 @@ static u8 r8152b_pla_patch_a2[] = { 0x00, 0xbe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; static u16 r8152b_pla_patch_a2_bp[] = { - 0xfc28, 0x8000, 0xfc28, 0x17a5, 0xfc2a, 0x13ad, + 0xfc26, 0x8000, 0xfc28, 0x17a5, 0xfc2a, 0x13ad, 0xfc2c, 0x184d, 0xfc2e, 0x01e1 }; static u16 r8153_ram_code_a[] = { @@ -321,181 +321,150 @@ static u16 r8153_ram_code_a[] = { 0xB438, 0x3591, 0xB436, 0xB820, 0xB438, 0x0210 }; static u8 r8153_usb_patch_c[] = { - 0x08, 0xe0, 0x0a, 0xe0, 0x14, 0xe0, 0x2e, 0xe0, - 0x37, 0xe0, 0x3e, 0xe0, 0x6d, 0xe0, 0x78, 0xe0, + 0x08, 0xe0, 0x0a, 0xe0, 0x14, 0xe0, 0x58, 0xe0, + 0x64, 0xe0, 0x79, 0xe0, 0xab, 0xe0, 0xb6, 0xe0, 0x02, 0xc5, 0x00, 0xbd, 0x38, 0x3b, 0xdb, 0x49, 0x04, 0xf1, 0x06, 0xc3, 0x00, 0xbb, 0x5a, 0x02, 0x05, 0xc4, 0x03, 0xc3, 0x00, 0xbb, 0xa4, 0x04, - 0x7e, 0x02, 0x30, 0xd4, 0x30, 0x18, 0x18, 0xc1, - 0x0c, 0xe8, 0x17, 0xc6, 0xc7, 0x65, 0xd0, 0x49, + 0x7e, 0x02, 0x30, 0xd4, 0x65, 0xc6, 0x66, 0x61, + 0x92, 0x49, 0x12, 0xf1, 0x3e, 0xc0, 0x02, 0x61, + 0x97, 0x49, 0x05, 0xf0, 0x3c, 0xc0, 0x00, 0x61, + 0x90, 0x49, 0x0a, 0xf1, 0xca, 0x63, 0xb0, 0x49, + 0x09, 0xf1, 0xb1, 0x49, 0x05, 0xf0, 0x32, 0xc0, + 0x00, 0x71, 0x9e, 0x49, 0x03, 0xf1, 0xb0, 0x48, + 0x05, 0xe0, 0x30, 0x48, 0xda, 0x61, 0x10, 0x48, + 0xda, 0x89, 0x4a, 0xc6, 0xc0, 0x60, 0x85, 0x49, + 0x03, 0xf0, 0x31, 0x48, 0x04, 0xe0, 0xb1, 0x48, + 0xb2, 0x48, 0x0f, 0xe0, 0x30, 0x18, 0x1b, 0xc1, + 0x0f, 0xe8, 0x1a, 0xc6, 0xc7, 0x65, 0xd0, 0x49, 0x05, 0xf0, 0x32, 0x48, 0x02, 0xc2, 0x00, 0xba, 0x3e, 0x16, 0x02, 0xc2, 0x00, 0xba, 0x48, 0x16, - 0x02, 0xb4, 0x09, 0xc2, 0x40, 0x99, 0x0e, 0x48, - 0x42, 0x98, 0x42, 0x70, 0x8e, 0x49, 0xfe, 0xf1, - 0x02, 0xb0, 0x80, 0xff, 0xc0, 0xd4, 0xe4, 0x40, - 0x20, 0xd4, 0xb0, 0x49, 0x04, 0xf0, 0x30, 0x18, - 0x06, 0xc1, 0xef, 0xef, 0xfa, 0xc7, 0x02, 0xc0, - 0x00, 0xb8, 0xd0, 0x10, 0xe4, 0x4b, 0x07, 0xc3, - 0x70, 0x61, 0x12, 0x48, 0x70, 0x89, 0x02, 0xc3, - 0x00, 0xbb, 0x9c, 0x15, 0x20, 0xd4, 0x2b, 0xc5, - 0xa0, 0x77, 0x00, 0x1c, 0xa0, 0x9c, 0x28, 0xc5, - 0xa0, 0x64, 0xc0, 0x48, 0xc1, 0x48, 0xc2, 0x48, - 0xa0, 0x8c, 0xb1, 0x64, 0xc0, 0x48, 0xb1, 0x8c, - 0x20, 0xc5, 0xa0, 0x64, 0x40, 0x48, 0x41, 0x48, - 0xc2, 0x48, 0xa0, 0x8c, 0x19, 0xc5, 0xa4, 0x64, - 0x44, 0x48, 0xa4, 0x8c, 0xb1, 0x64, 0x40, 0x48, - 0xb1, 0x8c, 0x14, 0xc4, 0x80, 0x73, 0x13, 0xc4, - 0x82, 0x9b, 0x11, 0x1b, 0x80, 0x9b, 0x0c, 0xc5, - 0xa0, 0x64, 0x40, 0x48, 0x41, 0x48, 0x42, 0x48, - 0xa0, 0x8c, 0x05, 0xc5, 0xa0, 0x9f, 0x02, 0xc5, - 0x00, 0xbd, 0x6c, 0x3a, 0x1e, 0xfc, 0x10, 0xd8, - 0x86, 0xd4, 0xf8, 0xcb, 0x20, 0xe4, 0x0a, 0xc0, - 0x16, 0x61, 0x91, 0x48, 0x16, 0x89, 0x07, 0xc0, - 0x11, 0x19, 0x0c, 0x89, 0x02, 0xc1, 0x00, 0xb9, - 0x02, 0x06, 0x00, 0xd4, 0x40, 0xb4, 0xfe, 0xc0, - 0x16, 0x61, 0x91, 0x48, 0x16, 0x89, 0xfb, 0xc0, - 0x11, 0x19, 0x0c, 0x89, 0x02, 0xc1, 0x00, 0xb9, - 0xd2, 0x05, 0x00, 0x00 }; + 0x02, 0xc2, 0x00, 0xba, 0x4a, 0x16, 0x02, 0xb4, + 0x09, 0xc2, 0x40, 0x99, 0x0e, 0x48, 0x42, 0x98, + 0x42, 0x70, 0x8e, 0x49, 0xfe, 0xf1, 0x02, 0xb0, + 0x80, 0xff, 0xc0, 0xd4, 0xe4, 0x40, 0x20, 0xd4, + 0xca, 0xcf, 0x00, 0xcf, 0x3c, 0xe4, 0x0c, 0xc0, + 0x00, 0x63, 0xb5, 0x49, 0x09, 0xc0, 0x30, 0x18, + 0x06, 0xc1, 0xea, 0xef, 0xf5, 0xc7, 0x02, 0xc0, + 0x00, 0xb8, 0xd0, 0x10, 0xe4, 0x4b, 0x00, 0xd8, + 0x14, 0xc3, 0x60, 0x61, 0x90, 0x49, 0x06, 0xf0, + 0x11, 0xc3, 0x70, 0x61, 0x12, 0x48, 0x70, 0x89, + 0x08, 0xe0, 0x0a, 0xc6, 0xd4, 0x61, 0x93, 0x48, + 0xd4, 0x89, 0x02, 0xc1, 0x00, 0xb9, 0x72, 0x17, + 0x02, 0xc1, 0x00, 0xb9, 0x9c, 0x15, 0x00, 0xd8, + 0xef, 0xcf, 0x20, 0xd4, 0x30, 0x18, 0xe7, 0xc1, + 0xcb, 0xef, 0x2b, 0xc5, 0xa0, 0x77, 0x00, 0x1c, + 0xa0, 0x9c, 0x28, 0xc5, 0xa0, 0x64, 0xc0, 0x48, + 0xc1, 0x48, 0xc2, 0x48, 0xa0, 0x8c, 0xb1, 0x64, + 0xc0, 0x48, 0xb1, 0x8c, 0x20, 0xc5, 0xa0, 0x64, + 0x40, 0x48, 0x41, 0x48, 0xc2, 0x48, 0xa0, 0x8c, + 0x19, 0xc5, 0xa4, 0x64, 0x44, 0x48, 0xa4, 0x8c, + 0xb1, 0x64, 0x40, 0x48, 0xb1, 0x8c, 0x14, 0xc4, + 0x80, 0x73, 0x13, 0xc4, 0x82, 0x9b, 0x11, 0x1b, + 0x80, 0x9b, 0x0c, 0xc5, 0xa0, 0x64, 0x40, 0x48, + 0x41, 0x48, 0x42, 0x48, 0xa0, 0x8c, 0x05, 0xc5, + 0xa0, 0x9f, 0x02, 0xc5, 0x00, 0xbd, 0x6c, 0x3a, + 0x1e, 0xfc, 0x10, 0xd8, 0x86, 0xd4, 0xf8, 0xcb, + 0x20, 0xe4, 0x0a, 0xc0, 0x16, 0x61, 0x91, 0x48, + 0x16, 0x89, 0x07, 0xc0, 0x11, 0x19, 0x0c, 0x89, + 0x02, 0xc1, 0x00, 0xb9, 0x02, 0x06, 0x00, 0xd4, + 0x40, 0xb4, 0xfe, 0xc0, 0x16, 0x61, 0x91, 0x48, + 0x16, 0x89, 0xfb, 0xc0, 0x11, 0x19, 0x0c, 0x89, + 0x02, 0xc1, 0x00, 0xb9, 0xd2, 0x05, 0x00, 0x00 }; static u16 r8153_usb_patch_c_bp[] = { - 0xfc26, 0xa000, 0xfc28, 0x3b34, 0xfc2a, 0x027c, 0xfc2c, 0x162c, - 0xfc2e, 0x10ce, 0xfc30, 0x0000, 0xfc32, 0x3a28, 0xfc34, 0x05f8, - 0xfc36, 0x05c8 }; + 0xfc26, 0xa000, 0xfc28, 0x3b34, 0xfc2a, 0x027c, 0xfc2c, 0x15de, + 0xfc2e, 0x10ce, 0xfc30, 0x1adc, 0xfc32, 0x3a28, 0xfc34, 0x05f8, + 0xfc36, 0x05c8, 0xfc38, 0x00f3 }; static u8 r8153_pla_patch_c[] = { - 0x08, 0xe0, 0xea, 0xe0, 0xf2, 0xe0, 0x04, 0xe1, - 0x06, 0xe1, 0x08, 0xe1, 0x40, 0xe1, 0xf1, 0xe1, - 0x14, 0xc2, 0x40, 0x73, 0xba, 0x48, 0x40, 0x9b, - 0x11, 0xc2, 0x40, 0x73, 0xb0, 0x49, 0x17, 0xf0, - 0xbf, 0x49, 0x03, 0xf1, 0x09, 0xc5, 0x00, 0xbd, - 0xb1, 0x49, 0x11, 0xf0, 0xb1, 0x48, 0x40, 0x9b, - 0x02, 0xc2, 0x00, 0xba, 0xde, 0x18, 0x00, 0xe0, - 0x1e, 0xfc, 0xbc, 0xc0, 0xf0, 0xc0, 0xde, 0xe8, - 0x00, 0x80, 0x00, 0x20, 0x2c, 0x75, 0xd4, 0x49, - 0x12, 0xf1, 0x32, 0xe0, 0xf8, 0xc2, 0x46, 0x71, - 0xf7, 0xc2, 0x40, 0x73, 0xbe, 0x49, 0x03, 0xf1, - 0xf5, 0xc7, 0x02, 0xe0, 0xf2, 0xc7, 0x4f, 0x30, - 0x26, 0x62, 0xa1, 0x49, 0xf0, 0xf1, 0x22, 0x72, - 0xa0, 0x49, 0xed, 0xf1, 0x25, 0x25, 0x18, 0x1f, - 0x97, 0x30, 0x91, 0x30, 0x36, 0x9a, 0x2c, 0x75, - 0x3c, 0xc3, 0x60, 0x73, 0xb1, 0x49, 0x0d, 0xf1, - 0xdc, 0x21, 0xbc, 0x25, 0x30, 0xc6, 0xc0, 0x77, - 0x04, 0x13, 0x21, 0xf0, 0x03, 0x13, 0x22, 0xf0, - 0x02, 0x13, 0x23, 0xf0, 0x01, 0x13, 0x24, 0xf0, - 0x08, 0x13, 0x08, 0xf1, 0x2e, 0x73, 0xba, 0x21, - 0xbd, 0x25, 0x05, 0x13, 0x03, 0xf1, 0x24, 0xc5, - 0x00, 0xbd, 0xd4, 0x49, 0x03, 0xf1, 0x1c, 0xc5, - 0x00, 0xbd, 0xc4, 0xc6, 0xc6, 0x67, 0x2e, 0x75, - 0xd7, 0x22, 0xdd, 0x26, 0x05, 0x15, 0x1b, 0xf0, - 0x14, 0xc6, 0x00, 0xbe, 0x13, 0xc5, 0x00, 0xbd, - 0x12, 0xc5, 0x00, 0xbd, 0xf1, 0x49, 0xfb, 0xf1, - 0xef, 0xe7, 0xf4, 0x49, 0xfa, 0xf1, 0xec, 0xe7, - 0xf3, 0x49, 0xf7, 0xf1, 0xe9, 0xe7, 0xf2, 0x49, - 0xf4, 0xf1, 0xe6, 0xe7, 0xb6, 0xc0, 0x50, 0x14, - 0x90, 0x13, 0xbc, 0x13, 0xf2, 0x14, 0x00, 0xa0, - 0xa0, 0xd1, 0x00, 0x00, 0xc0, 0x75, 0xd0, 0x49, - 0x46, 0xf0, 0x26, 0x72, 0xa7, 0x49, 0x43, 0xf0, - 0x22, 0x72, 0x25, 0x25, 0x20, 0x1f, 0x97, 0x30, - 0x91, 0x30, 0x40, 0x73, 0xf3, 0xc4, 0x1c, 0x40, - 0x04, 0xf0, 0xd7, 0x49, 0x05, 0xf1, 0x37, 0xe0, - 0x53, 0x48, 0xc0, 0x9d, 0x08, 0x02, 0x40, 0x66, - 0x64, 0x27, 0x06, 0x16, 0x30, 0xf1, 0x46, 0x63, - 0x3b, 0x13, 0x2d, 0xf1, 0x34, 0x9b, 0x18, 0x1b, - 0x93, 0x30, 0x2b, 0xc3, 0x10, 0x1c, 0x2b, 0xe8, - 0x01, 0x14, 0x25, 0xf1, 0x00, 0x1d, 0x26, 0x1a, - 0x8a, 0x30, 0x22, 0x73, 0xb5, 0x25, 0x0e, 0x0b, - 0x00, 0x1c, 0x2c, 0xe8, 0x1f, 0xc7, 0x27, 0x40, - 0x1a, 0xf1, 0x38, 0xe8, 0x32, 0x1f, 0x8f, 0x30, - 0x08, 0x1b, 0x24, 0xe8, 0x36, 0x72, 0x46, 0x77, - 0x00, 0x17, 0x0d, 0xf0, 0x13, 0xc3, 0x1f, 0x40, - 0x03, 0xf1, 0x00, 0x1f, 0x46, 0x9f, 0x44, 0x77, - 0x9f, 0x44, 0x5f, 0x44, 0x17, 0xe8, 0x0a, 0xc7, - 0x27, 0x40, 0x05, 0xf1, 0x02, 0xc3, 0x00, 0xbb, - 0xbe, 0x1a, 0x74, 0x14, 0xff, 0xc7, 0x00, 0xbf, - 0xb8, 0xcd, 0xff, 0xff, 0x02, 0x0c, 0x54, 0xa5, - 0xdc, 0xa5, 0x2f, 0x40, 0x05, 0xf1, 0x00, 0x14, - 0xfa, 0xf1, 0x01, 0x1c, 0x02, 0xe0, 0x00, 0x1c, - 0x80, 0xff, 0xb0, 0x49, 0x04, 0xf0, 0x01, 0x0b, - 0xd3, 0xa1, 0x03, 0xe0, 0x02, 0x0b, 0xd3, 0xa5, - 0x27, 0x31, 0x20, 0x37, 0x02, 0x0b, 0xd3, 0xa5, - 0x27, 0x31, 0x20, 0x37, 0x00, 0x13, 0xfb, 0xf1, - 0x80, 0xff, 0x22, 0x73, 0xb5, 0x25, 0x18, 0x1e, - 0xde, 0x30, 0xd9, 0x30, 0x64, 0x72, 0x11, 0x1e, - 0x68, 0x23, 0x16, 0x31, 0x80, 0xff, 0x08, 0xc2, - 0x40, 0x73, 0x3a, 0x48, 0x40, 0x9b, 0x06, 0xff, - 0x02, 0xc6, 0x00, 0xbe, 0xcc, 0x17, 0x1e, 0xfc, - 0x2c, 0x75, 0xdc, 0x21, 0xbc, 0x25, 0x04, 0x13, - 0x0b, 0xf0, 0x03, 0x13, 0x09, 0xf0, 0x02, 0x13, - 0x07, 0xf0, 0x01, 0x13, 0x05, 0xf0, 0x08, 0x13, - 0x03, 0xf0, 0x04, 0xc3, 0x00, 0xbb, 0x03, 0xc3, - 0x00, 0xbb, 0x50, 0x17, 0x3a, 0x17, 0x02, 0xc6, - 0x00, 0xbe, 0x00, 0x00, 0x02, 0xc6, 0x00, 0xbe, - 0x00, 0x00, 0x33, 0xc5, 0xa0, 0x74, 0xc0, 0x49, - 0x1f, 0xf0, 0x30, 0xc5, 0xa0, 0x73, 0x00, 0x13, - 0x04, 0xf1, 0xa2, 0x73, 0x00, 0x13, 0x14, 0xf0, - 0x28, 0xc5, 0xa0, 0x74, 0xc8, 0x49, 0x1b, 0xf1, - 0x26, 0xc5, 0xa0, 0x76, 0xa2, 0x74, 0x01, 0x06, - 0x20, 0x37, 0xa0, 0x9e, 0xa2, 0x9c, 0x1e, 0xc5, - 0xa2, 0x73, 0x23, 0x40, 0x10, 0xf8, 0x04, 0xf3, - 0xa0, 0x73, 0x33, 0x40, 0x0c, 0xf8, 0x15, 0xc5, - 0xa0, 0x74, 0x41, 0x48, 0xa0, 0x9c, 0x14, 0xc5, - 0xa0, 0x76, 0x62, 0x48, 0xe0, 0x48, 0xa0, 0x9e, - 0x10, 0xc6, 0x00, 0xbe, 0x0a, 0xc5, 0xa0, 0x74, - 0x48, 0x48, 0xa0, 0x9c, 0x0b, 0xc5, 0x20, 0x1e, - 0xa0, 0x9e, 0xe5, 0x48, 0xa0, 0x9e, 0xf0, 0xe7, - 0xbc, 0xc0, 0xc8, 0xd2, 0xcc, 0xd2, 0x28, 0xe4, - 0xfa, 0x01, 0xf0, 0xc0, 0x18, 0x89, 0x00, 0x1d, - 0x43, 0xc3, 0x62, 0x62, 0xa0, 0x49, 0x06, 0xf0, - 0x41, 0xc0, 0x02, 0x71, 0x60, 0x99, 0x3f, 0xc1, - 0x03, 0xe0, 0x3c, 0xc0, 0x3d, 0xc1, 0x02, 0x99, - 0x00, 0x61, 0x67, 0x11, 0x3d, 0xf1, 0x69, 0x33, - 0x34, 0xc0, 0x28, 0x40, 0xf7, 0xf1, 0x35, 0xc0, - 0x00, 0x19, 0x81, 0x1b, 0x89, 0xe8, 0x32, 0xc0, - 0x04, 0x1a, 0x84, 0x1b, 0x85, 0xe8, 0x7a, 0xe8, - 0xa3, 0x49, 0xfe, 0xf0, 0x2c, 0xc0, 0x76, 0xe8, - 0xa1, 0x48, 0x29, 0xc0, 0x84, 0x1b, 0x7c, 0xe8, - 0x00, 0x1d, 0x69, 0x33, 0x00, 0x1e, 0x01, 0x06, - 0xff, 0x18, 0x30, 0x40, 0xfd, 0xf1, 0x7f, 0xc0, - 0x00, 0x76, 0x2e, 0x40, 0xf7, 0xf1, 0x21, 0x48, - 0x1a, 0xc0, 0x84, 0x1b, 0x6d, 0xe8, 0x76, 0xc0, - 0x61, 0xe8, 0xa1, 0x49, 0xfd, 0xf0, 0x12, 0xc0, - 0x00, 0x1a, 0x84, 0x1b, 0x65, 0xe8, 0x5a, 0xe8, - 0xa5, 0x49, 0xfe, 0xf0, 0x0a, 0xc0, 0x01, 0x19, - 0x81, 0x1b, 0x5e, 0xe8, 0x48, 0xe0, 0x8c, 0xd3, - 0xb8, 0x0b, 0x50, 0xe8, 0x83, 0x00, 0x82, 0x00, - 0x20, 0xb4, 0x10, 0xd8, 0x84, 0xd4, 0xfa, 0xc0, - 0x00, 0x61, 0x9c, 0x20, 0x9c, 0x24, 0x06, 0x11, - 0x06, 0xf1, 0x5d, 0xc0, 0x00, 0x61, 0x11, 0x48, - 0x00, 0x89, 0x35, 0xe0, 0x00, 0x11, 0x02, 0xf1, - 0x03, 0xe0, 0x04, 0x11, 0x06, 0xf1, 0x53, 0xc0, - 0x00, 0x61, 0x92, 0x48, 0x00, 0x89, 0x2b, 0xe0, - 0x05, 0x11, 0x08, 0xf1, 0x4c, 0xc0, 0x00, 0x61, - 0x91, 0x49, 0x04, 0xf0, 0x91, 0x48, 0x00, 0x89, - 0x11, 0xe0, 0xdc, 0xc0, 0x00, 0x61, 0x98, 0x20, - 0x98, 0x24, 0x25, 0x11, 0x1c, 0xf1, 0x40, 0xc0, - 0x25, 0xe8, 0x95, 0x49, 0x18, 0xf0, 0xd2, 0xc0, - 0x00, 0x61, 0x98, 0x20, 0x98, 0x24, 0x25, 0x11, - 0x12, 0xf1, 0x35, 0xc0, 0x00, 0x61, 0x92, 0x49, - 0x0e, 0xf1, 0x12, 0x48, 0x00, 0x89, 0x2d, 0xc0, - 0x00, 0x19, 0x00, 0x89, 0x2b, 0xc0, 0x01, 0x89, - 0x27, 0xc0, 0x10, 0xe8, 0x25, 0xc0, 0x12, 0x48, - 0x81, 0x1b, 0x16, 0xe8, 0xb9, 0xc3, 0x62, 0x62, - 0xa0, 0x49, 0x05, 0xf0, 0xb5, 0xc3, 0x60, 0x71, - 0xb5, 0xc0, 0x02, 0x99, 0x02, 0xc0, 0x00, 0xb8, - 0xd6, 0x07, 0x13, 0xc4, 0x84, 0x98, 0x00, 0x1b, - 0x86, 0x8b, 0x86, 0x73, 0xbf, 0x49, 0xfe, 0xf1, - 0x80, 0x71, 0x82, 0x72, 0x80, 0xff, 0x09, 0xc4, - 0x84, 0x98, 0x80, 0x99, 0x82, 0x9a, 0x86, 0x8b, - 0x86, 0x73, 0xbf, 0x49, 0xfe, 0xf1, 0x80, 0xff, - 0x08, 0xea, 0x10, 0xd4, 0x88, 0xd3, 0x30, 0xd4, - 0x10, 0xc0, 0x12, 0xe8, 0x8a, 0xd3, 0x00, 0xd8, - 0x02, 0xc0, 0x00, 0xb8, 0xe0, 0x08, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; + 0x5d, 0xe0, 0x07, 0xe0, 0x0f, 0xe0, 0x5a, 0xe0, + 0x59, 0xe0, 0x1f, 0xe0, 0x57, 0xe0, 0x3e, 0xe1, + 0x08, 0xc2, 0x40, 0x73, 0x3a, 0x48, 0x40, 0x9b, + 0x06, 0xff, 0x02, 0xc6, 0x00, 0xbe, 0xcc, 0x17, + 0x1e, 0xfc, 0x2c, 0x75, 0xdc, 0x21, 0xbc, 0x25, + 0x04, 0x13, 0x0b, 0xf0, 0x03, 0x13, 0x09, 0xf0, + 0x02, 0x13, 0x07, 0xf0, 0x01, 0x13, 0x05, 0xf0, + 0x08, 0x13, 0x03, 0xf0, 0x04, 0xc3, 0x00, 0xbb, + 0x03, 0xc3, 0x00, 0xbb, 0x50, 0x17, 0x3a, 0x17, + 0x33, 0xc5, 0xa0, 0x74, 0xc0, 0x49, 0x1f, 0xf0, + 0x30, 0xc5, 0xa0, 0x73, 0x00, 0x13, 0x04, 0xf1, + 0xa2, 0x73, 0x00, 0x13, 0x14, 0xf0, 0x28, 0xc5, + 0xa0, 0x74, 0xc8, 0x49, 0x1b, 0xf1, 0x26, 0xc5, + 0xa0, 0x76, 0xa2, 0x74, 0x01, 0x06, 0x20, 0x37, + 0xa0, 0x9e, 0xa2, 0x9c, 0x1e, 0xc5, 0xa2, 0x73, + 0x23, 0x40, 0x10, 0xf8, 0x04, 0xf3, 0xa0, 0x73, + 0x33, 0x40, 0x0c, 0xf8, 0x15, 0xc5, 0xa0, 0x74, + 0x41, 0x48, 0xa0, 0x9c, 0x14, 0xc5, 0xa0, 0x76, + 0x62, 0x48, 0xe0, 0x48, 0xa0, 0x9e, 0x10, 0xc6, + 0x00, 0xbe, 0x0a, 0xc5, 0xa0, 0x74, 0x48, 0x48, + 0xa0, 0x9c, 0x0b, 0xc5, 0x20, 0x1e, 0xa0, 0x9e, + 0xe5, 0x48, 0xa0, 0x9e, 0xf0, 0xe7, 0xbc, 0xc0, + 0xc8, 0xd2, 0xcc, 0xd2, 0x28, 0xe4, 0xfa, 0x01, + 0xf0, 0xc0, 0x18, 0x89, 0x74, 0xc0, 0xcd, 0xe8, + 0x80, 0x76, 0x00, 0x1d, 0x6e, 0xc3, 0x66, 0x62, + 0xa0, 0x49, 0x06, 0xf0, 0x64, 0xc0, 0x02, 0x71, + 0x60, 0x99, 0x62, 0xc1, 0x03, 0xe0, 0x5f, 0xc0, + 0x60, 0xc1, 0x02, 0x99, 0x00, 0x61, 0x0f, 0x1b, + 0x59, 0x41, 0x03, 0x13, 0x18, 0xf1, 0xe4, 0x49, + 0x20, 0xf1, 0xe5, 0x49, 0x1e, 0xf0, 0x59, 0xc6, + 0xd0, 0x73, 0xb7, 0x49, 0x08, 0xf0, 0x01, 0x0b, + 0x80, 0x13, 0x03, 0xf0, 0xd0, 0x8b, 0x03, 0xe0, + 0x3f, 0x48, 0xd0, 0x9b, 0x51, 0xc0, 0x10, 0x1a, + 0x84, 0x1b, 0xb1, 0xe8, 0x4b, 0xc2, 0x40, 0x63, + 0x30, 0x48, 0x0a, 0xe0, 0xe5, 0x49, 0x09, 0xf0, + 0x47, 0xc0, 0x00, 0x1a, 0x84, 0x1b, 0xa7, 0xe8, + 0x41, 0xc2, 0x40, 0x63, 0xb0, 0x48, 0x40, 0x8b, + 0x67, 0x11, 0x3f, 0xf1, 0x69, 0x33, 0x32, 0xc0, + 0x28, 0x40, 0xd2, 0xf1, 0x33, 0xc0, 0x00, 0x19, + 0x81, 0x1b, 0x99, 0xe8, 0x30, 0xc0, 0x04, 0x1a, + 0x84, 0x1b, 0x95, 0xe8, 0x8a, 0xe8, 0xa3, 0x49, + 0xfe, 0xf0, 0x2a, 0xc0, 0x86, 0xe8, 0xa1, 0x48, + 0x84, 0x1b, 0x8d, 0xe8, 0x00, 0x1d, 0x69, 0x33, + 0x00, 0x1e, 0x01, 0x06, 0xff, 0x18, 0x30, 0x40, + 0xfd, 0xf1, 0x1f, 0xc0, 0x00, 0x76, 0x2e, 0x40, + 0xf7, 0xf1, 0x21, 0x48, 0x19, 0xc0, 0x84, 0x1b, + 0x7e, 0xe8, 0x74, 0x08, 0x72, 0xe8, 0xa1, 0x49, + 0xfd, 0xf0, 0x11, 0xc0, 0x00, 0x1a, 0x84, 0x1b, + 0x76, 0xe8, 0x6b, 0xe8, 0xa5, 0x49, 0xfe, 0xf0, + 0x09, 0xc0, 0x01, 0x19, 0x81, 0x1b, 0x6f, 0xe8, + 0x5a, 0xe0, 0xb8, 0x0b, 0x50, 0xe8, 0x83, 0x00, + 0x82, 0x00, 0x20, 0xb4, 0x10, 0xd8, 0x84, 0xd4, + 0x88, 0xd3, 0x10, 0xe0, 0x00, 0xd8, 0x24, 0xd4, + 0xf9, 0xc0, 0x57, 0xe8, 0x48, 0x33, 0xf3, 0xc0, + 0x00, 0x61, 0x6a, 0xc0, 0x47, 0x11, 0x03, 0xf0, + 0x57, 0x11, 0x05, 0xf1, 0x00, 0x61, 0x17, 0x48, + 0x00, 0x89, 0x41, 0xe0, 0x9c, 0x20, 0x9c, 0x24, + 0xd0, 0x49, 0x09, 0xf0, 0x04, 0x11, 0x07, 0xf1, + 0x00, 0x61, 0x97, 0x49, 0x38, 0xf0, 0x97, 0x48, + 0x00, 0x89, 0x2b, 0xe0, 0x00, 0x11, 0x05, 0xf1, + 0x00, 0x61, 0x92, 0x48, 0x00, 0x89, 0x2f, 0xe0, + 0x06, 0x11, 0x05, 0xf1, 0x00, 0x61, 0x11, 0x48, + 0x00, 0x89, 0x29, 0xe0, 0x05, 0x11, 0x0f, 0xf1, + 0x00, 0x61, 0x93, 0x49, 0x1a, 0xf1, 0x91, 0x49, + 0x0a, 0xf0, 0x91, 0x48, 0x00, 0x89, 0x0f, 0xe0, + 0xc6, 0xc0, 0x00, 0x61, 0x98, 0x20, 0x98, 0x24, + 0x25, 0x11, 0x80, 0xff, 0xfa, 0xef, 0x17, 0xf1, + 0x38, 0xc0, 0x1f, 0xe8, 0x95, 0x49, 0x13, 0xf0, + 0xf4, 0xef, 0x11, 0xf1, 0x31, 0xc0, 0x00, 0x61, + 0x92, 0x49, 0x0d, 0xf1, 0x12, 0x48, 0x00, 0x89, + 0x29, 0xc0, 0x00, 0x19, 0x00, 0x89, 0x27, 0xc0, + 0x01, 0x89, 0x23, 0xc0, 0x0e, 0xe8, 0x12, 0x48, + 0x81, 0x1b, 0x15, 0xe8, 0xae, 0xc3, 0x66, 0x62, + 0xa0, 0x49, 0x04, 0xf0, 0x64, 0x71, 0xa3, 0xc0, + 0x02, 0x99, 0x02, 0xc0, 0x00, 0xb8, 0xd6, 0x07, + 0x13, 0xc4, 0x84, 0x98, 0x00, 0x1b, 0x86, 0x8b, + 0x86, 0x73, 0xbf, 0x49, 0xfe, 0xf1, 0x80, 0x71, + 0x82, 0x72, 0x80, 0xff, 0x09, 0xc4, 0x84, 0x98, + 0x80, 0x99, 0x82, 0x9a, 0x86, 0x8b, 0x86, 0x73, + 0xbf, 0x49, 0xfe, 0xf1, 0x80, 0xff, 0x08, 0xea, + 0x30, 0xd4, 0x10, 0xc0, 0x12, 0xe8, 0x8a, 0xd3, + 0x00, 0xd8, 0x02, 0xc6, 0x00, 0xbe, 0xe0, 0x08 }; static u16 r8153_pla_patch_c_bp[] = { 0xfc26, 0x8000, 0xfc28, 0x1306, 0xfc2a, 0x17ca, 0xfc2c, 0x171e, 0xfc2e, 0x0000, 0xfc30, 0x0000, 0xfc32, 0x01b4, 0xfc34, 0x07d4, - 0xfc36, 0x0894, 0xfc38, 0x00e7 }; + 0xfc36, 0x0894, 0xfc38, 0x00e6 }; static u16 r8153_ram_code_bc[] = { 0xB436, 0xB820, 0xB438, 0x0290, 0xB436, 0xA012, 0xB438, 0x0000, @@ -560,7 +529,7 @@ static u16 r8153_usb_patch_b_bp[] = { static u8 r8153_pla_patch_b[] = { 0x08, 0xe0, 0xea, 0xe0, 0xf2, 0xe0, 0x04, 0xe1, - 0x09, 0xe1, 0x0e, 0xe1, 0x46, 0xe1, 0xf3, 0xe1, + 0x09, 0xe1, 0x0e, 0xe1, 0x46, 0xe1, 0xf7, 0xe1, 0x14, 0xc2, 0x40, 0x73, 0xba, 0x48, 0x40, 0x9b, 0x11, 0xc2, 0x40, 0x73, 0xb0, 0x49, 0x17, 0xf0, 0xbf, 0x49, 0x03, 0xf1, 0x09, 0xc5, 0x00, 0xbd, @@ -642,51 +611,51 @@ static u8 r8153_pla_patch_b[] = { 0x0b, 0xc5, 0x20, 0x1e, 0xa0, 0x9e, 0xe5, 0x48, 0xa0, 0x9e, 0xf0, 0xe7, 0xbc, 0xc0, 0xc8, 0xd2, 0xcc, 0xd2, 0x28, 0xe4, 0xe6, 0x01, 0xf0, 0xc0, - 0x18, 0x89, 0x00, 0x1d, 0x3c, 0xc3, 0x60, 0x71, + 0x18, 0x89, 0x00, 0x1d, 0x3c, 0xc3, 0x64, 0x71, 0x3c, 0xc0, 0x02, 0x99, 0x00, 0x61, 0x67, 0x11, 0x3c, 0xf1, 0x69, 0x33, 0x35, 0xc0, 0x28, 0x40, 0xf6, 0xf1, 0x34, 0xc0, 0x00, 0x19, 0x81, 0x1b, - 0x8c, 0xe8, 0x31, 0xc0, 0x04, 0x1a, 0x84, 0x1b, - 0x88, 0xe8, 0x7d, 0xe8, 0xa3, 0x49, 0xfe, 0xf0, - 0x2b, 0xc0, 0x79, 0xe8, 0xa1, 0x48, 0x28, 0xc0, - 0x84, 0x1b, 0x7f, 0xe8, 0x00, 0x1d, 0x69, 0x33, + 0x91, 0xe8, 0x31, 0xc0, 0x04, 0x1a, 0x84, 0x1b, + 0x8d, 0xe8, 0x82, 0xe8, 0xa3, 0x49, 0xfe, 0xf0, + 0x2b, 0xc0, 0x7e, 0xe8, 0xa1, 0x48, 0x28, 0xc0, + 0x84, 0x1b, 0x84, 0xe8, 0x00, 0x1d, 0x69, 0x33, 0x00, 0x1e, 0x01, 0x06, 0xff, 0x18, 0x30, 0x40, - 0xfd, 0xf1, 0x18, 0xc0, 0x00, 0x76, 0x2e, 0x40, + 0xfd, 0xf1, 0x19, 0xc0, 0x00, 0x76, 0x2e, 0x40, 0xf7, 0xf1, 0x21, 0x48, 0x19, 0xc0, 0x84, 0x1b, - 0x70, 0xe8, 0x79, 0xc0, 0x64, 0xe8, 0xa1, 0x49, + 0x75, 0xe8, 0x10, 0xc0, 0x69, 0xe8, 0xa1, 0x49, 0xfd, 0xf0, 0x11, 0xc0, 0x00, 0x1a, 0x84, 0x1b, - 0x68, 0xe8, 0x5d, 0xe8, 0xa5, 0x49, 0xfe, 0xf0, - 0x09, 0xc0, 0x01, 0x19, 0x81, 0x1b, 0x61, 0xe8, - 0x4f, 0xe0, 0x88, 0xd3, 0x8c, 0xd3, 0xb8, 0x0b, + 0x6d, 0xe8, 0x62, 0xe8, 0xa5, 0x49, 0xfe, 0xf0, + 0x09, 0xc0, 0x01, 0x19, 0x81, 0x1b, 0x66, 0xe8, + 0x54, 0xe0, 0x10, 0xd4, 0x88, 0xd3, 0xb8, 0x0b, 0x50, 0xe8, 0x20, 0xb4, 0x10, 0xd8, 0x84, 0xd4, - 0xfc, 0xc0, 0x00, 0x61, 0x9c, 0x20, 0x9c, 0x24, - 0x06, 0x11, 0x06, 0xf1, 0x60, 0xc0, 0x00, 0x61, - 0x11, 0x48, 0x00, 0x89, 0x3d, 0xe0, 0x00, 0x11, - 0x02, 0xf1, 0x03, 0xe0, 0x04, 0x11, 0x06, 0xf1, - 0x56, 0xc0, 0x00, 0x61, 0x92, 0x48, 0x00, 0x89, - 0x33, 0xe0, 0x05, 0x11, 0x08, 0xf1, 0x4f, 0xc0, - 0x00, 0x61, 0x91, 0x49, 0x04, 0xf0, 0x91, 0x48, - 0x00, 0x89, 0x11, 0xe0, 0xde, 0xc0, 0x00, 0x61, - 0x98, 0x20, 0x98, 0x24, 0x25, 0x11, 0x24, 0xf1, - 0x45, 0xc0, 0x29, 0xe8, 0x95, 0x49, 0x20, 0xf0, - 0xd4, 0xc0, 0x00, 0x61, 0x98, 0x20, 0x98, 0x24, - 0x25, 0x11, 0x1a, 0xf1, 0x38, 0xc0, 0x00, 0x61, - 0x92, 0x49, 0x16, 0xf1, 0x12, 0x48, 0x00, 0x89, - 0x30, 0xc0, 0x00, 0x19, 0x00, 0x89, 0x2e, 0xc0, - 0x01, 0x89, 0x2e, 0xc0, 0x04, 0x19, 0x81, 0x1b, - 0x1c, 0xe8, 0x2b, 0xc0, 0x14, 0x19, 0x81, 0x1b, - 0x18, 0xe8, 0x22, 0xc0, 0x0c, 0xe8, 0x20, 0xc0, - 0x12, 0x48, 0x81, 0x1b, 0x12, 0xe8, 0xb3, 0xc3, - 0x62, 0x71, 0xb3, 0xc0, 0x02, 0x99, 0x02, 0xc0, - 0x00, 0xb8, 0x96, 0x07, 0x13, 0xc4, 0x84, 0x98, - 0x00, 0x1b, 0x86, 0x8b, 0x86, 0x73, 0xbf, 0x49, - 0xfe, 0xf1, 0x80, 0x71, 0x82, 0x72, 0x80, 0xff, - 0x09, 0xc4, 0x84, 0x98, 0x80, 0x99, 0x82, 0x9a, - 0x86, 0x8b, 0x86, 0x73, 0xbf, 0x49, 0xfe, 0xf1, - 0x80, 0xff, 0x08, 0xea, 0x10, 0xd4, 0x30, 0xd4, + 0xfd, 0xc0, 0x52, 0xe8, 0x48, 0x33, 0xf9, 0xc0, + 0x00, 0x61, 0x9c, 0x20, 0x9c, 0x24, 0xd0, 0x49, + 0x04, 0xf0, 0x04, 0x11, 0x02, 0xf1, 0x03, 0xe0, + 0x00, 0x11, 0x06, 0xf1, 0x5c, 0xc0, 0x00, 0x61, + 0x92, 0x48, 0x00, 0x89, 0x3a, 0xe0, 0x06, 0x11, + 0x06, 0xf1, 0x55, 0xc0, 0x00, 0x61, 0x11, 0x48, + 0x00, 0x89, 0x33, 0xe0, 0x05, 0x11, 0x08, 0xf1, + 0x4e, 0xc0, 0x00, 0x61, 0x91, 0x49, 0x04, 0xf0, + 0x91, 0x48, 0x00, 0x89, 0x11, 0xe0, 0xd9, 0xc0, + 0x00, 0x61, 0x98, 0x20, 0x98, 0x24, 0x25, 0x11, + 0x24, 0xf1, 0x44, 0xc0, 0x29, 0xe8, 0x95, 0x49, + 0x20, 0xf0, 0xcf, 0xc0, 0x00, 0x61, 0x98, 0x20, + 0x98, 0x24, 0x25, 0x11, 0x1a, 0xf1, 0x37, 0xc0, + 0x00, 0x61, 0x92, 0x49, 0x16, 0xf1, 0x12, 0x48, + 0x00, 0x89, 0x2f, 0xc0, 0x00, 0x19, 0x00, 0x89, + 0x2d, 0xc0, 0x01, 0x89, 0x2d, 0xc0, 0x04, 0x19, + 0x81, 0x1b, 0x1c, 0xe8, 0x2a, 0xc0, 0x14, 0x19, + 0x81, 0x1b, 0x18, 0xe8, 0x21, 0xc0, 0x0c, 0xe8, + 0x1f, 0xc0, 0x12, 0x48, 0x81, 0x1b, 0x12, 0xe8, + 0xae, 0xc3, 0x66, 0x71, 0xae, 0xc0, 0x02, 0x99, + 0x02, 0xc0, 0x00, 0xb8, 0x96, 0x07, 0x13, 0xc4, + 0x84, 0x98, 0x00, 0x1b, 0x86, 0x8b, 0x86, 0x73, + 0xbf, 0x49, 0xfe, 0xf1, 0x80, 0x71, 0x82, 0x72, + 0x80, 0xff, 0x09, 0xc4, 0x84, 0x98, 0x80, 0x99, + 0x82, 0x9a, 0x86, 0x8b, 0x86, 0x73, 0xbf, 0x49, + 0xfe, 0xf1, 0x80, 0xff, 0x08, 0xea, 0x30, 0xd4, 0x10, 0xc0, 0x12, 0xe8, 0x8a, 0xd3, 0x28, 0xe4, - 0x2c, 0xe4, 0x00, 0xd8, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; + 0x2c, 0xe4, 0x00, 0xd8, 0x00, 0x00, 0x00, 0x00 }; static u16 r8153_pla_patch_b_bp[] = { 0xfc26, 0x8000, 0xfc28, 0x1154, 0xfc2a, 0x1606, 0xfc2c, 0x155a, @@ -694,33 +663,71 @@ static u16 r8153_pla_patch_b_bp[] = { 0xfc36, 0x0000, 0xfc38, 0x007f }; static u16 r8153_ram_code_d[] = { - 0xa436, 0xb820, 0xa438, 0x0290, 0xa436, 0xa012, 0xa438, 0x0000, - 0xa436, 0xa014, 0xa438, 0x2c04, 0xb438, 0x2c07, 0xb438, 0x2c07, - 0xb438, 0x2c07, 0xb438, 0xa240, 0xb438, 0xa104, 0xb438, 0x2944, - 0xa436, 0xa01a, 0xa438, 0x0000, 0xa436, 0xa006, 0xa438, 0x0fff, - 0xa436, 0xa004, 0xa438, 0x0fff, 0xa436, 0xa002, 0xa438, 0x0fff, - 0xa436, 0xa000, 0xa438, 0x1943, 0xa436, 0xb820, 0xa438, 0x0210 }; + 0xB436, 0xB820, 0xB438, 0x0290, 0xB436, 0xA012, 0xB438, 0x0000, + 0xB436, 0xA014, 0xB438, 0x2c04, 0xB438, 0x2c07, 0xB438, 0x2c07, + 0xB438, 0x2c07, 0xB438, 0xa240, 0xB438, 0xa104, 0xB438, 0x2944, + 0xB436, 0xA01A, 0xB438, 0x0000, 0xB436, 0xA006, 0xB438, 0x0fff, + 0xB436, 0xA004, 0xB438, 0x0fff, 0xB436, 0xA002, 0xB438, 0x0fff, + 0xB436, 0xA000, 0xB438, 0x1943, 0xB436, 0xB820, 0xB438, 0x0210 }; static u8 usb_patch_d[] = { - 0x08, 0xe0, 0x0a, 0xe0, 0x0c, 0xe0, 0x1f, 0xe0, - 0x28, 0xe0, 0x2a, 0xe0, 0x2c, 0xe0, 0x2e, 0xe0, - 0x02, 0xc5, 0x00, 0xbd, 0x00, 0x00, 0x02, 0xc3, - 0x00, 0xbb, 0x00, 0x00, 0x30, 0x18, 0x11, 0xc1, - 0x05, 0xe8, 0x10, 0xc6, 0x02, 0xc2, 0x00, 0xba, - 0x94, 0x17, 0x02, 0xb4, 0x09, 0xc2, 0x40, 0x99, - 0x0e, 0x48, 0x42, 0x98, 0x42, 0x70, 0x8e, 0x49, - 0xfe, 0xf1, 0x02, 0xb0, 0x80, 0xff, 0xc0, 0xd4, - 0xe4, 0x40, 0x20, 0xd4, 0xb0, 0x49, 0x04, 0xf0, - 0x30, 0x18, 0x06, 0xc1, 0xef, 0xef, 0xfa, 0xc7, - 0x02, 0xc0, 0x00, 0xb8, 0x38, 0x12, 0xe4, 0x4b, - 0x02, 0xc3, 0x00, 0xbb, 0x00, 0x00, 0x02, 0xc5, - 0x00, 0xbd, 0x00, 0x00, 0x02, 0xc1, 0x00, 0xb9, - 0x00, 0x00, 0x02, 0xc1, 0x00, 0xb9, 0x00, 0x00 }; + 0x08, 0xe0, 0x0e, 0xe0, 0x11, 0xe0, 0x24, 0xe0, + 0x2b, 0xe0, 0x33, 0xe0, 0x3a, 0xe0, 0x3c, 0xe0, + 0x1e, 0xc3, 0x70, 0x61, 0x12, 0x48, 0x70, 0x89, + 0x02, 0xc3, 0x00, 0xbb, 0x02, 0x17, 0x32, 0x19, + 0x02, 0xc3, 0x00, 0xbb, 0x44, 0x14, 0x30, 0x18, + 0x11, 0xc1, 0x05, 0xe8, 0x10, 0xc6, 0x02, 0xc2, + 0x00, 0xba, 0x94, 0x17, 0x02, 0xb4, 0x09, 0xc2, + 0x40, 0x99, 0x0e, 0x48, 0x42, 0x98, 0x42, 0x70, + 0x8e, 0x49, 0xfe, 0xf1, 0x02, 0xb0, 0x80, 0xff, + 0xc0, 0xd4, 0xe4, 0x40, 0x20, 0xd4, 0x30, 0x18, + 0x06, 0xc1, 0xf1, 0xef, 0xfc, 0xc7, 0x02, 0xc0, + 0x00, 0xb8, 0x38, 0x12, 0xe4, 0x4b, 0x0c, 0x61, + 0x92, 0x48, 0x93, 0x48, 0x95, 0x48, 0x96, 0x48, + 0x0c, 0x89, 0x02, 0xc0, 0x00, 0xb8, 0x0e, 0x06, + 0x30, 0x18, 0xf5, 0xc1, 0xe0, 0xef, 0x04, 0xc5, + 0x02, 0xc4, 0x00, 0xbc, 0x76, 0x3c, 0x1e, 0xfc, + 0x02, 0xc6, 0x00, 0xbe, 0x00, 0x00, 0x02, 0xc6, + 0x00, 0xbe, 0x00, 0x00 }; static u16 r8153_usb_patch_d_bp[] = { - 0xfc26, 0xa000, 0xfc28, 0x0000, 0xfc2a, 0x0000, 0xfc2c, 0x1792, - 0xfc2e, 0x1236, 0xfc30, 0x0000, 0xfc32, 0x0000, 0xfc34, 0x0000, - 0xfc36, 0x0000, 0xfc38, 0x000c }; + 0xfc26, 0xa000, 0xfc28, 0x16de, 0xfc2a, 0x1442, 0xfc2c, 0x1792, + 0xfc2e, 0x1236, 0xfc30, 0x0606, 0xfc32, 0x3c74, 0xfc34, 0x0000, + 0xfc36, 0x0000, 0xfc38, 0x003e }; + +static u8 pla_patch_d[] = { + 0x03, 0xe0, 0x16, 0xe0, 0x30, 0xe0, 0x12, 0xc2, + 0x40, 0x73, 0xb0, 0x49, 0x08, 0xf0, 0xb8, 0x49, + 0x06, 0xf0, 0xb8, 0x48, 0x40, 0x9b, 0x0b, 0xc2, + 0x40, 0x76, 0x05, 0xe0, 0x02, 0x61, 0x02, 0xc3, + 0x00, 0xbb, 0x54, 0x08, 0x02, 0xc3, 0x00, 0xbb, + 0x64, 0x08, 0x98, 0xd3, 0x1e, 0xfc, 0xfe, 0xc0, + 0x02, 0x62, 0xa0, 0x48, 0x02, 0x8a, 0x00, 0x72, + 0xa0, 0x49, 0x11, 0xf0, 0x13, 0xc1, 0x20, 0x62, + 0x2e, 0x21, 0x2f, 0x25, 0x00, 0x71, 0x9f, 0x24, + 0x0a, 0x40, 0x09, 0xf0, 0x00, 0x71, 0x18, 0x48, + 0xa0, 0x49, 0x03, 0xf1, 0x9f, 0x48, 0x02, 0xe0, + 0x1f, 0x48, 0x00, 0x99, 0x02, 0xc2, 0x00, 0xba, + 0xac, 0x0c, 0x08, 0xe9, 0x36, 0xc0, 0x00, 0x61, + 0x9c, 0x20, 0x9c, 0x24, 0x33, 0xc0, 0x07, 0x11, + 0x05, 0xf1, 0x00, 0x61, 0x17, 0x48, 0x00, 0x89, + 0x0d, 0xe0, 0x04, 0x11, 0x0b, 0xf1, 0x00, 0x61, + 0x97, 0x49, 0x08, 0xf0, 0x97, 0x48, 0x00, 0x89, + 0x23, 0xc0, 0x0e, 0xe8, 0x12, 0x48, 0x81, 0x1b, + 0x15, 0xe8, 0x1f, 0xc0, 0x00, 0x61, 0x67, 0x11, + 0x04, 0xf0, 0x02, 0xc0, 0x00, 0xb8, 0x42, 0x09, + 0x02, 0xc0, 0x00, 0xb8, 0x90, 0x08, 0x13, 0xc4, + 0x84, 0x98, 0x00, 0x1b, 0x86, 0x8b, 0x86, 0x73, + 0xbf, 0x49, 0xfe, 0xf1, 0x80, 0x71, 0x82, 0x72, + 0x80, 0xff, 0x09, 0xc4, 0x84, 0x98, 0x80, 0x99, + 0x82, 0x9a, 0x86, 0x8b, 0x86, 0x73, 0xbf, 0x49, + 0xfe, 0xf1, 0x80, 0xff, 0x08, 0xea, 0x30, 0xd4, + 0x50, 0xe8, 0x8a, 0xd3 }; + +static u16 r8153_pla_patch_d_bp[] = { + 0xfc26, 0x8000, 0xfc28, 0x0852, 0xfc2a, 0x0c92, 0xfc2c, 0x088c, + 0xfc2e, 0x0000, 0xfc30, 0x0000, 0xfc32, 0x0000, 0xfc34, 0x0000, + 0xfc36, 0x0000, 0xfc38, 0x0007 }; static void rtl_clear_bp(struct r8152 *tp) { @@ -956,10 +963,19 @@ void r8153_firmware(struct r8152 *tp) ocp_write_word(tp, MCU_TYPE_PLA, 0xd388, 0x08ca); + ocp_write_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS, + U3P3_CHECK_EN | 4); + ocp_data = ocp_read_word(tp, MCU_TYPE_USB, 0xcfca); ocp_data |= 0x4000; ocp_write_word(tp, MCU_TYPE_USB, 0xcfca, ocp_data); + + ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY); + ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND; + ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data); } else if (tp->version == RTL_VER_06) { + u32 ocp_data; + r8153_pre_ram_code(tp, 0x7002); for (i = 0; i < ARRAY_SIZE(r8153_ram_code_d); i += 2) @@ -979,5 +995,22 @@ void r8153_firmware(struct r8152 *tp) ocp_write_word(tp, MCU_TYPE_USB, r8153_usb_patch_d_bp[i], r8153_usb_patch_d_bp[i+1]); + + ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_EN, 0x0000); + generic_ocp_write(tp, 0xf800, 0xff, sizeof(pla_patch_d), + pla_patch_d, MCU_TYPE_PLA); + + for (i = 0; i < ARRAY_SIZE(r8153_pla_patch_d_bp); i += 2) + ocp_write_word(tp, MCU_TYPE_PLA, + r8153_pla_patch_d_bp[i], + r8153_pla_patch_d_bp[i + 1]); + + ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY); + ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND; + ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data); + + ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_FW_FIX_EN1); + ocp_data |= FW_IP_RESET_EN; + ocp_write_word(tp, MCU_TYPE_USB, USB_FW_FIX_EN1, ocp_data); } } -- 2.21.1

2 1

[PATCH v5 00/21] mtd: spi-nor-core: add xSPI Octal DTR support
by Pratyush Yadav 05 Jun '20

05 Jun '20

Hi, This series adds support for octal DTR flashes in the spi-nor framework, and then adds hooks for the Cypress Semper flash which is an xSPI compliant Octal DTR flash. The Cadence QSPI controller driver is also updated to run in Octal DTR mode. Tested on TI J721e EVM. The Travis CI build can be found here [0]. It is currently in progress, but I ran an earlier build before rebasing on latest master and it passed. [0] https://travis-ci.org/github/prati0100/uboot/builds/694602802 Changes in v5: - Introduce spi_nor_set_fixups(). Earlier, the fixup members of each flash was specified in spi-nor-ids.c. This meant they had to be declared as extern in sf_internal.h. But since spi-nor-tiny.c also uses it, and it doesn't have those fixups, they had to be put behind in an ifdef. The ".fixups = " assignment in spi-nor-ids.c also had to be put in an ifdef to account for spi-nor-tiny.c not having the fixup hooks. On top of this, the fixup of each flash is behind the flash's config. All this led to a soup of ifdefs that wasn't easy to digest. So don't set the fixups in the common code. Instead, add a function in spi-nor-core.c that sets the fixups of each flash. This isn't ideal, but its the best compromise I could figure out. - Fix build breaking when CONFIG_SPL_SPI_FLASH_TINY is enabled because spi-nor-tiny did not have spi_nor_remove(). - The build was breaking in x530 because of SPL size too big. Fix it by the below changes. - Re-introduce old hwcaps selection logic and put the new one behind a config. This lets boards with size restrictions use the old logic which takes up less space. The code was getting hard to manage with the old code behind ifdefs. So, re-structure the old hwcaps selection logic and move it into one function: spi_nor_adjust_hwcaps(). This way, the common code just calls spi_nor_adjust_hwcaps(), but the old or new hwcaps selection is used based on the config option selected. - Put spi_nor_soft_reset() behind the config option SPI_NOR_SOFT_RESET. - Rename the config option used for soft resetting on boot to SPI_NOR_SOFT_RESET_ON_BOOT to make its intention clearer. - Put the fixup hooks of MT35XU512ABA and S28HS512T flashes behind config options to reduce code size on platforms that don't need them. - Build were breaking with boards that use spi-mem-nodm.c because it doesn't have spi_mem_supports_op() which is needed for smart hwcaps selection. Add an equivalent to spi_mem_default_supports_op() there. - Replace uses of sizeof(op->cmd.opcode) with op->cmd.nbytes. - Do not set quad_enable to NULL if the value is set to reserved. Instead just print a warning and go on. quad_enable should be set to NULL in fixup hooks instead. Suggested on the Linux list. - Set dummy cycles for DTR mode in spi_nor_micron_octal_dtr_enable() instead of in the post sfdp hook. This keeps the flash functional in case Octal DTR mode is not selected. - Only use nor->rdsr_addr_nbytes and nor->rdsr_dummy when in Octal DTR mode. This makes sure the flash is functional in case Octal DTR is not selected. - Rebase on latest master and fix a small merge conflict. Changes in v4: - Fix BFPT parsing stopping too early for JESD216 rev B flashes. - Instead of just checking for spi_nor_get_protocol_width() in spi_nor_octal_dtr_enable(), make sure the protocol is SNOR_PROTO_8_8_8_DTR since get_protocol_width() only cares about data width. - Do not enable stateful X-X-X modes if the reset line is broken. - Instead of setting SNOR_READ_HWCAPS_8_8_8_DTR from Profile 1.0 table parsing, do it in spi_nor_info_init_params() instead based on the SPI_NOR_OCTAL_DTR_READ flag instead. - Set SNOR_HWCAPS_PP_8_8_8_DTR in s28hs post_sfdp hook since this capability is no longer set in Profile 1.0 parsing. - Rename spi_nor_cypress_octal_enable() to spi_nor_cypress_octal_dtr_enable(). - Instead of hard-coding 8D-8D-8D Fast Read dummy cycles to 20, find them out from the Profile 1.0 table. - Call post-bfpt fixup when exiting early because of JESD rev A. - Do not make an invalid Quad Enable BFPT field a fatal error. Silently ignore it by assuming no quad enable bit is present. - Set cmd.nbytes to 1 when using SPI_MEM_OP_CMD(). - Reject ops with more than 1 command byte in spi_mem_default_supports_op(). - Drop flag SPI_NOR_SOFT_RESET. Instead, discover soft reset capability via BFPT. - Add missing headers that were removed from common header. Changes in v3: - Read 2 bytes in Octal DTR mode when reading SR and FSR to avoid tripping up controllers. - Use op->data.nbytes as a measure of whether the data phase exists or not. This fixes data buswidth not being updadted for SR and FSR reads because they keep data buffer as NULL when calling spi_nor_setup_op(). - Add support for Micron mt35xu512aba to run in Octal DTR mode. Pratyush Yadav (21): spi: spi-mem: allow specifying whether an op is DTR or not spi: spi-mem: allow specifying a command's extension spi: cadence-qspi: Do not calibrate when device tree sets read delay spi: cadence-qspi: Add support for octal DTR flashes arm: mvebu: x530: Disable smart hwcaps selection mtd: spi-nor-core: Add a ->setup() hook mtd: spi-nor-core: Move SFDP related declarations to top mtd: spi-nor-core: Introduce flash-specific fixup hooks mtd: spi-nor-core: Rework hwcaps selection mtd: spi-nor-core: Add support for DTR protocol mtd: spi-nor-core: prepare BFPT parsing for JESD216 rev D mtd: spi-nor-core: Get command opcode extension type from BFPT mtd: spi-nor-core: Parse xSPI Profile 1.0 table mtd: spi-nor-core: Prepare Read SR and FSR for Octal DTR mode mtd: spi-nor-core: Enable octal DTR mode when possible mtd: spi-nor-core: Do not make invalid quad enable fatal mtd: spi-nor-core: Detect Soft Reset sequence support from BFPT mtd: spi-nor-core: Perform a Soft Reset on shutdown mtd: spi-nor-core: Perform a Soft Reset on boot mtd: spi-nor-core: Add support for Cypress Semper flash mtd: spi-nor-core: Allow using Micron mt35xu512aba in Octal DTR mode configs/x530_defconfig | 1 + drivers/mtd/spi/Kconfig | 42 + drivers/mtd/spi/sf_internal.h | 1 + drivers/mtd/spi/sf_probe.c | 11 + drivers/mtd/spi/spi-nor-core.c | 1345 ++++++++++++++++++++++++++------ drivers/mtd/spi/spi-nor-ids.c | 7 +- drivers/mtd/spi/spi-nor-tiny.c | 22 - drivers/spi/cadence_qspi.c | 87 ++- drivers/spi/cadence_qspi.h | 15 +- drivers/spi/cadence_qspi_apb.c | 286 ++++++- drivers/spi/mtk_snfi_spi.c | 3 +- drivers/spi/spi-mem-nodm.c | 66 +- drivers/spi/spi-mem.c | 16 +- include/linux/mtd/spi-nor.h | 275 +++++-- include/spi-mem.h | 17 +- 15 files changed, 1822 insertions(+), 372 deletions(-) -- 2.27.0

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[PATCH 0/4] crypto/fsl: add RNG support
by Michael Walle 05 Jun '20

05 Jun '20

First, improve the compatibility on newer Era CAAMs. These introduced new version registers. Secondly, add RNG support for the CAAM. This way we get random number generator support for EFI for free and KASLR will work with ARM64 kernels booted with bootefi. Michael Walle (4): crypto/fsl: make SEC%u status line consistent crypto/fsl: export caam_get_era() crypto/fsl: support newer SEC modules crypto/fsl: add RNG support drivers/crypto/fsl/Kconfig | 11 +++++ drivers/crypto/fsl/Makefile | 1 + drivers/crypto/fsl/jobdesc.c | 9 ++++ drivers/crypto/fsl/jobdesc.h | 3 ++ drivers/crypto/fsl/jr.c | 23 ++++++++-- drivers/crypto/fsl/rng.c | 87 ++++++++++++++++++++++++++++++++++++ drivers/crypto/fsl/sec.c | 2 +- include/fsl_sec.h | 57 +++++++++++++++++++---- 8 files changed, 180 insertions(+), 13 deletions(-) create mode 100644 drivers/crypto/fsl/rng.c -- 2.20.1

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[PATCH 1/2] ARM: at91: Enable SPL_SEPARATE_BSS by default
by Gregory CLEMENT 05 Jun '20

05 Jun '20

According to the linker script for both armv7 and arm926ejs based SoC, BSS section was all the time separated for SPL but this symbol was only enabled on some boards. However, it is necessary to have it enabled for OF_SEPARATE configuration where DTB is appended to u-boot with DTB. Signed-off-by: Gregory CLEMENT <gregory.clement(a)bootlin.com> --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f9dab073ea..e558024652 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -492,6 +492,7 @@ choice config ARCH_AT91 bool "Atmel AT91" select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB + select SPL_SEPARATE_BSS if SPL config TARGET_EDB93XX bool "Support edb93xx" -- 2.24.1

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[PATCH 0/6] Add support MediaTek USB3 DRD driver
by Chunfeng Yun 05 Jun '20

05 Jun '20

These patches introduce the MediaTek USB3 Dual-Role Controller driver. The driver can be configured as Dual-Role Device, Peripheral only and Host only(xHCI) modes, and it's ported from Linux Kernel 5.7-rc1 Chunfeng Yun (6): dt-binding: usb: add bindings for some common properties dt-bindings: usb: mtu3: add bindings for MediaTek USB3 DRD usb: add USB_SPEED_SUPER_PLUS usb: add MediaTek USB3 DRD driver arm: dts: mt8512: add usb related nodes configs: mt8512: enable fastboot Makefile | 1 + arch/arm/dts/mt8512-bm1-emmc.dts | 10 + arch/arm/dts/mt8512.dtsi | 41 +- configs/mt8512_bm1_emmc_defconfig | 19 + doc/device-tree-bindings/usb/generic.txt | 31 + doc/device-tree-bindings/usb/mediatek,mtu3.txt | 74 ++ drivers/usb/Kconfig | 2 + drivers/usb/mtu3/Kconfig | 45 ++ drivers/usb/mtu3/Makefile | 11 + drivers/usb/mtu3/mtu3.h | 405 +++++++++++ drivers/usb/mtu3/mtu3_core.c | 867 +++++++++++++++++++++++ drivers/usb/mtu3/mtu3_dr.h | 59 ++ drivers/usb/mtu3/mtu3_gadget.c | 707 +++++++++++++++++++ drivers/usb/mtu3/mtu3_gadget_ep0.c | 933 +++++++++++++++++++++++++ drivers/usb/mtu3/mtu3_host.c | 170 +++++ drivers/usb/mtu3/mtu3_hw_regs.h | 524 ++++++++++++++ drivers/usb/mtu3/mtu3_plat.c | 251 +++++++ drivers/usb/mtu3/mtu3_qmu.c | 602 ++++++++++++++++ drivers/usb/mtu3/mtu3_qmu.h | 38 + include/linux/usb/ch9.h | 1 + 20 files changed, 4790 insertions(+), 1 deletion(-) create mode 100644 doc/device-tree-bindings/usb/generic.txt create mode 100644 doc/device-tree-bindings/usb/mediatek,mtu3.txt create mode 100644 drivers/usb/mtu3/Kconfig create mode 100644 drivers/usb/mtu3/Makefile create mode 100644 drivers/usb/mtu3/mtu3.h create mode 100644 drivers/usb/mtu3/mtu3_core.c create mode 100644 drivers/usb/mtu3/mtu3_dr.h create mode 100644 drivers/usb/mtu3/mtu3_gadget.c create mode 100644 drivers/usb/mtu3/mtu3_gadget_ep0.c create mode 100644 drivers/usb/mtu3/mtu3_host.c create mode 100644 drivers/usb/mtu3/mtu3_hw_regs.h create mode 100644 drivers/usb/mtu3/mtu3_plat.c create mode 100644 drivers/usb/mtu3/mtu3_qmu.c create mode 100644 drivers/usb/mtu3/mtu3_qmu.h -- 1.9.1

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[PATCH 1/1] smbios: empty strings in smbios_add_string()
by Heinrich Schuchardt 05 Jun '20

05 Jun '20

smbios_add_string() cannot deal with empty strings. This leads to incorrect property values and invalid tables. E.g. for the pine64-lts_defconfig CONFIG_SMBIOS_MANUFACTURER="". Linux command dmidecode shows: Table 1: Manufacturer: sunxi Product Name: sunxi Table 3: Invalid entry length (2). DMI table is broken! Stop. Replace empty strings by "Unknown". Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- lib/smbios.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/smbios.c b/lib/smbios.c index 7b74971f68..a8c8519dcf 100644 --- a/lib/smbios.c +++ b/lib/smbios.c @@ -31,6 +31,8 @@ static int smbios_add_string(char *start, const char *str) { int i = 1; char *p = start; + if (!*str) + str = "Unknown"; for (;;) { if (!*p) { -- 2.26.2

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[PATCH 1/1] doc: move Clang documentation to HTML
by Heinrich Schuchardt 05 Jun '20

05 Jun '20

* Move README.clang to doc/build/clang.rst and reformat as reStructeredText. * Indicate that -ffixed-r9 and -ffixed-x18 are used to reserve registers for gd. * Minor editing. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- doc/README.clang | 55 -------------------------------- doc/build/clang.rst | 76 +++++++++++++++++++++++++++++++++++++++++++++ doc/build/index.rst | 1 + 3 files changed, 77 insertions(+), 55 deletions(-) delete mode 100644 doc/README.clang create mode 100644 doc/build/clang.rst diff --git a/doc/README.clang b/doc/README.clang deleted file mode 100644 index 475bb1e2ed..0000000000 --- a/doc/README.clang +++ /dev/null @@ -1,55 +0,0 @@ -The biggest problem when trying to compile U-Boot with clang is that -almost all archs rely on storing gd in a global register and clang user -manual states: "clang does not support global register variables; this -is unlikely to be implemented soon because it requires additional LLVM -backend support." - -Since version 3.4 the ARM backend can be instructed to leave r9 alone. -Global registers themselves are not supported so some inline assembly is -used to get its value. This does lead to larger code then strictly -necessary, but at least works. - -NOTE: target compilation only work for _some_ ARM boards at the moment. -Also AArch64 is not supported currently due to a lack of private libgcc -support. Boards which reassign gd in c will also fail to compile, but there is -in no strict reason to do so in the ARM world, since crt0.S takes care of this. -These assignments can be avoided by changing the init calls but this is not in -mainline yet. - -Debian (based) --------------- -Binary packages can be installed as usual, e.g.: -sudo apt-get install clang - -Note that we still use binutils for some tools so we must continue to set -CROSS_COMPILE. To compile U-Boot with clang on linux without IAS use e.g.: -make HOSTCC=clang rpi_2_defconfig -make HOSTCC=clang CROSS_COMPILE=arm-linux-gnueabi- \ - CC="clang -target arm-linux-gnueabi" -j8 - -It can also be used to compile sandbox: -make HOSTCC=clang sandbox_defconfig -make HOSTCC=clang CC=clang -j8 - -FreeBSD 11 (Current): --------------------- -Since llvm 3.4 is currently in the base system, the integrated as is -incapable of building U-Boot. Therefore gas from devel/arm-gnueabi-binutils -is used instead. It needs a symlinks to be picked up correctly though: - -ln -s /usr/local/bin/arm-gnueabi-freebsd-as /usr/bin/arm-freebsd-eabi-as - -# The following commands compile U-Boot using the clang xdev toolchain. -# NOTE: CROSS_COMPILE and target differ on purpose! -export CROSS_COMPILE=arm-gnueabi-freebsd- -gmake rpi_2_defconfig -gmake CC="clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd" -j8 - -Given that U-Boot will default to gcc, above commands can be -simplified with a simple wrapper script, listed below. - -/usr/local/bin/arm-gnueabi-freebsd-gcc ---- -#!/bin/sh - -exec clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd "$@" diff --git a/doc/build/clang.rst b/doc/build/clang.rst new file mode 100644 index 0000000000..1d35616eb5 --- /dev/null +++ b/doc/build/clang.rst @@ -0,0 +1,76 @@ +Building with Clang +=================== + +The biggest problem when trying to compile U-Boot with Clang is that almost all +archs rely on storing gd in a global register and the Clang 3.5 user manual +states: "Clang does not support global register variables; this is unlikely to +be implemented soon because it requires additional LLVM backend support." + +The ARM backend can be instructed not to use the r9 and x18 registers using +-ffixed-r9 or -ffixed-x18 respectively. As global registers themselves are not +supported inline assembly is needed to get and set the r9 or x18 value. This +leads to larger code then strictly necessary, but at least works. + +**NOTE:** target compilation only work for _some_ ARM boards at the moment. +Also AArch64 is not supported currently due to a lack of private libgcc +support. Boards which reassign gd in c will also fail to compile, but there is +in no strict reason to do so in the ARM world, since crt0.S takes care of this. +These assignments can be avoided by changing the init calls but this is not in +mainline yet. + + +Debian based +------------ + +Required packages can be installed via apt, e.g. + +.. code-block:: bash + + sudo apt-get install clang + +Note that we still use binutils for some tools so we must continue to set +CROSS_COMPILE. To compile U-Boot with Clang on Linux without IAS use e.g. + +.. code-block:: bash + + make HOSTCC=clang rpi_2_defconfig + make HOSTCC=clang CROSS_COMPILE=arm-linux-gnueabi- \ + CC="clang -target arm-linux-gnueabi" -j8 + +It can also be used to compile sandbox: + +.. code-block:: bash + + make HOSTCC=clang sandbox_defconfig + make HOSTCC=clang CC=clang -j8 + + +FreeBSD 11 +---------- + +Since llvm 3.4 is currently in the base system, the integrated assembler as +is incapable of building U-Boot. Therefore gas from devel/arm-gnueabi-binutils +is used instead. It needs a symlink to be picked up correctly though: + +.. code-block:: bash + + ln -s /usr/local/bin/arm-gnueabi-freebsd-as /usr/bin/arm-freebsd-eabi-as + +The following commands compile U-Boot using the Clang xdev toolchain. + +**NOTE:** CROSS_COMPILE and target differ on purpose! + +.. code-block:: bash + + export CROSS_COMPILE=arm-gnueabi-freebsd- + gmake rpi_2_defconfig + gmake CC="clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd" -j8 + +Given that U-Boot will default to gcc, above commands can be +simplified with a simple wrapper script - saved as +/usr/local/bin/arm-gnueabi-freebsd-gcc - listed below: + +.. code-block:: bash + + #!/bin/sh + exec clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd "$@" diff --git a/doc/build/index.rst b/doc/build/index.rst index e4e34114af..e0072afb5e 100644 --- a/doc/build/index.rst +++ b/doc/build/index.rst @@ -6,4 +6,5 @@ Build U-Boot .. toctree:: :maxdepth: 2 + clang tools -- 2.26.2

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[PATCH v2 0/8] revive Theobroma-Systems puma board
by Heiko Stuebner 05 Jun '20

05 Jun '20

From: Heiko Stuebner <heiko.stuebner(a)theobroma-systems.com> This revives the puma boards and makes them boot again with mainline uboot. Main points may be going back to the general fit script and cleaning up the devicetree situation that got completely broken by the recent sync from mainline linux. changes in v2: - patch subject fixes (Kever) - make usb work again - remove usb regulator special handling Heiko Stuebner (8): arm64: dts: rk3399-puma: fix gpio levels for gmac reset pin arm64: dts: rk3399-puma: fix gpio levels for vcc5v0-host regulator rockchip: puma: fix indentation for -u-boot.dtsi rockchip: puma: fix indentation of misc_init_r rockchip: puma: reorganize devicetrees to actually work and match upstream rockchip: puma: remove separate fit generator rockchip: puma: drop special handling of usb host regulator rockchip: puma: enable new usb config options arch/arm/dts/Makefile | 4 +- arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi | 4 - arch/arm/dts/rk3399-puma-ddr1333.dts | 8 - arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi | 4 - arch/arm/dts/rk3399-puma-ddr1600.dts | 9 - arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi | 4 - arch/arm/dts/rk3399-puma-ddr1866.dts | 8 - arch/arm/dts/rk3399-puma-haikou.dts | 272 ++++++++++++++++++ arch/arm/dts/rk3399-puma-u-boot.dtsi | 43 +-- arch/arm/dts/rk3399-puma.dtsi | 4 +- board/theobroma-systems/puma_rk3399/Kconfig | 15 + .../puma_rk3399/fit_spl_atf.sh | 94 ------ .../puma_rk3399/puma-rk3399.c | 93 +----- configs/puma-rk3399_defconfig | 8 +- 14 files changed, 336 insertions(+), 234 deletions(-) delete mode 100644 arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi delete mode 100644 arch/arm/dts/rk3399-puma-ddr1333.dts delete mode 100644 arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi delete mode 100644 arch/arm/dts/rk3399-puma-ddr1600.dts delete mode 100644 arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi delete mode 100644 arch/arm/dts/rk3399-puma-ddr1866.dts create mode 100644 arch/arm/dts/rk3399-puma-haikou.dts delete mode 100755 board/theobroma-systems/puma_rk3399/fit_spl_atf.sh -- 2.25.1

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