June 2020 - U-Boot

[PATCH] ARM: imx: soc: Switch BOARD_EARLY_INIT_F to imply on MX7
by Marek Vasut 23 Jun '20

23 Jun '20

There are systems where board_early_init_f() is plain empty. Switch the config option from "select" to "imply", to permit user to unset the BOARD_EARLY_INIT_F if it were to be empty. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx(a)nxp.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ef7da27877..a581cfb0f7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -873,11 +873,11 @@ config ARCH_MX7ULP config ARCH_MX7 bool "Freescale MX7" select ARCH_MISC_INIT - select BOARD_EARLY_INIT_F select CPU_V7A select SYS_FSL_HAS_SEC if IMX_HAB select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_LE + imply BOARD_EARLY_INIT_F imply MXC_GPIO imply SYS_THUMB_BUILD -- 2.25.1

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[PATCH] ARM: imx: ddr: Fill in missing DDRC ZQCTLx on i.MX7
by Marek Vasut 23 Jun '20

23 Jun '20

The iMX7 defines further DDRC ZQCTLx registers, however those were thus far missing from the list of registers and not programmed. On systems with LPDDR2 or DDR3, those registers must be programmed with correct values, otherwise the DRAM may not work. However, existing systems which worked without programming these registers before are now setting those registers to 0, which is the default value, so no functional change there. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx(a)nxp.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/include/asm/arch-mx7/mx7-ddr.h | 4 +++- arch/arm/mach-imx/mx7/ddr.c | 1 + 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-mx7/mx7-ddr.h b/arch/arm/include/asm/arch-mx7/mx7-ddr.h index 37aaee0ad7..bea5dd8ec5 100644 --- a/arch/arm/include/asm/arch-mx7/mx7-ddr.h +++ b/arch/arm/include/asm/arch-mx7/mx7-ddr.h @@ -39,7 +39,9 @@ struct ddrc { u32 dramtmg8; /* 0x0120 */ u32 reserved7[0x17]; u32 zqctl0; /* 0x0180 */ - u32 reserved8[0x03]; + u32 zqctl1; /* 0x0184 */ + u32 zqctl2; /* 0x0188 */ + u32 zqstat; /* 0x018c */ u32 dfitmg0; /* 0x0190 */ u32 dfitmg1; /* 0x0194 */ u32 reserved9[0x02]; diff --git a/arch/arm/mach-imx/mx7/ddr.c b/arch/arm/mach-imx/mx7/ddr.c index 9713835bf2..9ffd8c6c66 100644 --- a/arch/arm/mach-imx/mx7/ddr.c +++ b/arch/arm/mach-imx/mx7/ddr.c @@ -58,6 +58,7 @@ void mx7_dram_cfg(struct ddrc *ddrc_regs_val, struct ddrc_mp *ddrc_mp_val, writel(ddrc_regs_val->dramtmg5, &ddrc_regs->dramtmg5); writel(ddrc_regs_val->dramtmg8, &ddrc_regs->dramtmg8); writel(ddrc_regs_val->zqctl0, &ddrc_regs->zqctl0); + writel(ddrc_regs_val->zqctl1, &ddrc_regs->zqctl1); writel(ddrc_regs_val->dfitmg0, &ddrc_regs->dfitmg0); writel(ddrc_regs_val->dfitmg1, &ddrc_regs->dfitmg1); writel(ddrc_regs_val->dfiupd0, &ddrc_regs->dfiupd0); -- 2.25.1

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[PATCH v3 1/4] phy: atheros: ar8035: Fix clock output calculation
by Fabio Estevam 23 Jun '20

23 Jun '20

The clock ouput frequency is calculated incorrectly for AR8035 due to wrong masking of priv->clk_25m_reg and priv->clk_25m_mask. This same issue has been already fixed in the kernel by: commit b1f4c209d84057b6d40b939b6e4404854271d797 Author: Oleksij Rempel <o.rempel(a)pengutronix.de> Date: Wed Apr 1 11:57:32 2020 +0200 net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035 The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set for the values that comprise the fields, not zero-bits-set. This patch fixes the clock frequency configuration for ATH8030 and ATH8035 Atheros PHYs by removing the erroneous "~". To reproduce this bug, configure the PHY with the device tree binding "qca,clk-out-frequency" and remove the machine specific PHY fixups. Fixes: 2f664823a47021 ("net: phy: at803x: add device tree binding") Signed-off-by: Oleksij Rempel <o.rempel(a)pengutronix.de> Reported-by: Russell King <rmk+kernel(a)armlinux.org.uk> Reviewed-by: Russell King <rmk+kernel(a)armlinux.org.uk> Tested-by: Russell King <rmk+kernel(a)armlinux.org.uk> Signed-off-by: David S. Miller <davem(a)davemloft.net> Apply the same fix in the U-Boot driver. Tested on a i.MX6 Hummingboard. Signed-off-by: Fabio Estevam <festevam(a)gmail.com> Reviewed-by: Michael Walle <michael(a)walle.cc> Tested-by: Tom Rini <trini(a)konsulko.com> --- Changes since v2: - None drivers/net/phy/atheros.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c index 13f7275d17..f922fecd6b 100644 --- a/drivers/net/phy/atheros.c +++ b/drivers/net/phy/atheros.c @@ -275,11 +275,10 @@ static int ar803x_of_init(struct phy_device *phydev) * Fixup for the AR8035 which only has two bits. The two * remaining bits map to the same frequencies. */ - if (phydev->drv->uid == AR8035_PHY_ID) { - u16 clear = AR803x_CLK_25M_MASK & AR8035_CLK_25M_MASK; - priv->clk_25m_mask &= ~clear; - priv->clk_25m_reg &= ~clear; + if (phydev->drv->uid == AR8035_PHY_ID) { + priv->clk_25m_reg &= AR8035_CLK_25M_MASK; + priv->clk_25m_mask &= AR8035_CLK_25M_MASK; } } -- 2.17.1

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[PATCH v2] Fix MMC access on Sabrelite
by Martyn Welch 23 Jun '20

23 Jun '20

It appears that MMC access on the Sabrelite has been broken since cdcaee9518: Loading Environment from MMC... Card did not respond to voltage select! *** Warning - No block device, using default environment Remove the board_mmc_init() and related entries now that we should be using DM_MMC, add PINCTRL so that things work as expected. Signed-off-by: Martyn Welch <martyn.welch(a)collabora.com> --- Changes in v2: - Removed now redundant mmc header. board/boundary/nitrogen6x/nitrogen6x.c | 72 -------------------------- configs/mx6qsabrelite_defconfig | 3 ++ 2 files changed, 3 insertions(+), 72 deletions(-) diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c index d49725daa8..b3b121bad8 100644 --- a/board/boundary/nitrogen6x/nitrogen6x.c +++ b/board/boundary/nitrogen6x/nitrogen6x.c @@ -25,7 +25,6 @@ #include <asm/mach-imx/spi.h> #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> -#include <mmc.h> #include <fsl_esdhc_imx.h> #include <micrel.h> #include <miiphy.h> @@ -161,26 +160,6 @@ static iomux_v3_cfg_t const usdhc2_pads[] = { IOMUX_PAD_CTRL(SD2_DAT3__SD2_DATA3, USDHC_PAD_CTRL), }; -static iomux_v3_cfg_t const usdhc3_pads[] = { - IOMUX_PAD_CTRL(SD3_CLK__SD3_CLK, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD3_CMD__SD3_CMD, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD3_DAT0__SD3_DATA0, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD3_DAT1__SD3_DATA1, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD3_DAT2__SD3_DATA2, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD3_DAT3__SD3_DATA3, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD3_DAT5__GPIO7_IO00, NO_PAD_CTRL), /* CD */ -}; - -static iomux_v3_cfg_t const usdhc4_pads[] = { - IOMUX_PAD_CTRL(SD4_CLK__SD4_CLK, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD4_CMD__SD4_CMD, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD4_DAT0__SD4_DATA0, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD4_DAT1__SD4_DATA1, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD4_DAT2__SD4_DATA2, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(SD4_DAT3__SD4_DATA3, USDHC_PAD_CTRL), - IOMUX_PAD_CTRL(NANDF_D6__GPIO2_IO06, NO_PAD_CTRL), /* CD */ -}; - static iomux_v3_cfg_t const enet_pads1[] = { IOMUX_PAD_CTRL(ENET_MDIO__ENET_MDIO, ENET_PAD_CTRL), IOMUX_PAD_CTRL(ENET_MDC__ENET_MDC, ENET_PAD_CTRL), @@ -305,57 +284,6 @@ int board_ehci_power(int port, int on) #endif -#ifdef CONFIG_FSL_ESDHC_IMX -static struct fsl_esdhc_cfg usdhc_cfg[2] = { - {USDHC3_BASE_ADDR}, - {USDHC4_BASE_ADDR}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int gp_cd = (cfg->esdhc_base == USDHC3_BASE_ADDR) ? IMX_GPIO_NR(7, 0) : - IMX_GPIO_NR(2, 6); - - gpio_direction_input(gp_cd); - return !gpio_get_value(gp_cd); -} - -int board_mmc_init(bd_t *bis) -{ - int ret; - u32 index = 0; - - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); - - usdhc_cfg[0].max_bus_width = 4; - usdhc_cfg[1].max_bus_width = 4; - - for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { - switch (index) { - case 0: - SETUP_IOMUX_PADS(usdhc3_pads); - break; - case 1: - SETUP_IOMUX_PADS(usdhc4_pads); - break; - default: - printf("Warning: you configured more USDHC controllers" - "(%d) then supported by the board (%d)\n", - index + 1, CONFIG_SYS_FSL_USDHC_NUM); - return -EINVAL; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]); - if (ret) - return ret; - } - - return 0; -} -#endif - #ifdef CONFIG_MXC_SPI int board_spi_cs_gpio(unsigned bus, unsigned cs) { diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index ea338c1b53..39b0ef7a42 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +# CONFIG_CMD_PINMUX is not set CONFIG_CMD_SATA=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y @@ -55,6 +56,8 @@ CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_MXC_SPI=y -- 2.26.2

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[PATCH] ARM: dts: imx6qdl-sabreauto: Fix AR8031 phy-mode
by Fabio Estevam 23 Jun '20

23 Jun '20

As per kernel commit 0672d22a1924 ("ARM: dts: imx: Fix the AR803X phy-mode) the correct phy-mode should be "rgmii-id", so fix it accordingly to fix the Ethernet regression. This problem has been exposed by commit: commit 13114f38e2ccea9386726d8b9831dfc310589548 Author: Vladimir Oltean <vladimir.oltean(a)nxp.com> Date: Thu May 7 00:11:51 2020 +0200 phy: atheros: Explicitly disable RGMII delays To eliminate any doubts about the out-of-reset value of the PHY, that the driver previously relied on. If bisecting shows that this commit breaks your board you probably have a wrong PHY interface mode. You probably want the PHY_INTERFACE_MODE_RGMII_RXID or PHY_INTERFACE_MODE_RGMII_ID mode. Signed-off-by: Vladimir Oltean <vladimir.oltean(a)nxp.com> Acked-by: Joe Hershberger <joe.hershberger(a)ni.com> Fix the phy-mode accordingly to fix the regression. Signed-off-by: Fabio Estevam <festevam(a)gmail.com> --- arch/arm/dts/imx6qdl-sabreauto.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/imx6qdl-sabreauto.dtsi b/arch/arm/dts/imx6qdl-sabreauto.dtsi index a6dc5c42c6..28a7fdb0f1 100644 --- a/arch/arm/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/dts/imx6qdl-sabreauto.dtsi @@ -281,7 +281,7 @@ &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; fsl,err006687-workaround-present; -- 2.17.1

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[PATCH v1 00/13] This patch-series includes updates for Toradex modules:
by Igor Opaniuk 23 Jun '20

23 Jun '20

1. Environment clean-up (dropping legacy emmcboot, sdboot wrappers) 2. Boot count support for multiple modules 3. Distro Boot fixes Igor Opaniuk (6): apalis-tk1: enable distroboot apalis-tk1: fix setting fdtfile value toradex: imx: enable BOOTCOUNT feature apalis_imx6: boot env configuration updates colibri_imx7: boot env configuration updates colibri_imx6: boot env configuration updates Marcel Ziswiler (1): apalis-imx8: enable of_system_setup Max Krummenacher (3): apalis/colibri-imx8: re-enable CONFIG_IMX_SCU_THERMAL colibri_vf_defconfig: enable part cmd configs/colibri_vf.h: drop sdboot in favour of distro_bootcmd Oleksandr Suvorov (1): colibri-imx8x: declare consoleargs Stefan Agner (2): colibri_imx7: add addresses required for distro boot colibri-imx6ull/imx7: define bootubipart for distro boot configs/apalis-imx8qm_defconfig | 2 ++ configs/apalis-tk1_defconfig | 2 +- configs/apalis_imx6_defconfig | 3 +++ configs/colibri-imx6ull_defconfig | 3 +++ configs/colibri-imx8qxp_defconfig | 1 + configs/colibri_imx6_defconfig | 3 +++ configs/colibri_imx7_defconfig | 3 +++ configs/colibri_imx7_emmc_defconfig | 3 +++ configs/colibri_vf_defconfig | 3 +-- include/configs/apalis-tk1.h | 51 ++++++++++--------------------------- include/configs/apalis_imx6.h | 29 +-------------------- include/configs/colibri-imx6ull.h | 1 + include/configs/colibri-imx8x.h | 8 +++--- include/configs/colibri_imx6.h | 29 +-------------------- include/configs/colibri_imx7.h | 28 +++----------------- include/configs/colibri_vf.h | 18 +------------ 16 files changed, 46 insertions(+), 141 deletions(-) -- 2.7.4

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[PATCH] ARM: dts: imx6qdl-sabresd: Fix AR8031 phy-mode
by Fabio Estevam 23 Jun '20

23 Jun '20

As per kernel commit 0672d22a1924 ("ARM: dts: imx: Fix the AR803X phy-mode) the correct phy-mode should be "rgmii-id", so fix it accordingly to fix the Ethernet regression. This problem has been exposed by commit: commit 13114f38e2ccea9386726d8b9831dfc310589548 Author: Vladimir Oltean <vladimir.oltean(a)nxp.com> Date: Thu May 7 00:11:51 2020 +0200 phy: atheros: Explicitly disable RGMII delays To eliminate any doubts about the out-of-reset value of the PHY, that the driver previously relied on. If bisecting shows that this commit breaks your board you probably have a wrong PHY interface mode. You probably want the PHY_INTERFACE_MODE_RGMII_RXID or PHY_INTERFACE_MODE_RGMII_ID mode. Signed-off-by: Vladimir Oltean <vladimir.oltean(a)nxp.com> Acked-by: Joe Hershberger <joe.hershberger(a)ni.com> Signed-off-by: Fabio Estevam <festevam(a)gmail.com> --- Hi, Probably syncing with the mainline kernel would help fixing other boards. I tried this approach and noticed some dtb build breakage as there are some dtbs that are not in mainline, so to be on the safe side, apply the minimal fix for the sabresd board to fix the regression for 2020.07. arch/arm/dts/imx6qdl-sabresd.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/imx6qdl-sabresd.dtsi b/arch/arm/dts/imx6qdl-sabresd.dtsi index 2cd5a9fbac..eddb390174 100644 --- a/arch/arm/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/dts/imx6qdl-sabresd.dtsi @@ -204,7 +204,7 @@ &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; status = "okay"; }; -- 2.17.1

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[PATCH v3 0/4] mx6cuboxi: enable support for OF_CONTROL and DM in SPL
by Walter Lozano 23 Jun '20

23 Jun '20

Make an additional step to add full DM support to mx6cuboxi, including its support for SPL With this new configuration SPL image is 50 KB, higher than the 38 KB from the previous version, but it still under the 68 KB limit. Changes in v3: - Cleanup Changes in v2: - Fix board_boot_order to avoid pointing to a NAND device - Fix board_boot_order to include MMC iomux - Remove unused code Walter Lozano (4): mx6cuboxi: enable MMC and eMMC in DT for SPL mx6cuboxi: customize board_boot_order to access eMMC mx6cuboxi: enable OF_CONTROL and DM in SPL mx6cuboxi: remove unused code ...qdl-hummingboard2-emmc-som-v15-u-boot.dtsi | 8 ++ board/solidrun/mx6cuboxi/mx6cuboxi.c | 113 ++++++++---------- configs/mx6cuboxi_defconfig | 3 + 3 files changed, 59 insertions(+), 65 deletions(-) -- 2.20.1

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[PATCH 1/2] gpio: mxc_gpio: change gpio index for i.MX8
by Ye Li 23 Jun '20

23 Jun '20

Since the i.MX8 GPIO banks are indexed from 0 not 1 on other i.MX platforms, so we have to adjust the index accordingly. Signed-off-by: Adrian Alonso <adrian.alonso(a)nxp.com> Signed-off-by: Ye Li <ye.li(a)nxp.com> --- drivers/gpio/mxc_gpio.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index a851893..90d36fb 100644 --- a/drivers/gpio/mxc_gpio.c +++ b/drivers/gpio/mxc_gpio.c @@ -281,7 +281,10 @@ static int mxc_gpio_probe(struct udevice *dev) char name[18], *str; banknum = plat->bank_index; - sprintf(name, "GPIO%d_", banknum + 1); + if (IS_ENABLED(CONFIG_ARCH_IMX8)) + sprintf(name, "GPIO%d_", banknum); + else + sprintf(name, "GPIO%d_", banknum + 1); str = strdup(name); if (!str) return -ENOMEM; -- 2.7.4

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[PATCH] ARM: imx: soc: Select default TEXT_BASE for MX7
by Marek Vasut 23 Jun '20

23 Jun '20

Select default U-Boot and SPL text base for the MX7 SoC. The U-Boot text base is picked as the one used by various MX7 boards. The SPL text base however is different. The SPL text base is set to 0x912000 instead of the usual 0x911000, that is because the 0x911000 value cannot work. Using 0x911000 as a SPL text base will result in the DCD header being placed below the 0x911000 address, which is a reserved SRAM area which must not be used. This will actually trigger eMMC boot failure on MX7D at least. Hence the increment. Update all boards affected by this SPL problem to the new SPL_TEXT_BASE. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx(a)nxp.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/mach-imx/mx7/Kconfig | 7 +++++++ configs/cl-som-imx7_defconfig | 2 -- configs/pico-dwarf-imx7d_defconfig | 2 -- configs/pico-hobbit-imx7d_defconfig | 2 -- configs/pico-imx7d_defconfig | 2 -- configs/pico-nymph-imx7d_defconfig | 2 -- configs/pico-pi-imx7d_defconfig | 2 -- 7 files changed, 7 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig index 286d36589d..c8146c3509 100644 --- a/arch/arm/mach-imx/mx7/Kconfig +++ b/arch/arm/mach-imx/mx7/Kconfig @@ -16,6 +16,13 @@ config MX7D select ROM_UNIFIED_SECTIONS imply CMD_FUSE +config SYS_TEXT_BASE + default 0x87800000 + +config SPL_TEXT_BASE + depends on SPL + default 0x00912000 + choice prompt "MX7 board select" optional diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index d2766190de..b54048343f 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y -CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -17,7 +16,6 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_SPL_TEXT_BASE=0x00911000 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index 8a1e15de65..07b17f52ec 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y -CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -15,7 +14,6 @@ CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_SPL_TEXT_BASE=0x00911000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index 830fddeee9..d04b0d7dd6 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y -CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -15,7 +14,6 @@ CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_SPL_TEXT_BASE=0x00911000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index 545acd2c89..f3719187ef 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y -CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -15,7 +14,6 @@ CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_SPL_TEXT_BASE=0x00911000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index 8a1e15de65..07b17f52ec 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y -CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -15,7 +14,6 @@ CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_SPL_TEXT_BASE=0x00911000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index c9e6abc7d2..13b6a2f35c 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y -CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -15,7 +14,6 @@ CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_SPL_TEXT_BASE=0x00911000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" -- 2.25.1

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