June 2020 - U-Boot

[PATCH] tbs2910: migrate to DM_VIDEO
by Anatolij Gustschin 01 Jul '20

01 Jul '20

Migration to DM_VIDEO driver is long overdue, configure it in board config files. To enable the display set stdout like: setenv stdout serial,vidconsole Signed-off-by: Anatolij Gustschin <agust(a)denx.de> --- This is only build tested. configs/tbs2910_defconfig | 7 ++++++- include/configs/tbs2910.h | 2 -- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 2ff0e160f7..b40641c17b 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 CONFIG_TARGET_TBS2910=y @@ -84,7 +85,11 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_I2C_EDID=y +CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP32 is not set +# CONFIG_VIDEO_ANSI is not set CONFIG_VIDEO_IPUV3=y -CONFIG_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_OF_LIBFDT_ASSUME_MASK=0xff # CONFIG_EFI_LOADER is not set diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 7376b91f55..8ab3fcfe3e 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -37,11 +37,9 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */ /* Framebuffer */ -#ifdef CONFIG_VIDEO #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP -#endif /* PCI */ #ifdef CONFIG_CMD_PCI -- 2.17.1

5 14

Pull request for UEFI sub-system for efi-2020-07-rc6 (2)
by Heinrich Schuchardt 01 Jul '20

01 Jul '20

The following changes since commit 19a7e5814b77b288472aa96b6d94fb2591cc9184: Merge tag 'fixes-for-v2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-video (2020-06-28 10:12:25 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git tags/efi-2020-07-rc6-2 for you to fetch changes up to b7cae5739741fad1327e64c18a0b30919bc77a0e: test/py: test_efi_fit: Update #size-cells to 1 (2020-06-30 14:35:41 +0200) ---------------------------------------------------------------- Pull request for UEFI sub-system for efi-2020-07-rc6 (2) Fix an incorrect update of the GD register in efi_get_variable_common(). Fix an incorrect check for an FDT reg property. Fix a device tree used for Python testing. ---------------------------------------------------------------- Bin Meng (1): test/py: test_efi_fit: Update #size-cells to 1 Heinrich Schuchardt (2): efi_loader: fix incorrect use of EFI_EXIT() efi_loader: incorrect check against FDT_ADDR_T_NONE cmd/bootefi.c | 2 +- lib/efi_loader/efi_variable.c | 2 +- test/py/tests/test_efi_fit.py | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-)

2 1

[PATCH v2] ARM: dts: stm32: add seeed studio odyssey-stm32mp157c board
by Marcin Sloniewski 01 Jul '20

01 Jul '20

This commit adds device tree files supporting SBC from Seeed Studio based on STM32MP157C. This works with generic stm32mp1 config. Right now only booting from SD card is supported. Signed-off-by: Marcin Sloniewski <marcin.sloniewski(a)gmail.com> --- Changes in v2: - removed `st,adc_usb_pd` from config since that adc connection is non-existent which caused warning or hang during boot arch/arm/dts/Makefile | 3 +- .../dts/odyssey-stm32mp157c-som-u-boot.dtsi | 134 +++++++ arch/arm/dts/odyssey-stm32mp157c-som.dtsi | 364 ++++++++++++++++++ arch/arm/dts/odyssey-stm32mp157c-u-boot.dtsi | 64 +++ arch/arm/dts/odyssey-stm32mp157c.dts | 161 ++++++++ 5 files changed, 725 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/odyssey-stm32mp157c-som-u-boot.dtsi create mode 100644 arch/arm/dts/odyssey-stm32mp157c-som.dtsi create mode 100644 arch/arm/dts/odyssey-stm32mp157c-u-boot.dtsi create mode 100644 arch/arm/dts/odyssey-stm32mp157c.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 9900b44274..dd617c7188 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -918,7 +918,8 @@ dtb-$(CONFIG_STM32MP15x) += \ stm32mp157c-ed1.dtb \ stm32mp157c-ev1.dtb \ stm32mp15xx-dhcom-pdk2.dtb \ - stm32mp15xx-dhcor-avenger96.dtb + stm32mp15xx-dhcor-avenger96.dtb \ + odyssey-stm32mp157c.dtb dtb-$(CONFIG_SOC_K3_AM6) += k3-am654-base-board.dtb k3-am654-r5-base-board.dtb dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \ diff --git a/arch/arm/dts/odyssey-stm32mp157c-som-u-boot.dtsi b/arch/arm/dts/odyssey-stm32mp157c-som-u-boot.dtsi new file mode 100644 index 0000000000..cf08efae09 --- /dev/null +++ b/arch/arm/dts/odyssey-stm32mp157c-som-u-boot.dtsi @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Copyright (C) 2020 Marcin Sloniewski <marcin.sloniewski(a)gmail.com> + */ + +#include <dt-bindings/clock/stm32mp1-clksrc.h> +#include "stm32mp15-u-boot.dtsi" +#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi" + +/ { + config { + u-boot,boot-led = "heartbeat"; + }; +}; + +&clk_hse { + st,digbypass; +}; + +&i2c2 { + u-boot,dm-pre-reloc; +}; + +&i2c2_pins_a { + u-boot,dm-pre-reloc; + pins { + u-boot,dm-pre-reloc; + }; +}; + +&pmic { + u-boot,dm-pre-reloc; +}; + +&rcc { + st,clksrc = < + CLK_MPU_PLL1P + CLK_AXI_PLL2P + CLK_MCU_PLL3P + CLK_PLL12_HSE + CLK_PLL3_HSE + CLK_PLL4_HSE + CLK_RTC_LSE + CLK_MCO1_DISABLED + CLK_MCO2_DISABLED + >; + + st,clkdiv = < + 1 /*MPU*/ + 0 /*AXI*/ + 0 /*MCU*/ + 1 /*APB1*/ + 1 /*APB2*/ + 1 /*APB3*/ + 1 /*APB4*/ + 2 /*APB5*/ + 23 /*RTC*/ + 0 /*MCO1*/ + 0 /*MCO2*/ + >; + + st,pkcs = < + CLK_CKPER_HSE + CLK_FMC_ACLK + CLK_QSPI_ACLK + CLK_ETH_DISABLED + CLK_SDMMC12_PLL4P + CLK_DSI_DSIPLL + CLK_STGEN_HSE + CLK_USBPHY_HSE + CLK_SPI2S1_PLL3Q + CLK_SPI2S23_PLL3Q + CLK_SPI45_HSI + CLK_SPI6_HSI + CLK_I2C46_HSI + CLK_SDMMC3_PLL4P + CLK_USBO_USBPHY + CLK_ADC_CKPER + CLK_CEC_LSE + CLK_I2C12_HSI + CLK_I2C35_HSI + CLK_UART1_HSI + CLK_UART24_HSI + CLK_UART35_HSI + CLK_UART6_HSI + CLK_UART78_HSI + CLK_SPDIF_PLL4P + CLK_FDCAN_PLL4R + CLK_SAI1_PLL3Q + CLK_SAI2_PLL3Q + CLK_SAI3_PLL3Q + CLK_SAI4_PLL3Q + CLK_RNG1_LSI + CLK_RNG2_LSI + CLK_LPTIM1_PCLK1 + CLK_LPTIM23_PCLK3 + CLK_LPTIM45_LSE + >; + + /* VCO = 1300.0 MHz => P = 650 (CPU) */ + pll1: st,pll@0 { + compatible = "st,stm32mp1-pll"; + reg = <0>; + cfg = < 2 80 0 0 0 PQR(1,0,0) >; + frac = < 0x800 >; + u-boot,dm-pre-reloc; + }; + + /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */ + pll2: st,pll@1 { + compatible = "st,stm32mp1-pll"; + reg = <1>; + cfg = < 2 65 1 0 0 PQR(1,1,1) >; + frac = < 0x1400 >; + u-boot,dm-pre-reloc; + }; + + /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ + pll3: st,pll@2 { + compatible = "st,stm32mp1-pll"; + reg = <2>; + cfg = < 1 33 1 16 36 PQR(1,1,1) >; + frac = < 0x1a04 >; + u-boot,dm-pre-reloc; + }; + + /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ + pll4: st,pll@3 { + compatible = "st,stm32mp1-pll"; + reg = <3>; + cfg = < 3 98 5 7 7 PQR(1,1,1) >; + u-boot,dm-pre-reloc; + }; +}; diff --git a/arch/arm/dts/odyssey-stm32mp157c-som.dtsi b/arch/arm/dts/odyssey-stm32mp157c-som.dtsi new file mode 100644 index 0000000000..855de9523c --- /dev/null +++ b/arch/arm/dts/odyssey-stm32mp157c-som.dtsi @@ -0,0 +1,364 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) 2020 Marcin Sloniewski <marcin.sloniewski(a)gmail.com> + */ + +/dts-v1/; + +#include "stm32mp157.dtsi" +#include "stm32mp15xc.dtsi" +#include "stm32mp15-pinctrl.dtsi" +#include "stm32mp15xxac-pinctrl.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/mfd/st,stpmic1.h> + +/ { + + model = "Seeed Studio Odyssey-STM32MP157C SOM"; + compatible = "seeed,odyssey-stm32mp157c-som", "st,stm32mp157"; + + memory@c0000000 { + device_type = "memory"; + reg = <0xc0000000 0x20000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + mcuram2: mcuram2@10000000 { + compatible = "shared-dma-pool"; + reg = <0x10000000 0x40000>; + no-map; + }; + + vdev0vring0: vdev0vring0@10040000 { + compatible = "shared-dma-pool"; + reg = <0x10040000 0x1000>; + no-map; + }; + + vdev0vring1: vdev0vring1@10041000 { + compatible = "shared-dma-pool"; + reg = <0x10041000 0x1000>; + no-map; + }; + + vdev0buffer: vdev0buffer@10042000 { + compatible = "shared-dma-pool"; + reg = <0x10042000 0x4000>; + no-map; + }; + + mcuram: mcuram@30000000 { + compatible = "shared-dma-pool"; + reg = <0x30000000 0x40000>; + no-map; + }; + + retram: retram@38000000 { + compatible = "shared-dma-pool"; + reg = <0x38000000 0x10000>; + no-map; + }; + + gpu_reserved: gpu@d4000000 { + reg = <0xd4000000 0x4000000>; + no-map; + }; + + optee@de000000 { + reg = <0xde000000 0x02000000>; + no-map; + }; + }; + + led { + compatible = "gpio-leds"; + blue { + label = "heartbeat"; + gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + }; + +}; + +&gpu { + contiguous-area = <&gpu_reserved>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c2_pins_a>; + pinctrl-1 = <&i2c2_pins_sleep_a>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + clock-frequency = <400000>; + status = "okay"; + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + pmic: stpmic@33 { + compatible = "st,stpmic1"; + reg = <0x33>; + interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells = <2>; + status = "okay"; + + regulators { + compatible = "st,stpmic1-regulators"; + ldo1-supply = <&v3v3>; + ldo3-supply = <&vdd_ddr>; + ldo6-supply = <&v3v3>; + pwr_sw1-supply = <&bst_out>; + pwr_sw2-supply = <&bst_out>; + + vddcore: buck1 { + regulator-name = "vddcore"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + vdd_ddr: buck2 { + regulator-name = "vdd_ddr"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + vdd: buck3 { + regulator-name = "vdd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + st,mask-reset; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + v3v3: buck4 { + regulator-name = "v3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-over-current-protection; + regulator-initial-mode = <0>; + }; + + v1v8_audio: ldo1 { + regulator-name = "v1v8_audio"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + interrupts = <IT_CURLIM_LDO1 0>; + }; + + v3v3_hdmi: ldo2 { + regulator-name = "v3v3_hdmi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + interrupts = <IT_CURLIM_LDO2 0>; + }; + + vtt_ddr: ldo3 { + regulator-name = "vtt_ddr"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <750000>; + regulator-always-on; + regulator-over-current-protection; + }; + + vdd_usb: ldo4 { + regulator-name = "vdd_usb"; + interrupts = <IT_CURLIM_LDO4 0>; + }; + + vdda: ldo5 { + regulator-name = "vdda"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + interrupts = <IT_CURLIM_LDO5 0>; + regulator-boot-on; + }; + + v1v2_hdmi: ldo6 { + regulator-name = "v1v2_hdmi"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + interrupts = <IT_CURLIM_LDO6 0>; + }; + + vref_ddr: vref_ddr { + regulator-name = "vref_ddr"; + regulator-always-on; + }; + + bst_out: boost { + regulator-name = "bst_out"; + interrupts = <IT_OCP_BOOST 0>; + }; + + vbus_otg: pwr_sw1 { + regulator-name = "vbus_otg"; + interrupts = <IT_OCP_OTG 0>; + }; + + vbus_sw: pwr_sw2 { + regulator-name = "vbus_sw"; + interrupts = <IT_OCP_SWOUT 0>; + regulator-active-discharge = <1>; + }; + }; + + onkey { + compatible = "st,stpmic1-onkey"; + interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>; + interrupt-names = "onkey-falling", "onkey-rising"; + power-off-time-sec = <10>; + status = "okay"; + }; + + watchdog { + compatible = "st,stpmic1-wdt"; + status = "disabled"; + }; + }; +}; + +&ipcc { + status = "okay"; +}; + +&iwdg2 { + timeout-sec = <32>; + status = "okay"; +}; + +&m4_rproc { + memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, + <&vdev0vring1>, <&vdev0buffer>; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; + mbox-names = "vq0", "vq1", "shutdown"; + interrupt-parent = <&exti>; + interrupts = <68 1>; + status = "okay"; +}; + +&sdmmc2 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc2_b4_pins_a>; + pinctrl-1 = <&sdmmc2_b4_od_pins_a>; + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>; + broken-cd; + disable-wp; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&v3v3>; + status = "okay"; +}; + +&timers1 { + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + status = "disabled"; + pwm { + pinctrl-0 = <&pwm1_pins_a>; + pinctrl-1 = <&pwm1_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; + timer@0 { + status = "okay"; + }; +}; + +&timers3 { + /delete-property/dmas; + /delete-property/dma-names; + status = "disabled"; + pwm { + pinctrl-0 = <&pwm3_pins_a>; + pinctrl-1 = <&pwm3_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; + timer@2 { + status = "okay"; + }; +}; + +&timers4 { + /delete-property/dmas; + /delete-property/dma-names; + status = "disabled"; + pwm { + pinctrl-0 = <&pwm4_pins_a &pwm4_pins_b>; + pinctrl-1 = <&pwm4_sleep_pins_a &pwm4_sleep_pins_b>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; + timer@3 { + status = "okay"; + }; +}; + +&timers5 { + /delete-property/dmas; + /delete-property/dma-names; + status = "disabled"; + pwm { + pinctrl-0 = <&pwm5_pins_a>; + pinctrl-1 = <&pwm5_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; + timer@4 { + status = "okay"; + }; +}; + +&timers6 { + /delete-property/dmas; + /delete-property/dma-names; + status = "disabled"; + timer@5 { + status = "okay"; + }; +}; + +&timers12 { + /delete-property/dmas; + /delete-property/dma-names; + status = "disabled"; + pwm { + pinctrl-0 = <&pwm12_pins_a>; + pinctrl-1 = <&pwm12_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; + timer@11 { + status = "okay"; + }; +}; + +&vrefbuf { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + vdda-supply = <&vdd>; + status = "okay"; +}; diff --git a/arch/arm/dts/odyssey-stm32mp157c-u-boot.dtsi b/arch/arm/dts/odyssey-stm32mp157c-u-boot.dtsi new file mode 100644 index 0000000000..12073b3616 --- /dev/null +++ b/arch/arm/dts/odyssey-stm32mp157c-u-boot.dtsi @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Copyright (C) 2020 Marcin Sloniewski <marcin.sloniewski(a)gmail.com> + */ + + #include "odyssey-stm32mp157c-som-u-boot.dtsi" + +/ { + aliases { + mmc0 = &sdmmc1; + usb0 = &usbotg_hs; + }; + config { + u-boot,boot-led = "heartbeat"; + u-boot,error-led = "error"; + }; + led { + red { + label = "error"; + gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; + default-state = "off"; + status = "okay"; + }; + }; +}; + +&adc { + status = "okay"; +}; + +&sdmmc1 { + u-boot,dm-spl; +}; + +&sdmmc1_b4_pins_a { + u-boot,dm-spl; + pins1 { + u-boot,dm-spl; + }; + pins2 { + u-boot,dm-spl; + }; +}; + +&uart4 { + u-boot,dm-pre-reloc; +}; + +&uart4_pins_a { + u-boot,dm-pre-reloc; + pins1 { + u-boot,dm-pre-reloc; + }; + pins2 { + u-boot,dm-pre-reloc; + /* pull-up on rx to avoid floating level */ + bias-pull-up; + }; +}; + +&usbotg_hs { + u-boot,force-b-session-valid; + hnp-srp-disable; +}; diff --git a/arch/arm/dts/odyssey-stm32mp157c.dts b/arch/arm/dts/odyssey-stm32mp157c.dts new file mode 100644 index 0000000000..949081ca84 --- /dev/null +++ b/arch/arm/dts/odyssey-stm32mp157c.dts @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) 2020 Marcin Sloniewski <marcin.sloniewski(a)gmail.com> + */ + +/dts-v1/; + +#include "odyssey-stm32mp157c-som.dtsi" + +/ { + + model = "Seeed Studio Odyssey-STM32MP157C Board"; + compatible = "seeed,odyssey-stm32mp157c", "st,stm32mp157"; + + aliases { + ethernet0 = &ethernet0; + serial0 = &uart4; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + led { + compatible = "gpio-leds"; + blue { + label = "heartbeat"; + gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + }; + +}; + +&adc { + pinctrl-names = "default"; + pinctrl-0 = <&adc12_ain_pins_a>, <&adc12_usb_cc_pins_a>; + vdd-supply = <&vdd>; + vdda-supply = <&vdd>; + vref-supply = <&vrefbuf>; + status = "disabled"; + adc1: adc@0 { + /* + * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19. + * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C: + * 5 * (56 + 47kOhms) * 5pF => 2.5us. + * Use arbitrary margin here (e.g. 5us). + */ + st,min-sample-time-nsecs = <5000>; + /* AIN connector, USB Type-C CC1 & CC2 */ + st,adc-channels = <0 1 6 13 18 19>; + status = "okay"; + }; + adc2: adc@100 { + /* AIN connector, USB Type-C CC1 & CC2 */ + st,adc-channels = <0 1 2 6 18 19>; + st,min-sample-time-nsecs = <5000>; + status = "okay"; + }; +}; + +&cec { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cec_pins_b>; + pinctrl-1 = <&cec_pins_sleep_b>; + status = "okay"; +}; + +&ethernet0 { + status = "okay"; + pinctrl-0 = <&ethernet0_rgmii_pins_a>; + pinctrl-1 = <&ethernet0_rgmii_pins_sleep_a>; + pinctrl-names = "default", "sleep"; + phy-mode = "rgmii-id"; + max-speed = <1000>; + phy-handle = <&phy0>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy0: ethernet-phy@0 { + reg = <0>; + }; + }; +}; + +&gpu { + contiguous-area = <&gpu_reserved>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c1_pins_a>; + pinctrl-1 = <&i2c1_pins_sleep_a>; + i2c-scl-rising-time-ns = <100>; + i2c-scl-falling-time-ns = <7>; + status = "okay"; + /delete-property/dmas; + /delete-property/dma-names; +}; + +&i2s2 { + clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>; + clock-names = "pclk", "i2sclk", "x8k", "x11k"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2s2_pins_a>; + pinctrl-1 = <&i2s2_pins_sleep_a>; + status = "okay"; +}; + +&pwr_regulators { + vdd-supply = <&vdd>; + vdd_3v3_usbfs-supply = <&vdd_usb>; +}; + +&sdmmc1 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; + cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + disable-wp; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&v3v3>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins_a>; + status = "okay"; +}; + +&usbh_ehci { + phys = <&usbphyc_port0>; + status = "okay"; +}; + +&usbotg_hs { + dr_mode = "peripheral"; + phys = <&usbphyc_port1 0>; + phy-names = "usb2-phy"; + status = "okay"; +}; + +&usbphyc { + status = "okay"; +}; + +&usbphyc_port0 { + phy-supply = <&vdd_usb>; +}; + +&usbphyc_port1 { + phy-supply = <&vdd_usb>; +}; + -- 2.26.2

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[PATCH v2 1/1] riscv: use log functions in fdt_fixup
by Heinrich Schuchardt 30 Jun '20

30 Jun '20

Replace printf() and debug() by log_err() and log_debug(). "No reserved memory region found in source FDT\n" is not an error but a debug information. %s/can not/cannot/ - use the more common spelling. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- v2: define the log category as LOGC_ARCH rebase the patch upon "Assorted fixes related to reserved memory" --- arch/riscv/lib/fdt_fixup.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/riscv/lib/fdt_fixup.c b/arch/riscv/lib/fdt_fixup.c index fab93873d5..2780475c5d 100644 --- a/arch/riscv/lib/fdt_fixup.c +++ b/arch/riscv/lib/fdt_fixup.c @@ -4,6 +4,8 @@ * */ +#define LOG_CATEGORY LOGC_ARCH + #include <common.h> #include <fdt_support.h> #include <log.h> @@ -37,7 +39,7 @@ int riscv_fdt_copy_resv_mem_node(const void *src, void *dst) offset = fdt_path_offset(src, "/reserved-memory"); if (offset < 0) { - printf("No reserved memory region found in source FDT\n"); + log_debug("No reserved memory region found in source FDT\n"); return 0; } @@ -48,7 +50,7 @@ int riscv_fdt_copy_resv_mem_node(const void *src, void *dst) "reg", 0, &size, false); if (addr == FDT_ADDR_T_NONE) { - debug("failed to read address/size for %s\n", name); + log_debug("failed to read address/size for %s\n", name); continue; } strncpy(basename, name, max_len); @@ -63,7 +65,7 @@ int riscv_fdt_copy_resv_mem_node(const void *src, void *dst) err = fdtdec_add_reserved_memory(dst, basename, &pmp_mem, &phandle); if (err < 0 && err != -FDT_ERR_EXISTS) { - printf("failed to add reserved memory: %d\n", err); + log_err("failed to add reserved memory: %d\n", err); return err; } if (!fdt_getprop(src, node, "no-map", NULL)) @@ -109,7 +111,7 @@ int board_fix_fdt(void *fdt) err = riscv_board_reserved_mem_fixup(fdt); if (err < 0) { - printf("failed to fixup DT for reserved memory: %d\n", err); + log_err("failed to fixup DT for reserved memory: %d\n", err); return err; } @@ -127,14 +129,14 @@ int arch_fixup_fdt(void *blob) size = fdt_totalsize(blob); err = fdt_open_into(blob, blob, size + 32); if (err < 0) { - printf("Device Tree can't be expanded to accommodate new node"); + log_err("Device Tree can't be expanded to accommodate new node"); return err; } chosen_offset = fdt_path_offset(blob, "/chosen"); if (chosen_offset < 0) { err = fdt_add_subnode(blob, 0, "chosen"); if (err < 0) { - printf("chosen node can not be added\n"); + log_err("chosen node cannot be added\n"); return err; } } -- 2.27.0

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[PATCH 1/4] am335x: Update list of defconfigs
by Tom Rini 30 Jun '20

30 Jun '20

Both the am335x_boneblack and am335x_evm_usbspl configs have been gone for a while, remove their entries from MAINTAINERS. Signed-off-by: Tom Rini <trini(a)konsulko.com> --- board/ti/am335x/MAINTAINERS | 2 -- 1 file changed, 2 deletions(-) diff --git a/board/ti/am335x/MAINTAINERS b/board/ti/am335x/MAINTAINERS index 565f7055cdd3..e100adfd68ec 100644 --- a/board/ti/am335x/MAINTAINERS +++ b/board/ti/am335x/MAINTAINERS @@ -3,7 +3,5 @@ M: Tom Rini <trini(a)konsulko.com> S: Maintained F: board/ti/am335x/ F: include/configs/am335x_evm.h -F: configs/am335x_boneblack_defconfig F: configs/am335x_boneblack_vboot_defconfig F: configs/am335x_evm_defconfig -F: configs/am335x_evm_usbspl_defconfig -- 2.17.1

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[PULL] u-boot-mips
by Daniel Schwierzeck 30 Jun '20

30 Jun '20

Hi Tom, actually I wanted to send this much earlier but I hope it's still okay. This enables Qemu tests for the MIPS Malta board in all variants (32/64 bit, big/little endian) in Gitlab CI, Travis CI and Azure Pipelines. This allows to deprecate the qemu_mips board in the future because there is no Linux support anymore for ages and Qemu deprecated the generic MIPS board as well in favour of Malta. I had to include the PCNET patches because otherwise the Malta 64bit targets had stability issues in the Qemu network test case. Thus it's not just cleanup and DM conversion, but also bugfixing ;) https://gitlab.denx.de/u-boot/custodians/u-boot-mips/pipelines/3824 https://travis-ci.org/github/danielschwierzeck/u-boot/builds/703302746 https://dev.azure.com/danielschwierzeck/u-boot/_build/results?buildId=8&vie… The following changes since commit 0b7d95531cf25a7c71bd9855135da5e7098e7b97: Merge tag 'rockchip-fix' of https://gitlab.denx.de/u-boot/custodians/u-boot-video (2020-06-29 15:58:09 -0400) are available in the Git repository at: git@gitlab.denx.de:u-boot/custodians/u-boot-mips.git tags/mips-pull-2020-06-29 for you to fetch changes up to e35c2a8fdd41a34c06c409ce700c5d5591429367: .azure-pipelines.yml: add Qemu tests for MIPS Malta board (2020-06-29 22:40:16 +0200) ---------------------------------------------------------------- - net: pcnet: cleanup and add DM support - Makefile: add rule to build an endian-swapped U-Boot image used by MIPS Malta EL variants - CI: add Qemu tests for MIPS Malta ---------------------------------------------------------------- Daniel Schwierzeck (6): tools: add script for byte endianness swapping Makefile: add rule to generate u-boot-swap.bin mips: malta: build u-boot-swap.bin .gitlab-ci.yml: add Qemu tests for MIPS Malta board .travis.yml: add Qemu tests for MIPS Malta board .azure-pipelines.yml: add Qemu tests for MIPS Malta board Marek Vasut (15): net: pcnet: Drop typedef struct pcnet_priv_t net: pcnet: Drop PCNET_HAS_PROM net: pcnet: Use PCI_DEVICE() to define PCI device compat list net: pcnet: Simplify private data allocation net: pcnet: Replace memset+malloc with calloc net: pcnet: Move private data allocation to initialize net: pcnet: Move initialize function at the end net: pcnet: Drop useless forward declarations net: pcnet: Wrap devbusfn into private data net: pcnet: Pass private data through dev->priv net: pcnet: Wrap iobase into private data net: pcnet: Wrap name and enetaddr into private data net: pcnet: Split common and non-DM functions net: pcnet: Add DM support net: pcnet: Add Kconfig entries .azure-pipelines.yml | 16 ++ .gitlab-ci.yml | 32 +++ .travis.yml | 28 ++ Makefile | 6 + configs/malta64_defconfig | 1 + configs/malta64el_defconfig | 2 + configs/malta_defconfig | 1 + configs/maltael_defconfig | 2 + drivers/net/Kconfig | 6 + drivers/net/pcnet.c | 618 +++++++++++++++++++++++++++----------------- include/configs/malta.h | 2 - tools/endian-swap.py | 55 ++++ 12 files changed, 525 insertions(+), 244 deletions(-) create mode 100755 tools/endian-swap.py

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[RFC PATCH v2 0/5] Improve USB Keyboard support for rpi3/rpi4
by Jason Wessel 30 Jun '20

30 Jun '20

v2: - Minor cleanups to patches 1-3 based on prior review - Patch 4 & 5 are new to fix various xhchi crashes while having additional devices plugged in along with booting off the usb port. The nonblocking mode turned out to be somewhat complex. v1: For testing this patch series, I did apply the USB patches for the rpi4 board which had not been merged yet. Once the rpi4 USB changes are eventually merged the keyboard delay issues will show up and I imagine this issue is already a problem for other boards. This series does not depend on rpi4 patches as the changes are in the core USB functions. I am not entirely certain about the change to the common/usb.c which is why this is an RFC. I am not sure if there would be other side effects to other USB drivers. I did test with a number of usb modules attached including storage, ethernet, serial, wifi, keyboard, and mouse without any issues. ---------------------------------------------------------------- Jason Wessel (5): xhci: Add polling support for USB keyboards usb_kbd: Do not fail the keyboard if it does not have an interrupt pending common/usb.c: Work around keyboard reporting "USB device not accepting new address" xhci-ring.c: Add the poll_pend state to properly abort transactions xhci-ring: Fix crash when issuing "usb reset" common/usb.c | 9 +++--- common/usb_kbd.c | 4 ++- drivers/usb/host/xhci-ring.c | 123 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------------ drivers/usb/host/xhci.c | 11 ++++---- include/usb/xhci.h | 5 ++-- 5 files changed, 113 insertions(+), 39 deletions(-)

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[PATCH] rockchip: rk3399: allow deselecting SPL_ATF_NO_PLATFORM_PARAM
by Hugh Cole-Baker 30 Jun '20

30 Jun '20

SPL_ATF_NO_PLATFORM_PARAM is selected by default for RK3399 configs, to guard against issues when used with TF-A versions that perform insufficient validation on the platform parameter. However, since commit 8109f738ffa7 "rockchip: increase FDT buffer size" in TF-A, passing a device tree as platform parameter no longer causes problems for upstream TF-A for RK3399. Since SPL_ATF_NO_PLATFORM_PARAM doesn't need to be selected when using upstream TF-A, change the Kconfig option from select to imply. It'll still default to being selected but can be deselected by a user if they know they will be using a compatible version of TF-A. Signed-off-by: Hugh Cole-Baker <sigmaris(a)gmail.com> --- For some background, see this thread on the TF-A list [1]. Since the corresponding required change isn't in a tagged version of TF-A yet, and I don't know how many RK3399 boards are normally used with older TF-A versions which required this option, I think it's safest to keep the default as not sending a platform param to TF-A. Once the next TF-A version is released, SPL_ATF_NO_PLATFORM_PARAM could be turned off in defconfigs for boards that use the latest upstream TF-A. [1]: https://lists.trustedfirmware.org/pipermail/tf-a/2020-June/000502.html arch/arm/mach-rockchip/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 0cb1f23d0f3..e2b63265846 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -207,7 +207,6 @@ config ROCKCHIP_RK3399 select SUPPORT_TPL select SPL select SPL_ATF - select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF select SPL_BOARD_INIT if SPL select SPL_LOAD_FIT select SPL_CLK if SPL @@ -232,6 +231,7 @@ config ROCKCHIP_RK3399 imply PRE_CONSOLE_BUFFER imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_SDRAM_COMMON + imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF imply SPL_ROCKCHIP_COMMON_BOARD imply TPL_SERIAL_SUPPORT imply TPL_LIBCOMMON_SUPPORT -- 2.17.2 (Apple Git-113)

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[PATCH] rockchip: Add delay after link-training
by Kurt Miller 30 Jun '20

30 Jun '20

On at least the RockPro64, many cards will trip a synchronous abort when first accessing PCIe config space during bus scanning. A delay after link training allows some of these cards to function. Signed-off-by: Kurt Miller <kurt(a)intricatesoftware.com> --- On the RockPro64, some pci cards trip a synchronous abort when scanning the pci bus. For example with HighPoint Rocket Raid 640L which is based on Marvell 88SE9230 I see this: => pci "Synchronous Abort" handler, esr 0x96000210 elr: 000000000022d034 lr : 000000000022cfd0 (reloc) elr: 00000000f4568034 lr : 00000000f4567fd0 x0 : 0000000000100000 x1 : 00000000f8000000 x2 : 0000000000000000 x3 : 0000000000100000 x4 : 00000000f2559290 x5 : 0000000000000000 x6 : 0000000000000001 x7 : 00000000f2559860 x8 : 0000000000000030 x9 : 0000000000000008 x10: 0000000000000010 x11: 00000000f251fd1c x12: 0000000000001421 x13: 0000000000001468 x14: 00000000f251fd4c x15: 00000000ffffffff x16: 0000000000060001 x17: 000000000000001f x18: 00000000f2532dc0 x19: 00000000f251fcd0 x20: 0000000000000001 x21: 0000000000000000 x22: 0000000000010000 x23: 00000000f45d4000 x24: 0000000000000000 x25: 00000000f45bc000 x26: 0000000000000000 x27: 0000000000000000 x28: 00000000f2541440 x29: 00000000f251fc20 Code: 540000c1 350000a5 93407c00 f9400081 (b8616800) Resetting CPU ... Adding a delay after link training works-around the problem. I added this delay to the OpenBSD rkpcie driver as well: https://github.com/openbsd/src/commit/9857dee3520d8ca5bec68538f4b0708d7e64f… HighPoint Rocket Raid 640L needs a 1.75 sec delay and Crossfield SAS9211-4i needs a 1 second delay, so I arbitrarily decided on 2 seconds. The delay work-around was originally discovered by nuumio: https://github.com/nuumio/linux-kernel/commit/5a65b17686002dc84d461bffa324a… drivers/pci/pcie_rockchip.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/pci/pcie_rockchip.c b/drivers/pci/pcie_rockchip.c index 0edc2464a8..51cfbf6b18 100644 --- a/drivers/pci/pcie_rockchip.c +++ b/drivers/pci/pcie_rockchip.c @@ -288,6 +288,14 @@ static int rockchip_pcie_init_port(struct udevice *dev) goto err_power_off_phy; } + /* + * XXX: On at least the RockPro64, many cards will trip a + * synchronous abort when first accessing PCIe config space + * during bus scanning. A delay after link training allows + * some of these cards to function. + */ + mdelay(2000); + /* Initialize Root Complex registers. */ writel(PCIE_LM_VENDOR_ROCKCHIP, priv->apb_base + PCIE_LM_VENDOR_ID); writel(PCI_CLASS_BRIDGE_PCI << 16, -- 2.26.2

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[U-Boot] [PATCH v1 00/10] arm: pxa: mmc: add driver model support
by Marcel Ziswiler 30 Jun '20

30 Jun '20

This series, after some initial clean-up, ultimately adds support for the driver model (DM) in the PXA MMC driver. Marcel Ziswiler (10): mmc: add missing space before comment delimiter mmc: fsl_esdhc: annotate endifs serial: pxa: clean-up platform data include file Makefile: allow dm_mmc without of_control dm: core: gracefully handle alias seq without of kconfig: mmc: move pxa_mmc_generic to kconfig arm: pxa: mmc: add driver model support colibri_pxa270_defconfig: enable cmd_dm colibri_pxa270: add mmc platform data colibri_pxa270_defconfig: enable dm_mmc Makefile | 2 +- board/toradex/colibri_pxa270/colibri_pxa270.c | 20 ++- configs/colibri_pxa270_defconfig | 3 + configs/zipitz2_defconfig | 1 + drivers/core/read.c | 4 +- drivers/mmc/Kconfig | 8 + drivers/mmc/fsl_esdhc.c | 4 +- drivers/mmc/mmc.c | 2 +- drivers/mmc/pxa_mmc_gen.c | 160 +++++++++++++++--- include/configs/pxa-common.h | 7 - include/configs/zipitz2.h | 8 - include/dm/platform_data/pxa_mmc_gen.h | 22 +++ include/dm/platform_data/serial_pxa.h | 8 +- include/dm/read.h | 4 + scripts/config_whitelist.txt | 1 - 15 files changed, 196 insertions(+), 58 deletions(-) create mode 100644 include/dm/platform_data/pxa_mmc_gen.h -- 2.21.0

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