April 2020 - U-Boot

[PATCH v2 0/4] ARM: zynq: Switch to CFI DM driver
by Michal Simek 06 Apr '20

06 Apr '20

Hi, this series is switching Zynq to DM based cfi driver. On regular u-boot this is described via SMCC but for cse it is enough to place just node to DT. Thanks, Michal Changes in v2: - Add missing zynq cse nor conversion Michal Simek (4): nand: raw: Do not free xnand structure nand: raw: zynq: Do not try to probe driver if nand flash is disabled ARM: zynq: Do not report NOR flash detection failure ARM: zynq: Enable DM for CFI NOR flash arch/arm/dts/zynq-cse-nor.dts | 14 ++++++++++++++ configs/xilinx_zynq_virt_defconfig | 1 + configs/zynq_cse_nor_defconfig | 3 +++ drivers/mtd/nand/raw/zynq_nand.c | 25 ++++++++++++++----------- include/configs/zynq-common.h | 3 +-- 5 files changed, 33 insertions(+), 13 deletions(-) -- 2.25.1

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[PATCH] ARM: zynq: Do not include full zynq-7000.dtsi to cse-nor configuration
by Michal Simek 06 Apr '20

06 Apr '20

There is no real need to include full DT when only some nodes are enough to use. It will save some space. Retested with FSBL for initial SoC setup. SPL didn't work. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/arm/dts/zynq-cse-nor.dts | 13 +++---------- 1 file changed, 3 insertions(+), 10 deletions(-) diff --git a/arch/arm/dts/zynq-cse-nor.dts b/arch/arm/dts/zynq-cse-nor.dts index 9710abadcf02..4030851eb36d 100644 --- a/arch/arm/dts/zynq-cse-nor.dts +++ b/arch/arm/dts/zynq-cse-nor.dts @@ -5,7 +5,6 @@ * Copyright (C) 2018 Xilinx, Inc. */ /dts-v1/; -#include "zynq-7000.dtsi" / { #address-cells = <1>; @@ -33,27 +32,21 @@ }; amba: amba { + u-boot,dm-pre-reloc; compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - interrupt-parent = <&intc>; ranges; - intc: interrupt-controller@f8f01000 { - compatible = "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0xF8F01000 0x1000>, - <0xF8F00100 0x100>; - }; - slcr: slcr@f8000000 { + u-boot,dm-pre-reloc; #address-cells = <1>; #size-cells = <1>; compatible = "xlnx,zynq-slcr", "syscon", "simple-bus"; reg = <0xF8000000 0x1000>; ranges; clkc: clkc@100 { + u-boot,dm-pre-reloc; #clock-cells = <1>; compatible = "xlnx,ps7-clkc"; clock-output-names = "armpll", "ddrpll", -- 2.25.1

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[PATCH] net: zynq_gem: Add cache flush to zynq_gem_free_pkt
by Michal Simek 06 Apr '20

06 Apr '20

From: Ashok Reddy Soma <ashok.reddy.soma(a)xilinx.com> Add cache flush to zynq_gem_free_pkt. This is necessary because some net routines would modify this buffer in place. The cache_invalidate in the zynq_gem_recv function would cause the modifications to the buffer to overwrite the DMA from the GEM, if cache coherency is not enabled in the GEM, the next time the buffer is in use. Flushing the cache when the buffer is no longer in use by the net functions ensures that the GEM DMA is going to take place into a clean buffer. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- drivers/net/zynq_gem.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 5f2f87d352c4..cfd14665a70d 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -578,6 +578,7 @@ static int zynq_gem_free_pkt(struct udevice *dev, uchar *packet, int length) struct zynq_gem_priv *priv = dev_get_priv(dev); struct emac_bd *current_bd = &priv->rx_bd[priv->rxbd_current]; struct emac_bd *first_bd; + dma_addr_t addr; if (current_bd->status & ZYNQ_GEM_RXBUF_SOF_MASK) { priv->rx_first_buf = priv->rxbd_current; @@ -592,6 +593,17 @@ static int zynq_gem_free_pkt(struct udevice *dev, uchar *packet, int length) first_bd->status = 0xF0000000; } + /* Flush the cache for the packet as well */ +#if defined(CONFIG_PHYS_64BIT) + addr = (dma_addr_t)((current_bd->addr & ZYNQ_GEM_RXBUF_ADD_MASK) + | ((dma_addr_t)current_bd->addr_hi << 32)); +#else + addr = current_bd->addr & ZYNQ_GEM_RXBUF_ADD_MASK; +#endif + flush_dcache_range(addr, addr + roundup(PKTSIZE_ALIGN, + ARCH_DMA_MINALIGN)); + barrier(); + if ((++priv->rxbd_current) >= RX_BUF) priv->rxbd_current = 0; -- 2.25.1

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[PATCH v2 0/2] ARM: zynq: Start to use unified configurations
by Michal Simek 06 Apr '20

06 Apr '20

Hi, over the time there are a lot of zynq configurations which are almost the same. It just increasing amount of time for building/testing/maintaining that's why this patch starts to use xilinx_zynq_virt_defconfig which is all in one configurations which can be used on all zynq board. The series contains two patches. The first which setup device tree name for SPL FIT image selection. The second which removes all xilinx/avnet/myirtech configurations with extending defconfig and OF_LIST which ensures that u-boot.img contains DTS files for all these boards. Thanks, Michal Changes in v2: - Add tags from Tom and Simon - Fix azure/gitlab/travis builds - azure untested - hooks updated by https://github.com/swarren/uboot-test-hooks/pull/29 - Update documentation Michal Simek (2): Makefile: Add environment variable DEVICE_TREE to header ARM: zynq: Switch to single zynq configurations .azure-pipelines.yml | 6 +- .gitlab-ci.yml | 6 +- .travis.yml | 6 +- Makefile | 14 ++++- arch/arm/mach-zynq/spl.c | 8 ++- configs/xilinx_zynq_virt_defconfig | 19 +++++- configs/zynq_cc108_defconfig | 61 ------------------ configs/zynq_dlc20_rev1_0_defconfig | 76 ---------------------- configs/zynq_microzed_defconfig | 66 ------------------- configs/zynq_minized_defconfig | 67 -------------------- configs/zynq_picozed_defconfig | 54 ---------------- configs/zynq_z_turn_defconfig | 67 -------------------- configs/zynq_zc702_defconfig | 83 ------------------------ configs/zynq_zc706_defconfig | 87 -------------------------- configs/zynq_zc770_xm010_defconfig | 61 ------------------ configs/zynq_zc770_xm011_defconfig | 48 -------------- configs/zynq_zc770_xm011_x16_defconfig | 48 -------------- configs/zynq_zc770_xm012_defconfig | 50 --------------- configs/zynq_zc770_xm013_defconfig | 53 ---------------- configs/zynq_zed_defconfig | 70 --------------------- configs/zynq_zybo_defconfig | 69 -------------------- configs/zynq_zybo_z7_defconfig | 66 ------------------- doc/board/xilinx/zynq.rst | 3 +- 23 files changed, 48 insertions(+), 1040 deletions(-) delete mode 100644 configs/zynq_cc108_defconfig delete mode 100644 configs/zynq_dlc20_rev1_0_defconfig delete mode 100644 configs/zynq_microzed_defconfig delete mode 100644 configs/zynq_minized_defconfig delete mode 100644 configs/zynq_picozed_defconfig delete mode 100644 configs/zynq_z_turn_defconfig delete mode 100644 configs/zynq_zc702_defconfig delete mode 100644 configs/zynq_zc706_defconfig delete mode 100644 configs/zynq_zc770_xm010_defconfig delete mode 100644 configs/zynq_zc770_xm011_defconfig delete mode 100644 configs/zynq_zc770_xm011_x16_defconfig delete mode 100644 configs/zynq_zc770_xm012_defconfig delete mode 100644 configs/zynq_zc770_xm013_defconfig delete mode 100644 configs/zynq_zed_defconfig delete mode 100644 configs/zynq_zybo_defconfig delete mode 100644 configs/zynq_zybo_z7_defconfig -- 2.25.1

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[PATCH] ARM: zynq: Change zc770 xm011 Nand x16 configurations
by Michal Simek 06 Apr '20

06 Apr '20

Instead of symlink include origin file and just change model description. Difference is not in DT but in ps7_init configurations which is taken based on device tree name that's why the same DT can't be used. Also update model and update comments to match configurations. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/arm/dts/zynq-zc770-xm011-x16.dts | 12 +++++++++++- arch/arm/dts/zynq-zc770-xm011.dts | 2 +- 2 files changed, 12 insertions(+), 2 deletions(-) mode change 120000 => 100644 arch/arm/dts/zynq-zc770-xm011-x16.dts diff --git a/arch/arm/dts/zynq-zc770-xm011-x16.dts b/arch/arm/dts/zynq-zc770-xm011-x16.dts deleted file mode 120000 index 5bd6af39a437..000000000000 --- a/arch/arm/dts/zynq-zc770-xm011-x16.dts +++ /dev/null @@ -1 +0,0 @@ -zynq-zc770-xm011.dts \ No newline at end of file diff --git a/arch/arm/dts/zynq-zc770-xm011-x16.dts b/arch/arm/dts/zynq-zc770-xm011-x16.dts new file mode 100644 index 000000000000..6ff8393d7ebe --- /dev/null +++ b/arch/arm/dts/zynq-zc770-xm011-x16.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx ZC770 XM011 board DTS with NAND x16 + * + * Copyright (C) 2013-2018 Xilinx, Inc. + */ +#include "zynq-zc770-xm011.dts" + +/ { + model = "Xilinx ZC770 XM011 board (NAND x16)"; +}; diff --git a/arch/arm/dts/zynq-zc770-xm011.dts b/arch/arm/dts/zynq-zc770-xm011.dts index 61482017d65c..b6e3e255d731 100644 --- a/arch/arm/dts/zynq-zc770-xm011.dts +++ b/arch/arm/dts/zynq-zc770-xm011.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Xilinx ZC770 XM013 board DTS + * Xilinx ZC770 XM011 board DTS * * Copyright (C) 2013-2018 Xilinx, Inc. */ -- 2.25.0

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[PATCH] env: Kconfig: Adding default values for Microblaze
by Michal Simek 06 Apr '20

06 Apr '20

From: Varalaxmi Bingi <varalaxmi.bingi(a)xilinx.com> This patch will add default values for ENV_OFFSET and ENV_SECT_SIZE for Microblaze. Signed-off-by: Varalaxmi Bingi <varalaxmi.bingi(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- env/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/env/Kconfig b/env/Kconfig index 0d6f559b39d3..2d972a5d4f34 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -500,6 +500,7 @@ config ENV_OFFSET default 0 if ARC default 0x140000 if ARCH_AT91 default 0x260000 if ARCH_OMAP2PLUS + default 0x1080000 if MICROBLAZE && ENV_IS_IN_SPI_FLASH help Offset from the start of the device (or partition) @@ -529,6 +530,7 @@ config ENV_SECT_SIZE default 0x2000 if ARCH_ROCKCHIP default 0x40000 if ARCH_ZYNQMP || ARCH_VERSAL default 0x20000 if ARCH_ZYNQ || ARCH_OMAP2PLUS || ARCH_AT91 + default 0x20000 if MICROBLAZE && ENV_IS_IN_SPI_FLASH help Size of the sector containing the environment. -- 2.25.0

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[PATCH] ARM: zynq: Fix addresses in partition definitions
by Michal Simek 06 Apr '20

06 Apr '20

Node name should be <name>@<address> which is not how partitions are described. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/arm/dts/zynq-cse-qspi.dtsi | 10 +++++----- arch/arm/dts/zynq-topic-miami.dts | 10 +++++----- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm/dts/zynq-cse-qspi.dtsi b/arch/arm/dts/zynq-cse-qspi.dtsi index 65af4081ff4f..eb0e29e6cb6e 100644 --- a/arch/arm/dts/zynq-cse-qspi.dtsi +++ b/arch/arm/dts/zynq-cse-qspi.dtsi @@ -67,23 +67,23 @@ spi-max-frequency = <50000000>; #address-cells = <1>; #size-cells = <1>; - partition@qspi-fsbl-uboot { + partition@0 { label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { + partition@100000 { label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { + partition@600000 { label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { + partition@620000 { label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; - partition@qspi-bitstream { + partition@c00000 { label = "qspi-bitstream"; reg = <0xC00000 0x400000>; }; diff --git a/arch/arm/dts/zynq-topic-miami.dts b/arch/arm/dts/zynq-topic-miami.dts index f6f10fe1a15d..ab6bde95fed9 100644 --- a/arch/arm/dts/zynq-topic-miami.dts +++ b/arch/arm/dts/zynq-topic-miami.dts @@ -44,23 +44,23 @@ spi-max-frequency = <100000000>; #address-cells = <1>; #size-cells = <1>; - partition@qspi-u-boot-spl { + partition@0 { label = "qspi-u-boot-spl"; reg = <0x00000 0x10000>; }; - partition@qspi-u-boot-img { + partition@10000 { label = "qspi-u-boot-img"; reg = <0x10000 0x60000>; }; - partition@qspi-device-tree { + partition@70000 { label = "qspi-device-tree"; reg = <0x70000 0x10000>; }; - partition@qspi-linux { + partition@80000 { label = "qspi-linux"; reg = <0x80000 0x400000>; }; - partition@qspi-rootfs { + partition@480000 { label = "qspi-rootfs"; reg = <0x480000 0x1b80000>; }; -- 2.25.0

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[PATCH 00/16] xilinx: DT sync up
by Michal Simek 06 Apr '20

06 Apr '20

Hi, I am sending these patches based on Xilinx SoC vendor tree. There are also fixes found based on Linux yaml parser. Patches with link to Linux mainline patches should be marked properly. Thanks, Michal Amit Kumar Mahapatra (1): arm64: zynqmp: Do not duplicate flash partition label property Ashok Reddy Soma (1): arm64: dts: zynqmp: Add clk cells for sdhci Manish Narani (1): arm64: zynqmp: Add 'no-1-8-v' property for ZynqMP Boards Michal Simek (10): arm64: zynqmp: Replace gpio-key,wakeup with wakeup source arm64: zynqmp: Update Copyright years to 2020 ARM: zynq: Fix spi name node arm64: zynqmp: Remove unused zynqmp-clk.dtsi arm64: zynqmp: Remove second copy of reset-controller arm64: zynqmp: Sync DP subsystem arm64: zynqmp: Fix addresses in partition definitions arm64: zynqmp: Fix GIC compatible property arm64: zynqmp: Change bus naming to axi arm64: zynqmp: Move pinctrl node under firmware node Nava kishore Manne (1): arm64: zynqmp: Sync zynqmp fpga manager with mainline Quanyang Wang (1): ARM: dts: zc702: Fix I2C bus warnings Sudeep Holla (1): ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source property arch/arm/dts/avnet-ultra96-rev1.dts | 2 +- arch/arm/dts/zynq-zc702.dts | 12 +- arch/arm/dts/zynq-zc770-xm010.dts | 2 +- arch/arm/dts/zynq-zc770-xm013.dts | 2 +- arch/arm/dts/zynq-zturn.dts | 2 +- arch/arm/dts/zynqmp-clk-ccf.dtsi | 12 +- arch/arm/dts/zynqmp-clk.dtsi | 244 ----------------------- arch/arm/dts/zynqmp-mini-qspi.dts | 2 +- arch/arm/dts/zynqmp-zc1232-revA.dts | 10 +- arch/arm/dts/zynqmp-zc1254-revA.dts | 10 +- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 34 ++-- arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 6 +- arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts | 2 +- arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 12 +- arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 2 +- arch/arm/dts/zynqmp-zcu100-revC.dts | 2 +- arch/arm/dts/zynqmp-zcu102-rev1.0.dts | 6 +- arch/arm/dts/zynqmp-zcu102-revA.dts | 36 ++-- arch/arm/dts/zynqmp-zcu102-revB.dts | 2 +- arch/arm/dts/zynqmp-zcu104-revA.dts | 10 +- arch/arm/dts/zynqmp-zcu104-revC.dts | 10 +- arch/arm/dts/zynqmp-zcu106-revA.dts | 14 +- arch/arm/dts/zynqmp-zcu111-revA.dts | 14 +- arch/arm/dts/zynqmp-zcu1275-revA.dts | 10 +- arch/arm/dts/zynqmp-zcu1275-revB.dts | 10 +- arch/arm/dts/zynqmp-zcu1285-revA.dts | 6 +- arch/arm/dts/zynqmp-zcu208-revA.dts | 8 +- arch/arm/dts/zynqmp-zcu216-revA.dts | 8 +- arch/arm/dts/zynqmp.dtsi | 176 +++++++--------- 29 files changed, 206 insertions(+), 460 deletions(-) delete mode 100644 arch/arm/dts/zynqmp-clk.dtsi -- 2.25.0

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[PATCH] arm64: zynqmp: Enable cache command for mini mtest configuration
by Michal Simek 06 Apr '20

06 Apr '20

Enable cache commands by default for mtest configuration. It is good to be able to enable/disable caches when you test memory. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- configs/xilinx_zynqmp_mini_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index d953c91a66ed..2d9a3b3a5f3a 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -40,6 +40,7 @@ CONFIG_SYS_ALT_MEMTEST=y # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y # CONFIG_CMD_MISC is not set # CONFIG_PARTITIONS is not set CONFIG_OF_EMBED=y -- 2.25.0

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[PATCH] configs: versal: Add CONFIG_DISTRO_DEFAULTS to versal defconfig
by Michal Simek 06 Apr '20

06 Apr '20

From: T Karthik Reddy <t.karthik.reddy(a)xilinx.com> Add DISTRO_DEFAULTS config to versal virt defconfig file which is suitable for booting general purpose Linux distributions. Remove other configs which are selected by default by DISTRO_DEFAULTS configuration. Signed-off-by: T Karthik Reddy <t.karthik.reddy(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- configs/xilinx_versal_virt_defconfig | 16 +--------------- 1 file changed, 1 insertion(+), 15 deletions(-) diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index ea6244ba1dfd..df29995edcd0 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -4,15 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x100000 CONFIG_DM_GPIO=y CONFIG_COUNTER_FREQUENCY=62500000 -CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOOTDELAY=5 -CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Versal> " CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MEMTEST=y @@ -25,22 +23,11 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y -CONFIG_CMD_DHCP=y CONFIG_CMD_TFTPPUT=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_PXE=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_ISO_PARTITION=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set CONFIG_OF_BOARD=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y @@ -88,7 +75,6 @@ CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y -CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Xilinx" CONFIG_USB_GADGET_VENDOR_NUM=0x03FD -- 2.25.0

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