February 2020 - U-Boot

[PATCH] board: lx2160aqds: Add board fixup for PCIe nodes.
by Vikas Singh 10 Feb '20

10 Feb '20

Update "board_fix_fdt" with correct counter value "i". This will fix the issue while fetching the "reg_names" resource from fdt after fixup. Signed-off-by: Vikas Singh <vikas.singh(a)nxp.com> --- board/freescale/lx2160a/lx2160a.c | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 4509a34..5c23554 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -169,6 +169,7 @@ int board_fix_fdt(void *fdt) reg_name = reg_names; remaining_names_len = names_len - (reg_name - reg_names); + i = 0; while ((i < ARRAY_SIZE(reg_names_map)) && remaining_names_len) { old_name_len = strlen(reg_names_map[i].old_str); new_name_len = strlen(reg_names_map[i].new_str); -- 2.7.4

1 0

[PATCH] omap: move GPIO_TO_PIN macro to asm/arch-am33xx/gpio
by Dario Binacchi 10 Feb '20

10 Feb '20

It's a generic macro like the others found in gpio.h which can now also be used in other modules besides the one in which it was previously defined. Signed-off-by: Dario Binacchi <dariobin(a)libero.it> --- arch/arm/include/asm/arch-am33xx/gpio.h | 3 +++ board/ti/am335x/board.c | 1 - 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-am33xx/gpio.h b/arch/arm/include/asm/arch-am33xx/gpio.h index 24dc4bb1d0..8146f28d36 100644 --- a/arch/arm/include/asm/arch-am33xx/gpio.h +++ b/arch/arm/include/asm/arch-am33xx/gpio.h @@ -27,4 +27,7 @@ /* GPIO SETDATAOUT register */ #define GPIO_SETDATAOUT(x) (1 << x) + +#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio)) + #endif /* _GPIO_AM33xx_H */ diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 3d7f73843c..ec4e43296d 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -43,7 +43,6 @@ DECLARE_GLOBAL_DATA_PTR; /* GPIO that controls power to DDR on EVM-SK */ -#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio)) #define GPIO_DDR_VTT_EN GPIO_TO_PIN(0, 7) #define ICE_GPIO_DDR_VTT_EN GPIO_TO_PIN(0, 18) #define GPIO_PR1_MII_CTRL GPIO_TO_PIN(3, 4) -- 2.24.0

2 1

[PATCH 1/2] board: solidrun lx2160a-cex7: new board
by Baruch Siach 10 Feb '20

10 Feb '20

Add board level support code for the SolidRun LX2160A based COM-Express 7 system. Signed-off-by: Baruch Siach <baruch(a)tkos.co.il> --- arch/arm/Kconfig | 13 + arch/arm/cpu/armv8/Kconfig | 2 +- board/solidrun/lx2160acex7/Kconfig | 15 ++ board/solidrun/lx2160acex7/MAINTAINERS | 7 + board/solidrun/lx2160acex7/Makefile | 7 + board/solidrun/lx2160acex7/README | 43 ++++ board/solidrun/lx2160acex7/lx2160acex7.c | 287 +++++++++++++++++++++++ configs/lx2160acex7_tfa_defconfig | 59 +++++ include/configs/lx2160acex7.h | 47 ++++ 9 files changed, 479 insertions(+), 1 deletion(-) create mode 100644 board/solidrun/lx2160acex7/Kconfig create mode 100644 board/solidrun/lx2160acex7/MAINTAINERS create mode 100644 board/solidrun/lx2160acex7/Makefile create mode 100644 board/solidrun/lx2160acex7/README create mode 100644 board/solidrun/lx2160acex7/lx2160acex7.c create mode 100644 configs/lx2160acex7_tfa_defconfig create mode 100644 include/configs/lx2160acex7.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f96841c77717..008af453987f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1201,6 +1201,18 @@ config TARGET_LX2160ARDB is a high-performance development platform that supports the QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. +config TARGET_LX2160ACEX7 + bool "Support lx2160acex7" + select ARCH_LX2160A + select ARM64 + select ARMV8_MULTIENTRY + select ARCH_SUPPORT_TFABOOT + select BOARD_LATE_INIT + help + Support for SolidRun LX2160A based com express type 7 module and + platform. The lx2160acex7 high-performance platform that supports the + QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. + config TARGET_LX2160AQDS bool "Support lx2160aqds" select ARCH_LX2160A @@ -1821,6 +1833,7 @@ source "board/hisilicon/poplar/Kconfig" source "board/isee/igep003x/Kconfig" source "board/phytec/pcm051/Kconfig" source "board/silica/pengwyn/Kconfig" +source "board/solidrun/lx2160acex7/Kconfig" source "board/spear/spear300/Kconfig" source "board/spear/spear310/Kconfig" source "board/spear/spear320/Kconfig" diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 92a2b58ed46d..9df6ebdc1bb4 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -109,7 +109,7 @@ config PSCI_RESET !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \ !TARGET_LS1046AFRWY && \ !TARGET_LS2081ARDB && !TARGET_LX2160ARDB && \ - !TARGET_LX2160AQDS && \ + !TARGET_LX2160AQDS && !TARGET_LX2160ACEX7 && \ !ARCH_UNIPHIER && !TARGET_S32V234EVB help Most armv8 systems have PSCI support enabled in EL3, either through diff --git a/board/solidrun/lx2160acex7/Kconfig b/board/solidrun/lx2160acex7/Kconfig new file mode 100644 index 000000000000..85673846a4a5 --- /dev/null +++ b/board/solidrun/lx2160acex7/Kconfig @@ -0,0 +1,15 @@ +if TARGET_LX2160ACEX7 + +config SYS_BOARD + default "lx2160acex7" + +config SYS_VENDOR + default "solidrun" + +config SYS_SOC + default "fsl-layerscape" + +config SYS_CONFIG_NAME + default "lx2160acex7" + +endif diff --git a/board/solidrun/lx2160acex7/MAINTAINERS b/board/solidrun/lx2160acex7/MAINTAINERS new file mode 100644 index 000000000000..6fcc3dcc938c --- /dev/null +++ b/board/solidrun/lx2160acex7/MAINTAINERS @@ -0,0 +1,7 @@ +LX2160ACEX7 BOARD +M: Baruch Siach <baruch(a)tkos.co.il> +S: Maintained +F: board/solidrun/lx2160acex7/ +F: include/configs/lx2160acex7.h +F: configs/lx2160acex7_tfa_defconfig +F: arch/arm/dts/fsl-lx2160a-cex7.dts diff --git a/board/solidrun/lx2160acex7/Makefile b/board/solidrun/lx2160acex7/Makefile new file mode 100644 index 000000000000..a2ee6fd8fde8 --- /dev/null +++ b/board/solidrun/lx2160acex7/Makefile @@ -0,0 +1,7 @@ +# +# Copyright 2019 SolidRun ltd. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += lx2160acex7.o diff --git a/board/solidrun/lx2160acex7/README b/board/solidrun/lx2160acex7/README new file mode 100644 index 000000000000..33421073ad30 --- /dev/null +++ b/board/solidrun/lx2160acex7/README @@ -0,0 +1,43 @@ +Overview +-------- + +The SolidRun CEx7 LX2160A has COM-Express Type 7 form factor, based on NXP +LX2160A SoC. SolidRun provides two carriers, Clearfog CX, and HoneyComb. + +https://developer.solid-run.com/products/cex7-lx2160a/ + +U-Boot currentl supports boot from SD/eMMC. + +SD Boot Memory Map +------------------ + +Offsets are relative to the beginning of the SD card. + +0x001000 bl2_sd.pbl (RCW+PBI+bl2.pbl) +0x100000 fip.bin (BL31 + BL33(U-Boot)) +0x500000 U-Boot Environment +0x800000 DDR PHY Firmware (fip_ddr.bin) + +ATF (ARM Trusted Firmware) generates bl2_sd.pbl and fip.bin. + +fip_ddr.bin is available from https://github.com/NXP/ddr-phy-binary. + +DPAA2 Management Complex (MC) Firmware +-------------------------------------- + +U-Boot loads DPAA2 MC firmware and configuration files from the first SD/eMMC +partition. The following environment variables define firmware files location. + +mc_firmware_dir : directory of firmware files +mc_fw_file : MC firmware file name +dpc_file : DPC file name +dpl_file : DPL file name + +Default values for these variables are defined in +include/configs/lx2160acex7.h. + +MC firmware is available from the linux-firmware repository at dpaa2/mc/. + +mc-utils generates DPL and DPC: + + https://source.codeaurora.org/external/qoriq/qoriq-components/mc-utils diff --git a/board/solidrun/lx2160acex7/lx2160acex7.c b/board/solidrun/lx2160acex7/lx2160acex7.c new file mode 100644 index 000000000000..57dd7605b7ee --- /dev/null +++ b/board/solidrun/lx2160acex7/lx2160acex7.c @@ -0,0 +1,287 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 SolidRun ltd. + */ + +#include <common.h> +#include <dm.h> +#include <dm/platform_data/serial_pl01x.h> +#include <netdev.h> +#include <fsl_ddr.h> +#include <fsl_sec.h> +#include <asm/io.h> +#include <fdt_support.h> +#include <fsl-mc/fsl_mc.h> +#include <asm/arch/soc.h> +#include <fm_eth.h> +#include <fsl-mc/ldpaa_wriop.h> +#include <miiphy.h> + +DECLARE_GLOBAL_DATA_PTR; + +static struct pl01x_serial_platdata serial0 = { +#if CONFIG_CONS_INDEX == 0 + .base = CONFIG_SYS_SERIAL0, +#elif CONFIG_CONS_INDEX == 1 + .base = CONFIG_SYS_SERIAL1, +#else +#error "Unsupported console index value." +#endif + .type = TYPE_PL011, +}; + +U_BOOT_DEVICE(nxp_serial0) = { + .name = "serial_pl01x", + .platdata = &serial0, +}; + +static struct pl01x_serial_platdata serial1 = { + .base = CONFIG_SYS_SERIAL1, + .type = TYPE_PL011, +}; + +U_BOOT_DEVICE(nxp_serial1) = { + .name = "serial_pl01x", + .platdata = &serial1, +}; + +static void uart_get_clock(void) +{ + serial0.clock = get_serial_clock(); + serial1.clock = get_serial_clock(); +} + +int board_early_init_f(void) +{ + /* get required clock for UART IP */ + uart_get_clock(); + fsl_lsch3_early_init_f(); + + return 0; +} + +int checkboard(void) +{ + enum boot_src src = get_boot_src(); + char buf[64]; + cpu_name(buf); + printf("Board: %s-CEX7, ", buf); + + if (src == BOOT_SOURCE_SD_MMC) { + puts("SD\n"); + } + puts("SERDES1 Reference: Clock1 = 161.13MHz Clock2 = 100MHz\n"); + puts("SERDES2 Reference: Clock1 = 100MHz Clock2 = 100MHz\n"); + puts("SERDES3 Reference: Clock1 = 100MHz Clock2 = 100MHz\n"); + return 0; +} + +unsigned long get_board_sys_clk(void) +{ + return 100000000; +} + +unsigned long get_board_ddr_clk(void) +{ + return 100000000; +} + +int board_init(void) +{ +#ifdef CONFIG_FSL_CAAM + sec_init(); +#endif + + return 0; +} + +void detail_board_ddr_info(void) +{ + int i; + u64 ddr_size = 0; + + puts("\nDDR "); + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) + ddr_size += gd->bd->bi_dram[i].size; + print_size(ddr_size, ""); + print_ddr_info(0); +} + +#ifdef CONFIG_FSL_MC_ENET +void fdt_fixup_board_enet(void *fdt) +{ + int offset; + + offset = fdt_path_offset(fdt, "/soc/fsl-mc"); + + if (offset < 0) + offset = fdt_path_offset(fdt, "/fsl-mc"); + + if (offset < 0) { + printf("%s: fsl-mc node not found in device tree (error %d)\n", + __func__, offset); + return; + } + + if (get_mc_boot_status() == 0 && + (is_lazy_dpl_addr_valid() || get_dpl_apply_status() == 0)) { + fdt_status_okay(fdt, offset); + } else { + fdt_status_fail(fdt, offset); + } +} + +void board_quiesce_devices(void) +{ + fsl_mc_ldpaa_exit(gd->bd); +} +#endif + +#ifdef CONFIG_OF_BOARD_SETUP + +int ft_board_setup(void *blob, bd_t *bd) +{ + int i; + bool mc_memory_bank = false; + + u64 *base; + u64 *size; + u64 mc_memory_base = 0; + u64 mc_memory_size = 0; + u16 total_memory_banks; + + ft_cpu_setup(blob, bd); + + fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size); + + if (mc_memory_base != 0) + mc_memory_bank = true; + + total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank; + + base = calloc(total_memory_banks, sizeof(u64)); + size = calloc(total_memory_banks, sizeof(u64)); + + /* fixup DT for the three GPP DDR banks */ + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + base[i] = gd->bd->bi_dram[i].start; + size[i] = gd->bd->bi_dram[i].size; + } + +#ifdef CONFIG_RESV_RAM + /* reduce size if reserved memory is within this bank */ + if (gd->arch.resv_ram >= base[0] && + gd->arch.resv_ram < base[0] + size[0]) + size[0] = gd->arch.resv_ram - base[0]; + else if (gd->arch.resv_ram >= base[1] && + gd->arch.resv_ram < base[1] + size[1]) + size[1] = gd->arch.resv_ram - base[1]; + else if (gd->arch.resv_ram >= base[2] && + gd->arch.resv_ram < base[2] + size[2]) + size[2] = gd->arch.resv_ram - base[2]; +#endif + + if (mc_memory_base != 0) { + for (i = 0; i <= total_memory_banks; i++) { + if (base[i] == 0 && size[i] == 0) { + base[i] = mc_memory_base; + size[i] = mc_memory_size; + break; + } + } + } + + fdt_fixup_memory_banks(blob, base, size, total_memory_banks); + +#ifdef CONFIG_USB + fsl_fdt_fixup_dr_usb(blob, bd); +#endif + +#ifdef CONFIG_FSL_MC_ENET + fdt_fsl_mc_fixup_iommu_map_entry(blob); + fdt_fixup_board_enet(blob); +#endif + + return 0; +} +#endif + +int fsl_initdram(void) +{ + gd->ram_size = tfa_get_dram_size(); + + if (!gd->ram_size) + gd->ram_size = fsl_ddr_sdram_size(); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ +#if defined(CONFIG_FSL_MC_ENET) + struct memac_mdio_info mdio_info; + struct memac_mdio_controller *reg; + int i, interface; + struct mii_dev *dev; + struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + u32 srds_s1; + + srds_s1 = in_le32(&gur->rcwsr[28]) & + FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK; + srds_s1 >>= FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT; + + reg = (struct memac_mdio_controller *)CONFIG_SYS_FSL_WRIOP1_MDIO1; + mdio_info.regs = reg; + mdio_info.name = DEFAULT_WRIOP_MDIO1_NAME; + + /* Register the EMI 1 */ + fm_memac_mdio_init(bis, &mdio_info); + + wriop_set_phy_address(WRIOP1_DPMAC17, 0, + RGMII_PHY_ADDR1); + reg = (struct memac_mdio_controller *)CONFIG_SYS_FSL_WRIOP1_MDIO2; + switch (srds_s1) { + case 3: + case 5: + case 8: + case 13: + case 14: + case 15: + case 17: + case 20: + case 23: + wriop_set_phy_address(WRIOP1_DPMAC17, 0, + RGMII_PHY_ADDR1); + break; + + default: + printf("SerDes1 protocol 0x%x is not supported on LX2160ACEX7\n", + srds_s1); + goto next; + } + for (i = WRIOP1_DPMAC17; i <= WRIOP1_DPMAC17; i++) { + interface = wriop_get_enet_if(i); + switch (interface) { + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME); + wriop_set_mdio(i, dev); + break; + default: + break; + } + } + +next: + cpu_eth_init(bis); +#endif /* CONFIG_FSL_MC_ENET */ + + return pci_eth_init(bis); +} + +void reset_phy(void) +{ +#if defined(CONFIG_FSL_MC_ENET) + mc_env_boot(); +#endif +} diff --git a/configs/lx2160acex7_tfa_defconfig b/configs/lx2160acex7_tfa_defconfig new file mode 100644 index 000000000000..ee44d0693ac2 --- /dev/null +++ b/configs/lx2160acex7_tfa_defconfig @@ -0,0 +1,59 @@ +CONFIG_ARM=y +CONFIG_TARGET_LX2160ACEX7=y +CONFIG_TFABOOT=y +CONFIG_SYS_TEXT_BASE=0x82000000 +CONFIG_SYS_MALLOC_F_LEN=0x6000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0x500000 +CONFIG_NR_DRAM_BANKS=3 +CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y +CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_AHCI=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTARGS=y +# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_CMD_GREPENV=y +CONFIG_CMD_EEPROM=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_CACHE=y +CONFIG_MP=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-cex7" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +CONFIG_SATA_CEVA=y +CONFIG_FSL_CAAM=y +CONFIG_DM_GPIO=y +CONFIG_DM_I2C=y +CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_GIGE=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE_GEN4=y +CONFIG_DM_SCSI=y +CONFIG_DM_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/include/configs/lx2160acex7.h b/include/configs/lx2160acex7.h new file mode 100644 index 000000000000..5c1bd55aea3f --- /dev/null +++ b/include/configs/lx2160acex7.h @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 SolidRun ltd. + */ + +#ifndef __LX2_CEX7_H +#define __LX2_CEX7_H + +#include "lx2160a_common.h" + +/* MAC/PHY configuration */ +#if defined(CONFIG_FSL_MC_ENET) +#define CONFIG_MII +#define CONFIG_ETHPRIME "DPMAC17@rgmii-id" + +#define RGMII_PHY_ADDR1 0x01 + +#endif + +#undef CONFIG_ID_EEPROM + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + EXTRA_ENV_SETTINGS \ + "mc_firmware_dir=boot\0" \ + "mc_fw_file=mc_lx2160a.itb\0" \ + "mc_fw_addr=0x80a00000\0" \ + "dpc_file=dpc-8_x_usxgmii.dtb\0" \ + "dpc_addr=0x80e00000\0" \ + "dpl_file=dpl-eth.8x10g.19.dtb\0" \ + "dpl_addr=0x80d00000\0" + +#undef SD_MC_INIT_CMD +#define SD_MC_INIT_CMD \ + "load mmc 0:1 ${mc_fw_addr} ${mc_firmware_dir}/${mc_fw_file}; " \ + "load mmc 0:1 ${dpc_addr} ${mc_firmware_dir}/${dpc_file}; " \ + "fsl_mc start mc ${mc_fw_addr} ${dpc_addr}\0" + +#undef SD_BOOTCOMMAND +#define SD_BOOTCOMMAND \ + "load mmc 0:1 ${dpl_addr} ${mc_firmware_dir}/${dpl_file}; " \ + "fsl_mc lazyapply dpl ${dpl_addr}; " \ + "run distro_bootcmd" + +#include <asm/fsl_secure_boot.h> + +#endif /* __LX2_CEX7_H */ -- 2.24.0

3 5

[PATCH v2 1/2] rockchip: rk3399: split roc-pc-rk3399 out of evb_rk3399
by sunil＠amarulasolutions.com 10 Feb '20

10 Feb '20

From: Suniel Mahesh <sunil(a)amarulasolutions.com> roc-pc-rk3399 board has one user button & three user LED's. Currently we don't have any code support for these devices. Since button and LED's are specific to roc-pc-rk3399 board, split it into its own board file and add code support here. Signed-off-by: Suniel Mahesh <sunil(a)amarulasolutions.com> --- Changes for v2: - changed board directory and corresponding files naming convention from roc-rk3399-pc to roc-pc-rk3399. - Tested on firefly roc-pc-rk3399, an rk3399 based target. --- arch/arm/mach-rockchip/rk3399/Kconfig | 20 ++++++++++++++++++++ board/firefly/roc-pc-rk3399/Kconfig | 16 ++++++++++++++++ board/firefly/roc-pc-rk3399/MAINTAINERS | 6 ++++++ board/firefly/roc-pc-rk3399/Makefile | 7 +++++++ board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 29 +++++++++++++++++++++++++++++ board/rockchip/evb_rk3399/MAINTAINERS | 6 ------ configs/roc-pc-rk3399_defconfig | 1 + include/configs/roc-pc-rk3399.h | 22 ++++++++++++++++++++++ 8 files changed, 101 insertions(+), 6 deletions(-) create mode 100644 board/firefly/roc-pc-rk3399/Kconfig create mode 100644 board/firefly/roc-pc-rk3399/MAINTAINERS create mode 100644 board/firefly/roc-pc-rk3399/Makefile create mode 100644 board/firefly/roc-pc-rk3399/roc-pc-rk3399.c create mode 100644 include/configs/roc-pc-rk3399.h diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig index f994152..0dc43c2 100644 --- a/arch/arm/mach-rockchip/rk3399/Kconfig +++ b/arch/arm/mach-rockchip/rk3399/Kconfig @@ -81,6 +81,25 @@ config TARGET_ROCKPRO64_RK3399 * GPIO expansion ports * DC 12V/2A +config TARGET_ROC_PC_RK3399 + bool "Firefly ROC-RK3399-PC board" + help + ROC-RK3399-PC is SBC produced by Firefly. Key features: + + * Rockchip RK3399 + * 4GB Dual-Channel LPDDR4 64-bit + * SD card slot + * eMMC socket + * 16MB SPI Flash + * Gigabit ethernet + * PCIe + * HDMI In/Out, DP, MIPI DSI/CSI, eDP + * USB 3.0, 2.0 + * USB Type C power and data + * GPIO expansion ports + * wide voltage input(5V-15V), dual cell battery + * Wifi/BT accessible via expansion board M.2 + endchoice config ROCKCHIP_BOOT_MODE_REG @@ -128,5 +147,6 @@ source "board/theobroma-systems/puma_rk3399/Kconfig" source "board/vamrs/rock960_rk3399/Kconfig" source "board/google/gru/Kconfig" source "board/pine64/rockpro64_rk3399/Kconfig" +source "board/firefly/roc-pc-rk3399/Kconfig" endif diff --git a/board/firefly/roc-pc-rk3399/Kconfig b/board/firefly/roc-pc-rk3399/Kconfig new file mode 100644 index 0000000..720fbbb --- /dev/null +++ b/board/firefly/roc-pc-rk3399/Kconfig @@ -0,0 +1,16 @@ +if TARGET_ROC_PC_RK3399 + +config SYS_BOARD + default "roc-pc-rk3399" + +config SYS_VENDOR + default "firefly" + +config SYS_CONFIG_NAME + default "roc-pc-rk3399" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif + diff --git a/board/firefly/roc-pc-rk3399/MAINTAINERS b/board/firefly/roc-pc-rk3399/MAINTAINERS new file mode 100644 index 0000000..7564dd2 --- /dev/null +++ b/board/firefly/roc-pc-rk3399/MAINTAINERS @@ -0,0 +1,6 @@ +ROC-RK3399-PC +M: Levin Du <djw(a)t-chip.com.cn> +S: Maintained +F: board/firefly/roc-pc-rk3399 +F: include/configs/roc-pc-rk3399.h +F: configs/roc-pc-rk3399_defconfig diff --git a/board/firefly/roc-pc-rk3399/Makefile b/board/firefly/roc-pc-rk3399/Makefile new file mode 100644 index 0000000..29c79b2 --- /dev/null +++ b/board/firefly/roc-pc-rk3399/Makefile @@ -0,0 +1,7 @@ +# +# (C) Copyright 2016 Rockchip Electronics Co., Ltd +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += roc-pc-rk3399.o diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c new file mode 100644 index 0000000..d47dba8 --- /dev/null +++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + */ + +#include <common.h> +#include <dm.h> +#include <asm/arch-rockchip/periph.h> +#include <power/regulator.h> + +#ifndef CONFIG_SPL_BUILD +int board_early_init_f(void) +{ + struct udevice *regulator; + int ret; + + ret = regulator_get_by_platname("vcc5v0_host", &regulator); + if (ret) { + debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret); + goto out; + } + + ret = regulator_set_enable(regulator, true); + if (ret) + debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret); +out: + return 0; +} +#endif diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS index eab4c4c..0834254 100644 --- a/board/rockchip/evb_rk3399/MAINTAINERS +++ b/board/rockchip/evb_rk3399/MAINTAINERS @@ -55,12 +55,6 @@ F: configs/orangepi-rk3399_defconfig F: arch/arm/dts/rk3399-u-boot.dtsi F: arch/arm/dts/rk3399-orangepi-u-boot.dtsi -ROC-RK3399-PC -M: Levin Du <djw(a)t-chip.com.cn> -S: Maintained -F: configs/roc-pc-rk3399_defconfig -F: arch/arm/dts/rk3399-roc-pc-u-boot.dtsi - ROCK-PI-4 M: Akash Gajjar <akash(a)openedev.com> M: Jagan Teki <jagan(a)amarulasolutions.com> diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 8204e00..5a82029 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_ROC_PC_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 diff --git a/include/configs/roc-pc-rk3399.h b/include/configs/roc-pc-rk3399.h new file mode 100644 index 0000000..3fd1062 --- /dev/null +++ b/include/configs/roc-pc-rk3399.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + */ + +#ifndef __ROC_PC_RK3399_H +#define __ROC_PC_RK3399_H + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdin=serial,cros-ec-keyb\0" \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#include <configs/rk3399_common.h> + +#if defined(CONFIG_ENV_IS_IN_MMC) +# define CONFIG_SYS_MMC_ENV_DEV 0 +#endif + +#define SDRAM_BANK_SIZE (2UL << 30) + +#endif -- 2.7.4

2 3

[U-Boot] [PATCH] net: eth-uclass: Remove warning about ROM MAC address
by Soeren Moch 09 Feb '20

09 Feb '20

Using a MAC address from ROM storage is the normal case for most ethernet hardware. Why should we warn about this? Signed-off-by: Soeren Moch <smoch(a)web.de> --- Cc: Joe Hershberger <joe.hershberger(a)ni.com> Cc: u-boot(a)lists.denx.de --- net/eth-uclass.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/net/eth-uclass.c b/net/eth-uclass.c index 3bd98b01ad..8b29de37bb 100644 --- a/net/eth-uclass.c +++ b/net/eth-uclass.c @@ -538,8 +538,6 @@ static int eth_post_probe(struct udevice *dev) memcpy(pdata->enetaddr, env_enetaddr, ARP_HLEN); } else if (is_valid_ethaddr(pdata->enetaddr)) { eth_env_set_enetaddr_by_index("eth", dev->seq, pdata->enetaddr); - printf("\nWarning: %s using MAC address from ROM\n", - dev->name); } else if (is_zero_ethaddr(pdata->enetaddr) || !is_valid_ethaddr(pdata->enetaddr)) { #ifdef CONFIG_NET_RANDOM_ETHADDR -- 2.17.1

4 8

[U-Boot] logging
by Heinrich Schuchardt 09 Feb '20

09 Feb '20

Hello Simon, I would like to convert printf and debug messages in the UEFI sub-system to log messages. Currently if CONFIG_LOG=n, log_*() functions are mapped to log_nop(). So no output is provided independent of the criticality of the message. What I would like to do is map log_err() to printf() and log_debug() to debug() if CONFIG_LOG=n . This way we could get the same console output no matter if CONFIG_LOG is enabled. Would this make sense to you? #if CONFIG_IS_ENABLED(LOG) #define _LOG_MAX_LEVEL CONFIG_VAL(LOG_MAX_LEVEL) #define log_err(_fmt...) log(LOG_CATEGORY, LOGL_ERR, ##_fmt) #define log_warning(_fmt...) log(LOG_CATEGORY, LOGL_WARNING, ##_fmt) #define log_notice(_fmt...) log(LOG_CATEGORY, LOGL_NOTICE, ##_fmt) #define log_info(_fmt...) log(LOG_CATEGORY, LOGL_INFO, ##_fmt) #define log_debug(_fmt...) log(LOG_CATEGORY, LOGL_DEBUG, ##_fmt) #define log_content(_fmt...) log(LOG_CATEGORY, LOGL_DEBUG_CONTENT, ##_fmt) #define log_io(_fmt...) log(LOG_CATEGORY, LOGL_DEBUG_IO, ##_fmt) #else #define _LOG_MAX_LEVEL LOGL_INFO #define log_err(_fmt...) printf(##_fmt) #define log_warning(_fmt...) printf(##_fmt) #define log_notice(_fmt...) printf(##_fmt) #define log_info(_fmt...) printf(##_fmt) #define log_debug(_fmt...) debug(##_fmt) #define log_content(_fmt...) log_nop(LOG_CATEGORY, \ LOGL_DEBUG_CONTENT, ##_fmt) #define log_io(_fmt...) log_nop(LOG_CATEGORY, LOGL_DEBUG_IO, ##_fmt) #endif Best regards Heinrich

2 1

[PATCH 1/1] doc: fix AX25-AE350 RISC-V documentation
by Heinrich Schuchardt 08 Feb '20

08 Feb '20

Since commit 04883bf7acca ("doc: update AX25-AE350 RISC-V documentation") `make htmldocs` produces a log of warnings like doc/board/AndesTech/ax25-ae350.rst:373: WARNING: Block quote ends without a blank line; unexpected unindent. doc/board/AndesTech/ax25-ae350.rst:0: WARNING: Undefined substitution referenced: "_ __ ___ _ __ | (___ | |_) |". Reformat the problematic passages. Fixes: 04883bf7acca ("doc: update AX25-AE350 RISC-V documentation") Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- doc/board/AndesTech/ax25-ae350.rst | 335 +++++++++++++++-------------- 1 file changed, 168 insertions(+), 167 deletions(-) diff --git a/doc/board/AndesTech/ax25-ae350.rst b/doc/board/AndesTech/ax25-ae350.rst index a7bd1a75e8..8874325840 100644 --- a/doc/board/AndesTech/ax25-ae350.rst +++ b/doc/board/AndesTech/ax25-ae350.rst @@ -62,9 +62,10 @@ Configurations -------------- CONFIG_SKIP_LOWLEVEL_INIT: - If you want to boot this system from SPI ROM and bypass e-bios (the - other boot loader on ROM). You should undefine CONFIG_SKIP_LOWLEVEL_INIT - in "include/configs/ax25-ae350.h". + +If you want to boot this system from SPI ROM and bypass e-bios (the +other boot loader on ROM). You should undefine CONFIG_SKIP_LOWLEVEL_INIT +in "include/configs/ax25-ae350.h". Build and boot steps -------------------- @@ -165,7 +166,7 @@ Messages of U-Boot boot on AE350 board crc32 for 80000000 ... 80050452 ==> 692dc44a RISC-V # - *** power-off and power-on, this U-Boot is booted from spi flash *** + *** power-off and power-on, this U-Boot is booted from spi flash *** U-Boot 2018.01-rc2-00032-gf67dd47-dirty (Dec 21 2017 - 13:56:03 +0800) @@ -365,168 +366,168 @@ Messages of U-Boot SPL boots Kernel on AE350 board .. code-block:: none -U-Boot SPL 2020.01-rc1-00292-g67a3313-dirty (Nov 14 2019 - 11:26:21 +0800) -Trying to boot from RAM - -OpenSBI v0.5-1-gdd8ef28 (Nov 14 2019 11:08:39) - ____ _____ ____ _____ - / __ \ / ____| _ \_ _| - | | | |_ __ ___ _ __ | (___ | |_) || | - | | | | '_ \ / _ \ '_ \ \___ \| _ < | | - | |__| | |_) | __/ | | |____) | |_) || |_ - \____/| .__/ \___|_| |_|_____/|____/_____| - | | - |_| - -Platform Name : Andes AE350 -Platform HART Features : RV64ACIMSUX -Platform Max HARTs : 4 -Current Hart : 0 -Firmware Base : 0x0 -Firmware Size : 84 KB -Runtime SBI Version : 0.2 - -PMP0: 0x0000000000000000-0x000000000001ffff (A) -PMP1: 0x0000000000000000-0x00000001ffffffff (A,R,W,X) - - -U-Boot 2020.01-rc1-00292-g67a3313-dirty (Nov 14 2019 - 11:26:21 +0800) - -DRAM: 1 GiB -Flash: 64 MiB -MMC: mmc@f0e00000: 0 -Loading Environment from SPI Flash... SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB -OK -In: serial@f0300000 -Out: serial@f0300000 -Err: serial@f0300000 -Net: no alias for ethernet0 - -Warning: mac@e0100000 (eth0) using random MAC address - a2:ae:93:7b:cc:8f -eth0: mac@e0100000 -Hit any key to stop autoboot: 0 -6455 bytes read in 31 ms (203.1 KiB/s) -20421684 bytes read in 8647 ms (2.3 MiB/s) -## Booting kernel from Legacy Image at 00600000 ... - Image Name: - Image Type: RISC-V Linux Kernel Image (uncompressed) - Data Size: 20421620 Bytes = 19.5 MiB - Load Address: 00200000 - Entry Point: 00200000 - Verifying Checksum ... OK -## Flattened Device Tree blob at 20000000 - Booting using the fdt blob at 0x20000000 - Loading Kernel Image - Loading Device Tree to 000000001effb000, end 000000001efff936 ... OK - -Starting kernel ... - -OF: fdt: Ignoring memory range 0x0 - 0x200000 -Linux version 4.17.0-00253-g49136e10bcb2 (sqa@atcsqa07) (gcc version 7.3.0 (2019-04-06_nds64le-linux-glibc-v5_experimental)) #1 SMP PREEMPT Sat Apr 6 23:41:49 CST 2019 -bootconsole [early0] enabled -Initial ramdisk at: 0x (ptrval) (13665712 bytes) -Zone ranges: - DMA32 [mem 0x0000000000200000-0x000000003fffffff] - Normal empty -Movable zone start for each node -Early memory node ranges - node 0: [mem 0x0000000000200000-0x000000003fffffff] -Initmem setup node 0 [mem 0x0000000000200000-0x000000003fffffff] -software IO TLB [mem 0x3b1f8000-0x3f1f8000] (64MB) mapped at [ (ptrval)- (ptrval)] -elf_platform is rv64i2p0m2p0a2p0c2p0xv5-0p0 -compatible privileged spec version 1.10 -percpu: Embedded 16 pages/cpu @ (ptrval) s28184 r8192 d29160 u65536 -Built 1 zonelists, mobility grouping on. Total pages: 258055 -Kernel command line: console=ttyS0,38400n8 debug loglevel=7 -log_buf_len individual max cpu contribution: 4096 bytes -log_buf_len total cpu_extra contributions: 12288 bytes -log_buf_len min size: 16384 bytes -log_buf_len: 32768 bytes -early log buf free: 14608(89%) -Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes) -Inode-cache hash table entries: 65536 (order: 7, 524288 bytes) -Sorting __ex_table... -Memory: 944428K/1046528K available (3979K kernel code, 246K rwdata, 1490K rodata, 13523K init, 688K bss, 102100K reserved, 0K cma-reserved) -SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 -Preemptible hierarchical RCU implementation. - Tasks RCU enabled. -NR_IRQS: 72, nr_irqs: 72, preallocated irqs: 0 -riscv,cpu_intc,0: 64 local interrupts mapped -riscv,cpu_intc,1: 64 local interrupts mapped -riscv,cpu_intc,2: 64 local interrupts mapped -riscv,cpu_intc,3: 64 local interrupts mapped -riscv,plic0,e4000000: mapped 71 interrupts to 8/8 handlers -clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1bacf917bf, max_idle_ns: 881590412290 ns -sched_clock: 64 bits at 60MHz, resolution 16ns, wraps every 4398046511098ns -Console: colour dummy device 40x30 -Calibrating delay loop (skipped), value calculated using timer frequency.. 120.00 BogoMIPS (lpj=600000) -pid_max: default: 32768 minimum: 301 -Mount-cache hash table entries: 2048 (order: 2, 16384 bytes) -Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes) -Hierarchical SRCU implementation. -smp: Bringing up secondary CPUs ... -CPU0: online -CPU2: online -CPU3: online -smp: Brought up 1 node, 4 CPUs -devtmpfs: initialized -random: get_random_u32 called from bucket_table_alloc+0x198/0x1d8 with crng_init=0 -clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns -futex hash table entries: 1024 (order: 4, 65536 bytes) -NET: Registered protocol family 16 -Advanced Linux Sound Architecture Driver Initialized. -clocksource: Switched to clocksource riscv_clocksource -NET: Registered protocol family 2 -tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes) -TCP established hash table entries: 8192 (order: 4, 65536 bytes) -TCP bind hash table entries: 8192 (order: 5, 131072 bytes) -TCP: Hash tables configured (established 8192 bind 8192) -UDP hash table entries: 512 (order: 2, 16384 bytes) -UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) -NET: Registered protocol family 1 -RPC: Registered named UNIX socket transport module. -RPC: Registered udp transport module. -RPC: Registered tcp transport module. -RPC: Registered tcp NFSv4.1 backchannel transport module. -Unpacking initramfs... -workingset: timestamp_bits=62 max_order=18 bucket_order=0 -NFS: Registering the id_resolver key type -Key type id_resolver registered -Key type id_legacy registered -nfs4filelayout_init: NFSv4 File Layout Driver Registering... -io scheduler noop registered -io scheduler cfq registered (default) -io scheduler mq-deadline registered -io scheduler kyber registered -Console: switching to colour frame buffer device 40x30 -Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled -console [ttyS0] disabled -f0300000.serial: ttyS0 at MMIO 0xf0300020 (irq = 20, base_baud = 1228800) is a 16550A -console [ttyS0] enabled -console [ttyS0] enabled -bootconsole [early0] disabled -bootconsole [early0] disabled -loop: module loaded -tun: Universal TUN/TAP device driver, 1.6 -ftmac100: Loading version 0.2 ... -ftmac100 e0100000.mac eth0: irq 21, mapped at (ptrval) -ftmac100 e0100000.mac eth0: generated random MAC address 4e:fd:bd:f3:04:fc -ftsdc010 f0e00000.mmc: mmc0 - using hw SDIO IRQ -mmc0: new SDHC card at address d555 -ftssp010 card registered! -mmcblk0: mmc0:d555 SD04G 3.79 GiB -NET: Registered protocol family 10 - mmcblk0: p1 -Segment Routing with IPv6 -sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver -NET: Registered protocol family 17 -NET: Registered protocol family 15 -ALSA device list: - #0: ftssp_ac97 controller -Freeing unused kernel memory: 13520K -This architecture does not have kernel memory protection. -Sysinit starting -Sat Apr 6 23:33:53 CST 2019 -nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering... + U-Boot SPL 2020.01-rc1-00292-g67a3313-dirty (Nov 14 2019 - 11:26:21 +0800) + Trying to boot from RAM + + OpenSBI v0.5-1-gdd8ef28 (Nov 14 2019 11:08:39) + ____ _____ ____ _____ + / __ \ / ____| _ \_ _| + | | | |_ __ ___ _ __ | (___ | |_) || | + | | | | '_ \ / _ \ '_ \ \___ \| _ < | | + | |__| | |_) | __/ | | |____) | |_) || |_ + \____/| .__/ \___|_| |_|_____/|____/_____| + | | + |_| + + Platform Name : Andes AE350 + Platform HART Features : RV64ACIMSUX + Platform Max HARTs : 4 + Current Hart : 0 + Firmware Base : 0x0 + Firmware Size : 84 KB + Runtime SBI Version : 0.2 + + PMP0: 0x0000000000000000-0x000000000001ffff (A) + PMP1: 0x0000000000000000-0x00000001ffffffff (A,R,W,X) + + + U-Boot 2020.01-rc1-00292-g67a3313-dirty (Nov 14 2019 - 11:26:21 +0800) + + DRAM: 1 GiB + Flash: 64 MiB + MMC: mmc@f0e00000: 0 + Loading Environment from SPI Flash... SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB + OK + In: serial@f0300000 + Out: serial@f0300000 + Err: serial@f0300000 + Net: no alias for ethernet0 + + Warning: mac@e0100000 (eth0) using random MAC address - a2:ae:93:7b:cc:8f + eth0: mac@e0100000 + Hit any key to stop autoboot: 0 + 6455 bytes read in 31 ms (203.1 KiB/s) + 20421684 bytes read in 8647 ms (2.3 MiB/s) + ## Booting kernel from Legacy Image at 00600000 ... + Image Name: + Image Type: RISC-V Linux Kernel Image (uncompressed) + Data Size: 20421620 Bytes = 19.5 MiB + Load Address: 00200000 + Entry Point: 00200000 + Verifying Checksum ... OK + ## Flattened Device Tree blob at 20000000 + Booting using the fdt blob at 0x20000000 + Loading Kernel Image + Loading Device Tree to 000000001effb000, end 000000001efff936 ... OK + + Starting kernel ... + + OF: fdt: Ignoring memory range 0x0 - 0x200000 + Linux version 4.17.0-00253-g49136e10bcb2 (sqa@atcsqa07) (gcc version 7.3.0 (2019-04-06_nds64le-linux-glibc-v5_experimental)) #1 SMP PREEMPT Sat Apr 6 23:41:49 CST 2019 + bootconsole [early0] enabled + Initial ramdisk at: 0x (ptrval) (13665712 bytes) + Zone ranges: + DMA32 [mem 0x0000000000200000-0x000000003fffffff] + Normal empty + Movable zone start for each node + Early memory node ranges + node 0: [mem 0x0000000000200000-0x000000003fffffff] + Initmem setup node 0 [mem 0x0000000000200000-0x000000003fffffff] + software IO TLB [mem 0x3b1f8000-0x3f1f8000] (64MB) mapped at [ (ptrval)- (ptrval)] + elf_platform is rv64i2p0m2p0a2p0c2p0xv5-0p0 + compatible privileged spec version 1.10 + percpu: Embedded 16 pages/cpu @ (ptrval) s28184 r8192 d29160 u65536 + Built 1 zonelists, mobility grouping on. Total pages: 258055 + Kernel command line: console=ttyS0,38400n8 debug loglevel=7 + log_buf_len individual max cpu contribution: 4096 bytes + log_buf_len total cpu_extra contributions: 12288 bytes + log_buf_len min size: 16384 bytes + log_buf_len: 32768 bytes + early log buf free: 14608(89%) + Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes) + Inode-cache hash table entries: 65536 (order: 7, 524288 bytes) + Sorting __ex_table... + Memory: 944428K/1046528K available (3979K kernel code, 246K rwdata, 1490K rodata, 13523K init, 688K bss, 102100K reserved, 0K cma-reserved) + SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 + Preemptible hierarchical RCU implementation. + Tasks RCU enabled. + NR_IRQS: 72, nr_irqs: 72, preallocated irqs: 0 + riscv,cpu_intc,0: 64 local interrupts mapped + riscv,cpu_intc,1: 64 local interrupts mapped + riscv,cpu_intc,2: 64 local interrupts mapped + riscv,cpu_intc,3: 64 local interrupts mapped + riscv,plic0,e4000000: mapped 71 interrupts to 8/8 handlers + clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1bacf917bf, max_idle_ns: 881590412290 ns + sched_clock: 64 bits at 60MHz, resolution 16ns, wraps every 4398046511098ns + Console: colour dummy device 40x30 + Calibrating delay loop (skipped), value calculated using timer frequency.. 120.00 BogoMIPS (lpj=600000) + pid_max: default: 32768 minimum: 301 + Mount-cache hash table entries: 2048 (order: 2, 16384 bytes) + Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes) + Hierarchical SRCU implementation. + smp: Bringing up secondary CPUs ... + CPU0: online + CPU2: online + CPU3: online + smp: Brought up 1 node, 4 CPUs + devtmpfs: initialized + random: get_random_u32 called from bucket_table_alloc+0x198/0x1d8 with crng_init=0 + clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns + futex hash table entries: 1024 (order: 4, 65536 bytes) + NET: Registered protocol family 16 + Advanced Linux Sound Architecture Driver Initialized. + clocksource: Switched to clocksource riscv_clocksource + NET: Registered protocol family 2 + tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes) + TCP established hash table entries: 8192 (order: 4, 65536 bytes) + TCP bind hash table entries: 8192 (order: 5, 131072 bytes) + TCP: Hash tables configured (established 8192 bind 8192) + UDP hash table entries: 512 (order: 2, 16384 bytes) + UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) + NET: Registered protocol family 1 + RPC: Registered named UNIX socket transport module. + RPC: Registered udp transport module. + RPC: Registered tcp transport module. + RPC: Registered tcp NFSv4.1 backchannel transport module. + Unpacking initramfs... + workingset: timestamp_bits=62 max_order=18 bucket_order=0 + NFS: Registering the id_resolver key type + Key type id_resolver registered + Key type id_legacy registered + nfs4filelayout_init: NFSv4 File Layout Driver Registering... + io scheduler noop registered + io scheduler cfq registered (default) + io scheduler mq-deadline registered + io scheduler kyber registered + Console: switching to colour frame buffer device 40x30 + Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled + console [ttyS0] disabled + f0300000.serial: ttyS0 at MMIO 0xf0300020 (irq = 20, base_baud = 1228800) is a 16550A + console [ttyS0] enabled + console [ttyS0] enabled + bootconsole [early0] disabled + bootconsole [early0] disabled + loop: module loaded + tun: Universal TUN/TAP device driver, 1.6 + ftmac100: Loading version 0.2 ... + ftmac100 e0100000.mac eth0: irq 21, mapped at (ptrval) + ftmac100 e0100000.mac eth0: generated random MAC address 4e:fd:bd:f3:04:fc + ftsdc010 f0e00000.mmc: mmc0 - using hw SDIO IRQ + mmc0: new SDHC card at address d555 + ftssp010 card registered! + mmcblk0: mmc0:d555 SD04G 3.79 GiB + NET: Registered protocol family 10 + mmcblk0: p1 + Segment Routing with IPv6 + sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver + NET: Registered protocol family 17 + NET: Registered protocol family 15 + ALSA device list: + #0: ftssp_ac97 controller + Freeing unused kernel memory: 13520K + This architecture does not have kernel memory protection. + Sysinit starting + Sat Apr 6 23:33:53 CST 2019 + nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering... ~ # -- 2.24.1

3 4

Something wrong with gitlab.denx.de
by Bin Meng 08 Feb '20

08 Feb '20

Hello, It looks there is something wrong with gitlab.denx.de. When accessing either sites below: * https://gitlab.denx.de/u-boot/custodians/u-boot-x86 * https://gitlab.denx.de/u-boot/u-boot Chrome gives me: Your connection is not private Attackers might be trying to steal your information from gitlab.denx.de (for example, passwords, messages, or credit cards). Learn more NET::ERR_CERT_DATE_INVALID Firefox gives me: Did Not Connect: Potential Security Issue Firefox detected an issue and did not continue to gitlab.denx.de. The website is either misconfigured or your computer clock is set to the wrong time. It’s likely the website’s certificate is expired, which prevents Firefox from connecting securely. Regards, Bin

1 0

[PATCH v3] eth: mtk-eth: aarch64: fix build warnings on ethernet-driver
by Frank Wunderlich 08 Feb '20

08 Feb '20

building mtk ethernet driver for aarch64 (mt7622) results in warnings/errors "error: cast from pointer to integer of different size" Fixes: 23f17164d9 ("ethernet: MediaTek: add ethernet driver for MediaTek ARM-based SoCs") Signed-off-by: Frank Wunderlich <frank-w(a)public-files.de> --- changes since v2: change to ulong changes since v1: fixing missing unsigned declaration --- drivers/net/mtk_eth.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/net/mtk_eth.c b/drivers/net/mtk_eth.c index 6cffc3f32a..edfa5d1ce8 100644 --- a/drivers/net/mtk_eth.c +++ b/drivers/net/mtk_eth.c @@ -853,7 +853,8 @@ static void mtk_eth_fifo_init(struct mtk_eth_priv *priv) memset(priv->rx_ring_noc, 0, NUM_RX_DESC * sizeof(struct pdma_rxdesc)); memset(priv->pkt_pool, 0, TOTAL_PKT_BUF_SIZE); - flush_dcache_range((u32)pkt_base, (u32)(pkt_base + TOTAL_PKT_BUF_SIZE)); + flush_dcache_range((ulong)pkt_base, + (ulong)(pkt_base + TOTAL_PKT_BUF_SIZE)); priv->rx_dma_owner_idx0 = 0; priv->tx_cpu_owner_idx0 = 0; @@ -965,7 +966,7 @@ static int mtk_eth_send(struct udevice *dev, void *packet, int length) pkt_base = (void *)phys_to_virt(priv->tx_ring_noc[idx].txd_info1.SDP0); memcpy(pkt_base, packet, length); - flush_dcache_range((u32)pkt_base, (u32)pkt_base + + flush_dcache_range((ulong)pkt_base, (ulong)pkt_base + roundup(length, ARCH_DMA_MINALIGN)); priv->tx_ring_noc[idx].txd_info2.SDL0 = length; @@ -991,7 +992,7 @@ static int mtk_eth_recv(struct udevice *dev, int flags, uchar **packetp) length = priv->rx_ring_noc[idx].rxd_info2.PLEN0; pkt_base = (void *)phys_to_virt(priv->rx_ring_noc[idx].rxd_info1.PDP0); - invalidate_dcache_range((u32)pkt_base, (u32)pkt_base + + invalidate_dcache_range((ulong)pkt_base, (ulong)pkt_base + roundup(length, ARCH_DMA_MINALIGN)); if (packetp) @@ -1019,7 +1020,7 @@ static int mtk_eth_probe(struct udevice *dev) { struct eth_pdata *pdata = dev_get_platdata(dev); struct mtk_eth_priv *priv = dev_get_priv(dev); - u32 iobase = pdata->iobase; + ulong iobase = pdata->iobase; int ret; /* Frame Engine Register Base */ -- 2.17.1

2 1

[PATCH v4 0/6] Add Cortina Access basic DM drivers
by Alex Nemirovsky 08 Feb '20

08 Feb '20

Cortina Access management has decided that we want to add formal upstream support of u-boot going forward for our line of SoCs and evaluation boards. Our line of SoC’s all begin with the “CA” designation followed by 4 digits. i.e. CAxxxx. The CAxxxx series supports both ARM and MIPS ISA based custom cores. All our drivers have cross platform support for both CPU ISAs. They will be placed in the normal drivers tree in u-boot. In addition, our SoCs and development boards share common Cortina specific features which are not driver related. Those changes will be maintained in board/cortina/common. While specific development boards will be in board/cortina/board_name. We would like to have a git-mailrc alias of "cortina" to allow us to better maintain and support our boards and common features found in the board/cortina subtree. Changes in v4: - clean up presidio_asic.h per trini recommendations - use autogen savedefconfig instead of manual maintained file Changes in v3: - Remove CA ARM and MIPS common subdirectories from board/cortina/common after further discussions with trini - clean up comment blocks - fix rmw of baud rate bitfield change - fixed dts closing bracket indentation - presidio.h: remove deadcode from presidio.h - presidio.h: remove CA_REG_READ/CA_REG_WRITE wrapper macros - presidio.h: remove CA77xx define replace use CA common Kconfig SoC selection instead - select SOC_CA7774 via board's Kconfig - select BIT64 via board's Kconfig instead of presidio.h Changes in v2: - Modified filepath for CA ARM and MIPS per trini's recommendation - Rename driver in DT namespace for consistency between all CA drivers. - Remove blank line after SPDX identifier - Remove Authorship as it is already recorded within Git and is redundant - Replace printf() as debug() - Rename driver in DT namespace for consistency between all CA drivers. - Remove blank line after SPDX identifier - Remove authorship comment as it is already recorded within Git and is redundant - Use setbits_32() for read-modify-write operation. - Rename driver in DT namespace for consistency between all CA drivers. - Remove blank line after SPDX identifier - Remove authorship comment as it is already recorded within Git and is redundant - Merge serial_cortina.h reg defines into serial_cortina.c - Modify ca_serial_pending() and API to get resource. Alex Nemirovsky (2): MAINTAINERS, git-mailrc: cortina: add Custodian for Cortina Access Inc. board: presidio-asic: Add basic G3 engr. development board support Jason Li (4): gpio: do not include <asm/arch/gpio.h> for Cortina CAxxxx SoCs gpio: cortina_gpio: add DM_GPIO driver for CAxxxx SoCs watchdog: cortina_wdt: add support for HW WDT on CAxxxx SoCs serial: serial_cortina: add UART DM driver for CAxxxx SoCs MAINTAINERS | 16 +++ arch/arm/Kconfig | 5 + arch/arm/dts/Makefile | 2 + arch/arm/dts/ca-presidio-engboard.dts | 69 +++++++++++ arch/arm/include/asm/gpio.h | 2 +- arch/arm/mach-cortina/Makefile | 5 + board/cortina/common/Kconfig | 6 + board/cortina/presidio-asic/Kconfig | 18 +++ board/cortina/presidio-asic/MAINTAINERS | 6 + board/cortina/presidio-asic/Makefile | 8 ++ board/cortina/presidio-asic/lowlevel_init.S | 87 ++++++++++++++ board/cortina/presidio-asic/presidio.c | 134 ++++++++++++++++++++++ configs/cortina_presidio-asic-base_defconfig | 29 +++++ doc/git-mailrc | 2 + drivers/gpio/Kconfig | 8 ++ drivers/gpio/Makefile | 1 + drivers/gpio/cortina_gpio.c | 111 ++++++++++++++++++ drivers/serial/Kconfig | 7 ++ drivers/serial/Makefile | 2 +- drivers/serial/serial_cortina.c | 164 +++++++++++++++++++++++++++ drivers/watchdog/Kconfig | 8 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/cortina_wdt.c | 138 ++++++++++++++++++++++ include/configs/presidio_asic.h | 75 ++++++++++++ 24 files changed, 902 insertions(+), 2 deletions(-) create mode 100644 arch/arm/dts/ca-presidio-engboard.dts create mode 100644 arch/arm/mach-cortina/Makefile create mode 100644 board/cortina/common/Kconfig create mode 100644 board/cortina/presidio-asic/Kconfig create mode 100644 board/cortina/presidio-asic/MAINTAINERS create mode 100644 board/cortina/presidio-asic/Makefile create mode 100644 board/cortina/presidio-asic/lowlevel_init.S create mode 100644 board/cortina/presidio-asic/presidio.c create mode 100644 configs/cortina_presidio-asic-base_defconfig create mode 100644 drivers/gpio/cortina_gpio.c create mode 100644 drivers/serial/serial_cortina.c create mode 100644 drivers/watchdog/cortina_wdt.c create mode 100644 include/configs/presidio_asic.h -- 2.7.4

3 13