December 2020 - U-Boot

[PATCH] board: ti: k2g: Add support for K2G ICE with 1GHz Silicon
by Lokesh Vutla 17 Dec '20

17 Dec '20

Add board detection support for K2G ICE with FlagChip 1GHz silicon. Signed-off-by: Lokesh Vutla <lokeshvutla(a)ti.com> --- board/ti/ks2_evm/board.c | 4 ++-- board/ti/ks2_evm/board.h | 8 ++++++++ board/ti/ks2_evm/board_k2g.c | 7 +++++-- board/ti/ks2_evm/ddr3_k2g.c | 2 +- board/ti/ks2_evm/mux-k2g.h | 2 +- include/configs/k2g_evm.h | 2 ++ 6 files changed, 19 insertions(+), 6 deletions(-) diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c index c7be540028..53bc12791d 100644 --- a/board/ti/ks2_evm/board.c +++ b/board/ti/ks2_evm/board.c @@ -48,11 +48,11 @@ int dram_init(void) gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, CONFIG_MAX_RAM_BANK_SIZE); #if defined(CONFIG_TI_AEMIF) - if (!board_is_k2g_ice()) + if (!(board_is_k2g_ice() || board_is_k2g_i1())) aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs); #endif - if (!board_is_k2g_ice()) { + if (!(board_is_k2g_ice() || board_is_k2g_i1())) { if (ddr3_size) ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size); else diff --git a/board/ti/ks2_evm/board.h b/board/ti/ks2_evm/board.h index d0cfbf5a75..93fc3887f4 100644 --- a/board/ti/ks2_evm/board.h +++ b/board/ti/ks2_evm/board.h @@ -25,6 +25,10 @@ static inline int board_is_k2g_ice(void) { return board_ti_is("66AK2GIC"); } +static inline int board_is_k2g_i1(void) +{ + return board_ti_is("66AK2GI1"); +} #else static inline int board_is_k2g_gp(void) { @@ -34,6 +38,10 @@ static inline int board_is_k2g_ice(void) { return false; } +static inline int board_is_k2g_i1(void) +{ + return false; +} #endif void spl_init_keystone_plls(void); diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c index a71024bcbc..2be86d6d26 100644 --- a/board/ti/ks2_evm/board_k2g.c +++ b/board/ti/ks2_evm/board_k2g.c @@ -248,7 +248,8 @@ int board_fit_config_name_match(const char *name) else if (!strcmp(name, "keystone-k2g-evm") && (board_ti_is("66AK2GGP") || board_ti_is("66AK2GG1"))) return 0; - else if (!strcmp(name, "keystone-k2g-ice") && board_ti_is("66AK2GIC")) + else if (!strcmp(name, "keystone-k2g-ice") && + (board_ti_is("66AK2GIC") || board_is_k2g_i1())) return 0; else return -1; @@ -322,7 +323,7 @@ int embedded_dtb_select(void) BIT(9)); setbits_le32(K2G_GPIO1_BANK2_BASE + K2G_GPIO_SETDATA_OFFSET, BIT(9)); - } else if (board_is_k2g_ice()) { + } else if (board_is_k2g_ice() || board_is_k2g_i1()) { /* GBE Phy workaround. For Phy to latch the input * configuration, a GPIO reset is asserted at the * Phy reset pin to latch configuration correctly after SoC @@ -364,6 +365,8 @@ int board_late_init(void) env_set("board_name", "66AK2GG1\0"); else if (board_is_k2g_ice()) env_set("board_name", "66AK2GIC\0"); + else if (board_is_k2g_i1()) + env_set("board_name", "66AK2GI1\0"); #endif return 0; } diff --git a/board/ti/ks2_evm/ddr3_k2g.c b/board/ti/ks2_evm/ddr3_k2g.c index 563c5e9950..3000d7245e 100644 --- a/board/ti/ks2_evm/ddr3_k2g.c +++ b/board/ti/ks2_evm/ddr3_k2g.c @@ -174,7 +174,7 @@ u32 ddr3_init(void) } else if (board_is_k2g_gp()) { ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_800_2g); ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_800_2g); - } else if (board_is_k2g_ice()) { + } else if (board_is_k2g_ice() || board_is_k2g_i1()) { ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_800_512mb); ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_800_512mb); } diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h index 3ecf571c5c..fa6c92cbdf 100644 --- a/board/ti/ks2_evm/mux-k2g.h +++ b/board/ti/ks2_evm/mux-k2g.h @@ -377,7 +377,7 @@ void k2g_mux_config(void) configure_pin_mux(k2g_generic_pin_cfg); } else if (board_is_k2g_gp() || board_is_k2g_g1()) { configure_pin_mux(k2g_evm_pin_cfg); - } else if (board_is_k2g_ice()) { + } else if (board_is_k2g_ice() || board_is_k2g_i1()) { configure_pin_mux(k2g_ice_evm_pin_cfg); } else { puts("Unknown board, cannot configure pinmux."); diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index 83466b9e0c..4471eb4f6a 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -35,6 +35,8 @@ "setenv name_fdt keystone-k2g-evm.dtb; " \ "else if test $board_name = 66AK2GIC; then " \ "setenv name_fdt keystone-k2g-ice.dtb; " \ + "else if test $board_name = 66AK2GI1; then " \ + "setenv name_fdt keystone-k2g-ice.dtb; " \ "else if test $name_fdt = undefined; then " \ "echo WARNING: Could not determine device tree to use;"\ "fi;fi;fi;fi; setenv fdtfile ${name_fdt}\0" \ -- 2.29.2

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[PATCH] cmd: usb_mass_storage: show device interface name
by Marek Szyprowski 17 Dec '20

17 Dec '20

Show the interface name (i.e. 'mmc') in the information string to ease user checking which device is exported via USB Mass Storage protocol. Signed-off-by: Marek Szyprowski <m.szyprowski(a)samsung.com> --- cmd/usb_mass_storage.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c index cf2f55994e..14fa7233c7 100644 --- a/cmd/usb_mass_storage.c +++ b/cmd/usb_mass_storage.c @@ -115,8 +115,8 @@ static int ums_init(const char *devtype, const char *devnums_part_str) ums[ums_count].name = name; ums[ums_count].block_dev = *block_dev; - printf("UMS: LUN %d, dev %d, hwpart %d, sector %#x, count %#x\n", - ums_count, ums[ums_count].block_dev.devnum, + printf("UMS: LUN %d, dev %s %d, hwpart %d, sector %#x, count %#x\n", + ums_count, devtype, ums[ums_count].block_dev.devnum, ums[ums_count].block_dev.hwpart, ums[ums_count].start_sector, ums[ums_count].num_sectors); -- 2.17.1

2 1

RK3399 DSI and panel driver question
by Michael J. Hammel 17 Dec '20

17 Dec '20

Does anyone have any experience with RK3399 DSI and panel bringup in u- boot? I believe I have the vopl and mipi configured - I can see the backlight come on at least - but I think I need a panel-specific driver. Simple-panel doesn't send dsi commands so the panel never inits. And I'm not clear if I need the dsi-host driver bound to the vopl in the way the stm32f469 does it. I have a BSP that uses an old u-boot with backported Linux DRM code that supposedly works but I've not been able to get that working either. I found a dsi panel driver there but it wants a mipi_dsi_device to send dsi commands and I'm not sure how to configure one of those. Any pointers would be appreciated. Thanks. -- Michael J. Hammel <uboot(a)graphics-muse.org>

2 1

AT91 - SAMA5D27 adding a new board - common initialisation code and file names
by Tim Small 17 Dec '20

17 Dec '20

Hi, I'm in the process of adding support to U-Boot for an AT91 SAMA5D27 based board. There may be a USB port configuration change pending, but otherwise it's functionally complete. The design is quite similar to the Microchip SAMA5D2 Xplained Board, to the extent that I have only 6 lines of code changes out of the ~180 lines of (non-comment) code in board/atmel/sama5d2_xplained/sama5d2_xplained.c In particular the clocks and memory setup code is non-trivial, but identical. With this in mind I was wondering whether (and to what extent) an acceptable patch to support this board would require factoring out this common code? The (non-comment) diff between my interim init code for the new board, and eval/reference board is currently: --- board/atmel/sama5d2_xplained/sama5d2_xplained.c 2020-12-15 10:52:32.175616057 +0000 +++ board/scs/cubemb1/cubemb1.c 2020-12-17 14:42:42.399610818 +0000 @@ -30,10 +30,6 @@ #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) { -#ifdef CONFIG_DM_VIDEO - at91_video_show_board_info(); -#endif - at91_pda_detect(); return 0; } #endif @@ -83,13 +79,13 @@ return 0; } -#define AT24MAC_MAC_OFFSET 0x9a +#define MAC24AA_MAC_OFFSET 0xfa #ifdef CONFIG_MISC_INIT_R int misc_init_r(void) { #ifdef CONFIG_I2C_EEPROM - at91_set_ethaddr(AT24MAC_MAC_OFFSET); + at91_set_ethaddr(MAC24AA_MAC_OFFSET); #endif return 0; I'm also uncertain about file naming - there seem to be a number of different conventions in use for file and directory names (different combinations of SoC, board, architecture, and manufacturer). The new board is: mfr: South Coast Science model: Cube MB v1 Do the following file and directory names look reasonable? arch/arm/dts/Makefile | 3 +++ arch/arm/dts/at91-sama5d27_cubemb1.dts | 263 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/mach-at91/Kconfig | 8 +++++++ board/scs/cubemb1/Kconfig | 15 +++++++++++++ board/scs/cubemb1/MAINTAINERS | 6 ++++++ board/scs/cubemb1/Makefile | 8 +++++++ board/scs/cubemb1/cubemb1.c | 198 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ configs/cubemb1_emmc_defconfig | 104 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ configs/cubemb1_sdcard_defconfig | 104 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ include/configs/cubemb1.h | 9 ++++++++ 10 files changed, 718 insertions(+) Cheers, Tim. -- South East Open Source Solutions Limited Registered in England and Wales with company number 06134732. Registered Office: 2 Powell Gardens, Redhill, Surrey, RH1 1TQ VAT number: GB 900 6633 53 http://seoss.co.uk/ +44-(0)1273-808309

2 1

[PATCH] rockchip: roc-pc-rk3399: fix boot from SPI flash on spi1
by Markus Reichl 17 Dec '20

17 Dec '20

Set the default bus for the onboard SPI flash to 1. This fixes booting from U-Boot in SPI flash on the roc-pc-rk3399 board and it's mezzanine variant. Signed-off-by: Markus Reichl <m.reichl(a)fivetechno.de> --- configs/roc-pc-mezzanine-rk3399_defconfig | 1 + configs/roc-pc-rk3399_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index ae16f3558a..8aa5a15518 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -42,6 +42,7 @@ CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SF_DEFAULT_BUS=1 CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 774707b115..927b57685d 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -41,6 +41,7 @@ CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SF_DEFAULT_BUS=1 CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y -- 2.29.2

1 0

Please pull u-boot-dm/next into -next
by Simon Glass 17 Dec '20

17 Dec '20

2 4

[PATCH] board: amlogic: vim3: read ethernet MAC address from efuse
by Marek Szyprowski 17 Dec '20

17 Dec '20

Add the board specific code for reading built-in ethernet MAC address from efuse. Signed-off-by: Marek Szyprowski <m.szyprowski(a)samsung.com> --- board/amlogic/vim3/vim3.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/board/amlogic/vim3/vim3.c b/board/amlogic/vim3/vim3.c index 09ef39ff30..a36df61583 100644 --- a/board/amlogic/vim3/vim3.c +++ b/board/amlogic/vim3/vim3.c @@ -11,6 +11,7 @@ #include <net.h> #include <asm/io.h> #include <asm/arch/eth.h> +#include <asm/arch/sm.h> #include <i2c.h> #include "khadas-mcu.h" @@ -129,9 +130,27 @@ int meson_ft_board_setup(void *blob, struct bd_info *bd) return 0; } +#define EFUSE_MAC_OFFSET 0 +#define EFUSE_MAC_SIZE 6 + int misc_init_r(void) { + uint8_t mac_addr[EFUSE_MAC_SIZE]; + ssize_t len; + meson_eth_init(PHY_INTERFACE_MODE_RGMII, 0); + if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { + len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, + mac_addr, EFUSE_MAC_SIZE); + if (len != EFUSE_MAC_SIZE) + return 0; + + if (is_valid_ethaddr(mac_addr)) + eth_env_set_enetaddr("ethaddr", mac_addr); + else + meson_generate_serial_ethaddr(); + } + return 0; } -- 2.17.1

3 2

Orange pi zero plus and bitmap loading
by aurélien gibaud 17 Dec '20

17 Dec '20

Hi, I am playing with an orange pi zero plus + latest armbian buster available image. When booting, i see the following error message from u-boot: *** Reading file would overwrite reserved memory **Failed to load '/boot/boot.bmp'* *There is no valid bmp file at the given address* The file itself (*/boot/boot.bmp*) exists. I took a look at the u-boot code and saw the bitmap must be loaded at a given address: *loadaddr* if defined or *CONFIG_SYS_LOAD_ADDR*. In the u-boot shell, i checked if *loadaddr* is defined: *=> print loadaddr* *## Error: "loadaddr" not defined* According to this feedback, i checked in u-boot code the value of *CONFIG_SYS_LOAD_ADDR*. It seems to be defined in *./include/configs/sunxi-common.h*. There are two possible values here : 0x22000000 or 0x42000000 so i tried both: *=> load mmc 0 0x22000000 /boot/boot.bmp** Reading file would overwrite reserved memory **Failed to load '/boot/boot.bmp'* *=> load mmc 0 0x42000000 /boot/boot.bmp230454 bytes read in 20 ms (11 MiB/s)* Is there any chance the address used for loading is wrong or am i misunderstanding something? Regards, Orel

1 0

[PATCH] drivers/net: Add support for 10G Base-R IP core version to xilinx_axi_enet driver
by Alessandro Temil 17 Dec '20

17 Dec '20

diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c index 8af3711204..3b739bd407 100644 --- a/drivers/net/xilinx_axi_emac.c +++ b/drivers/net/xilinx_axi_emac.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* + * Copyright (C) 2020 Waymo LLC * Copyright (C) 2011 Michal Simek <monstr(a)monstr.eu> * Copyright (C) 2011 PetaLogix * Copyright (C) 2010 Xilinx, Inc. All rights reserved. @@ -72,10 +73,25 @@ DECLARE_GLOBAL_DATA_PTR; #define XAXIDMA_BD_CTRL_TXSOF_MASK 0x08000000 /* First tx packet */ #define XAXIDMA_BD_CTRL_TXEOF_MASK 0x04000000 /* Last tx packet */ +/* Bitmasks for the XXV Ethernet MAC */ +#define XXV_TC_TX_MASK 0x00000001 +#define XXV_TC_FCS_MASK 0x00000002 +#define XXV_RCW1_RX_MASK 0x00000001 +#define XXV_RCW1_FCS_MASK 0x00000002 + #define DMAALIGN 128 +#define XXV_MIN_PKT_SIZE 60 + static u8 rxframe[PKTSIZE_ALIGN] __attribute((aligned(DMAALIGN))); +static u8 txminframe[XXV_MIN_PKT_SIZE] __attribute((aligned(DMAALIGN))); + +enum emac_variant { + EMAC_1G = 0, + EMAC_10G_25G, +}; + /* Reflect dma offsets */ struct axidma_reg { u32 control; /* DMACR */ @@ -97,6 +113,7 @@ struct axidma_priv { struct mii_dev *bus; u8 eth_hasnobuf; int phy_of_handle; + enum emac_variant mactype; }; /* BD descriptors */ @@ -143,6 +160,14 @@ struct axi_regs { u32 uaw1; /* 0x704: Unicast address word 1 */ }; +struct xxv_axi_regs { + u32 gt_reset; /* 0x0 */ + u32 reserved[2]; + u32 tc; /* 0xC: Tx Configuration */ + u32 reserved2; + u32 rcw1; /* 0x14: Rx Configuration Word 1 */ +}; + /* Use MII register 1 (MII status register) to detect PHY */ #define PHY_DETECT_REG 1 @@ -191,6 +216,8 @@ static inline void axienet_dma_write(struct axidma_bd *bd, u32 *desc) static u32 phyread(struct axidma_priv *priv, u32 phyaddress, u32 registernum, u16 *val) { + if (priv->mactype == EMAC_10G_25G) return 0; + struct axi_regs *regs = priv->iobase; u32 mdioctrlreg = 0; @@ -217,6 +244,8 @@ static u32 phyread(struct axidma_priv *priv, u32 phyaddress, u32 registernum, static u32 phywrite(struct axidma_priv *priv, u32 phyaddress, u32 registernum, u32 data) { + if (priv->mactype == EMAC_10G_25G) return 0; + struct axi_regs *regs = priv->iobase; u32 mdioctrlreg = 0; @@ -374,6 +403,29 @@ static void axiemac_stop(struct udevice *dev) debug("axiemac: Halted\n"); } +static int xxv_axi_ethernet_init(struct axidma_priv *priv) +{ + struct xxv_axi_regs *regs = priv->iobase; + + int val = readl(&regs->rcw1) & ~XXV_RCW1_FCS_MASK; + val |= XXV_RCW1_FCS_MASK; + writel(val, &regs->rcw1); + + val = readl(&regs->tc) & ~XXV_TC_FCS_MASK; + val |= XXV_TC_FCS_MASK; + writel(val, &regs->tc); + + val = readl(&regs->tc) & ~XXV_TC_TX_MASK; + val |= XXV_TC_TX_MASK; + writel(val, &regs->tc); + + val = readl(&regs->rcw1) & ~XXV_RCW1_RX_MASK; + val |= XXV_RCW1_RX_MASK; + writel(val, &regs->rcw1); + + return 0; +} + static int axi_ethernet_init(struct axidma_priv *priv) { struct axi_regs *regs = priv->iobase; @@ -427,6 +479,9 @@ static int axiemac_write_hwaddr(struct udevice *dev) { struct eth_pdata *pdata = dev_get_platdata(dev); struct axidma_priv *priv = dev_get_priv(dev); + + if (priv->mactype == EMAC_10G_25G) return 0; + struct axi_regs *regs = priv->iobase; /* Set the MAC address */ @@ -466,7 +521,6 @@ static void axi_dma_init(struct axidma_priv *priv) static int axiemac_start(struct udevice *dev) { struct axidma_priv *priv = dev_get_priv(dev); - struct axi_regs *regs = priv->iobase; u32 temp; debug("axiemac: Init started\n"); @@ -479,8 +533,13 @@ static int axiemac_start(struct udevice *dev) axi_dma_init(priv); /* Initialize AxiEthernet hardware. */ - if (axi_ethernet_init(priv)) - return -1; + if (priv->mactype == EMAC_1G) { + if (axi_ethernet_init(priv)) + return -1; + } else { + if (xxv_axi_ethernet_init(priv)) + return -1; + } /* Disable all RX interrupts before RxBD space setup */ temp = readl(&priv->dmarx->control); @@ -514,15 +573,29 @@ static int axiemac_start(struct udevice *dev) /* Rx BD is ready - start */ axienet_dma_write(&rx_bd, &priv->dmarx->tail); - /* Enable TX */ - writel(XAE_TC_TX_MASK, &regs->tc); - /* Enable RX */ - writel(XAE_RCW1_RX_MASK, &regs->rcw1); - - /* PHY setup */ - if (!setup_phy(dev)) { - axiemac_stop(dev); - return -1; + if (priv->mactype == EMAC_1G) { + struct axi_regs *regs = priv->iobase; + /* Enable TX */ + writel(XAE_TC_TX_MASK, &regs->tc); + /* Enable RX */ + writel(XAE_RCW1_RX_MASK, &regs->rcw1); + + /* PHY setup */ + if (!setup_phy(dev)) { + axiemac_stop(dev); + return -1; + } + } else { + struct xxv_axi_regs *regs = priv->iobase; + /* Enable TX */ + temp = readl(&regs->tc) & ~XXV_TC_TX_MASK; + temp |= XXV_TC_TX_MASK; + writel(temp, &regs->tc); + + /* Enable RX */ + temp = readl(&regs->rcw1) & ~XXV_RCW1_RX_MASK; + temp |= XXV_RCW1_RX_MASK; + writel(temp, &regs->rcw1); } debug("axiemac: Init complete\n"); @@ -537,6 +610,15 @@ static int axiemac_send(struct udevice *dev, void *ptr, int len) if (len > PKTSIZE_ALIGN) len = PKTSIZE_ALIGN; + /* If size is less than min packet size, pad to min size */ + if (priv->mactype == EMAC_10G_25G + && len < XXV_MIN_PKT_SIZE) { + memset(txminframe, 0, XXV_MIN_PKT_SIZE); + memcpy(txminframe, ptr, len); + len = XXV_MIN_PKT_SIZE; + ptr = txminframe; + } + /* Flush packet to main memory to be trasfered by DMA */ flush_cache((phys_addr_t)ptr, len); @@ -621,7 +703,7 @@ static int axiemac_recv(struct udevice *dev, int flags, uchar **packetp) temp = readl(&priv->dmarx->control); temp &= ~XAXIDMA_IRQ_ALL_MASK; writel(temp, &priv->dmarx->control); - if (!priv->eth_hasnobuf) + if ((!priv->eth_hasnobuf) && priv->mactype == EMAC_1G) length = rx_bd.app4 & 0xFFFF; /* max length mask */ else length = rx_bd.status & XAXIDMA_BD_STS_ACTUAL_LEN_MASK; @@ -701,7 +783,8 @@ static int axi_emac_probe(struct udevice *dev) if (ret) return ret; - axiemac_phy_init(dev); + if (priv->mactype == EMAC_1G) + axiemac_phy_init(dev); return 0; } @@ -736,6 +819,7 @@ static int axi_emac_ofdata_to_platdata(struct udevice *dev) pdata->iobase = dev_read_addr(dev); priv->iobase = (struct axi_regs *)pdata->iobase; + priv->mactype = dev_get_driver_data(dev); offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "axistream-connected"); @@ -760,7 +844,11 @@ static int axi_emac_ofdata_to_platdata(struct udevice *dev) priv->phy_of_handle = offset; } - phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL); + if (priv->mactype == EMAC_1G) + phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL); + else + phy_mode = ""; + if (phy_mode) pdata->phy_interface = phy_get_interface_by_name(phy_mode); if (pdata->phy_interface == -1) { @@ -779,7 +867,8 @@ static int axi_emac_ofdata_to_platdata(struct udevice *dev) } static const struct udevice_id axi_emac_ids[] = { - { .compatible = "xlnx,axi-ethernet-1.00.a" }, + { .compatible = "xlnx,axi-ethernet-1.00.a", .data = (uintptr_t)EMAC_1G }, + { .compatible = "xlnx,xxv-ethernet-1.0", .data = (uintptr_t)EMAC_10G_25G }, { } };

3 6

[PATCH v1 1/2] imx8mq: configs: add support for distro boot commands
by Alice Guo (OSS) 17 Dec '20

17 Dec '20

From: Alice Guo <alice.guo(a)nxp.com> Supported boot device types in iMX8MQ: MMC, DHCP. CONFIG_CMD_PART is added for command part and CONFIG_CMD_FS_GENERIC is for command fstype. scriptaddr is the location in RAM where boot.scr.uimg/boot.scr will be loaded to prior to execution. kernel_addr_r is the location in RAM where the kernel will be loaded to. Delete unnecessary environment variables because "run distro_bootcmd" is set to be the default boot mode. Signed-off-by: Alice Guo <alice.guo(a)nxp.com> --- configs/imx8mq_evk_defconfig | 2 + include/configs/imx8mq_evk.h | 78 ++++++------------------------------ 2 files changed, 14 insertions(+), 66 deletions(-) diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index de91a76d41..901841ea36 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -36,6 +36,8 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y +CONFIG_CMD_PART=y +CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 3f9a3bc100..1f740f0745 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -74,80 +74,26 @@ #define IMX_FEC_BASE 0x30BE0000 #endif -#define CONFIG_MFG_ENV_SETTINGS \ - "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ - "rdinit=/linuxrc " \ - "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ - "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ - "g_mass_storage.iSerialNumber=\"\" "\ - "clk_ignore_unused "\ - "\0" \ - "initrd_addr=0x43800000\0" \ - "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ +#ifndef CONFIG_SPL_BUILD +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(MMC, mmc, 1) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> +#endif + /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_MFG_ENV_SETTINGS \ - "script=boot.scr\0" \ + BOOTENV \ + "scriptaddr=0x43500000\0" \ + "kernel_addr_r=0x40880000\0" \ "image=Image\0" \ "console=ttymxc0,115200\0" \ "fdt_addr=0x43000000\0" \ - "boot_fdt=try\0" \ "fdt_file=imx8mq-evk.dtb\0" \ - "initrd_addr=0x43800000\0" \ - "bootm_size=0x10000000\0" \ - "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ - "mmcautodetect=yes\0" \ - "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ - "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if run loadfdt; then " \ - "booti ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "else " \ - "echo wait for boot; " \ - "fi;\0" \ - "netargs=setenv bootargs console=${console} " \ - "root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ - "run netargs; " \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "${get_cmd} ${loadaddr} ${image}; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ - "booti ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "else " \ - "booti; " \ - "fi;\0" - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else booti ${loadaddr} - ${fdt_addr}; fi" /* Link Definitions */ #define CONFIG_LOADADDR 0x40480000 -- 2.17.1

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