January 2020 - U-Boot

[PATCH v3] Add support for SoM "VoCore2".
by Mauro Condarelli 28 Jan '20

28 Jan '20

Small patch series to add support for VoCore/VoCore2 board. VoCore is open hardware and runs OpenWrt/LEDE. It has WIFI, USB, UART, 20+ GPIOs but is only one inch square. It will help you to make a smart house, study embedded system or even make the tiniest router in the world. Details about this SoM can be found at "https://vocore.io/v2.html". Signed-off-by: Mauro Condarelli <mc5686(a)mclink.it> --- Changes in v3: - based on top of Weijie Gao patchset: "[v3,xx/20]Refactor the architecture parts of mt7628" Changes in v2: - Removed some dead code - Changed Author to my full name (no nick) - Removed unwanted fixup to .dts generation (not my call). - Fixed commit message - Fixed various variables/filenames to include Vendor name - Changed Vendor name (Vonger -> Vocore) MAINTAINERS | 1 + arch/mips/dts/Makefile | 1 + arch/mips/dts/mt7628a.dtsi | 56 ++++------------- arch/mips/dts/vocore_vocore2.dts | 76 +++++++++++++++++++++++ arch/mips/mach-mtmips/Kconfig | 8 +++ board/vocore/vocore2/Kconfig | 12 ++++ board/vocore/vocore2/Makefile | 3 + board/vocore/vocore2/board.c | 33 ++++++++++ configs/vocore2_defconfig | 100 +++++++++++++++++++++++++++++++ include/configs/vocore2.h | 66 ++++++++++++++++++++ 10 files changed, 311 insertions(+), 45 deletions(-) create mode 100644 arch/mips/dts/vocore_vocore2.dts create mode 100644 board/vocore/vocore2/Kconfig create mode 100644 board/vocore/vocore2/Makefile create mode 100644 board/vocore/vocore2/board.c create mode 100644 configs/vocore2_defconfig create mode 100644 include/configs/vocore2.h diff --git a/MAINTAINERS b/MAINTAINERS index 7d2729dfb0..aef0f4a26d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1,3 +1,4 @@ +source /home/mcon/.basheditor/remote-debugging-v1.sh localhost 33333 #BASHEDITOR-TMP-REMOTE-DEBUGGING-END|Origin line: Descriptions of section entries: P: Person (obsolete) diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile index cbd0c8bc8b..f711e9fb59 100644 --- a/arch/mips/dts/Makefile +++ b/arch/mips/dts/Makefile @@ -23,6 +23,7 @@ dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f(a)st1704.dtb dtb-$(CONFIG_BOARD_SFR_NB4_SER) += sfr,nb4-ser.dtb dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb +dtb-$(CONFIG_BOARD_VOCORE2) += vocore_vocore2.dtb dtb-$(CONFIG_TARGET_JZ4780_CI20) += ci20.dtb dtb-$(CONFIG_SOC_LUTON) += luton_pcb090.dtb luton_pcb091.dtb dtb-$(CONFIG_SOC_OCELOT) += ocelot_pcb120.dtb ocelot_pcb123.dtb diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi index 6baa63add3..3d4f29e0c5 100644 --- a/arch/mips/dts/mt7628a.dtsi +++ b/arch/mips/dts/mt7628a.dtsi @@ -7,6 +7,11 @@ #size-cells = <1>; compatible = "ralink,mt7628a-soc"; + resetc: reset-controller { + compatible = "ralink,rt2880-reset"; + #reset-cells = <1>; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -61,6 +66,12 @@ u-boot,dm-pre-reloc; }; + clkgate: clkgate@0x30 { + reg = <0x30 0x4>; + compatible = "mediatek,mediatek,mt7628-clk"; + #clock-cells = <1>; + }; + rstctrl: rstctrl@0x34 { reg = <0x34 0x4>; compatible = "mediatek,mtmips-reset"; @@ -228,32 +239,6 @@ resets = <&rstctrl MT7628_TIMER_RST>; reset-names = "wdt"; - - interrupt-parent = <&intc>; - interrupts = <24>; - }; - - intc: interrupt-controller@200 { - compatible = "ralink,rt2880-intc"; - reg = <0x200 0x100>; - - interrupt-controller; - #interrupt-cells = <1>; - - resets = <&rstctrl MT7628_INT_RST>; - reset-names = "intc"; - - interrupt-parent = <&cpuintc>; - interrupts = <2>; - - ralink,intc-registers = <0x9c 0xa0 - 0x6c 0xa4 - 0x80 0x78>; - }; - - memory-controller@300 { - compatible = "ralink,mt7620a-memc"; - reg = <0x300 0x100>; }; gpio@600 { @@ -266,9 +251,6 @@ resets = <&rstctrl MT7628_PIO_RST>; reset-names = "pio"; - interrupt-parent = <&intc>; - interrupts = <6>; - gpio0: bank@0 { reg = <0>; compatible = "mtk,mt7621-gpio-bank"; @@ -316,9 +298,6 @@ resets = <&rstctrl MT7628_UART0_RST>; reset-names = "uart0"; - interrupt-parent = <&intc>; - interrupts = <20>; - reg-shift = <2>; }; @@ -334,9 +313,6 @@ resets = <&rstctrl MT7628_UART1_RST>; reset-names = "uart1"; - interrupt-parent = <&intc>; - interrupts = <21>; - reg-shift = <2>; }; @@ -352,9 +328,6 @@ resets = <&rstctrl MT7628_UART2_RST>; reset-names = "uart2"; - interrupt-parent = <&intc>; - interrupts = <22>; - reg-shift = <2>; }; }; @@ -366,8 +339,6 @@ resets = <&rstctrl MT7628_EPHY_RST>; reset-names = "ephy"; - - syscon = <&sysc>; }; usb_phy: usb-phy@10120000 { @@ -376,8 +347,6 @@ #phy-cells = <0>; - ralink,sysctl = <&sysc>; - resets = <&rstctrl MT7628_UPHY_RST>; reset-names = "phy"; @@ -391,9 +360,6 @@ phys = <&usb_phy>; phy-names = "usb"; - - interrupt-parent = <&intc>; - interrupts = <18>; }; mmc: mmc@10130000 { diff --git a/arch/mips/dts/vocore_vocore2.dts b/arch/mips/dts/vocore_vocore2.dts new file mode 100644 index 0000000000..b8fd87a3e9 --- /dev/null +++ b/arch/mips/dts/vocore_vocore2.dts @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Mauro Condarelli <mc5686(a)mclink.it> + */ + +/dts-v1/; + +#include "mt7628a.dtsi" +#include <dt-bindings/gpio/gpio.h> + +/ { + compatible = "vocore,vocore2", "ralink,mt7628a-soc"; + model = "VoCore2"; + + aliases { + serial0 = &uart2; + spi0 = &spi0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; + leds { + compatible = "gpio-leds"; + + power { + label = "vocore:power"; + gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + chosen { + bootargs = "console=ttyS2,115200"; + stdout-path = &uart2; + }; +}; + +&pinctrl { + state_default: pin_state { + p0led { + groups = "p0led_a"; + function = "led"; + }; + }; +}; + +&uart2 { + status = "okay"; +}; + +&spi0 { + status = "okay"; + nor0: spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <25000000>; + reg = <0>; + }; +}; + +&eth { + pinctrl-names = "default"; + pinctrl-0 = <&ephy_iot_mode>; + mediatek,poll-link-phy = <0>; +}; + +&mmc { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&sd_iot_mode>; + pinctrl-1 = <&sd_iot_mode>; +}; diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig index bcd635f438..489e466daf 100644 --- a/arch/mips/mach-mtmips/Kconfig +++ b/arch/mips/mach-mtmips/Kconfig @@ -83,6 +83,13 @@ config BOARD_MT7628_RFB SPI-NOR flash, 1 built-in switch with 5 ports, 1 UART, 1 USB host, 1 SDXC, 1 PCIe socket and JTAG pins. +config BOARD_VOCORE2 + bool "VoCore2" + depends on SOC_MT7628 + help + VoCore VoCore2 board has a MT7628 SoC with 128 MiB of RAM + and 16 MiB of flash (SPI). + endchoice config SPL_UART2_SPIS_PINMUX @@ -96,5 +103,6 @@ config SPL_UART2_SPIS_PINMUX source "board/gardena/smart-gateway-mt7688/Kconfig" source "board/mediatek/mt7628/Kconfig" source "board/seeed/linkit-smart-7688/Kconfig" +source "board/vocore/vocore2/Kconfig" endmenu diff --git a/board/vocore/vocore2/Kconfig b/board/vocore/vocore2/Kconfig new file mode 100644 index 0000000000..baeff31b69 --- /dev/null +++ b/board/vocore/vocore2/Kconfig @@ -0,0 +1,12 @@ +if BOARD_VOCORE2 + +config SYS_BOARD + default "vocore2" + +config SYS_VENDOR + default "vocore" + +config SYS_CONFIG_NAME + default "vocore2" + +endif diff --git a/board/vocore/vocore2/Makefile b/board/vocore/vocore2/Makefile new file mode 100644 index 0000000000..70cd7a8e56 --- /dev/null +++ b/board/vocore/vocore2/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += board.o diff --git a/board/vocore/vocore2/board.c b/board/vocore/vocore2/board.c new file mode 100644 index 0000000000..d387715d14 --- /dev/null +++ b/board/vocore/vocore2/board.c @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Mauro Condarelli <mc5686(a)mclink.it> + * + * Note: this is largely copied from: + * board/seeed/linkit_smart_7688/board.c + * Copyright (C) 2018 Stefan Roese <sr(a)denx.de> + */ + +#include <common.h> +#include <asm/io.h> + +#define MT76XX_GPIO1_MODE 0x10000060 + +void board_debug_uart_init(void) +{ + void __iomem *gpio_mode; + + /* Select UART2 mode instead of GPIO mode (default) */ + gpio_mode = ioremap_nocache(MT76XX_GPIO1_MODE, 0x100); + clrbits_le32(gpio_mode, GENMASK(27, 26)); +} + +int board_early_init_f(void) +{ + /* + * The pin muxing of UART2 also needs to be done, if debug uart + * is not enabled. So we need to call this function here as well. + */ + board_debug_uart_init(); + + return 0; +} diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig new file mode 100644 index 0000000000..04c7a6a6f5 --- /dev/null +++ b/configs/vocore2_defconfig @@ -0,0 +1,100 @@ +CONFIG_MIPS=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_ENV_SIZE=0x1000 +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x20000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL=y +CONFIG_ARCH_MTMIPS=y +CONFIG_BOARD_VOCORE2=y +CONFIG_SPL_UART2_SPIS_PINMUX=y +CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y +CONFIG_MIPS_BOOT_FDT=y +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_SYS_BOOT_GET_CMDLINE=y +CONFIG_SYS_BOOT_GET_KBD=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_USE_BOOTARGS=y +CONFIG_LOGLEVEL=8 +CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_VERSION_VARIABLE=y +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_HUSH_PARSER=y +# CONFIG_AUTOBOOT is not set +CONFIG_CMD_LICENSE=y +# CONFIG_BOOTM_NETBSD is not set +# CONFIG_BOOTM_PLAN9 is not set +# CONFIG_BOOTM_RTEMS is not set +# CONFIG_BOOTM_VXWORKS is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_MEMINFO=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_GPT_RENAME=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_PART=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_WDT=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0" +CONFIG_MTDPARTS_DEFAULT="spi0.0:312k(u-boot),4k(env),4k(factory),2368k(kernel),-(filesystem)" +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2" +CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_FAT_INTERFACE="mmc" +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +# CONFIG_NET is not set +CONFIG_SPL_DM=y +# CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_LED=y +CONFIG_LED_BLINK=y +CONFIG_LED_GPIO=y +CONFIG_MMC=y +CONFIG_DM_MMC=y +# CONFIG_MMC_HW_PARTITIONING is not set +CONFIG_MMC_MTK=y +CONFIG_MTD=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_MTD=y +# CONFIG_DM_ETH is not set +# CONFIG_RAM_ROCKCHIP_DEBUG is not set +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_CONS_INDEX=3 +CONFIG_SPI=y +CONFIG_MT7621_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_STORAGE=y +CONFIG_WDT=y +CONFIG_WDT_MT7621=y +CONFIG_FS_EXT4=y +CONFIG_LZMA=y +CONFIG_LZO=y +CONFIG_FDT_FIXUP_PARTITIONS=y diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h new file mode 100644 index 0000000000..602a78d0d5 --- /dev/null +++ b/include/configs/vocore2.h @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 Mauro Condarelli <mc5686(a)mclink.it> + */ + +#ifndef __VOCORE2_CONFIG_H__ +#define __VOCORE2_CONFIG_H__ + +/* CPU */ +#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000 + +/* RAM */ +#define CONFIG_SYS_SDRAM_BASE 0x80000000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000 + +#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 + +/* SPL */ +#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) +#define CONFIG_SKIP_LOWLEVEL_INIT +#endif + +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SPL_BSS_START_ADDR 0x80010000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x10000 +#define CONFIG_SPL_MAX_SIZE 0x10000 + +/* Dummy value */ +#define CONFIG_SYS_UBOOT_BASE 0 + +/* Serial SPL */ +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL_SUPPORT) +#define CONFIG_SYS_NS16550_MEM32 +#define CONFIG_SYS_NS16550_CLK 40000000 +#define CONFIG_SYS_NS16550_REG_SIZE -4 +#define CONFIG_SYS_NS16550_COM3 0xb0000e00 +#define CONFIG_CONS_INDEX 3 + +#endif + +/* UART */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ + 230400, 460800, 921600 } + +/* RAM */ +#define CONFIG_SYS_MEMTEST_START 0x80100000 +#define CONFIG_SYS_MEMTEST_END 0x80400000 + +/* Memory usage */ +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) +#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) +#define CONFIG_SYS_CBSIZE 512 + +/* U-Boot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE + +/* Environment settings */ +#if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT) +#define CONFIG_EXTRA_ENV_SETTINGS \ + "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" +#endif + +#endif//__VOCORE2_CONFIG_H__ -- 2.25.0

3 6

[U-Boot] rtc: s35392a: encode command correctly
by Ian Ray 28 Jan '20

28 Jan '20

The 3-bit "command", or register, is encoded within the device address. Configure the device accordingly, and pass command in DM I2C read/write calls correctly. Signed-off-by: Ian Ray <ian.ray(a)ge.com> Signed-off-by: Robert Beckett <bob.beckett(a)collabora.com> --- Note: Split out of https://patchwork.ozlabs.org/cover/1182351/. --- drivers/rtc/s35392a.c | 29 ++++++++++++++++++----------- 1 file changed, 18 insertions(+), 11 deletions(-) diff --git a/drivers/rtc/s35392a.c b/drivers/rtc/s35392a.c index 4f478cc..3bfe481 100644 --- a/drivers/rtc/s35392a.c +++ b/drivers/rtc/s35392a.c @@ -24,11 +24,13 @@ #include <linux/bitrev.h> #include <rtc.h> -#define S35390A_CMD_STATUS1 0x30 -#define S35390A_CMD_STATUS2 0x31 -#define S35390A_CMD_TIME1 0x32 -#define S35390A_CMD_TIME2 0x33 -#define S35390A_CMD_INT2_REG1 0x35 +#define S35390A_CHIP_ADDR 0x30 + +#define S35390A_CMD_STATUS1 0x0 +#define S35390A_CMD_STATUS2 0x1 +#define S35390A_CMD_TIME1 0x2 +#define S35390A_CMD_TIME2 0x3 +#define S35390A_CMD_INT2_REG1 0x5 #define S35390A_BYTE_YEAR 0 #define S35390A_BYTE_MONTH 1 @@ -85,11 +87,10 @@ static int s35392a_rtc_read(DEV_TYPE *dev, u8 reg, u8 *buf, int len) int ret; #ifdef CONFIG_DM_RTC - /* TODO: we need to tweak the chip address to reg */ - ret = dm_i2c_read(dev, 0, buf, len); + ret = dm_i2c_read(dev, reg, buf, len); #else (void)dev; - ret = i2c_read(reg, 0, -1, buf, len); + ret = i2c_read(S35390A_CHIP_ADDR | reg, 0, -1, buf, len); #endif return ret; @@ -100,11 +101,10 @@ static int s35392a_rtc_write(DEV_TYPE *dev, u8 reg, u8 *buf, int len) int ret; #ifdef CONFIG_DM_RTC - /* TODO: we need to tweak the chip address to reg */ - ret = dm_i2c_write(dev, 0, buf, 1); + ret = dm_i2c_write(dev, reg, buf, len); #else (void)dev; - ret = i2c_write(reg, 0, 0, buf, len); + ret = i2c_write(S35390A_CHIP_ADDR | reg, 0, 0, buf, len); #endif return ret; @@ -336,6 +336,13 @@ void rtc_init(void) static int s35392a_probe(struct udevice *dev) { +#if defined(CONFIG_DM_RTC) + /* 3-bit "command", or register, is encoded within the device address. + */ + i2c_set_chip_offset_len(dev, 0); + i2c_set_chip_addr_offset_mask(dev, 0x7); +#endif + s35392a_rtc_init(dev); return 0; } -- 2.10.1

2 1

[U-Boot, 0/3] power: pmic: add Dialog DA9063 PMIC and regulators
by Ian Ray 28 Jan '20

28 Jan '20

Add a PMIC driver for DA9063 PMIC and associated registers. Allow pmic dump command to skip register holes. Note: This change is a prerequisite for enabling full DM support for ge_bx50v3_config. Note: Split out of https://patchwork.ozlabs.org/cover/1182351/. Feedback in https://patchwork.ozlabs.org/patch/1182404/ and https://patchwork.ozlabs.org/patch/1182416/ has been addressed. Martin Fuzzey (3): power: pmic: add driver for Dialog DA9063 PMIC power: regulator: add driver for Dialog DA9063 PMIC pmic: allow dump command for non contiguous register maps cmd/pmic.c | 12 +- drivers/power/pmic/Kconfig | 14 ++ drivers/power/pmic/Makefile | 1 + drivers/power/pmic/da9063.c | 130 +++++++++++++ drivers/power/regulator/Kconfig | 20 ++ drivers/power/regulator/Makefile | 1 + drivers/power/regulator/da9063.c | 388 +++++++++++++++++++++++++++++++++++++++ include/power/da9063_pmic.h | 320 ++++++++++++++++++++++++++++++++ 8 files changed, 884 insertions(+), 2 deletions(-) create mode 100644 drivers/power/pmic/da9063.c create mode 100644 drivers/power/regulator/da9063.c create mode 100644 include/power/da9063_pmic.h -- 2.10.1

2 6

[PATCH v2 1/2] dts: add property removal option CONFIG_OF_REMOVE_PROPS
by Anatolij Gustschin 28 Jan '20

28 Jan '20

This can be used for device tree size reduction similar as CONFIG_OF_SPL_REMOVE_PROPS option. Some boards must pass the built-in DTB unchanged to the kernel, thus we may not cut it down unconditionally. Therefore enable the property removal list option only if CONFIG_OF_DTB_PROPS_REMOVE is selected. Signed-off-by: Anatolij Gustschin <agust(a)denx.de> --- Changes in v2: - make DT property removal optional (enable it if required via OF_DTB_PROPS_REMOVE Kconfig option) - don't touch cmd_shipped, use new cmd_fdt_rm_props instead - update commit description - gitlab CI results: https://gitlab.denx.de/u-boot/custodians/u-boot-video/pipelines/1842 dts/Kconfig | 20 ++++++++++++++++++++ dts/Makefile | 5 +++++ scripts/Makefile.lib | 8 ++++++++ 3 files changed, 33 insertions(+) diff --git a/dts/Kconfig b/dts/Kconfig index 64c98dd723..d73dfb9549 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -311,6 +311,26 @@ config OF_SPL_REMOVE_PROPS can be discarded. This option defines the list of properties to discard. +config OF_DTB_PROPS_REMOVE + bool "Enable removal of device tree properties" + depends on OF_CONTROL + help + Some boards have restricted amount of storage for U-Boot image. + If the generated binary doesn't fit into available image storage, + the built-in device tree could probably be cut down by removing + some not required device tree properties to reduce the image size. + Enable this option and define the properties to be removed in the + CONFIG_OF_REMOVE_PROPS list. Do not enable this option if you must + pass the built-in DTB directly to the kernel! + +config OF_REMOVE_PROPS + string "List of device tree properties to drop" + depends on OF_DTB_PROPS_REMOVE + default "interrupt-parent interrupts" if PINCTRL + help + Some properties are not used by U-Boot and can be discarded. + This option defines the list of properties to discard. + config SPL_OF_PLATDATA bool "Generate platform data for use in SPL" depends on SPL_OF_CONTROL diff --git a/dts/Makefile b/dts/Makefile index 1f83e615e8..a20930eb9a 100644 --- a/dts/Makefile +++ b/dts/Makefile @@ -19,8 +19,13 @@ endif $(obj)/dt-spl.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE $(call if_changed,fdtgrep) +ifeq ($(CONFIG_OF_DTB_PROPS_REMOVE),y) +$(obj)/dt.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE + $(call if_changed,fdt_rm_props) +else $(obj)/dt.dtb: $(DTB) FORCE $(call if_changed,shipped) +endif targets += dt.dtb dt-spl.dtb diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 4ea898a421..30f392fdfb 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -544,3 +544,11 @@ quiet_cmd_fdtgrep = FDTGREP $@ $(objtree)/tools/fdtgrep -r -O dtb - -o $@ \ -P u-boot,dm-pre-reloc -P u-boot,dm-spl -P u-boot,dm-tpl \ $(addprefix -P ,$(subst $\",,$(CONFIG_OF_SPL_REMOVE_PROPS))) + +# fdt_rm_props +# --------------------------------------------------------------------------- +# Pass the original device tree file through fdtgrep. This removes various +# unused properties. The output is typically a smaller device tree file. +quiet_cmd_fdt_rm_props = FDTGREP $@ + cmd_fdt_rm_props = cat $< | $(objtree)/tools/fdtgrep -r -O dtb - -o $@ \ + $(addprefix -P ,$(subst $\",,$(CONFIG_OF_REMOVE_PROPS))) -- 2.17.1

3 4

[PATCH 1/3] ata: sata_sil: Continue probing other sata port when failed current port.
by Peng Ma 28 Jan '20

28 Jan '20

In the initialization of sata driver, we want to initialize all port probes, Therefore, any detection failure between of them should continue initialization by skipping the current port instead of exit. Signed-off-by: Peng Ma <peng.ma(a)nxp.com> --- drivers/ata/sata_sil.c | 60 +++++++++++++++++++++++++++++++++++++++--- 1 file changed, 56 insertions(+), 4 deletions(-) diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c index d06d7a079d..bbba98f9a6 100644 --- a/drivers/ata/sata_sil.c +++ b/drivers/ata/sata_sil.c @@ -19,6 +19,7 @@ #if CONFIG_IS_ENABLED(BLK) #include <dm.h> #include <blk.h> +#include <dm/device-internal.h> #endif #include "sata_sil.h" @@ -762,15 +763,33 @@ U_BOOT_DRIVER(sata_sil_driver) = { .platdata_auto_alloc_size = sizeof(struct sil_sata_priv), }; +static int sil_unbind_device(struct udevice *dev) +{ + int ret; + + ret = device_remove(dev, DM_REMOVE_NORMAL); + if (ret) + return ret; + + ret = device_unbind(dev); + if (ret) + return ret; + + return 0; +} + static int sil_pci_probe(struct udevice *dev) { struct udevice *blk; + int failed_number; char sata_name[10]; pci_dev_t devno; u16 word; int ret; int i; + failed_number = 0; + /* Get PCI device number */ devno = dm_pci_get_bdf(dev); if (devno == -1) @@ -823,12 +842,44 @@ static int sil_pci_probe(struct udevice *dev) } ret = sil_init_sata(blk, i); - if (ret) - return -ENODEV; + if (ret) { + ret = sil_unbind_device(blk); + if (ret) + return ret; + + failed_number++; + continue; + } ret = scan_sata(blk, i); - if (ret) - return -ENODEV; + if (ret) { + ret = sil_unbind_device(blk); + if (ret) + return ret; + + failed_number++; + continue; + } + } + + if (failed_number == sata_info.maxport) + return -ENODEV; + else + return 0; +} + +static int sil_pci_remove(struct udevice *dev) +{ + int i; + struct sil_sata *sata; + struct sil_sata_priv *priv; + + priv = dev_get_priv(dev); + + for (i = sata_info.portbase; i < sata_info.maxport; i++) { + sata = priv->sil_sata_desc[i]; + if (sata) + free(sata); } return 0; @@ -856,6 +907,7 @@ U_BOOT_DRIVER(sil_ahci_pci) = { .of_match = sil_pci_ids, .ops = &sata_sil_ops, .probe = sil_pci_probe, + .remove = sil_pci_remove, .priv_auto_alloc_size = sizeof(struct sil_sata_priv), }; -- 2.17.1

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[PATCH] Revert "sunxi: psci: avoid error address-of-packed-member"
by Tomasz Duszynski 27 Jan '20

27 Jan '20

Using memcpy() for some MMIO access is generally frowned upon and might break things on some platforms. Allwinner H3, which fails to boot, being an example here. Moreover, fields being accessed are naturally aligned and warnings produced by GCC have been quiesced for some time already by: 53dc8ae ("gcc-9: silence 'address-of-packed-member' warning") That said, it should be okay to revert this commit. This reverts commit 9bd34a69a453d409792e08c00953ce8862145e65. Cc: Heinrich Schuchardt <xypron.glpk(a)gmx.de> Cc: Jagan Teki <jagan(a)amarulasolutions.com> Signed-off-by: Tomasz Duszynski <tduszyns(a)gmail.com> --- arch/arm/cpu/armv7/sunxi/psci.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c index 5b689004e8..2c5d99e9ac 100644 --- a/arch/arm/cpu/armv7/sunxi/psci.c +++ b/arch/arm/cpu/armv7/sunxi/psci.c @@ -75,7 +75,7 @@ static void __secure __mdelay(u32 ms) isb(); } -static void __secure clamp_release(void __maybe_unused *clamp) +static void __secure clamp_release(u32 __maybe_unused *clamp) { #if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \ defined(CONFIG_MACH_SUN8I_H3) || \ @@ -90,7 +90,7 @@ static void __secure clamp_release(void __maybe_unused *clamp) #endif } -static void __secure clamp_set(void __maybe_unused *clamp) +static void __secure clamp_set(u32 __maybe_unused *clamp) { #if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \ defined(CONFIG_MACH_SUN8I_H3) || \ @@ -99,28 +99,22 @@ static void __secure clamp_set(void __maybe_unused *clamp) #endif } -static void __secure sunxi_power_switch(void *clamp, void *pwroff_ptr, bool on, +static void __secure sunxi_power_switch(u32 *clamp, u32 *pwroff, bool on, int cpu) { - u32 pwroff; - - memcpy(&pwroff, pwroff_ptr, sizeof(u32)); - if (on) { /* Release power clamp */ clamp_release(clamp); /* Clear power gating */ - clrbits_le32(&pwroff, BIT(cpu)); + clrbits_le32(pwroff, BIT(cpu)); } else { /* Set power gating */ - setbits_le32(&pwroff, BIT(cpu)); + setbits_le32(pwroff, BIT(cpu)); /* Activate power clamp */ clamp_set(clamp); } - - memcpy(pwroff_ptr, &pwroff, sizeof(u32)); } #ifdef CONFIG_MACH_SUN8I_R40 -- 2.24.1

1 0

[PATCH v4 00/12] ClearFog Base static variant support
by Joel Johnson 27 Jan '20

27 Jan '20

This patch series adds support for ClearFog Base static configuration, as well as updating and fixing the ClearFog support for MMC and SPI booting. v2 changes: - updated against, and dependent on, https://patchwork.ozlabs.org/cover/1200324 v3 changes: - rebased against ClearFog runtime TLV EEPROM changes merged into mvebu/master v4 - adjust static SerDes configuration at runtime instead of #ifdef Joel Johnson (12): arm: mvebu: fix SerDes table alignment arm: mvebu: solidrun: remove hardcoded DTS MAC address arm: mvebu: clearfog: use Pro name by default arm: mvebu: clearfog: initial ClearFog Base variant arm: mvebu: clearfog: Unify DT selection paths arm: mvebu: clearfog: Add option for 2.5 Gbps SFP arm: mvebu: clearfog: add SPI offsets arm: mvebu: enable working default boot support arm: mvebu: clearfog: move ENV params to Kconfig arm: mvebu: clearfog: don't always use SPL MMC arm: mvebu: clearfog: Add SATA mode flags arm: mvebu: clearfog: Use Pro DT by default .../arm/dts/armada-38x-solidrun-microsom.dtsi | 1 - arch/arm/mach-mvebu/Kconfig | 13 ++++ .../serdes/a38x/high_speed_env_spec.c | 6 +- board/solidrun/clearfog/Kconfig | 62 +++++++++++++++++++ board/solidrun/clearfog/clearfog.c | 44 +++++++++++-- configs/clearfog_defconfig | 4 -- include/configs/clearfog.h | 1 - 7 files changed, 118 insertions(+), 13 deletions(-) create mode 100644 board/solidrun/clearfog/Kconfig -- 2.20.1

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[PATCH 1/4] mtd: rawnand: denali_dt: insert udelay() after reset deassert
by Masahiro Yamada 27 Jan '20

27 Jan '20

When the reset signal is de-asserted, the HW-controlled bootstrap starts running unless it is disabled in the SoC integration. It issues some commands to detect a NAND chip, and sets up registers automatically. Until this process finishes, software should avoid any register access. Without this delay function, some of UniPhier boards hangs up during the probe. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- drivers/mtd/nand/raw/denali_dt.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/denali_dt.c b/drivers/mtd/nand/raw/denali_dt.c index 91d0f20aae..1afc61f876 100644 --- a/drivers/mtd/nand/raw/denali_dt.c +++ b/drivers/mtd/nand/raw/denali_dt.c @@ -136,11 +136,19 @@ static int denali_dt_probe(struct udevice *dev) } ret = reset_get_bulk(dev, &resets); - if (ret) + if (ret) { dev_warn(dev, "Can't get reset: %d\n", ret); - else + } else { reset_deassert_bulk(&resets); + /* + * When the reset is deasserted, the initialization sequence is + * kicked (bootstrap process). The driver must wait until it is + * finished. Otherwise, it will result in unpredictable behavior. + */ + udelay(200); + } + return denali_init(denali); } -- 2.17.1

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[GIT] Pull request: u-boot-dfu (26.01.2020)
by Lukasz Majewski 27 Jan '20

27 Jan '20

Dear Marek, The following changes since commit 40521a6c90d4adfb7f3041033c8cbbeff087a5ca: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq (2020-01-25 12:20:51 -0500) are available in the Git repository at: git@gitlab.denx.de:u-boot/custodians/u-boot-dfu.git for you to fetch changes up to d34375267f521dc76b1875a905cec914a47b0712: dfu: Add option to skip empty pages when flashing UBI images to NAND (2020-01-26 11:44:15 +0100) ---------------------------------------------------------------- Guillermo Rodríguez (1): dfu: Add option to skip empty pages when flashing UBI images to NAND drivers/dfu/Kconfig | 7 +++++++ drivers/dfu/dfu_nand.c | 7 ++++++- 2 files changed, 13 insertions(+), 1 deletion(-) BRANCH: master https://gitlab.denx.de/u-boot/custodians/u-boot-dfu/commits/master Merge tag info: - Add option to DFU NAND to skip empty pages when flashing UBI images Travis-CI: https://travis-ci.org/lmajewski/u-boot-dfu/builds/618507384 Best regards, Lukasz Majewski -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma(a)denx.de

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[PATCH 1/4] cmd: mvebu: bubt: add A38x support
by Joel Johnson 27 Jan '20

27 Jan '20

Add support for Armada 38x devices in bubt flashing utility. This is based on (and streamlined from) the support in the SolidRun master-a38x vendor fork branch. Signed-off-by: Joel Johnson <mrjoel(a)lixil.net> --- cmd/mvebu/bubt.c | 69 +++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 68 insertions(+), 1 deletion(-) diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c index 2041a7a29a..d399fb6da4 100644 --- a/cmd/mvebu/bubt.c +++ b/cmd/mvebu/bubt.c @@ -85,7 +85,29 @@ struct mvebu_image_info { u32 encrypt_start_offset; u32 encrypt_size; }; -#endif /* CONFIG_ARMADA_XXX */ +#elif defined(CONFIG_ARMADA_38X) /* A38X */ + +/* Structure of the main header, version 1 (Armada 370/38x/XP) */ +struct a38x_main_hdr_v1 { + u8 blockid; /* 0x0 */ + u8 flags; /* 0x1 */ + u16 reserved2; /* 0x2-0x3 */ + u32 blocksize; /* 0x4-0x7 */ + u8 version; /* 0x8 */ + u8 headersz_msb; /* 0x9 */ + u16 headersz_lsb; /* 0xA-0xB */ + u32 srcaddr; /* 0xC-0xF */ + u32 destaddr; /* 0x10-0x13 */ + u32 execaddr; /* 0x14-0x17 */ + u8 options; /* 0x18 */ + u8 nandblocksize; /* 0x19 */ + u8 nandbadblklocation; /* 0x1A */ + u8 reserved4; /* 0x1B */ + u16 reserved5; /* 0x1C-0x1D */ + u8 ext; /* 0x1E */ + u8 checksum; /* 0x1F */ +}; +#endif struct bubt_dev { char name[8]; @@ -621,7 +643,52 @@ static int check_image_header(void) return 0; } +#elif defined(CONFIG_ARMADA_38X) +static size_t a38x_header_size(const struct a38x_main_hdr_v1 *h) +{ + if (h->version == 1) + return (h->headersz_msb << 16) | le16_to_cpu(h->headersz_lsb); + + printf("Error: Invalid A38x image (header version 0x%x unknown)!\n", + h->version); + return 0; +} + +static uint8_t image_checksum8(const void *start, size_t len) +{ + u8 csum = 0; + const u8 *p = start; + + while (len) { + csum += *p; + ++p; + --len; + } + + return csum; +} +static int check_image_header(void) +{ + u8 checksum; + const struct a38x_main_hdr_v1 *hdr = + (struct a38x_main_hdr_v1 *)get_load_addr(); + const size_t image_size = a38x_header_size(hdr); + + if (!image_size) + return -ENOEXEC; + + checksum = image_checksum8(hdr, image_size); + checksum -= hdr->checksum; + if (checksum != hdr->checksum) { + printf("Error: Bad A38x image checksum. 0x%x != 0x%x\n", + checksum, hdr->checksum); + return -ENOEXEC; + } + + printf("Image checksum...OK!\n"); + return 0; +} #else /* Not ARMADA? */ static int check_image_header(void) { -- 2.20.1

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