September 2019 - U-Boot

[U-Boot] Pull request for UEFI sub-system for v2019.10-rc4 (3)
by Heinrich Schuchardt 07 Sep '19

07 Sep '19

The following changes since commit ece9834f7d223097cec92e3d3c70cd37b3768482: Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-net (2019-09-04 16:02:03 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git tags/efi-2019-10-rc4-3 for you to fetch changes up to fe1a81c1a47737d3ce6b6855a05468b7546d4982: doc: UEFI API documentation (2019-09-05 23:18:52 +0200) No problems where observed in Gitlab: https://gitlab.denx.de/u-boot/custodians/u-boot-efi/pipelines/620 Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7 6D33 C481 DBBC 2C05 1AC4 ---------------------------------------------------------------- Pull request for UEFI sub-system for v2019.10-rc4 (3) This includes the patches from Pull request for UEFI sub-system for v2019.10-rc4 (2) Fix UEFI specification compliance issues in the simple network protocol: * Correctly set and reset the interrupt status. * Support filling the header in the Transmit() service. * Correct the checking and setting of the network state. * Implement the MCastIPtoMAC() service. * Adjust the simple network protocol unit test. Fix UEFI specification compliance issues in the protocol. Fix UEFI specification compliance issues in the simple text output protocol: * Avoid out of bounds cursor position. * Do not set illegal screen mode. Fix UEFI specification compliance issues in the block IO protocol: * Check parameters. * Return correct status code if buffer is unaligned. Refactor initialization of EFI memory in preparation of support for > 3GB memory on x86. ---------------------------------------------------------------- Heinrich Schuchardt (16): riscv: qemu: enable CONFIG_CMD_BOOTEFI_SELFTEST efi_loader: interrupts in simple network protocol efi_selftest: check EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT efi_loader: EFI_SIMPLE_NETWORK.Transmit() fill header efi_loader: fix status management in network stack efi_loader: implement MCastIPtoMAC efi_loader: correct text conversion for vendor DP efi_loader: correctly render MAC address device path nodes efi_loader: correctly render CD-ROM device path nodes efi_loader: correctly render UsbClass DP nodes as text efi_loader: cursor positioning efi_loader: do not set invalid screen mode efi_loader: parameter checks BLOCK_IO_PROTOCOL efi_loader: use EFI_PRINT() instead of debug() efi_loader: EFI_BLOCK_IO_PROTOCOL.Reset() doc: UEFI API documentation Park, Aiden (1): efi_loader: Extract adding a conventional memory in separate routine configs/qemu-riscv32_defconfig | 1 + configs/qemu-riscv32_smode_defconfig | 1 + configs/qemu-riscv64_defconfig | 1 + configs/qemu-riscv64_smode_defconfig | 1 + doc/api/efi.rst | 33 ++++++ include/efi_api.h | 4 +- include/efi_loader.h | 4 + lib/efi_loader/efi_console.c | 33 ++++-- lib/efi_loader/efi_device_path.c | 2 +- lib/efi_loader/efi_device_path_to_text.c | 31 +++-- lib/efi_loader/efi_disk.c | 60 +++++++++- lib/efi_loader/efi_gop.c | 2 +- lib/efi_loader/efi_memory.c | 82 ++++++++----- lib/efi_loader/efi_net.c | 193 +++++++++++++++++++++++++------ lib/efi_selftest/efi_selftest_snp.c | 64 ++++++++-- 15 files changed, 410 insertions(+), 102 deletions(-)

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[U-Boot] [PATCH] dm: core: Decouple DM from DT
by Marek Vasut 06 Sep '19

06 Sep '19

Some of the DM functions depend on OF_CONTROL, which is incorrect. DM and DT are orthogonal. Add macro guards around such functions to avoid compiling them in when DM is enabled, while OF_CONTROL is not. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> --- drivers/core/device.c | 4 ++++ drivers/core/root.c | 8 +------- drivers/core/util.c | 2 ++ 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/core/device.c b/drivers/core/device.c index 474c1642ee..05dadf98f9 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -526,6 +526,7 @@ static int device_get_device_tail(struct udevice *dev, int ret, return 0; } +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) /** * device_find_by_ofnode() - Return device associated with given ofnode * @@ -552,6 +553,7 @@ static int device_find_by_ofnode(ofnode node, struct udevice **devp) return -ENODEV; } +#endif int device_get_child(struct udevice *parent, int index, struct udevice **devp) { @@ -817,6 +819,7 @@ int device_set_name(struct udevice *dev, const char *name) return 0; } +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) bool device_is_compatible(struct udevice *dev, const char *compat) { return ofnode_device_is_compatible(dev_ofnode(dev), compat); @@ -879,3 +882,4 @@ int dev_enable_by_path(const char *path) return lists_bind_fdt(parent, node, NULL, false); } +#endif diff --git a/drivers/core/root.c b/drivers/core/root.c index aa5ca4087a..e85643819e 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -314,13 +314,6 @@ int dm_scan_fdt(const void *blob, bool pre_reloc_only) #endif return dm_scan_fdt_node(gd->dm_root, blob, 0, pre_reloc_only); } -#else -static int dm_scan_fdt_node(struct udevice *parent, const void *blob, - int offset, bool pre_reloc_only) -{ - return 0; -} -#endif static int dm_scan_fdt_ofnode_path(const char *path, bool pre_reloc_only) { @@ -360,6 +353,7 @@ int dm_extended_scan_fdt(const void *blob, bool pre_reloc_only) return ret; } +#endif __weak int dm_scan_other(bool pre_reloc_only) { diff --git a/drivers/core/util.c b/drivers/core/util.c index 60b939a924..7dc1a2af02 100644 --- a/drivers/core/util.c +++ b/drivers/core/util.c @@ -31,6 +31,7 @@ int list_count_items(struct list_head *head) return count; } +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) bool dm_ofnode_pre_reloc(ofnode node) { #if defined(CONFIG_SPL_BUILD) || defined(CONFIG_TPL_BUILD) @@ -56,3 +57,4 @@ bool dm_ofnode_pre_reloc(ofnode node) return false; #endif } +#endif -- 2.23.0.rc1

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[U-Boot] [PATCH] spl: Introduce SPL_DM_GPIO Kconfig define
by Lukasz Majewski 06 Sep '19

06 Sep '19

This define indicates if DM_GPIO shall be supported in SPL. This allows proper operation of DM converted GPIO drivers in SPL, which use #if !CONFIG_IS_ENABLED(DM_GPIO) to also support not yet DM/DTS converted boards. Signed-off-by: Lukasz Majewski <lukma(a)denx.de> --- common/spl/Kconfig | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 5b7667ea16..7c3391cabe 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -458,6 +458,12 @@ config SPL_DMA_SUPPORT the CPU moving the data. Enable this option to build the drivers in drivers/dma as part of an SPL build. +config SPL_DM_GPIO + bool "Support Driver Model GPIO drivers" + depends on SPL_GPIO_SUPPORT + help + Enable support for Driver Model based GPIO drivers in SPL. + config SPL_DRIVERS_MISC_SUPPORT bool "Support misc drivers" help -- 2.11.0

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[U-Boot] [PATCH] spi: soft_spi: Fix data abort if slave is not probed
by Patrice Chotard 06 Sep '19

06 Sep '19

From: Christophe Kerello <christophe.kerello(a)st.com> In case spi_get_bus_and_cs callback is used, spi bus is first probed then slave devices are probed. To avoid a data abort in soft_spi probe function, we need to check that (slave != NULL). If slave is NULL, cs_flags and clk_flags will be initialized with respectively GPIOD_ACTIVE_LOW and 0. Signed-off-by: Christophe Kerello <christophe.kerello(a)st.com> Signed-off-by: Patrice Chotard <patrice.chotard(a)st.com> --- drivers/spi/soft_spi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/soft_spi.c b/drivers/spi/soft_spi.c index b06883f9d0..b80f810bd1 100644 --- a/drivers/spi/soft_spi.c +++ b/drivers/spi/soft_spi.c @@ -215,8 +215,8 @@ static int soft_spi_probe(struct udevice *dev) int cs_flags, clk_flags; int ret; - cs_flags = (slave->mode & SPI_CS_HIGH) ? 0 : GPIOD_ACTIVE_LOW; - clk_flags = (slave->mode & SPI_CPOL) ? GPIOD_ACTIVE_LOW : 0; + cs_flags = (slave && slave->mode & SPI_CS_HIGH) ? 0 : GPIOD_ACTIVE_LOW; + clk_flags = (slave && slave->mode & SPI_CPOL) ? GPIOD_ACTIVE_LOW : 0; if (gpio_request_by_name(dev, "cs-gpios", 0, &plat->cs, GPIOD_IS_OUT | cs_flags) || -- 2.17.1

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[U-Boot] [PATCH] sunxi: Add H6 SPI SPL support
by Marek Kraus 06 Sep '19

06 Sep '19

Add H6 SPI addresses and masks (since H6 memory map is totally different). Tested on Pine H64 rev B with Winbond W25Q128FW, Signed-off-by: Marek Kraus <gamelaster(a)outlook.com> --- arch/arm/mach-sunxi/Kconfig | 2 +- arch/arm/mach-sunxi/spl_spi_sunxi.c | 123 ++++++++++++++++++++++++++++-------- configs/pine_h64_defconfig | 1 + 3 files changed, 98 insertions(+), 28 deletions(-) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 74e234cded..81b5948454 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -972,7 +972,7 @@ config SPL_STACK_R_ADDR config SPL_SPI_SUNXI bool "Support for SPI Flash on Allwinner SoCs in SPL" - depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I + depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN50I_H6 help Enable support for SPI Flash. This option allows SPL to read from sunxi SPI Flash. It uses the same method as the boot ROM, so does diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c index 043d9f6ead..cdf6d53ec5 100644 --- a/arch/arm/mach-sunxi/spl_spi_sunxi.c +++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c @@ -28,7 +28,7 @@ * A10/A13/A20 (sun4i variant) and everything else (sun6i variant). * Both of them are supported. * - * The pin mixing part is SoC specific and only A10/A13/A20/H3/A64 are + * The pin mixing part is SoC specific and only A10/A13/A20/H3/A64/H6 are * supported at the moment. */ @@ -70,6 +70,25 @@ #define SUN6I_TCR_XCH BIT(31) /*****************************************************************************/ +/* SUN50I_H6 variant of the SPI controller */ +/*****************************************************************************/ + +#define SUN50I_H6_SPI0_CCTL (0x05010000 + 0x24) +#define SUN50I_H6_SPI0_GCR (0x05010000 + 0x04) +#define SUN50I_H6_SPI0_TCR (0x05010000 + 0x08) +#define SUN50I_H6_SPI0_FIFO_STA (0x05010000 + 0x1C) +#define SUN50I_H6_SPI0_MBC (0x05010000 + 0x30) +#define SUN50I_H6_SPI0_MTC (0x05010000 + 0x34) +#define SUN50I_H6_SPI0_BCC (0x05010000 + 0x38) +#define SUN50I_H6_SPI0_TXD (0x05010000 + 0x200) +#define SUN50I_H6_SPI0_RXD (0x05010000 + 0x300) + +#define SUN50I_H6_SPI_GATING_REG (0x03001000 + 0x96C) +#define SUN50I_H6_SPI0_RST BIT(16) +#define SUN50I_H6_SPI0_GATING_CLK BIT(0) +#define SUN50I_H6_CCU_SPI0_CLK (0x03001000 + 0x940) + +/*****************************************************************************/ #define CCM_AHB_GATING0 (0x01C20000 + 0x60) #define CCM_SPI0_CLK (0x01C20000 + 0xA0) @@ -85,19 +104,29 @@ /* * Allwinner A10/A20 SoCs were using pins PC0,PC1,PC2,PC23 for booting - * from SPI Flash, everything else is using pins PC0,PC1,PC2,PC3. + * from SPI Flash, H6 using PC0,PC2,PC3,PC5 , everything else is using + * pins PC0,PC1,PC2,PC3. */ static void spi0_pinmux_setup(unsigned int pin_function) { unsigned int pin; - for (pin = SUNXI_GPC(0); pin <= SUNXI_GPC(2); pin++) - sunxi_gpio_set_cfgpin(pin, pin_function); - if (IS_ENABLED(CONFIG_MACH_SUN4I) || IS_ENABLED(CONFIG_MACH_SUN7I)) - sunxi_gpio_set_cfgpin(SUNXI_GPC(23), pin_function); - else + if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) { + sunxi_gpio_set_cfgpin(SUNXI_GPC(0), pin_function); + sunxi_gpio_set_cfgpin(SUNXI_GPC(2), pin_function); sunxi_gpio_set_cfgpin(SUNXI_GPC(3), pin_function); + sunxi_gpio_set_cfgpin(SUNXI_GPC(5), pin_function); + } else { + for (pin = SUNXI_GPC(0); pin <= SUNXI_GPC(2); pin++) + sunxi_gpio_set_cfgpin(pin, pin_function); + + if (IS_ENABLED(CONFIG_MACH_SUN4I) || + IS_ENABLED(CONFIG_MACH_SUN7I)) + sunxi_gpio_set_cfgpin(SUNXI_GPC(23), pin_function); + else + sunxi_gpio_set_cfgpin(SUNXI_GPC(3), pin_function); + } } /* @@ -106,26 +135,43 @@ static void spi0_pinmux_setup(unsigned int pin_function) static void spi0_enable_clock(void) { /* Deassert SPI0 reset on SUN6I */ - if (IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I)) + if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) + setbits_le32(SUN50I_H6_SPI_GATING_REG, + SUN50I_H6_SPI0_RST); + else if (IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I)) setbits_le32(SUN6I_BUS_SOFT_RST_REG0, (1 << AHB_RESET_SPI0_SHIFT)); /* Open the SPI0 gate */ - setbits_le32(CCM_AHB_GATING0, (1 << AHB_GATE_OFFSET_SPI0)); + if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) + setbits_le32(SUN50I_H6_SPI_GATING_REG, + SUN50I_H6_SPI0_GATING_CLK); + else + setbits_le32(CCM_AHB_GATING0, (1 << AHB_GATE_OFFSET_SPI0)); /* Divide by 4 */ - writel(SPI0_CLK_DIV_BY_4, IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I) ? - SUN6I_SPI0_CCTL : SUN4I_SPI0_CCTL); + if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) + writel(SPI0_CLK_DIV_BY_4, SUN50I_H6_SPI0_CCTL); + else + writel(SPI0_CLK_DIV_BY_4, IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I) ? + SUN6I_SPI0_CCTL : SUN4I_SPI0_CCTL); + /* 24MHz from OSC24M */ - writel((1 << 31), CCM_SPI0_CLK); + writel((1 << 31), IS_ENABLED(CONFIG_MACH_SUN50I_H6) ? + SUN50I_H6_CCU_SPI0_CLK : CCM_SPI0_CLK); - if (IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I)) { + if (IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I) || + IS_ENABLED(CONFIG_MACH_SUN50I_H6)) { /* Enable SPI in the master mode and do a soft reset */ - setbits_le32(SUN6I_SPI0_GCR, SUN6I_CTL_MASTER | - SUN6I_CTL_ENABLE | - SUN6I_CTL_SRST); + setbits_le32(IS_ENABLED(CONFIG_MACH_SUN50I_H6) ? + SUN50I_H6_SPI0_GCR : SUN6I_SPI0_GCR, + SUN6I_CTL_MASTER | + SUN6I_CTL_ENABLE | + SUN6I_CTL_SRST); + /* Wait for completion */ - while (readl(SUN6I_SPI0_GCR) & SUN6I_CTL_SRST) + while (readl(IS_ENABLED(CONFIG_MACH_SUN50I_H6) ? + SUN50I_H6_SPI0_GCR : SUN6I_SPI0_GCR) & SUN6I_CTL_SRST) ; } else { /* Enable SPI in the master mode and reset FIFO */ @@ -139,22 +185,33 @@ static void spi0_enable_clock(void) static void spi0_disable_clock(void) { /* Disable the SPI0 controller */ - if (IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I)) - clrbits_le32(SUN6I_SPI0_GCR, SUN6I_CTL_MASTER | - SUN6I_CTL_ENABLE); + if (IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I) || + IS_ENABLED(CONFIG_MACH_SUN50I_H6)) + clrbits_le32(IS_ENABLED(CONFIG_MACH_SUN50I_H6) ? + SUN50I_H6_SPI0_GCR : SUN6I_SPI0_GCR, + SUN6I_CTL_MASTER | + SUN6I_CTL_ENABLE); else clrbits_le32(SUN4I_SPI0_CTL, SUN4I_CTL_MASTER | SUN4I_CTL_ENABLE); /* Disable the SPI0 clock */ - writel(0, CCM_SPI0_CLK); + writel(0, IS_ENABLED(CONFIG_MACH_SUN50I_H6) ? + SUN50I_H6_CCU_SPI0_CLK : CCM_SPI0_CLK); /* Close the SPI0 gate */ - clrbits_le32(CCM_AHB_GATING0, (1 << AHB_GATE_OFFSET_SPI0)); + if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) + clrbits_le32(SUN50I_H6_SPI_GATING_REG, + SUN50I_H6_SPI0_GATING_CLK); + else + clrbits_le32(CCM_AHB_GATING0, (1 << AHB_GATE_OFFSET_SPI0)); /* Assert SPI0 reset on SUN6I */ - if (IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I)) - clrbits_le32(SUN6I_BUS_SOFT_RST_REG0, + if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) + setbits_le32(SUN50I_H6_SPI_GATING_REG, + SUN50I_H6_SPI0_RST); + else if (IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I)) + setbits_le32(SUN6I_BUS_SOFT_RST_REG0, (1 << AHB_RESET_SPI0_SHIFT)); } @@ -162,7 +219,7 @@ static void spi0_init(void) { unsigned int pin_function = SUNXI_GPC_SPI0; - if (IS_ENABLED(CONFIG_MACH_SUN50I)) + if (IS_ENABLED(CONFIG_MACH_SUN50I) || IS_ENABLED(CONFIG_MACH_SUN50I_H6)) pin_function = SUN50I_GPC_SPI0; spi0_pinmux_setup(pin_function); @@ -173,7 +230,9 @@ static void spi0_deinit(void) { /* New SoCs can disable pins, older could only set them as input */ unsigned int pin_function = SUNXI_GPIO_INPUT; - if (IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I)) + + if (IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I) || + IS_ENABLED(CONFIG_MACH_SUN50I_H6)) pin_function = SUNXI_GPIO_DISABLE; spi0_disable_clock(); @@ -233,7 +292,17 @@ static void spi0_read_data(void *buf, u32 addr, u32 len) if (chunk_len > SPI_READ_MAX_SIZE) chunk_len = SPI_READ_MAX_SIZE; - if (IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I)) { + if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) { + sunxi_spi0_read_data(buf8, addr, chunk_len, + SUN50I_H6_SPI0_TCR, + SUN6I_TCR_XCH, + SUN50I_H6_SPI0_FIFO_STA, + SUN50I_H6_SPI0_TXD, + SUN50I_H6_SPI0_RXD, + SUN50I_H6_SPI0_MBC, + SUN50I_H6_SPI0_MTC, + SUN50I_H6_SPI0_BCC); + } else if (IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I)) { sunxi_spi0_read_data(buf8, addr, chunk_len, SUN6I_SPI0_TCR, SUN6I_TCR_XCH, diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig index e34f4fd1e4..baddc33abb 100644 --- a/configs/pine_h64_defconfig +++ b/configs/pine_h64_defconfig @@ -6,6 +6,7 @@ CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_PSCI_RESET is not set CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set -- 2.11.0

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[U-Boot] [PATCH] riscv: image: save space on the magic number field
by Chester Lin 06 Sep '19

06 Sep '19

From: Chester Lin <clin(a)suse.com> Change the symbol from "RISCV" to "RSCV" so the magic number can be 32-bit long, which is consistent with other architectures. Signed-off-by: Chester Lin <clin(a)suse.com> --- arch/riscv/lib/image.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/riscv/lib/image.c b/arch/riscv/lib/image.c index d063beb7df..e8a8cb7190 100644 --- a/arch/riscv/lib/image.c +++ b/arch/riscv/lib/image.c @@ -14,8 +14,8 @@ DECLARE_GLOBAL_DATA_PTR; -/* ASCII version of "RISCV" defined in Linux kernel */ -#define LINUX_RISCV_IMAGE_MAGIC 0x5643534952 +/* ASCII version of "RSCV" defined in Linux kernel */ +#define LINUX_RISCV_IMAGE_MAGIC 0x56435352 struct linux_image_h { uint32_t code0; /* Executable code */ @@ -25,8 +25,8 @@ struct linux_image_h { uint64_t res1; /* reserved */ uint64_t res2; /* reserved */ uint64_t res3; /* reserved */ - uint64_t magic; /* Magic number */ - uint32_t res4; /* reserved */ + uint64_t res4; /* reserved */ + uint32_t magic; /* Magic number */ uint32_t res5; /* reserved */ }; -- 2.20.1

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[U-Boot] [PATCH 0/2] efi_loader: fixes for Simple Output Protocol
by Heinrich Schuchardt 06 Sep '19

06 Sep '19

Fix errors in the simple output protocol which may lead to providing incorrect values for columns or rows. Allowing to set an illegal screen mode has led to an illegal memory access in the UEFI SCT. For reference: As the illegal memory access led to QEMU stopping the following patch for Linux has been proposed. With the patch QEMU does not stop but hands the error back to U-Boot which than outputs the relative position in the loaded UEFI binary or in U-Boot (in this case SetMem16() called by AppendStringToHistory() of EDK2's ConsoleLogger). KVM: inject data abort if instruction cannot be decoded https://lkml.org/lkml/2019/9/4/1488 Heinrich Schuchardt (2): efi_loader: cursor positioning efi_loader: do not set invalid screen mode lib/efi_loader/efi_console.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) -- 2.23.0.rc1

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[U-Boot] [PATCH 0/3] mmc: fsl_esdhc: clean up code
by Yangbo Lu 06 Sep '19

06 Sep '19

This patch-set is to clean up fsl_esdhc code. Yangbo Lu (3): mmc: fsl_esdhc: make BLK as hard requirement of DM_MMC mmc: fsl_esdhc: clean up code mmc: fsl_esdhc: rename fsl_esdhc_init to fsl_esdhc_get_cfg drivers/mmc/fsl_esdhc.c | 371 +++++++++++++++++++----------------------------- include/fsl_esdhc.h | 203 ++++++++++++-------------- 2 files changed, 240 insertions(+), 334 deletions(-) -- 2.7.4

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[U-Boot] What if ATF can be part of U-Boot source, like SPL?
by Jagan Teki 06 Sep '19

06 Sep '19

In terms of code maintenance and development feasibility it is always a better approach to have out-of-tree code or binary to be part of in-house source tree. This is what exactly it was done for SPL, if I'm not wrong. So can we do the same thing for ATF on ARM64 SoCs? We are using ATF (on Allwinner) to switch EL3 to EL2 for start loading U-Boot proper and minimal PSCI, PMIC initialization. So assuming the functionality of ATF (like here) is limited so the code it require can be limited too, so why can't this code to be part of U-Boot tree? This would ultimately avoid out-off-tree ATF builds with associated variable exporting during u-boot builds. More over this idea would also help to design a single-step bootloader where it can't depends on out-of-tree sources. Code sync from ATF source to U-Boot can be possible in-terms licensing point-of-view since ATF licensed under BSD-3-Clause. I'm thinking this can be a worth-idea to look at it and I'm sure It may require some hard changes and other things to consider but just posted to understand how hard or feasible or meaningful it is? Feel free for any comments? Jagan, Amarula Solutions India.

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[U-Boot] [PATCH 0/4] efi_loader: fix EFI_BLOCK_IO_PROTOCOL
by Heinrich Schuchardt 05 Sep '19

05 Sep '19

* provide parameter checks for ReadBlocks and WriteBlocks * correct return code for Reset * indented debug output * add EFI_BLOCK_IO_PROTOCOL and other protocols to HTML documentation Heinrich Schuchardt (4): efi_loader: parameter checks BLOCK_IO_PROTOCOL efi_loader: use EFI_PRINT() instead of debug() efi_loader: EFI_BLOCK_IO_PROTOCOL.Reset() doc: UEFI API documentation doc/api/efi.rst | 33 ++++++++++++++++++++ lib/efi_loader/efi_console.c | 11 ++++--- lib/efi_loader/efi_disk.c | 60 +++++++++++++++++++++++++++++++++--- lib/efi_loader/efi_gop.c | 2 +- lib/efi_loader/efi_net.c | 9 ++++-- 5 files changed, 101 insertions(+), 14 deletions(-) -- 2.23.0.rc1

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