August 2019 - U-Boot

[U-Boot] [PATCH v2 0/9] apalis-tk1: fixes/updates for v2019.10
by Igor Opaniuk 01 Aug '19

01 Aug '19

Misc. fixes related to pinmux configuration (fan), default bootargs, reset reason output and power rail configuration. Changes in v2: * Rebased on the latest u-boot-tegra/master * Attached R-b tags [Oleksandr Suvorov] from v1 [1] [1] https://patchwork.ozlabs.org/cover/1139705/ Dominik Sliwa (2): apalis-tk1/t30: colibri_t30: display reset reason apalis-tk1: remove non-esential power rails on boot Igor Opaniuk (5): apalis-tk1: set apalis gpio 8 aka fan_en apalis-tk1: provide proper USB vendor id apalis-tk1: enable user debug by default apalis-tk1: add pcie_aspm=off to defargs apalis-tk1: switch to zImage Marcel Ziswiler (2): apalis-tk1: do not explicitly release reset_moci# apalis-tk1: remove default vesa vga mode from vidargs arch/arm/mach-tegra/sys_info.c | 32 ++++++++----- arch/arm/mach-tegra/tegra124/cpu.c | 45 +++++++++++++++++++ board/toradex/apalis-tk1/apalis-tk1.c | 10 +++++ board/toradex/apalis-tk1/as3722_init.c | 23 ++++++++++ .../apalis-tk1/pinmux-config-apalis-tk1.h | 2 +- configs/apalis-tk1_defconfig | 2 +- include/configs/apalis-tk1.h | 17 +++---- 7 files changed, 111 insertions(+), 20 deletions(-) -- 2.17.1

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[U-Boot] [PATCH v1 0/9] apalis-tk1: fixes/updates for v2019.10
by Igor Opaniuk 01 Aug '19

01 Aug '19

Misc. fixes related to pinmux configuration (fan), default bootargs, reset reason output and power rail configuration. Dominik Sliwa (2): apalis-tk1/t30: colibri_t30: display reset reason apalis-tk1: remove non-esential power rails on boot Igor Opaniuk (5): apalis-tk1: set apalis gpio 8 aka fan_en apalis-tk1: provide proper USB vendor id apalis-tk1: enable user debug by default apalis-tk1: add pcie_aspm=off to defargs apalis-tk1: switch to zImage Marcel Ziswiler (2): apalis-tk1: do not explicitly release reset_moci# apalis-tk1: remove default vesa vga mode from vidargs arch/arm/mach-tegra/sys_info.c | 32 ++++++++----- arch/arm/mach-tegra/tegra124/cpu.c | 45 +++++++++++++++++++ board/toradex/apalis-tk1/apalis-tk1.c | 10 +++++ board/toradex/apalis-tk1/as3722_init.c | 23 ++++++++++ .../apalis-tk1/pinmux-config-apalis-tk1.h | 2 +- configs/apalis-tk1_defconfig | 2 +- include/configs/apalis-tk1.h | 17 +++---- 7 files changed, 111 insertions(+), 20 deletions(-) -- 2.17.1

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[U-Boot] [PATCH v3] x86: ich-spi: Convert driver to spi-mem ops
by Bernhard Messerklinger 01 Aug '19

01 Aug '19

With the introduction of the new spi-mem model operations changed slightly. The new spi-mem operations make things a bit easier to handle for ich-spi flash interface. This patch converts the ich-spi driver by using spi-mem operations. --- Changes in v2: - make 2 routines static; update commit message a little bit Changes in v3: - update erase op code handling to work with latest master spi-nor driver Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger(a)br-automation.com> --- drivers/spi/ich.c | 267 +++++++++++++++++----------------------------- drivers/spi/ich.h | 9 +- 2 files changed, 100 insertions(+), 176 deletions(-) diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index 03531a8c0c..179f801d42 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -14,6 +14,8 @@ #include <pci_ids.h> #include <spi.h> #include <asm/io.h> +#include <spi-mem.h> +#include <div64.h> #include "ich.h" @@ -171,18 +173,6 @@ static int ich_init_controller(struct udevice *dev, return 0; } -static inline void spi_use_out(struct spi_trans *trans, unsigned bytes) -{ - trans->out += bytes; - trans->bytesout -= bytes; -} - -static inline void spi_use_in(struct spi_trans *trans, unsigned bytes) -{ - trans->in += bytes; - trans->bytesin -= bytes; -} - static void spi_lock_down(struct ich_spi_platdata *plat, void *sbase) { if (plat->ich_version == ICHV_7) { @@ -213,47 +203,12 @@ static bool spi_lock_status(struct ich_spi_platdata *plat, void *sbase) return lock != 0; } -static void spi_setup_type(struct spi_trans *trans, int data_bytes) -{ - trans->type = 0xFF; - - /* Try to guess spi type from read/write sizes */ - if (trans->bytesin == 0) { - if (trans->bytesout + data_bytes > 4) - /* - * If bytesin = 0 and bytesout > 4, we presume this is - * a write data operation, which is accompanied by an - * address. - */ - trans->type = SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS; - else - trans->type = SPI_OPCODE_TYPE_WRITE_NO_ADDRESS; - return; - } - - if (trans->bytesout == 1) { /* and bytesin is > 0 */ - trans->type = SPI_OPCODE_TYPE_READ_NO_ADDRESS; - return; - } - - if (trans->bytesout == 4) /* and bytesin is > 0 */ - trans->type = SPI_OPCODE_TYPE_READ_WITH_ADDRESS; - - /* Fast read command is called with 5 bytes instead of 4 */ - if (trans->out[0] == SPI_OPCODE_FAST_READ && trans->bytesout == 5) { - trans->type = SPI_OPCODE_TYPE_READ_WITH_ADDRESS; - --trans->bytesout; - } -} - static int spi_setup_opcode(struct ich_spi_priv *ctlr, struct spi_trans *trans, bool lock) { uint16_t optypes; uint8_t opmenu[ctlr->menubytes]; - trans->opcode = trans->out[0]; - spi_use_out(trans, 1); if (!lock) { /* The lock is off, so just use index 0. */ ich_writeb(ctlr, trans->opcode, ctlr->opmenu); @@ -285,12 +240,7 @@ static int spi_setup_opcode(struct ich_spi_priv *ctlr, struct spi_trans *trans, optypes = ich_readw(ctlr, ctlr->optype); optype = (optypes >> (opcode_index * 2)) & 0x3; - if (trans->type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS && - optype == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS && - trans->bytesout >= 3) { - /* We guessed wrong earlier. Fix it up. */ - trans->type = optype; - } + if (optype != trans->type) { printf("ICH SPI: Transaction doesn't fit type %d\n", optype); @@ -300,26 +250,6 @@ static int spi_setup_opcode(struct ich_spi_priv *ctlr, struct spi_trans *trans, } } -static int spi_setup_offset(struct spi_trans *trans) -{ - /* Separate the SPI address and data */ - switch (trans->type) { - case SPI_OPCODE_TYPE_READ_NO_ADDRESS: - case SPI_OPCODE_TYPE_WRITE_NO_ADDRESS: - return 0; - case SPI_OPCODE_TYPE_READ_WITH_ADDRESS: - case SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS: - trans->offset = ((uint32_t)trans->out[0] << 16) | - ((uint32_t)trans->out[1] << 8) | - ((uint32_t)trans->out[2] << 0); - spi_use_out(trans, 3); - return 1; - default: - printf("Unrecognized SPI transaction type %#x\n", trans->type); - return -EPROTO; - } -} - /* * Wait for up to 6s til status register bit(s) turn 1 (in case wait_til_set * below is true) or 0. In case the wait was for the bit(s) to set - write @@ -350,7 +280,7 @@ static int ich_status_poll(struct ich_spi_priv *ctlr, u16 bitmask, return -ETIMEDOUT; } -void ich_spi_config_opcode(struct udevice *dev) +static void ich_spi_config_opcode(struct udevice *dev) { struct ich_spi_priv *ctlr = dev_get_priv(dev); @@ -365,72 +295,48 @@ void ich_spi_config_opcode(struct udevice *dev) ich_writel(ctlr, SPI_OPMENU_UPPER, ctlr->opmenu + sizeof(u32)); } -static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) +static int ich_spi_exec_op(struct spi_slave *slave, const struct spi_mem_op *op) { - struct udevice *bus = dev_get_parent(dev); + struct udevice *bus = dev_get_parent(slave->dev); struct ich_spi_platdata *plat = dev_get_platdata(bus); struct ich_spi_priv *ctlr = dev_get_priv(bus); - uint16_t control; - int16_t opcode_index; - int with_address; - int status; - int bytes = bitlen / 8; struct spi_trans *trans = &ctlr->trans; - unsigned type = flags & (SPI_XFER_BEGIN | SPI_XFER_END); - int using_cmd = 0; + u16 control; + u16 opcode_index; + int ret = 0; + int status; bool lock = spi_lock_status(plat, ctlr->base); - int ret; - - /* We don't support writing partial bytes */ - if (bitlen % 8) { - debug("ICH SPI: Accessing partial bytes not supported\n"); - return -EPROTONOSUPPORT; - } - - /* An empty end transaction can be ignored */ - if (type == SPI_XFER_END && !dout && !din) - return 0; + bool with_address = 0; - if (type & SPI_XFER_BEGIN) - memset(trans, '\0', sizeof(*trans)); + trans->in = NULL; + trans->out = NULL; + trans->type = 0xFF; - /* Dp we need to come back later to finish it? */ - if (dout && type == SPI_XFER_BEGIN) { - if (bytes > ICH_MAX_CMD_LEN) { - debug("ICH SPI: Command length limit exceeded\n"); - return -ENOSPC; + if (op->data.nbytes) { + if (op->data.dir == SPI_MEM_DATA_IN) { + trans->in = op->data.buf.in; + trans->bytesin = op->data.nbytes; + } else { + trans->out = op->data.buf.out; + trans->bytesout = op->data.nbytes; } - memcpy(trans->cmd, dout, bytes); - trans->cmd_len = bytes; - debug_trace("ICH SPI: Saved %d bytes\n", bytes); - return 0; } - /* - * We process a 'middle' spi_xfer() call, which has no - * SPI_XFER_BEGIN/END, as an independent transaction as if it had - * an end. We therefore repeat the command. This is because ICH - * seems to have no support for this, or because interest (in digging - * out the details and creating a special case in the code) is low. - */ - if (trans->cmd_len) { - trans->out = trans->cmd; - trans->bytesout = trans->cmd_len; - using_cmd = 1; - debug_trace("ICH SPI: Using %d bytes\n", trans->cmd_len); - } else { - trans->out = dout; - trans->bytesout = dout ? bytes : 0; - } + if (trans->opcode != op->cmd.opcode) + trans->opcode = op->cmd.opcode; - trans->in = din; - trans->bytesin = din ? bytes : 0; + if (lock && trans->opcode == SPI_OPCODE_WRDIS) + return 0; - /* There has to always at least be an opcode */ - if (!trans->bytesout) { - debug("ICH SPI: No opcode for transfer\n"); - return -EPROTO; + if (trans->opcode == SPI_OPCODE_WREN) { + /* + * Treat Write Enable as Atomic Pre-Op if possible + * in order to prevent the Management Engine from + * issuing a transaction between WREN and DATA. + */ + if (!lock) + ich_writew(ctlr, trans->opcode, ctlr->preop); + return 0; } ret = ich_status_poll(ctlr, SPIS_SCIP, 0); @@ -442,23 +348,30 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen, else ich_writeb(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status); - spi_setup_type(trans, using_cmd ? bytes : 0); + /* Try to guess spi transaction type */ + if (op->data.dir == SPI_MEM_DATA_OUT) { + if (op->addr.nbytes) + trans->type = SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS; + else + trans->type = SPI_OPCODE_TYPE_WRITE_NO_ADDRESS; + } else { + if (op->addr.nbytes) + trans->type = SPI_OPCODE_TYPE_READ_WITH_ADDRESS; + else + trans->type = SPI_OPCODE_TYPE_READ_NO_ADDRESS; + } + /* Special erase case handling */ + if (op->addr.nbytes && !op->data.buswidth) + trans->type = SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS; + opcode_index = spi_setup_opcode(ctlr, trans, lock); if (opcode_index < 0) return -EINVAL; - with_address = spi_setup_offset(trans); - if (with_address < 0) - return -EINVAL; - if (trans->opcode == SPI_OPCODE_WREN) { - /* - * Treat Write Enable as Atomic Pre-Op if possible - * in order to prevent the Management Engine from - * issuing a transaction between WREN and DATA. - */ - if (!lock) - ich_writew(ctlr, trans->opcode, ctlr->preop); - return 0; + /* Handle special case for erase where address is stored in data */ + if (op->addr.nbytes) { + trans->offset = op->addr.val; + with_address = 1; } if (ctlr->speed && ctlr->max_speed >= 33000000) { @@ -472,13 +385,6 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen, ich_writeb(ctlr, byte, ctlr->speed); } - /* See if we have used up the command data */ - if (using_cmd && dout && bytes) { - trans->out = dout; - trans->bytesout = bytes; - debug_trace("ICH SPI: Moving to data, %d bytes\n", bytes); - } - /* Preset control fields */ control = SPIC_SCGO | ((opcode_index & 0x07) << 4); @@ -513,22 +419,6 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen, return 0; } - /* - * Check if this is a write command atempting to transfer more bytes - * than the controller can handle. Iterations for writes are not - * supported here because each SPI write command needs to be preceded - * and followed by other SPI commands, and this sequence is controlled - * by the SPI chip driver. - */ - if (trans->bytesout > ctlr->databytes) { - debug("ICH SPI: Too much to write. This should be prevented by the driver's max_write_size?\n"); - return -EPROTO; - } - - /* - * Read or write up to databytes bytes at a time until everything has - * been sent. - */ while (trans->bytesout || trans->bytesin) { uint32_t data_length; @@ -543,9 +433,7 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen, /* Program data into FDATA0 to N */ if (trans->bytesout) { write_reg(ctlr, trans->out, ctlr->data, data_length); - spi_use_out(trans, data_length); - if (with_address) - trans->offset += data_length; + trans->bytesout -= data_length; } /* Add proper control fields' values */ @@ -568,9 +456,7 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen, if (trans->bytesin) { read_reg(ctlr, ctlr->data, trans->in, data_length); - spi_use_in(trans, data_length); - if (with_address) - trans->offset += data_length; + trans->bytesin -= data_length; } } @@ -581,6 +467,40 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen, return 0; } +static int ich_spi_adjust_size(struct spi_slave *slave, struct spi_mem_op *op) +{ + size_t page_offset; + int addr = op->addr.val; + unsigned int byte_count = op->data.nbytes; + + if (hweight32(ICH_BOUNDARY) == 1) { + page_offset = addr & (ICH_BOUNDARY - 1); + } else { + u64 aux = addr; + + page_offset = do_div(aux, ICH_BOUNDARY); + } + + if (op->data.dir == SPI_MEM_DATA_IN && slave->max_read_size) { + op->data.nbytes = min(ICH_BOUNDARY - page_offset, + slave->max_read_size); + } else if (slave->max_write_size) { + op->data.nbytes = min(ICH_BOUNDARY - page_offset, + slave->max_write_size); + } + + op->data.nbytes = min(op->data.nbytes, byte_count); + + return 0; +} + +static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + printf("ICH SPI: Only supports memory operations\n"); + return -1; +} + static int ich_spi_probe(struct udevice *dev) { struct ich_spi_platdata *plat = dev_get_platdata(dev); @@ -686,10 +606,17 @@ static int ich_spi_ofdata_to_platdata(struct udevice *dev) return ret; } +static const struct spi_controller_mem_ops ich_controller_mem_ops = { + .adjust_op_size = ich_spi_adjust_size, + .supports_op = NULL, + .exec_op = ich_spi_exec_op, +}; + static const struct dm_spi_ops ich_spi_ops = { .xfer = ich_spi_xfer, .set_speed = ich_spi_set_speed, .set_mode = ich_spi_set_mode, + .mem_ops = &ich_controller_mem_ops, /* * cs_info is not needed, since we require all chip selects to be * in the device tree explicitly diff --git a/drivers/spi/ich.h b/drivers/spi/ich.h index a974241f98..3dfb2aaff1 100644 --- a/drivers/spi/ich.h +++ b/drivers/spi/ich.h @@ -100,13 +100,8 @@ enum { HSFC_FSMIE = 0x8000 }; -enum { - ICH_MAX_CMD_LEN = 5, -}; - struct spi_trans { - uint8_t cmd[ICH_MAX_CMD_LEN]; - int cmd_len; + uint8_t cmd; const uint8_t *out; uint32_t bytesout; uint8_t *in; @@ -166,6 +161,8 @@ struct spi_trans { #define SPI_OPMENU_LOWER ((SPI_OPMENU_3 << 24) | (SPI_OPMENU_2 << 16) | \ (SPI_OPMENU_1 << 8) | (SPI_OPMENU_0 << 0)) +#define ICH_BOUNDARY 0x1000 + enum ich_version { ICHV_7, ICHV_9, -- 2.22.0

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[U-Boot] [PATCH v7 2/9] x86: lib: fsp: Use EFI_GUID and efi_guid_t
by Park, Aiden 01 Aug '19

01 Aug '19

Use existing EFI_GUID and efi_guid_t instead of struct efi_guid. This is pre-work before making a common HOB library. - Change 'struct efi_guid' to efi_guit_t - Remove 'struct efi_guid' - Define GUIDs with EFI_GUID() macro - Use guidcmp() instead of compare_guid() - Remove compare_guid() Signed-off-by: Aiden Park <aiden.park(a)intel.com> --- Changes in v7: * Split HOB library into EFI_GUID pre-work and making a common library arch/x86/include/asm/fsp/fsp_ffs.h | 4 +- arch/x86/include/asm/fsp/fsp_fv.h | 4 +- arch/x86/include/asm/fsp/fsp_hob.h | 76 +++++++++++++------------ arch/x86/include/asm/fsp/fsp_support.h | 6 +- arch/x86/include/asm/fsp/fsp_types.h | 8 --- arch/x86/lib/fsp/fsp_support.c | 78 ++++++++++---------------- cmd/x86/fsp.c | 10 ++-- 7 files changed, 81 insertions(+), 105 deletions(-) diff --git a/arch/x86/include/asm/fsp/fsp_ffs.h b/arch/x86/include/asm/fsp/fsp_ffs.h index 61ce63c08e..b7558e5a17 100644 --- a/arch/x86/include/asm/fsp/fsp_ffs.h +++ b/arch/x86/include/asm/fsp/fsp_ffs.h @@ -45,7 +45,7 @@ struct __packed ffs_file_header { * This GUID is the file name. * It is used to uniquely identify the file. */ - struct efi_guid name; + efi_guid_t name; /* Used to verify the integrity of the file */ union ffs_integrity integrity; /* Identifies the type of file */ @@ -68,7 +68,7 @@ struct __packed ffs_file_header2 { * Name in any given firmware volume, except if the file type is * EFI_FV_FILE_TYPE_FFS_PAD. */ - struct efi_guid name; + efi_guid_t name; /* Used to verify the integrity of the file */ union ffs_integrity integrity; /* Identifies the type of file */ diff --git a/arch/x86/include/asm/fsp/fsp_fv.h b/arch/x86/include/asm/fsp/fsp_fv.h index 190aedcf44..511dfb78b8 100644 --- a/arch/x86/include/asm/fsp/fsp_fv.h +++ b/arch/x86/include/asm/fsp/fsp_fv.h @@ -80,7 +80,7 @@ struct fv_header { * Declares the file system with which the firmware volume * is formatted. */ - struct efi_guid fs_guid; + efi_guid_t fs_guid; /* * Length in bytes of the complete firmware volume, including * the header. @@ -128,7 +128,7 @@ struct fv_header { /* Extension header pointed by ExtHeaderOffset of volume header */ struct fv_ext_header { /* firmware volume name */ - struct efi_guid fv_name; + efi_guid_t fv_name; /* Size of the rest of the extension header including this structure */ u32 ext_hdr_size; }; diff --git a/arch/x86/include/asm/fsp/fsp_hob.h b/arch/x86/include/asm/fsp/fsp_hob.h index 00657b62c7..843d7b513b 100644 --- a/arch/x86/include/asm/fsp/fsp_hob.h +++ b/arch/x86/include/asm/fsp/fsp_hob.h @@ -8,6 +8,7 @@ #define __FSP_HOB_H__ #include <efi.h> +#include <efi_loader.h> /* Type of HOB Header */ #define HOB_TYPE_MEM_ALLOC 0x0002 @@ -40,7 +41,7 @@ struct hob_mem_alloc { * present for the memory allocation HOB. Type efi_guid is defined in * InstallProtocolInterface() in the UEFI 2.0 specification. */ - struct efi_guid name; + efi_guid_t name; /* * The base address of memory allocated by this HOB. * Type phys_addr_t is defined in AllocatePages() in the UEFI 2.0 @@ -106,7 +107,7 @@ struct hob_res_desc { * used by HOB consumer phase components to correlate device * ownership of a resource. */ - struct efi_guid owner; + efi_guid_t owner; u32 type; u32 attr; /* The physical start address of the resource region */ @@ -122,7 +123,7 @@ struct hob_res_desc { struct hob_guid { struct hob_header hdr; /* A GUID that defines the contents of this HOB */ - struct efi_guid name; + efi_guid_t name; /* GUID specific data goes here */ }; @@ -223,56 +224,57 @@ static inline u16 get_guid_hob_data_size(const struct hob_header *hdr) #define FSP_GUID_DATA4_6 0x3f #define FSP_GUID_DATA4_7 0x0c +#define FSP_GUID_BYTE0 0xbe +#define FSP_GUID_BYTE1 0x40 +#define FSP_GUID_BYTE2 0x27 +#define FSP_GUID_BYTE3 0x91 +#define FSP_GUID_BYTE4 0x84 +#define FSP_GUID_BYTE5 0x22 +#define FSP_GUID_BYTE6 0x34 +#define FSP_GUID_BYTE7 0x47 +#define FSP_GUID_BYTE8 FSP_GUID_DATA4_0 +#define FSP_GUID_BYTE9 FSP_GUID_DATA4_1 +#define FSP_GUID_BYTE10 FSP_GUID_DATA4_2 +#define FSP_GUID_BYTE11 FSP_GUID_DATA4_3 +#define FSP_GUID_BYTE12 FSP_GUID_DATA4_4 +#define FSP_GUID_BYTE13 FSP_GUID_DATA4_5 +#define FSP_GUID_BYTE14 FSP_GUID_DATA4_6 +#define FSP_GUID_BYTE15 FSP_GUID_DATA4_7 + #define FSP_HEADER_GUID \ - { \ - FSP_GUID_DATA1, FSP_GUID_DATA2, FSP_GUID_DATA3, \ - { FSP_GUID_DATA4_0, FSP_GUID_DATA4_1, FSP_GUID_DATA4_2, \ - FSP_GUID_DATA4_3, FSP_GUID_DATA4_4, FSP_GUID_DATA4_5, \ - FSP_GUID_DATA4_6, FSP_GUID_DATA4_7 } \ - } + EFI_GUID(FSP_GUID_DATA1, FSP_GUID_DATA2, FSP_GUID_DATA3, \ + FSP_GUID_DATA4_0, FSP_GUID_DATA4_1, FSP_GUID_DATA4_2, \ + FSP_GUID_DATA4_3, FSP_GUID_DATA4_4, FSP_GUID_DATA4_5, \ + FSP_GUID_DATA4_6, FSP_GUID_DATA4_7) #define FSP_NON_VOLATILE_STORAGE_HOB_GUID \ - { \ - 0x721acf02, 0x4d77, 0x4c2a, \ - { 0xb3, 0xdc, 0x27, 0xb, 0x7b, 0xa9, 0xe4, 0xb0 } \ - } + EFI_GUID(0x721acf02, 0x4d77, 0x4c2a, \ + 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0) #define FSP_BOOTLOADER_TEMP_MEM_HOB_GUID \ - { \ - 0xbbcff46c, 0xc8d3, 0x4113, \ - { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } \ - } + EFI_GUID(0xbbcff46c, 0xc8d3, 0x4113, \ + 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e) #define FSP_HOB_RESOURCE_OWNER_FSP_GUID \ - { \ - 0x69a79759, 0x1373, 0x4367, \ - { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } \ - } + EFI_GUID(0x69a79759, 0x1373, 0x4367, \ + 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e) #define FSP_HOB_RESOURCE_OWNER_TSEG_GUID \ - { \ - 0xd038747c, 0xd00c, 0x4980, \ - { 0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55 } \ - } + EFI_GUID(0xd038747c, 0xd00c, 0x4980, \ + 0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55) #define FSP_HOB_RESOURCE_OWNER_GRAPHICS_GUID \ - { \ - 0x9c7c3aa7, 0x5332, 0x4917, \ - { 0x82, 0xb9, 0x56, 0xa5, 0xf3, 0xe6, 0x2a, 0x07 } \ - } + EFI_GUID(0x9c7c3aa7, 0x5332, 0x4917, \ + 0x82, 0xb9, 0x56, 0xa5, 0xf3, 0xe6, 0x2a, 0x07) /* The following GUIDs are newly introduced in FSP spec 1.1 */ #define FSP_HOB_RESOURCE_OWNER_BOOTLOADER_TOLUM_GUID \ - { \ - 0x73ff4f56, 0xaa8e, 0x4451, \ - { 0xb3, 0x16, 0x36, 0x35, 0x36, 0x67, 0xad, 0x44 } \ - } + EFI_GUID(0x73ff4f56, 0xaa8e, 0x4451, \ + 0xb3, 0x16, 0x36, 0x35, 0x36, 0x67, 0xad, 0x44) #define FSP_GRAPHICS_INFO_HOB_GUID \ - { \ - 0x39f62cce, 0x6825, 0x4669, \ - { 0xbb, 0x56, 0x54, 0x1a, 0xba, 0x75, 0x3a, 0x07 } \ - } + EFI_GUID(0x39f62cce, 0x6825, 0x4669, \ + 0xbb, 0x56, 0x54, 0x1a, 0xba, 0x75, 0x3a, 0x07) #endif diff --git a/arch/x86/include/asm/fsp/fsp_support.h b/arch/x86/include/asm/fsp/fsp_support.h index 7e51f24b12..0cca948184 100644 --- a/arch/x86/include/asm/fsp/fsp_support.h +++ b/arch/x86/include/asm/fsp/fsp_support.h @@ -106,7 +106,7 @@ u64 fsp_get_usable_highmem_top(const void *hob_list); * 0 if this region does not exist. */ u64 fsp_get_reserved_mem_from_guid(const void *hob_list, - u64 *len, struct efi_guid *guid); + u64 *len, const efi_guid_t *guid); /** * This function retrieves the FSP reserved normal memory. @@ -149,7 +149,7 @@ const struct hob_header *fsp_get_next_hob(uint type, const void *hob_list); * * @retval: A HOB object with matching GUID; Otherwise NULL. */ -const struct hob_header *fsp_get_next_guid_hob(const struct efi_guid *guid, +const struct hob_header *fsp_get_next_guid_hob(const efi_guid_t *guid, const void *hob_list); /** @@ -164,7 +164,7 @@ const struct hob_header *fsp_get_next_guid_hob(const struct efi_guid *guid, * @retval others: GUID HOB data buffer pointer. */ void *fsp_get_guid_hob_data(const void *hob_list, u32 *len, - struct efi_guid *guid); + const efi_guid_t *guid); /** * This function retrieves FSP Non-volatile Storage HOB buffer and size. diff --git a/arch/x86/include/asm/fsp/fsp_types.h b/arch/x86/include/asm/fsp/fsp_types.h index 5247102f75..3d5b17ecf1 100644 --- a/arch/x86/include/asm/fsp/fsp_types.h +++ b/arch/x86/include/asm/fsp/fsp_types.h @@ -7,14 +7,6 @@ #ifndef __FSP_TYPES_H__ #define __FSP_TYPES_H__ -/* 128 bit buffer containing a unique identifier value */ -struct efi_guid { - u32 data1; - u16 data2; - u16 data3; - u8 data4[8]; -}; - /** * Returns a 16-bit signature built from 2 ASCII characters. * diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp/fsp_support.c index 90e4e7db26..0d1bb35186 100644 --- a/arch/x86/lib/fsp/fsp_support.c +++ b/arch/x86/lib/fsp/fsp_support.c @@ -8,27 +8,6 @@ #include <asm/fsp/fsp_support.h> #include <asm/post.h> -/** - * Compares two GUIDs - * - * If the GUIDs are identical then true is returned. - * If there are any bit differences in the two GUIDs, then false is returned. - * - * @guid1: A pointer to a 128 bit GUID. - * @guid2: A pointer to a 128 bit GUID. - * - * @retval true: guid1 and guid2 are identical. - * @retval false: guid1 and guid2 are not identical. - */ -static bool compare_guid(const struct efi_guid *guid1, - const struct efi_guid *guid2) -{ - if (memcmp(guid1, guid2, sizeof(struct efi_guid)) == 0) - return true; - else - return false; -} - struct fsp_header *__attribute__((optimize("O0"))) find_fsp_header(void) { /* @@ -58,17 +37,22 @@ struct fsp_header *__attribute__((optimize("O0"))) find_fsp_header(void) /* Check the FFS GUID */ if (fsp && - ((struct ffs_file_header *)fsp)->name.data1 == FSP_GUID_DATA1 && - ((struct ffs_file_header *)fsp)->name.data2 == FSP_GUID_DATA2 && - ((struct ffs_file_header *)fsp)->name.data3 == FSP_GUID_DATA3 && - ((struct ffs_file_header *)fsp)->name.data4[0] == FSP_GUID_DATA4_0 && - ((struct ffs_file_header *)fsp)->name.data4[1] == FSP_GUID_DATA4_1 && - ((struct ffs_file_header *)fsp)->name.data4[2] == FSP_GUID_DATA4_2 && - ((struct ffs_file_header *)fsp)->name.data4[3] == FSP_GUID_DATA4_3 && - ((struct ffs_file_header *)fsp)->name.data4[4] == FSP_GUID_DATA4_4 && - ((struct ffs_file_header *)fsp)->name.data4[5] == FSP_GUID_DATA4_5 && - ((struct ffs_file_header *)fsp)->name.data4[6] == FSP_GUID_DATA4_6 && - ((struct ffs_file_header *)fsp)->name.data4[7] == FSP_GUID_DATA4_7) { + ((struct ffs_file_header *)fsp)->name.b[0] == FSP_GUID_BYTE0 && + ((struct ffs_file_header *)fsp)->name.b[1] == FSP_GUID_BYTE1 && + ((struct ffs_file_header *)fsp)->name.b[2] == FSP_GUID_BYTE2 && + ((struct ffs_file_header *)fsp)->name.b[3] == FSP_GUID_BYTE3 && + ((struct ffs_file_header *)fsp)->name.b[4] == FSP_GUID_BYTE4 && + ((struct ffs_file_header *)fsp)->name.b[5] == FSP_GUID_BYTE5 && + ((struct ffs_file_header *)fsp)->name.b[6] == FSP_GUID_BYTE6 && + ((struct ffs_file_header *)fsp)->name.b[7] == FSP_GUID_BYTE7 && + ((struct ffs_file_header *)fsp)->name.b[8] == FSP_GUID_BYTE8 && + ((struct ffs_file_header *)fsp)->name.b[9] == FSP_GUID_BYTE9 && + ((struct ffs_file_header *)fsp)->name.b[10] == FSP_GUID_BYTE10 && + ((struct ffs_file_header *)fsp)->name.b[11] == FSP_GUID_BYTE11 && + ((struct ffs_file_header *)fsp)->name.b[12] == FSP_GUID_BYTE12 && + ((struct ffs_file_header *)fsp)->name.b[13] == FSP_GUID_BYTE13 && + ((struct ffs_file_header *)fsp)->name.b[14] == FSP_GUID_BYTE14 && + ((struct ffs_file_header *)fsp)->name.b[15] == FSP_GUID_BYTE15) { /* Add the FFS header size to find the raw section header */ fsp += sizeof(struct ffs_file_header); } else { @@ -305,7 +289,7 @@ u64 fsp_get_usable_highmem_top(const void *hob_list) } u64 fsp_get_reserved_mem_from_guid(const void *hob_list, u64 *len, - struct efi_guid *guid) + const efi_guid_t *guid) { const struct hob_header *hdr; struct hob_res_desc *res_desc; @@ -318,7 +302,7 @@ u64 fsp_get_reserved_mem_from_guid(const void *hob_list, u64 *len, if (hdr->type == HOB_TYPE_RES_DESC) { res_desc = (struct hob_res_desc *)hdr; if (res_desc->type == RES_MEM_RESERVED) { - if (compare_guid(&res_desc->owner, guid)) { + if (!guidcmp(&res_desc->owner, guid)) { if (len) *len = (u32)(res_desc->len); @@ -334,12 +318,12 @@ u64 fsp_get_reserved_mem_from_guid(const void *hob_list, u64 *len, u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len) { - const struct efi_guid guid = FSP_HOB_RESOURCE_OWNER_FSP_GUID; + const efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_FSP_GUID; u64 length; u32 base; base = (u32)fsp_get_reserved_mem_from_guid(hob_list, - &length, (struct efi_guid *)&guid); + &length, &guid); if ((len != 0) && (base != 0)) *len = (u32)length; @@ -348,12 +332,12 @@ u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len) u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len) { - const struct efi_guid guid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID; + const efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID; u64 length; u32 base; base = (u32)fsp_get_reserved_mem_from_guid(hob_list, - &length, (struct efi_guid *)&guid); + &length, &guid); if ((len != 0) && (base != 0)) *len = (u32)length; @@ -377,7 +361,7 @@ const struct hob_header *fsp_get_next_hob(uint type, const void *hob_list) return NULL; } -const struct hob_header *fsp_get_next_guid_hob(const struct efi_guid *guid, +const struct hob_header *fsp_get_next_guid_hob(const efi_guid_t *guid, const void *hob_list) { const struct hob_header *hdr; @@ -387,7 +371,7 @@ const struct hob_header *fsp_get_next_guid_hob(const struct efi_guid *guid, while ((hdr = fsp_get_next_hob(HOB_TYPE_GUID_EXT, hdr)) != NULL) { guid_hob = (struct hob_guid *)hdr; - if (compare_guid(guid, &(guid_hob->name))) + if (!guidcmp(guid, &(guid_hob->name))) break; hdr = get_next_hob(hdr); } @@ -396,7 +380,7 @@ const struct hob_header *fsp_get_next_guid_hob(const struct efi_guid *guid, } void *fsp_get_guid_hob_data(const void *hob_list, u32 *len, - struct efi_guid *guid) + const efi_guid_t *guid) { const struct hob_header *guid_hob; @@ -413,21 +397,21 @@ void *fsp_get_guid_hob_data(const void *hob_list, u32 *len, void *fsp_get_nvs_data(const void *hob_list, u32 *len) { - const struct efi_guid guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID; + const efi_guid_t guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID; - return fsp_get_guid_hob_data(hob_list, len, (struct efi_guid *)&guid); + return fsp_get_guid_hob_data(hob_list, len, &guid); } void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len) { - const struct efi_guid guid = FSP_BOOTLOADER_TEMP_MEM_HOB_GUID; + const efi_guid_t guid = FSP_BOOTLOADER_TEMP_MEM_HOB_GUID; - return fsp_get_guid_hob_data(hob_list, len, (struct efi_guid *)&guid); + return fsp_get_guid_hob_data(hob_list, len, &guid); } void *fsp_get_graphics_info(const void *hob_list, u32 *len) { - const struct efi_guid guid = FSP_GRAPHICS_INFO_HOB_GUID; + const efi_guid_t guid = FSP_GRAPHICS_INFO_HOB_GUID; - return fsp_get_guid_hob_data(hob_list, len, (struct efi_guid *)&guid); + return fsp_get_guid_hob_data(hob_list, len, &guid); } diff --git a/cmd/x86/fsp.c b/cmd/x86/fsp.c index 9f94ca9876..1b4c0207ce 100644 --- a/cmd/x86/fsp.c +++ b/cmd/x86/fsp.c @@ -78,6 +78,7 @@ static int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) uint type; char *desc; int i = 0; + char uuid[UUID_STR_LEN + 1]; hdr = gd->arch.hob_list; @@ -102,13 +103,10 @@ static int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (type == HOB_TYPE_MEM_ALLOC || type == HOB_TYPE_RES_DESC || type == HOB_TYPE_GUID_EXT) { - struct efi_guid *guid = (struct efi_guid *)(hdr + 1); - int j; + efi_guid_t *guid = (efi_guid_t *)(hdr + 1); - printf("%08x-%04x-%04x", guid->data1, - guid->data2, guid->data3); - for (j = 0; j < ARRAY_SIZE(guid->data4); j++) - printf("-%02x", guid->data4[j]); + uuid_bin_to_str(guid->b, uuid, UUID_STR_FORMAT_GUID); + printf("%s", uuid); } else { printf("%42s", "Not Available"); } -- 2.20.1

3 2

[U-Boot] [PULL u-boot] Please pull u-boot-amlogic-20190731
by Neil Armstrong 01 Aug '19

01 Aug '19

Hi Tom, This PR adds support for the Odroid-N2 board and sync the Amlogic G12A DT with Linux 5.3-rc1, removing the local DT in -u-boot.dtsi files. It also includes the last minute fix from Heinrich in the gxbb clock driver. The CI jobs passed at https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic/pipelines/376 Thanks, Neil The following changes since commit d0d07ba86afc8074d79e436b1ba4478fa0f0c1b5: Prepare v2019.10-rc1 (2019-07-29 21:16:16 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic.git tags/u-boot-amlogic-20190731 for you to fetch changes up to 0c0cdc86103a1f579cb9f86a3c7c076abb383542: clk: meson: remove duplicate logic (2019-07-31 12:11:04 +0200) ---------------------------------------------------------------- - sync Amlogic G12A DT with linux 5.3-rc1 - add support for 4GiB DRAM memory - add support for Amlogic G12B based Odroid-N2 - small duplicate logic fix for gxbb clock driver ---------------------------------------------------------------- Heinrich Schuchardt (1): clk: meson: remove duplicate logic Neil Armstrong (4): ARM: dts: Sync Amlogic G12A with Linux 5.3-rc1 ARM: dts: add support for Odroid-N2 ARM: meson-g12a: Handle 4GiB DRAM size board: amlogic: add support for Odroid-N2 arch/arm/dts/Makefile | 3 +- arch/arm/dts/meson-g12a-u-boot.dtsi | 216 --- arch/arm/dts/meson-g12a-u200-u-boot.dtsi | 63 - arch/arm/dts/meson-g12a-u200.dts | 122 +- arch/arm/dts/meson-g12a.dtsi | 1825 ++++++++++++++++++++++- arch/arm/dts/meson-g12b-odroid-n2.dts | 386 +++++ arch/arm/dts/meson-g12b.dtsi | 82 + arch/arm/mach-meson/board-g12a.c | 13 +- board/amlogic/w400/MAINTAINERS | 6 + board/amlogic/w400/Makefile | 6 + board/amlogic/w400/README.odroid-n2 | 130 ++ board/amlogic/w400/README.w400 | 130 ++ board/amlogic/w400/w400.c | 18 + configs/odroid-n2_defconfig | 56 + drivers/clk/meson/gxbb.c | 5 +- include/dt-bindings/clock/axg-aoclkc.h | 7 +- include/dt-bindings/clock/axg-audio-clkc.h | 30 +- include/dt-bindings/clock/g12a-clkc.h | 3 +- include/dt-bindings/sound/meson-g12a-tohdmitx.h | 13 + 19 files changed, 2765 insertions(+), 349 deletions(-) delete mode 100644 arch/arm/dts/meson-g12a-u-boot.dtsi delete mode 100644 arch/arm/dts/meson-g12a-u200-u-boot.dtsi create mode 100644 arch/arm/dts/meson-g12b-odroid-n2.dts create mode 100644 arch/arm/dts/meson-g12b.dtsi create mode 100644 board/amlogic/w400/MAINTAINERS create mode 100644 board/amlogic/w400/Makefile create mode 100644 board/amlogic/w400/README.odroid-n2 create mode 100644 board/amlogic/w400/README.w400 create mode 100644 board/amlogic/w400/w400.c create mode 100644 configs/odroid-n2_defconfig create mode 100644 include/dt-bindings/sound/meson-g12a-tohdmitx.h

2 1

[U-Boot] [PATCH] Revert "ARM: davinci: da850: Manual pinmux only when PINCTRL not available"
by Adam Ford 01 Aug '19

01 Aug '19

This reverts commit 877ab2423bc257045a06bc23d4b9440b82bda6fb. The above patch was designed to shrink code by only pin-muxing items needed for SPL in SPL and relying on driver model or SPL to mux other items. Unfortunately, da850evm_direct_nor doesn't use SPL so items that were only muxed during SPL are not muxed causing the board to no longer boot. Signed-off-by: Adam Ford <aford173(a)gmail.com> diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index fcf9334ba9..849905cf8a 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -215,29 +215,21 @@ static const struct pinmux_config gpio_pins[] = { }; const struct pinmux_resource pinmuxes[] = { -#ifndef CONFIG_SPL_BUILD #ifdef CONFIG_DRIVER_TI_EMAC PINMUX_ITEM(emac_pins_mdio), #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII PINMUX_ITEM(emac_pins_rmii), #else PINMUX_ITEM(emac_pins_mii), -#endif /* CONFIG_DRIVER_TI_EMAC */ -#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */ -#endif /* CONFIG_SPL_BUILD */ +#endif +#endif #ifdef CONFIG_SPI_FLASH -#if !CONFIG_IS_ENABLED(PINCTRL) PINMUX_ITEM(spi1_pins_base), PINMUX_ITEM(spi1_pins_scs0), #endif -#endif -#if !CONFIG_IS_ENABLED(PINCTRL) PINMUX_ITEM(uart2_pins_txrx), PINMUX_ITEM(uart2_pins_rtscts), -#endif -#if !CONFIG_IS_ENABLED(PINCTRL) PINMUX_ITEM(i2c0_pins), -#endif #ifdef CONFIG_NAND_DAVINCI PINMUX_ITEM(emifa_pins_cs3), PINMUX_ITEM(emifa_pins_cs4), @@ -248,10 +240,8 @@ const struct pinmux_resource pinmuxes[] = { #endif PINMUX_ITEM(gpio_pins), #ifdef CONFIG_MMC_DAVINCI -#if !CONFIG_IS_ENABLED(PINCTRL) PINMUX_ITEM(mmc0_pins), #endif -#endif }; const int pinmuxes_size = ARRAY_SIZE(pinmuxes); -- 2.17.1

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[U-Boot] [PATCH 1/1] nand: davinci: avoid out of bounds array access
by Heinrich Schuchardt 01 Aug '19

01 Aug '19

The array bounds have to be checked before accessing the array element. Identified by cppcheck. Fixes: 67ac6ffaeefb ("mtd: nand: davinci: add opportunity to write keystone U-boot image") Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- drivers/mtd/nand/raw/davinci_nand.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c index 33c2f16be8..724bbee752 100644 --- a/drivers/mtd/nand/raw/davinci_nand.c +++ b/drivers/mtd/nand/raw/davinci_nand.c @@ -739,8 +739,8 @@ static void davinci_nand_init(struct nand_chip *nand) layout = &nand_keystone_rbl_4bit_layout_oobfirst; layout->oobavail = 0; - for (i = 0; layout->oobfree[i].length && - i < ARRAY_SIZE(layout->oobfree); i++) + for (i = 0; i < ARRAY_SIZE(layout->oobfree) && + layout->oobfree[i].length; i++) layout->oobavail += layout->oobfree[i].length; nand->write_page = nand_davinci_write_page; -- 2.20.1

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[U-Boot] [PATCH] ARM: da850-evm: Remove references to CONFIG_DA850_AM18X_EVM
by Adam Ford 01 Aug '19

01 Aug '19

With the removal of da850_am18xxevm, there is at least one whitelisted CONFIG option that can be deleted. This patch removes CONFIG_DA850_AM18X_EVM since it's not required any more Signed-off-by: Adam Ford <aford173(a)gmail.com> diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index fcf9334ba9..f04392ecdc 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -300,9 +300,6 @@ u32 get_board_rev(void) rev = 2; else if (maxcpuclk >= 372000000) rev = 1; -#ifdef CONFIG_DA850_AM18X_EVM - rev |= REV_AM18X_EVM; -#endif return rev; } diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index bcb24d1bc3..e60ade5112 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -280,7 +280,6 @@ CONFIG_CTL_JTAG CONFIG_CTL_TBE CONFIG_CUSTOMER_BOARD_SUPPORT CONFIG_D2NET_V2 -CONFIG_DA850_AM18X_EVM CONFIG_DA850_EVM_MAX_CPU_CLK CONFIG_DBGU CONFIG_DB_784MP_GP -- 2.17.1

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[U-Boot] [PATCH] ARM: dts: da850-evm: Fix MDIO pinmux
by Adam Ford 01 Aug '19

01 Aug '19

In attempts to speed up SPL and reduce size, the MDIO pin muxing was inadvertently affected. Since the ethernet driver will setup the pin muxing when ethernet is loaded, this patch will also pinmux the MDIO pins at the same time. Once an DM compatible MDIO driver is available, this can be removed. Fixes: 877ab2423bc2 ("ARM: davinci: da850: Manual pinmux only when PINCTRL not available") Signed-off-by: Adam Ford <aford173(a)gmail.com> diff --git a/arch/arm/dts/da850-evm-u-boot.dtsi b/arch/arm/dts/da850-evm-u-boot.dtsi index d9e8b9926a..aa42d30c72 100644 --- a/arch/arm/dts/da850-evm-u-boot.dtsi +++ b/arch/arm/dts/da850-evm-u-boot.dtsi @@ -16,6 +16,10 @@ }; }; +&eth0 { + pinctrl-0 = <&mii_pins>, <&mdio_pins>; +}; + &flash { compatible = "m25p64", "jedec,spi-nor"; }; -- 2.17.1

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[U-Boot] [PATCH 1/2] configs: am335x_boneblack_vboot_defconfig: Fix regression by enabling BLK and DM support, disable in SPL
by sunil.m＠techveda.org 01 Aug '19

01 Aug '19

From: Suniel Mahesh <sunil.m(a)techveda.org> This patch adds BLK and DM support for verified boot on TI AM335x chipsets. The following compile warnings are removed: ===================== WARNING ====================== This board does not use CONFIG_DM_MMC. Please update the board to use CONFIG_DM_MMC before the v2019.04 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ==================================================== ===================== WARNING ====================== This board does not use CONFIG_DM_USB. Please update the board to use CONFIG_DM_USB before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ==================================================== BLK and DM_MMC are enabled by default in SPL as well, which is making the build to break with an overflow(spl image doesn't fit into SRAM because of size constraints). LD spl/drivers/built-in.o LD spl/u-boot-spl arm-linux-ld.bfd: u-boot-spl section .u_boot_list will not fit in region .sram arm-linux-ld.bfd: region .sram overflowed by 116 bytes make[1]: *** [spl/u-boot-spl] Error 1 make: *** [spl/u-boot-spl] Error 2 For the above reason BLK and DM_MMC is disabled in SPL. Built and tested on AM335x device (BeagleboneBlack). Signed-off-by: Suniel Mahesh <sunil.m(a)techveda.org> --- configs/am335x_boneblack_vboot_defconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index 9ccbd68..a6c32ac 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -33,7 +33,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack" CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -# CONFIG_BLK is not set +# CONFIG_SPL_BLK is not set CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y @@ -42,6 +42,7 @@ CONFIG_DM_I2C=y CONFIG_MISC=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y +# CONFIG_SPL_DM_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SPI_FLASH_WINBOND=y -- 1.9.1

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