December 2019 - U-Boot

[U-Boot] [PATCH v2] pwm: rk_pwm: Make PWM driver to support all Rockchip Socs
by David Wu 05 Dec '19

05 Dec '19

This PWM driver can be used to support pwm functions for on all Rockchip Socs. The previous chips than RK3288 did not support polarity, and register layout was different from the RK3288 PWM. The RK3288 keep the current functions. RK3308 and the chips after it, which can support hardware lock, configure duty, period and polarity at next same period, to prevent the intermediate temporary state. Signed-off-by: David Wu <david.wu(a)rock-chips.com> --- Change in v2: None - Remove RK3399 compatible arch/arm/include/asm/arch-rockchip/pwm.h | 17 ++- drivers/pwm/rk_pwm.c | 138 +++++++++++++++++++---- 2 files changed, 130 insertions(+), 25 deletions(-) diff --git a/arch/arm/include/asm/arch-rockchip/pwm.h b/arch/arm/include/asm/arch-rockchip/pwm.h index b5178db394..e8594055cd 100644 --- a/arch/arm/include/asm/arch-rockchip/pwm.h +++ b/arch/arm/include/asm/arch-rockchip/pwm.h @@ -7,13 +7,15 @@ #ifndef _ASM_ARCH_PWM_H #define _ASM_ARCH_PWM_H -struct rk3288_pwm { - u32 cnt; - u32 period_hpr; - u32 duty_lpr; - u32 ctrl; +struct rockchip_pwm_regs { + unsigned long duty; + unsigned long period; + unsigned long cntr; + unsigned long ctrl; }; -check_member(rk3288_pwm, ctrl, 0xc); + +#define PWM_CTRL_TIMER_EN (1 << 0) +#define PWM_CTRL_OUTPUT_EN (1 << 3) #define RK_PWM_DISABLE (0 << 0) #define RK_PWM_ENABLE (1 << 0) @@ -33,6 +35,9 @@ check_member(rk3288_pwm, ctrl, 0xc); #define PWM_OUTPUT_LEFT (0 << 5) #define PWM_OUTPUT_CENTER (1 << 5) +#define PWM_LOCK (1 << 6) +#define PWM_UNLOCK (0 << 6) + #define PWM_LP_ENABLE (1 << 8) #define PWM_LP_DISABLE (0 << 8) diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c index 88db294cf1..46888e9077 100644 --- a/drivers/pwm/rk_pwm.c +++ b/drivers/pwm/rk_pwm.c @@ -15,22 +15,38 @@ #include <asm/arch-rockchip/pwm.h> #include <power/regulator.h> +DECLARE_GLOBAL_DATA_PTR; + +struct rockchip_pwm_data { + struct rockchip_pwm_regs regs; + unsigned int prescaler; + bool supports_polarity; + bool supports_lock; + u32 enable_conf; + u32 enable_conf_mask; +}; + struct rk_pwm_priv { - struct rk3288_pwm *regs; + fdt_addr_t base; ulong freq; - uint enable_conf; + u32 conf_polarity; + const struct rockchip_pwm_data *data; }; static int rk_pwm_set_invert(struct udevice *dev, uint channel, bool polarity) { struct rk_pwm_priv *priv = dev_get_priv(dev); + if (!priv->data->supports_polarity) { + debug("%s: Do not support polarity\n", __func__); + return 0; + } + debug("%s: polarity=%u\n", __func__, polarity); - priv->enable_conf &= ~(PWM_DUTY_MASK | PWM_INACTIVE_MASK); if (polarity) - priv->enable_conf |= PWM_DUTY_NEGATIVE | PWM_INACTIVE_POSTIVE; + priv->conf_polarity = PWM_DUTY_NEGATIVE | PWM_INACTIVE_POSTIVE; else - priv->enable_conf |= PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE; + priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE; return 0; } @@ -39,20 +55,44 @@ static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns, uint duty_ns) { struct rk_pwm_priv *priv = dev_get_priv(dev); - struct rk3288_pwm *regs = priv->regs; + const struct rockchip_pwm_regs *regs = &priv->data->regs; unsigned long period, duty; + u32 ctrl; debug("%s: period_ns=%u, duty_ns=%u\n", __func__, period_ns, duty_ns); - writel(PWM_SEL_SRC_CLK | PWM_OUTPUT_LEFT | PWM_LP_DISABLE | - PWM_CONTINUOUS | priv->enable_conf | - RK_PWM_DISABLE, - &regs->ctrl); - period = lldiv((uint64_t)(priv->freq / 1000) * period_ns, 1000000); - duty = lldiv((uint64_t)(priv->freq / 1000) * duty_ns, 1000000); + ctrl = readl(priv->base + regs->ctrl); + /* + * Lock the period and duty of previous configuration, then + * change the duty and period, that would not be effective. + */ + if (priv->data->supports_lock) { + ctrl |= PWM_LOCK; + writel(ctrl, priv->base + regs->ctrl); + } + + period = lldiv((uint64_t)priv->freq * period_ns, + priv->data->prescaler * 1000000000); + duty = lldiv((uint64_t)priv->freq * duty_ns, + priv->data->prescaler * 1000000000); + + writel(period, priv->base + regs->period); + writel(duty, priv->base + regs->duty); + + if (priv->data->supports_polarity) { + ctrl &= ~(PWM_DUTY_MASK | PWM_INACTIVE_MASK); + ctrl |= priv->conf_polarity; + } + + /* + * Unlock and set polarity at the same time, + * the configuration of duty, period and polarity + * would be effective together at next period. + */ + if (priv->data->supports_lock) + ctrl &= ~PWM_LOCK; + writel(ctrl, priv->base + regs->ctrl); - writel(period, &regs->period_hpr); - writel(duty, &regs->duty_lpr); debug("%s: period=%lu, duty=%lu\n", __func__, period, duty); return 0; @@ -61,10 +101,20 @@ static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns, static int rk_pwm_set_enable(struct udevice *dev, uint channel, bool enable) { struct rk_pwm_priv *priv = dev_get_priv(dev); - struct rk3288_pwm *regs = priv->regs; + const struct rockchip_pwm_regs *regs = &priv->data->regs; + u32 ctrl; debug("%s: Enable '%s'\n", __func__, dev->name); - clrsetbits_le32(&regs->ctrl, RK_PWM_ENABLE, enable ? RK_PWM_ENABLE : 0); + + ctrl = readl(priv->base + regs->ctrl); + ctrl &= ~priv->data->enable_conf_mask; + + if (enable) + ctrl |= priv->data->enable_conf; + else + ctrl &= ~priv->data->enable_conf; + + writel(ctrl, priv->base + regs->ctrl); return 0; } @@ -73,7 +123,7 @@ static int rk_pwm_ofdata_to_platdata(struct udevice *dev) { struct rk_pwm_priv *priv = dev_get_priv(dev); - priv->regs = (struct rk3288_pwm *)dev_read_addr(dev); + priv->base = dev_read_addr(dev); return 0; } @@ -89,8 +139,12 @@ static int rk_pwm_probe(struct udevice *dev) debug("%s get clock fail!\n", __func__); return -EINVAL; } + priv->freq = clk_get_rate(&clk); - priv->enable_conf = PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE; + priv->data = (struct rockchip_pwm_data *)dev_get_driver_data(dev); + + if (priv->data->supports_polarity) + priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE; return 0; } @@ -101,8 +155,54 @@ static const struct pwm_ops rk_pwm_ops = { .set_enable = rk_pwm_set_enable, }; +static const struct rockchip_pwm_data pwm_data_v1 = { + .regs = { + .duty = 0x04, + .period = 0x08, + .cntr = 0x00, + .ctrl = 0x0c, + }, + .prescaler = 2, + .supports_polarity = false, + .supports_lock = false, + .enable_conf = PWM_CTRL_OUTPUT_EN | PWM_CTRL_TIMER_EN, + .enable_conf_mask = BIT(1) | BIT(3), +}; + +static const struct rockchip_pwm_data pwm_data_v2 = { + .regs = { + .duty = 0x08, + .period = 0x04, + .cntr = 0x00, + .ctrl = 0x0c, + }, + .prescaler = 1, + .supports_polarity = true, + .supports_lock = false, + .enable_conf = PWM_OUTPUT_LEFT | PWM_LP_DISABLE | RK_PWM_ENABLE | + PWM_CONTINUOUS, + .enable_conf_mask = GENMASK(2, 0) | BIT(5) | BIT(8), +}; + +static const struct rockchip_pwm_data pwm_data_v3 = { + .regs = { + .duty = 0x08, + .period = 0x04, + .cntr = 0x00, + .ctrl = 0x0c, + }, + .prescaler = 1, + .supports_polarity = true, + .supports_lock = true, + .enable_conf = PWM_OUTPUT_LEFT | PWM_LP_DISABLE | RK_PWM_ENABLE | + PWM_CONTINUOUS, + .enable_conf_mask = GENMASK(2, 0) | BIT(5) | BIT(8), +}; + static const struct udevice_id rk_pwm_ids[] = { - { .compatible = "rockchip,rk3288-pwm" }, + { .compatible = "rockchip,rk2928-pwm", .data = (ulong)&pwm_data_v1}, + { .compatible = "rockchip,rk3288-pwm", .data = (ulong)&pwm_data_v2}, + { .compatible = "rockchip,rk3328-pwm", .data = (ulong)&pwm_data_v3}, { } }; -- 2.19.1

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[U-Boot] [PATCH] rockchip: allow loading larger kernels
by Ben Wolsieffer 05 Dec '19

05 Dec '19

Recent versions of the Linux kernel with many options enabled have grown large enough to overwrite the beginning of the initrd. For example, the kernel I use on my Rock64 and RockPro64 is 34.1 MiB, while only 31.5 MiB are available between kernel_addr_r and ramdisk_addr_r. This patch moves ramdisk_addr_r up by 32 MiB on the RK3328 and RK3399, allowing for much larger kernels. Signed-off-by: Ben Wolsieffer <benwolsieffer(a)gmail.com> --- include/configs/rk3328_common.h | 2 +- include/configs/rk3399_common.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index e51e1b0e0e..b14da3a626 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -36,7 +36,7 @@ "pxefile_addr_r=0x00600000\0" \ "fdt_addr_r=0x01f00000\0" \ "kernel_addr_r=0x02080000\0" \ - "ramdisk_addr_r=0x04000000\0" + "ramdisk_addr_r=0x06000000\0" #include <config_distro_bootcmd.h> #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 7331c6dc02..127ca1f09c 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -51,7 +51,7 @@ "pxefile_addr_r=0x00600000\0" \ "fdt_addr_r=0x01f00000\0" \ "kernel_addr_r=0x02080000\0" \ - "ramdisk_addr_r=0x04000000\0" + "ramdisk_addr_r=0x06000000\0" #ifndef ROCKCHIP_DEVICE_SETTINGS #define ROCKCHIP_DEVICE_SETTINGS -- 2.24.0

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[U-Boot] [PATCH] rockchip: rk3328: rock64: enable CONFIG_MISC_INIT_R
by Ben Wolsieffer 05 Dec '19

05 Dec '19

This enables reading of the cpuid and a static MAC address. Signed-off-by: Ben Wolsieffer <benwolsieffer(a)gmail.com> --- configs/rock64-rk3328_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index 14c77b0a4e..720b5e0424 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -19,6 +19,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock64.dtb" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -- 2.24.0

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[PATCH 0/2] mkimage/rockchip: support packing optional second level boot-loader
by Jeffy Chen 05 Dec '19

05 Dec '19

When enabling back-to-bootrom, the bootrom would continue to load the second level boot-loader. And currently we are packing it by appending the generated image manually (with a predefined max size): ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \ firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ cat firefly-rk3288/u-boot-dtb.bin >> out This series add support of packing optional second level loader with mkimage tool: ./tools/mkimage -n rk3399 -T rksd -d \ rk3399_ddr_800MHz_v1.24.bin:rk3399_miniloader_v1.19.bin out Jeffy Chen (2): rockchip: mkimage: support packing optional second level boot-loader doc: rockchip: document packing second level loader with mkimage doc/README.rockchip | 11 +++ tools/imagetool.h | 1 + tools/mkimage.c | 8 ++ tools/rkcommon.c | 236 +++++++++++++++++++++++++++++++++++++++++++--------- tools/rkcommon.h | 18 ++-- tools/rksd.c | 35 +------- tools/rkspi.c | 42 ++++------ 7 files changed, 237 insertions(+), 114 deletions(-) -- 2.11.0

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[U-Boot] [PATCH v2] Prevented possible null dereference.
by Niv Shetrit 05 Dec '19

05 Dec '19

Signed-off-by: Niv Shetrit <niv.shetrit(a)altair-semi.com> --- common/cli_hush.c | 73 ++++++++++++++++++++++++----------------------- 1 file changed, 38 insertions(+), 35 deletions(-) diff --git a/common/cli_hush.c b/common/cli_hush.c index 8f86e4aa4a..c14302c3ad 100644 --- a/common/cli_hush.c +++ b/common/cli_hush.c @@ -3539,41 +3539,44 @@ static char *insert_var_value_sub(char *inp, int tag_subst) } inp = ++p; /* find the ending marker */ - p = strchr(inp, SPECIAL_VAR_SYMBOL); - *p = '\0'; - /* look up the value to substitute */ - if ((p1 = lookup_param(inp))) { - if (tag_subst) - len = res_str_len + strlen(p1) + 2; - else - len = res_str_len + strlen(p1); - res_str = xrealloc(res_str, (1 + len)); - if (tag_subst) { - /* - * copy the variable value to the result - * string - */ - strcpy((res_str + res_str_len + 1), p1); - - /* - * mark the replaced text to be accepted as - * is - */ - res_str[res_str_len] = SUBSTED_VAR_SYMBOL; - res_str[res_str_len + 1 + strlen(p1)] = - SUBSTED_VAR_SYMBOL; - } else - /* - * copy the variable value to the result - * string - */ - strcpy((res_str + res_str_len), p1); - - res_str_len = len; - } - *p = SPECIAL_VAR_SYMBOL; - inp = ++p; - done = 1; + p = strchr(inp, SPECIAL_VAR_SYMBOL) + if (p != NULL) { + *p = '\0'; + /* look up the value to substitute */ + p1 = lookup_param(inp) + if (p1 != NULL) { + if (tag_subst) + len = res_str_len + strlen(p1) + 2; + else + len = res_str_len + strlen(p1); + res_str = xrealloc(res_str, (1 + len)); + if (tag_subst) { + /* + * copy the variable value to the + * result string + */ + strcpy((res_str + res_str_len + 1), p1); + + /* + * mark the replaced text to be + * accepted as is + */ + res_str[res_str_len] = SUBSTED_VAR_SYMBOL; + res_str[res_str_len + 1 + strlen(p1)] = + SUBSTED_VAR_SYMBOL; + } else + /* + * copy the variable value to the result + * string + */ + strcpy((res_str + res_str_len), p1); + + res_str_len = len; + } + *p = SPECIAL_VAR_SYMBOL; + inp = ++p; + done = 1; + } } if (done) { res_str = xrealloc(res_str, (1 + res_str_len + strlen(inp))); -- 2.17.1

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[U-Boot] Load Debian/Fedora via EFI
by Michal Simek 05 Dec '19

05 Dec '19

Hi, I tried to boot latest debian and fedora rootfs via distro boot and getting errors. I have tried to run just one command and it is failing. ZynqMP> bootefi bootmgr ${fdtcontroladdr} BootOrder not defined EFI boot manager: Cannot load any image How to define BootOrder? Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

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[U-Boot] [PATCH v2 0/8] am57xx: Implement Android 10 boot flow
by Sam Protsenko 05 Dec '19

05 Dec '19

Android 10 brings a lot of new requirements for bootloaders: [1]. This patch series attempts to implement such a boot process on BeagleBoard X15 platform. Some common code is added too, which can be reused later for other platforms. This patch series denends on next (still not merged) patches: 1. libavb: Update libavb to current AOSP master [2] 2. libavb: Fix build warnings after updating the lib [3] 3. cmd: avb: Support A/B slots [4] 4. cmd: avb: Fix requested partitions list [5] Changes in v2: - add the unit test for new functionality ('bootimg' command, dtb/dtbo fields in Android Boot Image) - add "bootimg set_addr" sub-command - provide mem mappings so that 'bootimg' command works in sandbox (needed for tests to work correctly) - rebase on top of most recent master - re-sync am57x defconfigs with "make savedefconfig" [1] https://source.android.com/devices/bootloader [2] https://patchwork.ozlabs.org/patch/1147825/ [3] https://patchwork.ozlabs.org/patch/1147826/ [4] https://patchwork.ozlabs.org/patch/1144646/ [5] https://patchwork.ozlabs.org/patch/1147731/ Sam Protsenko (8): image: android: Add functions for handling dtb field image: android: Add routine to get dtbo params cmd: bootimg: Add bootimg command test/py: android: Add test for bootimg configs: am57xx_evm: Enable Android commands env: ti: boot: Respect slot_suffix in AVB commands env: ti: boot: Boot Android with dynamic partitions arm: ti: boot: Use correct dtb and dtbo on Android boot cmd/Kconfig | 8 + cmd/Makefile | 1 + cmd/bootimg.c | 210 ++++++++++++++++ common/Makefile | 2 +- common/image-android.c | 276 +++++++++++++++++++++ configs/am57xx_evm_defconfig | 10 +- configs/am57xx_hs_evm_defconfig | 6 + configs/am57xx_hs_evm_usb_defconfig | 6 + configs/sandbox_defconfig | 1 + include/configs/ti_armv7_common.h | 7 + include/environment/ti/boot.h | 145 ++++++----- include/image.h | 6 + test/py/tests/test_android/test_bootimg.py | 157 ++++++++++++ 13 files changed, 767 insertions(+), 68 deletions(-) create mode 100644 cmd/bootimg.c create mode 100644 test/py/tests/test_android/test_bootimg.py -- 2.23.0

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[PATCH] usb: cdns3: ep0: Fix build warnings related to cache ops
by Vignesh Raghavendra 05 Dec '19

05 Dec '19

Since, commit 62f9b6544728 ("common: Move older CPU functions to their own header") cache ops functions are declared in a separate header. Include the same to avoid build warnings. Signed-off-by: Vignesh Raghavendra <vigneshr(a)ti.com> --- drivers/usb/cdns3/ep0.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/usb/cdns3/ep0.c b/drivers/usb/cdns3/ep0.c index 1903f6110388..0b6d9cf7274e 100644 --- a/drivers/usb/cdns3/ep0.c +++ b/drivers/usb/cdns3/ep0.c @@ -10,6 +10,7 @@ * Peter Chen <peter.chen(a)nxp.com> */ +#include <cpu_func.h> #include <linux/usb/composite.h> #include <linux/iopoll.h> -- 2.24.0

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[PATCH v1 0/5] toradex: imx: add update_uboot wrapper
by Igor Opaniuk 05 Dec '19

05 Dec '19

This patch series introduces universtal update_uboot wrapper that helps to update U-Boot image on internal storage. Example of usage: > tftpboot ${loadaddr} ${board_name}/u-boot.img > run update_uboot > tftpboot ${loadaddr} ${board_name}/SPL > run update_spl Igor Opaniuk (5): colibri_imx7: add update_uboot wrapper apalis_imx6: add update_uboot wrapper colibri_imx6: add update_uboot wrapper colibri-imx6ull: add update_uboot wrapper colibri_vf: add update_uboot wrapper include/configs/apalis_imx6.h | 12 ++++++++++++ include/configs/colibri-imx6ull.h | 8 ++++++++ include/configs/colibri_imx6.h | 12 ++++++++++++ include/configs/colibri_imx7.h | 18 ++++++++++++++++++ include/configs/colibri_vf.h | 6 ++++++ 5 files changed, 56 insertions(+) -- 2.17.1

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[PATCH v2 0/7] Add a random number generator uclass
by Sughosh Ganu 05 Dec '19

05 Dec '19

Add a random number generator(rng) uclass to facilitate adding drivers for rng devices. I plan to add an implementation of the EFI_RNG_PROTOCOL, which would get the random number from the rng uclass -- the protocol would be used by the efi stub for getting a random number for the kaslr feature. The patch series also adds a driver for the rng device found on the stm32mp1 platforms. A dummy rng driver for sandbox has also been added, along with the unit test for the rng uclass. Changes since V1: * Add a SPDX header in rng.h * Change the UCLASS_DRIVER name from hwrng to rng, consistent with the rest of the naming convention * Handle review comment from Patrice Chotard Sughosh Ganu (7): dm: rng: Add random number generator(rng) uclass clk: stm32mp1: Add a clock entry for RNG1 device stm32mp1: rng: Add a driver for random number generator(rng) device configs: stm32mp15: Enable random number generator(rng) device sandbox: rng: Add a random number generator(rng) driver configs: sandbox: Enable random number generator(rng) device test: rng: Add basic test for random number generator(rng) uclass arch/sandbox/dts/test.dts | 4 + configs/sandbox64_defconfig | 2 + configs/sandbox_defconfig | 2 + configs/stm32mp15_basic_defconfig | 2 + configs/stm32mp15_optee_defconfig | 2 + configs/stm32mp15_trusted_defconfig | 2 + drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/clk/clk_stm32mp1.c | 1 + drivers/rng/Kconfig | 21 +++++ drivers/rng/Makefile | 8 ++ drivers/rng/rng-uclass.c | 23 ++++++ drivers/rng/sandbox_rng.c | 36 ++++++++ drivers/rng/stm32mp1_rng.c | 158 ++++++++++++++++++++++++++++++++++++ include/dm/uclass-id.h | 1 + include/rng.h | 30 +++++++ test/dm/Makefile | 1 + test/dm/rng.c | 26 ++++++ 18 files changed, 322 insertions(+) create mode 100644 drivers/rng/Kconfig create mode 100644 drivers/rng/Makefile create mode 100644 drivers/rng/rng-uclass.c create mode 100644 drivers/rng/sandbox_rng.c create mode 100644 drivers/rng/stm32mp1_rng.c create mode 100644 include/rng.h create mode 100644 test/dm/rng.c -- 2.7.4

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