December 2019 - U-Boot

[U-Boot] U-Boot for the Socfpga Arria10 board
by Wolfgang Grandegger 13 Jan '20

13 Jan '20

Hello, I'm trying to understand what is necessary to get mainline U-Boot booting from the eMMC of an Arria10 board, which is significantly different to the Cyclone 5. I'm playing with U-Boot v2019.10! I find some related documentation at [1]. Section "Arria 10 SoC - Boot from SD Card " seems to apply to the mainline U-Boot as well, at a first glance. Is there some similar doc for mainline U-Boot? What are the differences in mainline? Is it working or is something missing? So I need at least three partitions on the eMMC: 1. VFAT partition with u-boot.img and fit_spl_fpga.itb 2. A2 partition with 4x u-boot-spl.sfp (or u-boot-with-spl.sfp) 3. Linux partition Where do I specify the physical number of the partition 1.? Is it still possible to load the secondary bootloader (u-boot.img) from offset 0x800 of the A2 partition? It seems that "SPL_FS_FAT" breaks it. [1] https://rocketboards.org/foswiki/Documentation/BuildingBootloader TIA, Wolfgang

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[U-Boot] Question about GPL v3 font
by Masahiro Yamada 13 Jan '20

13 Jan '20

Hi. According to the Kconfig entry, drivers/video/fonts/nimbus_sans_l_regular.ttf is licensed under GPL v3. How the license is handled when U-Boot is compiled with CONFIG_CONSOLE_TRUETYPE_NIMBUS=y ? I am asking this since many companies, I guess, have GPL-v3 allergy. config CONSOLE_TRUETYPE_NIMBUS bool "Nimbus Sans Regular" depends on CONSOLE_TRUETYPE default y help Nimbus Sans L is a version of Nimbus Sans using Adobe font sources. It was designed in 1987. A subset of Nimbus Sans L were released under the GPL. Although the characters are not exactly the same, Nimbus Sans L has metrics almost identical to Helvetica and Arial. (From Wikipedia, the free encyclopedia) From: https://fontlibrary.org/en/font/nimbus-sans-l License: GNU GPL v3 http://www.gnu.org/copyleft/gpl.html -- Best Regards Masahiro Yamada

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[PATCHv3 0/3] Odroid n2 using eMMC would fail to boot up
by Anand Moon 11 Jan '20

11 Jan '20

Here are some small changes to fix booting of Odroid N2 using eMMC. Fixed the clk tunnig during mmc initialization. Build and tested on top of below patches [0] https://patchwork.ozlabs.org/patch/1213648/ [1] https://patchwork.ozlabs.org/patch/1213650/ Tested on below eMMC module on Odroid N2 and C2 new orange - eMMC AJNB4R 14.6 GiB MMC 5.1 old back - eMMC CGND3R 58.2 GiB MMC 5.0 Prevoius changes: Fixed the clk tuning as per mainline kernel [3]v1 https://patchwork.ozlabs.org/cover/1201206/ [4]v2 https://patchwork.ozlabs.org/cover/1215217/ -Anand Anand Moon (3): mmc: meson-gx: Fix clk phase tuning for MMC configs: meson64: enable GIC support for G12A/G12B board: amlogic: select PWRSEQ for all amlogic platform arch/arm/include/asm/arch-meson/sd_emmc.h | 14 ++++++-------- arch/arm/mach-meson/Kconfig | 1 + drivers/mmc/meson_gx_mmc.c | 9 +++++---- include/configs/meson64.h | 2 +- 4 files changed, 13 insertions(+), 13 deletions(-) -- 2.24.1

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[Patch v3 0/7] Transition of fsl qspi driver to spi-mem framework
by Kuldeep Singh 11 Jan '20

11 Jan '20

This entire patch series migrate freescale qspi driver to spi-mem framework. v3 version of series includes correction of copyright in qspi driver and also move SPI_FLASH_SPANSION from header to defconfigs in same patch. v2 version of series includes changes in qspi driver to have 1k size instead of complete flash size so as to make driver independent of flash size. This also makes it align with linux version of driver. Also added support for imx platforms to set TDH bits correctly. There are other minor changes in commit messages. Dependency on patches[1][2]. These patches are required to resolve booting crash observed in LS1012ARDB. One crash was related to pfe driver as it was accessing flash memory directly and other was based on environment. [1] https://patchwork.ozlabs.org/patch/1207610/ [2] https://patchwork.ozlabs.org/patch/1208299/ Patch 1 adds new qspi driver incorporating spi-mem framework and also removal of old driver which was based on spi-nor. The driver is a ported version of linux qspi driver. Initial port was done by Frieder. Now, no more direct memory access to spi-nor memory is possible i.e accessing flash memory using absolute address is not possible. Patch 2 removes unused qspi config options. Patch 3 moves FSL_QSPI to defconfig instead of defining it in header files. Patch 4 removes unused num-cs property from imx platforms. Patch 5 enables SPI_FLASH_SPANSION in ls1012a defconfig as FSL_QSPI is already enabled. Patch 6 enables SPI_FLASH_SPANSION in defconfigs of LS1046a boards instead of defining in header files. Patch 7 updates the device-tree properties treewide for layerscape boards by aligning with linux device-tree properties. Frieder Schrempf (1): imx: imx6sx: Remove unused 'num-cs' property Kuldeep Singh (6): spi: Transform the FSL QuadSPI driver to use the SPI MEM API treewide: Remove unused FSL QSPI config options configs: ls1043a: Move CONFIG_FSL_QSPI to defconfig configs: ls1012a: Enable CONFIG_SPI_FLASH_SPANSION configs: ls1046a: Move SPI_FLASH_SPANSION to defconfig treewide: Update fsl qspi node dt properties as per spi-mem driver arch/arm/dts/fsl-ls1012a-2g5rdb.dts | 5 +- arch/arm/dts/fsl-ls1012a-frdm.dtsi | 5 +- arch/arm/dts/fsl-ls1012a-qds.dtsi | 5 +- arch/arm/dts/fsl-ls1012a-rdb.dtsi | 5 +- arch/arm/dts/fsl-ls1012a.dtsi | 4 +- arch/arm/dts/fsl-ls1043a-qds.dtsi | 5 +- arch/arm/dts/fsl-ls1043a.dtsi | 6 +- arch/arm/dts/fsl-ls1046a-frwy.dts | 5 +- arch/arm/dts/fsl-ls1046a-qds.dtsi | 5 +- arch/arm/dts/fsl-ls1046a-rdb.dts | 5 +- arch/arm/dts/fsl-ls1046a.dtsi | 4 +- arch/arm/dts/fsl-ls1088a-qds.dts | 5 +- arch/arm/dts/fsl-ls1088a-rdb.dts | 5 +- arch/arm/dts/fsl-ls1088a.dtsi | 2 +- arch/arm/dts/fsl-ls2080a-qds.dts | 5 +- arch/arm/dts/fsl-ls2080a.dtsi | 4 +- arch/arm/dts/fsl-ls2088a-rdb-qspi.dts | 5 +- arch/arm/dts/imx6sx-sabreauto-u-boot.dtsi | 2 - arch/arm/dts/imx6sx-sdb-u-boot.dtsi | 2 - arch/arm/dts/ls1021a-twr.dtsi | 5 +- arch/arm/dts/ls1021a.dtsi | 6 +- .../include/asm/arch-fsl-layerscape/config.h | 1 - arch/arm/include/asm/arch-ls102xa/config.h | 1 - configs/ls1012a2g5rdb_qspi_defconfig | 1 + configs/ls1012a2g5rdb_tfa_defconfig | 1 + configs/ls1012afrdm_qspi_defconfig | 1 + configs/ls1012afrdm_tfa_defconfig | 1 + configs/ls1012aqds_qspi_defconfig | 1 + configs/ls1012aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012aqds_tfa_defconfig | 1 + configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012ardb_qspi_defconfig | 1 + configs/ls1012ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012ardb_tfa_defconfig | 1 + configs/ls1043aqds_qspi_defconfig | 1 + configs/ls1043aqds_sdcard_qspi_defconfig | 1 + configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 2 + configs/ls1043aqds_tfa_defconfig | 1 + configs/ls1046aqds_qspi_defconfig | 1 + configs/ls1046aqds_sdcard_qspi_defconfig | 1 + configs/ls1046aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046aqds_tfa_defconfig | 1 + configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_qspi_defconfig | 1 + configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_tfa_defconfig | 1 + drivers/spi/fsl_qspi.c | 1572 +++++++---------- drivers/spi/fsl_qspi.h | 145 -- include/configs/ls1012a_common.h | 17 +- include/configs/ls1012afrwy.h | 3 - include/configs/ls1012ardb.h | 3 - include/configs/ls1021aiot.h | 6 - include/configs/ls1021aqds.h | 11 - include/configs/ls1021atwr.h | 10 - include/configs/ls1043aqds.h | 10 - include/configs/ls1046afrwy.h | 9 - include/configs/ls1046aqds.h | 19 - include/configs/ls1046ardb.h | 20 - include/configs/ls1088a_common.h | 6 - include/configs/ls1088aqds.h | 8 - include/configs/ls1088ardb.h | 18 - include/configs/ls2080aqds.h | 3 - include/configs/ls2080ardb.h | 6 +- include/configs/mx6sxsabreauto.h | 6 - include/configs/mx6sxsabresd.h | 11 - include/configs/mx6ul_14x14_evk.h | 6 - include/configs/mx6ullevk.h | 6 - include/configs/mx7dsabresd.h | 8 - include/configs/pcm052.h | 7 - include/configs/vf610twr.h | 8 - scripts/config_whitelist.txt | 5 - 71 files changed, 664 insertions(+), 1380 deletions(-) delete mode 100644 drivers/spi/fsl_qspi.h -- 2.17.1

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[PATCH 1/1] virtio: fix typo devicd
by Heinrich Schuchardt 10 Jan '20

10 Jan '20

%s/devicd/device Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- drivers/virtio/virtio_mmio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/virtio/virtio_mmio.c b/drivers/virtio/virtio_mmio.c index 7b738703b8..a67b354122 100644 --- a/drivers/virtio/virtio_mmio.c +++ b/drivers/virtio/virtio_mmio.c @@ -363,7 +363,7 @@ static int virtio_mmio_probe(struct udevice *udev) return 0; } - /* Check devicd ID */ + /* Check device ID */ uc_priv->device = readl(priv->base + VIRTIO_MMIO_DEVICE_ID); if (uc_priv->device == 0) { /* -- 2.24.0

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[PATCH v2 1/1] arch: arm: Program GIC LPI configuration table
by Vladimir Olovyannikov 10 Jan '20

10 Jan '20

From: Bharat Kumar Reddy Gooty <bharat.gooty(a)broadcom.com> Programs the following: 1. Redistributor PROCBASER configuration table (which is common for all redistributors) 2. Redistributor pending table (PENDBASER), for all the available redistributors. Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty(a)broadcom.com> Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov(a)broadcom.com> --- arch/arm/Kconfig | 10 +++ arch/arm/include/asm/gic-v3.h | 134 ++++++++++++++++++++++++++++++++++ arch/arm/lib/Makefile | 1 + arch/arm/lib/gic-v3-its.c | 100 +++++++++++++++++++++++++ 4 files changed, 245 insertions(+) create mode 100644 arch/arm/include/asm/gic-v3.h create mode 100644 arch/arm/lib/gic-v3-its.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f96841c777..c0b45df9d0 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -61,6 +61,16 @@ config LNX_KRNL_IMG_TEXT_OFFSET_BASE endif endif +config GIC_V3_ITS + bool "ARM GICV3 ITS" + help + ARM GICV3 Interrupt translation service (ITS). + Basic support for programming locality specific peripheral + interrupts (LPI) configuration tables and enable LPI tables. + LPI configuration table can be used by u-boot or Linux. + ARM GICV3 has limitation, once the LPI table is enabled, LPI + configuration table can not be re-programmed, unless GICV3 reset. + config STATIC_RELA bool default y if ARM64 && !POSITION_INDEPENDENT diff --git a/arch/arm/include/asm/gic-v3.h b/arch/arm/include/asm/gic-v3.h new file mode 100644 index 0000000000..ac6c9e7013 --- /dev/null +++ b/arch/arm/include/asm/gic-v3.h @@ -0,0 +1,134 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 Broadcom. + */ + +#ifndef __GIC_V3_H__ +#define __GIC_V3_H__ + +#define GICR_CTLR_ENABLE_LPIS BIT(0) +#define GICR_CTLR_RWP BIT(3) + +#define GICR_TYPER_CPU_NUMBER(r) (((r) >> 8) & 0xffff) + +#define GICR_WAKER_PROCESSORSLEEP BIT(1) +#define GICR_WAKER_CHILDRENASLEEP BIT(2) + +#define GIC_BASER_CACHE_NCNB 0ULL +#define GIC_BASER_CACHE_SAMEASINNER 0ULL +#define GIC_BASER_CACHE_NC 1ULL +#define GIC_BASER_CACHE_RAWT 2ULL +#define GIC_BASER_CACHE_RAWB 3ULL +#define GIC_BASER_CACHE_WAWT 4ULL +#define GIC_BASER_CACHE_WAWB 5ULL +#define GIC_BASER_CACHE_RAWAWT 6ULL +#define GIC_BASER_CACHE_RAWAWB 7ULL +#define GIC_BASER_CACHE_MASK 7ULL +#define GIC_BASER_NONSHAREABLE 0ULL +#define GIC_BASER_INNERSHAREABLE 1ULL +#define GIC_BASER_OUTERSHAREABLE 2ULL +#define GIC_BASER_SHAREABILITY_MASK 3ULL + +#define GIC_BASER_CACHEABILITY(reg, inner_outer, type) \ + (GIC_BASER_CACHE_##type << reg##_##inner_outer##_CACHEABILITY_SHIFT) + +#define GIC_BASER_SHAREABILITY(reg, type) \ + (GIC_BASER_##type << reg##_SHAREABILITY_SHIFT) + +/* encode a size field of width @w containing @n - 1 units */ +#define GIC_ENCODE_SZ(n, w) (((unsigned long)(n) - 1) &\ + GENMASK_ULL(((w) - 1), 0)) + +#define GICR_PROPBASER_SHAREABILITY_SHIFT (10) +#define GICR_PROPBASER_INNER_CACHEABILITY_SHIFT (7) +#define GICR_PROPBASER_OUTER_CACHEABILITY_SHIFT (56) +#define GICR_PROPBASER_SHAREABILITY_MASK \ + GIC_BASER_SHAREABILITY(GICR_PROPBASER, SHAREABILITY_MASK) +#define GICR_PROPBASER_INNER_CACHEABILITY_MASK \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, MASK) +#define GICR_PROPBASER_OUTER_CACHEABILITY_MASK \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, MASK) +#define GICR_PROPBASER_CACHEABILITY_MASK GICR_PROPBASER_INNER_CACHEABILITY_MASK + +#define GICR_PROPBASER_INNERSHAREABLE \ + GIC_BASER_SHAREABILITY(GICR_PROPBASER, INNERSHAREABLE) + +#define GICR_PROPBASER_NCNB \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, NCNB) +#define GICR_PROPBASER_NC \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, NC) +#define GICR_PROPBASER_RAWT \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWT) +#define GICR_PROPBASER_RAWB \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWB) +#define GICR_PROPBASER_WAWT \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WAWT) +#define GICR_PROPBASER_WAWB \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WAWB) +#define GICR_PROPBASER_RAWAWT \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWAWT) +#define GICR_PROPBASER_RAWAWB \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWAWB) + +#define GICR_PROPBASER_IDBITS_MASK (0x1f) +#define GICR_PROPBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 12)) +#define GICR_PENDBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 16)) + +#define GICR_PENDBASER_SHAREABILITY_SHIFT (10) +#define GICR_PENDBASER_INNER_CACHEABILITY_SHIFT (7) +#define GICR_PENDBASER_OUTER_CACHEABILITY_SHIFT (56) +#define GICR_PENDBASER_SHAREABILITY_MASK \ + GIC_BASER_SHAREABILITY(GICR_PENDBASER, SHAREABILITY_MASK) +#define GICR_PENDBASER_INNER_CACHEABILITY_MASK \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, MASK) +#define GICR_PENDBASER_OUTER_CACHEABILITY_MASK \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, OUTER, MASK) +#define GICR_PENDBASER_CACHEABILITY_MASK \ + GICR_PENDBASER_INNER_CACHEABILITY_MASK + +#define GICR_PENDBASER_INNERSHAREABLE \ + GIC_BASER_SHAREABILITY(GICR_PENDBASER, INNERSHAREABLE) + +#define GICR_PENDBASER_NCNB \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, NCNB) +#define GICR_PENDBASER_NC \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, NC) +#define GICR_PENDBASER_RAWT \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWT) +#define GICR_PENDBASER_RAWB \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWB) +#define GICR_PENDBASER_WAWT \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, WAWT) +#define GICR_PENDBASER_WAWB \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, WAWB) +#define GICR_PENDBASER_RAWAWT \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWAWT) +#define GICR_PENDBASER_RAWAWB \ + GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWAWB) + +#define GICR_PENDBASER_PTZ BIT_ULL(62) + +#define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ + +#define GICD_TYPER_ID_BITS(typer) ((((typer) >> 19) & 0x1f) + 1) +#define GICD_TYPER_NUM_LPIS(typer) ((((typer) >> 11) & 0x1f) + 1) +#define GICD_TYPER_IRQS(typer) ((((typer) & 0x1f) + 1) * 32) + +/* Message based interrupts support */ +#define GICD_TYPER_MBIS BIT(16) +/* LPI support */ +#define GICD_TYPER_LPIS BIT(17) +#define GICD_TYPER_RSS BIT(26) + +#define GIC_REDISTRIBUTOR_OFFSET 0x20000 + +#ifdef CONFIG_GIC_V3_ITS +int gic_lpi_tables_init(u64 base, u32 max_redist); +#else +int gic_lpi_tables_init(u64 base, u32 max_redist) +{ + return 0; +} +#endif /* CONFIG_GIC_V3_ITS */ + +#endif /* __GIC_V3_H__ */ diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 9de9a9acee..8482f5446c 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -52,6 +52,7 @@ obj-$(CONFIG_FSL_LAYERSCAPE) += ccn504.o ifneq ($(CONFIG_GICV2)$(CONFIG_GICV3),) obj-y += gic_64.o endif +obj-$(CONFIG_GIC_V3_ITS) += gic-v3-its.o obj-y += interrupts_64.o else obj-y += interrupts.o diff --git a/arch/arm/lib/gic-v3-its.c b/arch/arm/lib/gic-v3-its.c new file mode 100644 index 0000000000..e19ab01621 --- /dev/null +++ b/arch/arm/lib/gic-v3-its.c @@ -0,0 +1,100 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 Broadcom. + */ +#include <common.h> +#include <asm/gic.h> +#include <asm/gic-v3.h> +#include <asm/io.h> + +static u32 lpi_id_bits; + +#define LPI_NRBITS lpi_id_bits +#define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) +#define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) + +/* + * Program the GIC LPI configuration tables for all + * the re-distributors and enable the LPI table + * base: Configuration table address + * num_redist: number of redistributors + */ +int gic_lpi_tables_init(u64 base, u32 num_redist) +{ + u32 gicd_typer; + u64 val; + u64 tmp; + int i; + u64 redist_lpi_base; + u64 pend_base = GICR_BASE + GICR_PENDBASER; + + gicd_typer = readl(GICD_BASE + GICD_TYPER); + + /* GIC support for Locality specific peripheral interrupts (LPI's) */ + if (!(gicd_typer & GICD_TYPER_LPIS)) { + pr_err("GIC implementation does not support LPI's\n"); + return -EINVAL; + } + + /* + * Check for LPI is disabled for all the redistributors. + * Once the LPI table is enabled, can not program the + * LPI configuration tables again, unless the GIC is reset. + */ + for (i = 0; i < num_redist; i++) { + u32 offset = i * GIC_REDISTRIBUTOR_OFFSET; + + if ((readl((uintptr_t)(GICR_BASE + offset))) & + GICR_CTLR_ENABLE_LPIS) { + pr_err("Re-Distributor %d LPI is already enabled\n", + i); + return -EINVAL; + } + } + + /* lpi_id_bits to get LPI_PENDBASE_SZ and LPi_PROPBASE_SZ */ + lpi_id_bits = min_t(u32, GICD_TYPER_ID_BITS(gicd_typer), + ITS_MAX_LPI_NRBITS); + + /* Set PropBase */ + val = (base | + GICR_PROPBASER_INNERSHAREABLE | + GICR_PROPBASER_RAWAWB | + ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); + + writeq(val, (GICR_BASE + GICR_PROPBASER)); + tmp = readl(GICR_BASE + GICR_PROPBASER); + if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { + if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { + val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | + GICR_PROPBASER_CACHEABILITY_MASK); + val |= GICR_PROPBASER_NC; + writeq(val, (GICR_BASE + GICR_PROPBASER)); + } + } + + redist_lpi_base = base + LPI_PROPBASE_SZ; + + for (i = 0; i < num_redist; i++) { + u32 offset = i * GIC_REDISTRIBUTOR_OFFSET; + + val = ((redist_lpi_base + (i * LPI_PENDBASE_SZ)) | + GICR_PENDBASER_INNERSHAREABLE | + GICR_PENDBASER_RAWAWB); + + writeq(val, (uintptr_t)(pend_base + offset)); + tmp = readq((uintptr_t)(pend_base + offset)); + if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { + val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | + GICR_PENDBASER_CACHEABILITY_MASK); + val |= GICR_PENDBASER_NC; + writeq(val, (uintptr_t)(pend_base + offset)); + } + + /* Enable LPI for the redistributor */ + writel(GICR_CTLR_ENABLE_LPIS, (uintptr_t)(GICR_BASE + offset)); + } + + return 0; +} + -- 2.17.1

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[PATCH 1/1] mkimage: simplify fit_check_params()
by Heinrich Schuchardt 10 Jan '20

10 Jan '20

fit_check_params() wants at least two of dflag, fflag, and lflag set. Simplify the logical constraint checking this. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- tools/fit_image.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tools/fit_image.c b/tools/fit_image.c index 0201cc44d8..c204d58fb6 100644 --- a/tools/fit_image.c +++ b/tools/fit_image.c @@ -820,9 +820,9 @@ static int fit_check_params(struct image_tool_params *params) { if (params->auto_its) return 0; - return ((params->dflag && (params->fflag || params->lflag)) || - (params->fflag && (params->dflag || params->lflag)) || - (params->lflag && (params->dflag || params->fflag))); + return ((params->dflag && params->fflag) || + (params->fflag && params->lflag) || + (params->lflag && params->dflag)); } U_BOOT_IMAGE_TYPE( -- 2.24.0

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[PATCH] cmd/eeprom.c: prepend 0x to hex numbers in output message format
by Rasmus Villemoes 10 Jan '20

10 Jan '20

From: "Klaus H. Sorensen" <khso(a)prevas.dk> If the numbers do not happen to contain any digits from [a-f], it's not clear that they are base 16. Signed-off-by: Klaus H. Sorensen <khso(a)prevas.dk> Signed-off-by: Rasmus Villemoes <rasmus.villemoes(a)prevas.dk> --- cmd/eeprom.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmd/eeprom.c b/cmd/eeprom.c index 19953df082..23d9a21ab6 100644 --- a/cmd/eeprom.c +++ b/cmd/eeprom.c @@ -307,7 +307,7 @@ static int eeprom_execute_command(enum eeprom_action action, int i2c_bus, { int rcode = 0; const char *const fmt = - "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... "; + "\nEEPROM @0x%lX %s: addr 0x%08lx off 0x%04lx count %ld ... "; #ifdef CONFIG_CMD_EEPROM_LAYOUT struct eeprom_layout layout; #endif -- 2.23.0

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[U-Boot] [PATCH v1] gcc-9: silence 'address-of-packed-member' warning
by Andy Shevchenko 10 Jan '20

10 Jan '20

GCC 9.x starts complaining about potential misalignment of the pointer to the array (in this case alignment=2) in the packed (alignment=1) structures. Repeating Linus' Torvalds commit 6f303d60534c in the Linux kernel. Original commit message: We already did this for clang, but now gcc has that warning too. Yes, yes, the address may be unaligned. And that's kind of the point. This in particular hides the warnings like drivers/usb/gadget/composite.c:545:23: warning: taking address of packed member of ‘struct usb_string_descriptor’ may result in an unaligned pointer value [-Waddress-of-packed-member] 545 | collect_langs(sp, s->wData); drivers/usb/gadget/composite.c:550:24: warning: taking address of packed member of ‘struct usb_string_descriptor’ may result in an unaligned pointer value [-Waddress-of-packed-member] 550 | collect_langs(sp, s->wData); drivers/usb/gadget/composite.c:555:25: warning: taking address of packed member of ‘struct usb_string_descriptor’ may result in an unaligned pointer value [-Waddress-of-packed-member] 555 | collect_langs(sp, s->wData); Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 7485bc2594..a0469f6a9c 100644 --- a/Makefile +++ b/Makefile @@ -672,11 +672,12 @@ endif endif KBUILD_CFLAGS += $(call cc-option,-Wno-format-nonliteral) +KBUILD_CFLAGS += $(call cc-disable-warning, address-of-packed-member) + ifeq ($(cc-name),clang) KBUILD_CPPFLAGS += $(call cc-option,-Qunused-arguments,) KBUILD_CFLAGS += $(call cc-disable-warning, format-invalid-specifier) KBUILD_CFLAGS += $(call cc-disable-warning, gnu) -KBUILD_CFLAGS += $(call cc-disable-warning, address-of-packed-member) KBUILD_CFLAGS += $(call cc-option, -fcatch-undefined-behavior) endif -- 2.24.0

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[U-Boot] [PATCH 1/4] km/boards: fix typo for MAC address offset config option
by Holger Brunck 10 Jan '20

10 Jan '20

This patch only fixes a typo. Signed-off-by: Holger Brunck <holger.brunck(a)ch.abb.com> CC: Stefan Roese <sr(a)denx.de> CC: Valentin Longchamp <valentin.longchamp(a)ch.abb.com> --- board/keymile/Kconfig | 2 +- board/keymile/common/ivm.c | 6 +++--- configs/kmcoge5un_defconfig | 2 +- configs/mgcoge3un_defconfig | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/board/keymile/Kconfig b/board/keymile/Kconfig index acaa9289f7..ba1960f3d0 100644 --- a/board/keymile/Kconfig +++ b/board/keymile/Kconfig @@ -70,7 +70,7 @@ config KM_COMMON_ETH_INIT Use the Ethernet initialization implemented in common code, which detects if a Piggy board is present. -config PIGGY_MAC_ADRESS_OFFSET +config PIGGY_MAC_ADDRESS_OFFSET int "Piggy Address Offset" default 0 help diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c index 50df44d1c1..429e9c7914 100644 --- a/board/keymile/common/ivm.c +++ b/board/keymile/common/ivm.c @@ -309,16 +309,16 @@ static int ivm_populate_env(unsigned char *buf, int len) #ifndef CONFIG_KMTEGR1 /* if an offset is defined, add it */ - process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADRESS_OFFSET, true); + process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADDRESS_OFFSET, true); env_set((char *)"ethaddr", (char *)valbuf); #else /* KMTEGR1 has a special setup. eth0 has no connection to the outside and * gets an locally administred MAC address, eth1 is the debug interface and * gets the official MAC address from the IVM */ - process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADRESS_OFFSET, false); + process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADDRESS_OFFSET, false); env_set((char *)"ethaddr", (char *)valbuf); - process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADRESS_OFFSET, true); + process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADDRESS_OFFSET, true); env_set((char *)"eth1addr", (char *)valbuf); #endif diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index ff23af3060..f2c835029a 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -4,7 +4,7 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y -CONFIG_PIGGY_MAC_ADRESS_OFFSET=3 +CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 CONFIG_KM_ENV_IS_IN_SPI_NOR=y CONFIG_KM_PIGGY4_88E6352=y CONFIG_ENV_SIZE=0x2000 diff --git a/configs/mgcoge3un_defconfig b/configs/mgcoge3un_defconfig index cae6645832..24f6b4656c 100644 --- a/configs/mgcoge3un_defconfig +++ b/configs/mgcoge3un_defconfig @@ -4,7 +4,7 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y -CONFIG_PIGGY_MAC_ADRESS_OFFSET=3 +CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 CONFIG_KM_PIGGY4_88E6061=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 -- 2.24.0.rc1

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