December 2019 - U-Boot

[v3 1/8] rtc: pcf8563: support driver model
by Biwen Li 09 Dec '19

09 Dec '19

This supports driver model for pcf8563 Signed-off-by: Biwen Li <biwen.li(a)nxp.com> --- Changes in v3: - update commit messages Changes in v2: - none drivers/rtc/pcf8563.c | 107 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 107 insertions(+) diff --git a/drivers/rtc/pcf8563.c b/drivers/rtc/pcf8563.c index a839d6cc98..44204e133e 100644 --- a/drivers/rtc/pcf8563.c +++ b/drivers/rtc/pcf8563.c @@ -12,9 +12,11 @@ #include <common.h> #include <command.h> +#include <dm.h> #include <rtc.h> #include <i2c.h> +#if !CONFIG_IS_ENABLED(DM_RTC) static uchar rtc_read (uchar reg); static void rtc_write (uchar reg, uchar val); @@ -115,3 +117,108 @@ static void rtc_write (uchar reg, uchar val) { i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); } +#else +static int pcf8563_rtc_get(struct udevice *dev, struct rtc_time *tmp) +{ + int rel = 0; + uchar sec, min, hour, mday, wday, mon_cent, year; + + sec = dm_i2c_reg_read(dev, 0x02); + min = dm_i2c_reg_read(dev, 0x03); + hour = dm_i2c_reg_read(dev, 0x04); + mday = dm_i2c_reg_read(dev, 0x05); + wday = dm_i2c_reg_read(dev, 0x06); + mon_cent = dm_i2c_reg_read(dev, 0x07); + year = dm_i2c_reg_read(dev, 0x08); + + debug ("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " + "hr: %02x min: %02x sec: %02x\n", + year, mon_cent, mday, wday, + hour, min, sec); + debug ("Alarms: wday: %02x day: %02x hour: %02x min: %02x\n", + dm_i2c_reg_read(dev, 0x0C), + dm_i2c_reg_read(dev, 0x0B), + dm_i2c_reg_read(dev, 0x0A), + dm_i2c_reg_read(dev, 0x09)); + + if (sec & 0x80) { + puts ("### Warning: RTC Low Voltage - date/time not reliable\n"); + rel = -1; + } + + tmp->tm_sec = bcd2bin (sec & 0x7F); + tmp->tm_min = bcd2bin (min & 0x7F); + tmp->tm_hour = bcd2bin (hour & 0x3F); + tmp->tm_mday = bcd2bin (mday & 0x3F); + tmp->tm_mon = bcd2bin (mon_cent & 0x1F); + tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 1900 : 2000); + tmp->tm_wday = bcd2bin (wday & 0x07); + tmp->tm_yday = 0; + tmp->tm_isdst = 0; + + debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + return rel; +} + +static int pcf8563_rtc_set(struct udevice *dev, const struct rtc_time *tmp) +{ + uchar century; + + debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + dm_i2c_reg_write(dev, 0x08, bin2bcd(tmp->tm_year % 100)); + + century = (tmp->tm_year >= 2000) ? 0 : 0x80; + dm_i2c_reg_write(dev, 0x07, bin2bcd(tmp->tm_mon) | century); + + dm_i2c_reg_write(dev, 0x06, bin2bcd(tmp->tm_wday)); + dm_i2c_reg_write(dev, 0x05, bin2bcd(tmp->tm_mday)); + dm_i2c_reg_write(dev, 0x04, bin2bcd(tmp->tm_hour)); + dm_i2c_reg_write(dev, 0x03, bin2bcd(tmp->tm_min)); + dm_i2c_reg_write(dev, 0x02, bin2bcd(tmp->tm_sec)); + + return 0; +} + +static int pcf8563_rtc_reset(struct udevice *dev) +{ + /* clear all control & status registers */ + dm_i2c_reg_write(dev, 0x00, 0x00); + dm_i2c_reg_write(dev, 0x01, 0x00); + dm_i2c_reg_write(dev, 0x0D, 0x00); + + /* clear Voltage Low bit */ + dm_i2c_reg_write(dev, 0x02, dm_i2c_reg_read (dev, 0x02) & 0x7F); + + /* reset all alarms */ + dm_i2c_reg_write(dev, 0x09, 0x00); + dm_i2c_reg_write(dev, 0x0A, 0x00); + dm_i2c_reg_write(dev, 0x0B, 0x00); + dm_i2c_reg_write(dev, 0x0C, 0x00); + + return 0; +} + +static const struct rtc_ops pcf8563_rtc_ops = { + .get = pcf8563_rtc_get, + .set = pcf8563_rtc_set, + .reset = pcf8563_rtc_reset, +}; + +static const struct udevice_id pcf8563_rtc_ids[] = { + { .compatible = "nxp,pcf8563" }, + { } +}; + +U_BOOT_DRIVER(rtc_pcf8563) = { + .name = "rtc-pcf8563", + .id = UCLASS_RTC, + .of_match = pcf8563_rtc_ids, + .ops = &pcf8563_rtc_ops, +}; +#endif -- 2.17.1

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[PATCH] net: nfs: Only link in NFS code outside of SPL builds
by Tom Rini 09 Dec '19

09 Dec '19

While we have networking use cases within SPL we do not support loading files via NFS at this point in time. Disable calling nfs_start() so that the NFS related code can be garbage collected at link time. Cc: Joe Hershberger <joe.hershberger(a)ni.com> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- net/net.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/net/net.c b/net/net.c index 0513444eb78f..9b6f80dc9a03 100644 --- a/net/net.c +++ b/net/net.c @@ -308,7 +308,7 @@ U_BOOT_ENV_CALLBACK(dnsip, on_dnsip); */ void net_auto_load(void) { -#if defined(CONFIG_CMD_NFS) +#if defined(CONFIG_CMD_NFS) && !defined(CONFIG_SPL_BUILD) const char *s = env_get("autoload"); if (s != NULL && strcmp(s, "NFS") == 0) { @@ -496,7 +496,7 @@ restart: ping_start(); break; #endif -#if defined(CONFIG_CMD_NFS) +#if defined(CONFIG_CMD_NFS) && !defined(CONFIG_SPL_BUILD) case NFS: nfs_start(); break; -- 2.17.1

2 1

Re: [PATCH v2 2/4] riscv: add functions for reading the IPI status
by Rick Chen 09 Dec '19

09 Dec '19

> From: Lukas Auer [mailto:lukas.auer@aisec.fraunhofer.de] > Sent: Monday, December 09, 2019 6:29 AM > To: u-boot(a)lists.denx.de > Cc: Rick Jian-Zhi Chen(陳建志); Bin Meng; Anup Patel; Lukas Auer; Anup Patel; Atish Patra; Daniel Schwierzeck; Simon Glass > Subject: [PATCH v2 2/4] riscv: add functions for reading the IPI status > > Add the function riscv_get_ipi() for reading the pending status of IPIs. > The supported controllers are Andes' Platform Level Interrupt Controller (PLIC), the Supervisor Binary Interface (SBI), and SiFive's Core Local Interruptor (CLINT). > > Signed-off-by: Lukas Auer <lukas.auer(a)aisec.fraunhofer.de> > --- > > Changes in v2: > - Use the pending register instead of the claim register in the Andes PLIC implementation > Reviewed-by: Rick Chen <rick(a)andestech.com> > arch/riscv/lib/andes_plic.c | 11 +++++++++++ > arch/riscv/lib/sbi_ipi.c | 11 +++++++++++ > arch/riscv/lib/sifive_clint.c | 9 +++++++++ > arch/riscv/lib/smp.c | 12 ++++++++++++ > 4 files changed, 43 insertions(+) > > diff --git a/arch/riscv/lib/andes_plic.c b/arch/riscv/lib/andes_plic.c index 28568e4e2b..42bda9b759 100644 > --- a/arch/riscv/lib/andes_plic.c > +++ b/arch/riscv/lib/andes_plic.c > @@ -114,6 +114,17 @@ int riscv_clear_ipi(int hart) > return 0; > } > > +int riscv_get_ipi(int hart, int *pending) { > + PLIC_BASE_GET(); > + > + *pending = readl((void __iomem *)PENDING_REG(gd->arch.plic, > + gd->arch.boot_hart)); > + *pending = !!(*pending & SEND_IPI_TO_HART(hart)); > + > + return 0; > +} > + > static const struct udevice_id andes_plic_ids[] = { > { .compatible = "riscv,plic1", .data = RISCV_SYSCON_PLIC }, > { } > diff --git a/arch/riscv/lib/sbi_ipi.c b/arch/riscv/lib/sbi_ipi.c index 170346da68..9a698ce74e 100644 > --- a/arch/riscv/lib/sbi_ipi.c > +++ b/arch/riscv/lib/sbi_ipi.c > @@ -23,3 +23,14 @@ int riscv_clear_ipi(int hart) > > return 0; > } > + > +int riscv_get_ipi(int hart, int *pending) { > + /* > + * The SBI does not support reading the IPI status. We always return 0 > + * to indicate that no IPI is pending. > + */ > + *pending = 0; > + > + return 0; > +} > diff --git a/arch/riscv/lib/sifive_clint.c b/arch/riscv/lib/sifive_clint.c index d24e0d585b..d7899d16d7 100644 > --- a/arch/riscv/lib/sifive_clint.c > +++ b/arch/riscv/lib/sifive_clint.c > @@ -71,6 +71,15 @@ int riscv_clear_ipi(int hart) > return 0; > } > > +int riscv_get_ipi(int hart, int *pending) { > + CLINT_BASE_GET(); > + > + *pending = readl((void __iomem *)MSIP_REG(gd->arch.clint, hart)); > + > + return 0; > +} > + > static const struct udevice_id sifive_clint_ids[] = { > { .compatible = "riscv,clint0", .data = RISCV_SYSCON_CLINT }, > { } > diff --git a/arch/riscv/lib/smp.c b/arch/riscv/lib/smp.c index 705437862a..188a7e34bd 100644 > --- a/arch/riscv/lib/smp.c > +++ b/arch/riscv/lib/smp.c > @@ -32,6 +32,18 @@ extern int riscv_send_ipi(int hart); > */ > extern int riscv_clear_ipi(int hart); > > +/** > + * riscv_get_ipi() - Get status of inter-processor interrupt (IPI) > + * > + * Platform code must provide this function. > + * > + * @hart: Hart ID of hart to be checked > + * @pending: Pointer to variable with result of the check, > + * 1 if IPI is pending, 0 otherwise > + * @return 0 if OK, -ve on error > + */ > +extern int riscv_get_ipi(int hart, int *pending); > + > static int send_ipi_many(struct ipi_data *ipi) { > ofnode node, cpus; > -- > 2.21.0 >

1 0

[U-Boot] [PATCH v3 00/16] import x509/pkcs7 parsers from linux
by AKASHI Takahiro 09 Dec '19

09 Dec '19

# This patch set is a prerequisite for UEFI secure boot. # This patch set should be merged first prior to my rsa extension patch # due to some dependency. Asn1 parsers of x509 certificates and pkcs7 messages are required to implement image authentication and variable authentication as part of UEFI secure boot feature. As we discussed before in the thread[1], most people insisted that we should re-use corresponding source code from Linux repository for this purpose. Here is my attempt to import all the necessary files from Linux; Those will eventually be part of UEFI secure boot implementation, but I'd like to get early feedback from other peoples before submitting the whole patchset so that they will be better formatted for merging. My approach here is * files from the latest Linux * modify files as little as possible * mark/protect unavoidable changes with "#if(n)def __UBOOT__" so that future fixes/differences in Linux repository will easily be applied to U-Boot. Known issues: * checkpatch.pl Checkpatch.pl will complain with a bunch of warnings/errors but I intentionally left them unchanged for the sake of better maintainability I said above. -Takahiro Akashi [1] https://lists.denx.de/pipermail/u-boot/2019-April/366423.html Changes in v3 (Nov 13, 2019) * rebased to v2020.01-rc * improve function description of kmemdup() (patch#1) * remove test/lib/Kconfig (patch#16) * declare variables in unit test as static (patch#16) Changes in v2 (Oct 25, 2019) * revise commit messages, describing what files are modified or not. * move kmemdump() in ubifs.c to linux_compat.c for general use (patch#1) * add patch#2 * move date.c to lib/ for general use (patch#3) * implement mktime64() with rtc_mktime() (patch#4) * move asn1_compiler.c to tools/ (patch#7) * change CONFIG_BUILD_ASN1 to CONFIG_ASN1_COMPILER (patch#7) * add clean rule to asn1_compiler-generated files to clean targets (patch#8) * change CONFIG_ASN1 to CONFIG_ASN1_DECODER (patch#9) * add README for asn1 compiler/decoder (patch#10) * move build_oid_registry to scripts/ (patch#11) * shuffle an order of patches (patch#13,#14,#15) * add a new config CONFIG_RSA_PUBLIC_KEY_PARSER so that it can be * modify Kconfig dependency (patch#13,#14,#15) compiled in independently (patch#13) * add unit test (patch#16,#17) Changes in v1 (Oct 11, 2019) from RFC * change the kernel code base from v5.0 to v5.3 * add preparatory patches (#1, #2 and #3) * comment off x509_check_for_self_signed() which is not useful for UEFI secure boot (patch#9) * improve usages of "#if(n)def __UBOOT__* to minimize differences between U-Boot and linux kernel AKASHI Takahiro (16): linux_compat: move kmemdup() from ubifs.c to linux_compat.c rtc.h: add struct udevice declaration rtc: move date.c from drivers/rtc/ to lib/ lib: add mktime64() for linux compatibility include: kernel.h: include printk.h linux/time.h: include vsprintf.h cmd: add asn1_compiler Makefile: add build script for asn1 parsers lib: add asn1 decoder doc: add README for asn1 compiler and decoder lib: add oid registry utility lib: crypto: add public key utility lib: crypto: add rsa public key parser lib: crypto: add x509 parser lib: crypto: add pkcs7 message parser test: add asn1 unit test Makefile | 1 + cmd/Kconfig | 1 + doc/README.asn1 | 40 + drivers/rtc/Kconfig | 1 + drivers/rtc/Makefile | 1 - fs/ubifs/ubifs.c | 19 +- include/crypto/internal/rsa.h | 57 + include/crypto/pkcs7.h | 47 + include/crypto/public_key.h | 90 ++ include/keys/asymmetric-type.h | 88 ++ include/linux/asn1.h | 65 ++ include/linux/asn1_ber_bytecode.h | 89 ++ include/linux/asn1_decoder.h | 20 + include/linux/kernel.h | 2 +- include/linux/oid_registry.h | 117 +++ include/linux/time.h | 11 + include/rtc.h | 2 + lib/Kconfig | 17 + lib/Makefile | 20 + lib/asn1_decoder.c | 527 ++++++++++ lib/crypto/Kconfig | 52 + lib/crypto/Makefile | 49 + lib/crypto/asymmetric_type.c | 668 ++++++++++++ lib/crypto/pkcs7.asn1 | 135 +++ lib/crypto/pkcs7_parser.c | 693 +++++++++++++ lib/crypto/pkcs7_parser.h | 65 ++ lib/crypto/public_key.c | 376 +++++++ lib/crypto/rsa_helper.c | 198 ++++ lib/crypto/rsapubkey.asn1 | 4 + lib/crypto/x509.asn1 | 60 ++ lib/crypto/x509_akid.asn1 | 35 + lib/crypto/x509_cert_parser.c | 697 +++++++++++++ lib/crypto/x509_parser.h | 57 + lib/crypto/x509_public_key.c | 292 ++++++ {drivers/rtc => lib}/date.c | 23 +- lib/linux_compat.c | 19 + lib/oid_registry.c | 179 ++++ scripts/Makefile.build | 4 +- scripts/build_OID_registry | 203 ++++ test/Kconfig | 18 +- test/lib/Makefile | 1 + test/lib/asn1.c | 392 +++++++ tools/Makefile | 3 + tools/asn1_compiler.c | 1611 +++++++++++++++++++++++++++++ 44 files changed, 7024 insertions(+), 25 deletions(-) create mode 100644 doc/README.asn1 create mode 100644 include/crypto/internal/rsa.h create mode 100644 include/crypto/pkcs7.h create mode 100644 include/crypto/public_key.h create mode 100644 include/keys/asymmetric-type.h create mode 100644 include/linux/asn1.h create mode 100644 include/linux/asn1_ber_bytecode.h create mode 100644 include/linux/asn1_decoder.h create mode 100644 include/linux/oid_registry.h create mode 100644 lib/asn1_decoder.c create mode 100644 lib/crypto/Kconfig create mode 100644 lib/crypto/Makefile create mode 100644 lib/crypto/asymmetric_type.c create mode 100644 lib/crypto/pkcs7.asn1 create mode 100644 lib/crypto/pkcs7_parser.c create mode 100644 lib/crypto/pkcs7_parser.h create mode 100644 lib/crypto/public_key.c create mode 100644 lib/crypto/rsa_helper.c create mode 100644 lib/crypto/rsapubkey.asn1 create mode 100644 lib/crypto/x509.asn1 create mode 100644 lib/crypto/x509_akid.asn1 create mode 100644 lib/crypto/x509_cert_parser.c create mode 100644 lib/crypto/x509_parser.h create mode 100644 lib/crypto/x509_public_key.c rename {drivers/rtc => lib}/date.c (81%) create mode 100644 lib/oid_registry.c create mode 100755 scripts/build_OID_registry create mode 100644 test/lib/asn1.c create mode 100644 tools/asn1_compiler.c -- 2.21.0

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[PATCH] usb: musb-new: Drop use of BUG()
by Simon Glass 09 Dec '19

09 Dec '19

These macros use __FILE__ which inserts the full path of the object file into U-Boot, thus increasing file size. Drop these usages. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- drivers/usb/musb-new/musb_core.c | 6 ++++++ drivers/usb/musb-new/musb_gadget_ep0.c | 4 +++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/usb/musb-new/musb_core.c b/drivers/usb/musb-new/musb_core.c index afea9fbcef..238e4708a5 100644 --- a/drivers/usb/musb-new/musb_core.c +++ b/drivers/usb/musb-new/musb_core.c @@ -1859,7 +1859,13 @@ allocate_instance(struct device *dev, musb->ctrl_base = mbase; musb->nIrq = -ENODEV; musb->config = config; +#ifdef __UBOOT__ + assert(musb->config->num_eps <= MUSB_C_NUM_EPS); + if (musb->config->num_eps > MUSB_C_NUM_EPS) + return NULL; +#else BUG_ON(musb->config->num_eps > MUSB_C_NUM_EPS); +#endif for (epnum = 0, ep = musb->endpoints; epnum < musb->config->num_eps; epnum++, ep++) { diff --git a/drivers/usb/musb-new/musb_gadget_ep0.c b/drivers/usb/musb-new/musb_gadget_ep0.c index 9835a2e2bf..3adabcb69f 100644 --- a/drivers/usb/musb-new/musb_gadget_ep0.c +++ b/drivers/usb/musb-new/musb_gadget_ep0.c @@ -882,7 +882,9 @@ finish: default: /* "can't happen" */ - WARN_ON(1); + /* WARN_ON(1); (disable since __FILE__ can be large) */ + dev_dbg(musb->controller, "odd; unknown state %d\n", + musb->ep0_state); musb_writew(regs, MUSB_CSR0, MUSB_CSR0_P_SENDSTALL); musb->ep0_state = MUSB_EP0_STAGE_IDLE; break; -- 2.24.0.393.g34dc348eaf-goog

1 0

Re: [PATCH 0/4] Fixes for RISC-V U-Boot SPL / OpenSBI boot flow
by Rick Chen 08 Dec '19

08 Dec '19

HI Lukas > From: Lukas Auer [mailto:lukas.auer@aisec.fraunhofer.de] > Sent: Wednesday, December 04, 2019 5:40 AM > To: u-boot(a)lists.denx.de > Cc: Rick Jian-Zhi Chen(陳建志); Anup Patel; Bin Meng; Lukas Auer; Anup Patel; Anup Patel; Atish Patra; Marcus Comstedt > Subject: [PATCH 0/4] Fixes for RISC-V U-Boot SPL / OpenSBI boot flow > > Rick's recent patch series, which adds support for U-Boot SPL to the Andes platform, brought several problems of the current U-Boot SPL boot flow on RISC-V to light. Discussion on the relevant parts starts at [1]. > > The problem showed itself in the form of code corruption. At start, OpenSBI relocates itself to its link address. This allows it to be loaded independently of the link address. In the case that the link address ranges of U-Boot SPL and OpenSBI overlap, code corruption occurs if the relocation starts while some harts are still running U-Boot SPL. > This series prevents this problem by specifying the hart that performs the relocation and then making sure that it is the last hart to enter OpenSBI, allowing relocation to be completed safely. A recent version of OpenSBI is required for the changes to work. > > This patch series resolves the problems associated with the use case of overlapping link address ranges. However, it is still recommended to select non-overlapping ranges for U-Boot SPL and OpenSBI. > > [1]: https://lists.denx.de/pipermail/u-boot/2019-November/389385.html > > > Lukas Auer (4): > spl: opensbi: specify main hart as preferred boot hart > riscv: add functions for reading the IPI status > riscv: add option to wait for ack from secondary harts in smp > functions > spl: opensbi: wait for ack from secondary harts before entering > OpenSBI > > arch/riscv/cpu/start.S | 2 ++ > arch/riscv/include/asm/smp.h | 3 ++- > arch/riscv/lib/andes_plic.c | 9 ++++++++ > arch/riscv/lib/bootm.c | 2 +- > arch/riscv/lib/sbi_ipi.c | 11 +++++++++ > arch/riscv/lib/sifive_clint.c | 9 ++++++++ > arch/riscv/lib/smp.c | 43 +++++++++++++++++++++++++++-------- > arch/riscv/lib/spl.c | 2 +- > common/spl/spl_opensbi.c | 13 ++++++++++- > include/opensbi.h | 18 ++++++++++++++- > 10 files changed, 98 insertions(+), 14 deletions(-) > > -- > 2.21.0 > LGTM. Thanks, Rick

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[PATCH v2 0/4] Fixes for RISC-V U-Boot SPL / OpenSBI boot flow
by Lukas Auer 08 Dec '19

08 Dec '19

Rick's recent patch series, which adds support for U-Boot SPL to the Andes platform, brought several problems of the current U-Boot SPL boot flow on RISC-V to light. Discussion on the relevant parts starts at [1]. The problem showed itself in the form of code corruption. At start, OpenSBI relocates itself to its link address. This allows it to be loaded independently of the link address. In the case that the link address ranges of U-Boot SPL and OpenSBI overlap, code corruption occurs if the relocation starts while some harts are still running U-Boot SPL. This series prevents this problem by specifying the hart that performs the relocation and then making sure that it is the last hart to enter OpenSBI, allowing relocation to be completed safely. A recent version of OpenSBI is required for the changes to work. This patch series resolves the problems associated with the use case of overlapping link address ranges. However, it is still recommended to select non-overlapping ranges for U-Boot SPL and OpenSBI. [1]: https://lists.denx.de/pipermail/u-boot/2019-November/389385.html Changes in v2: - Use the pending register instead of the claim register in the Andes PLIC implementation Lukas Auer (4): spl: opensbi: specify main hart as preferred boot hart riscv: add functions for reading the IPI status riscv: add option to wait for ack from secondary harts in smp functions spl: opensbi: wait for ack from secondary harts before entering OpenSBI arch/riscv/cpu/start.S | 2 ++ arch/riscv/include/asm/smp.h | 3 ++- arch/riscv/lib/andes_plic.c | 11 +++++++++ arch/riscv/lib/bootm.c | 2 +- arch/riscv/lib/sbi_ipi.c | 11 +++++++++ arch/riscv/lib/sifive_clint.c | 9 ++++++++ arch/riscv/lib/smp.c | 43 +++++++++++++++++++++++++++-------- arch/riscv/lib/spl.c | 2 +- common/spl/spl_opensbi.c | 13 ++++++++++- include/opensbi.h | 18 ++++++++++++++- 10 files changed, 100 insertions(+), 14 deletions(-) -- 2.21.0

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Please pull u-boot-x86
by Bin Meng 08 Dec '19

08 Dec '19

Hi Tom, This PR includes the following x86 changes for v2020.01. - 16-bit start up codes clean up The following changes since commit d79ae6aa3087a6434b5ecdb51d20dca20c8e1596: Merge branch '2019-12-06-master-imports' (2019-12-06 16:45:46 -0500) are available in the git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-x86 for you to fetch changes up to 90ab311a7c1ee91201c23726871d20b2287a51a5: x86: simplify ljmp to 32-bit code (2019-12-08 19:10:21 +0800) ---------------------------------------------------------------- Masahiro Yamada (2): x86: use data32 directive instead of macro for operand-size prefix x86: simplify ljmp to 32-bit code arch/x86/cpu/start16.S | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) Regards, Bin

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[U-Boot] [PATCH] x86: use data32 directive instead of macro for operand-size prefix
by Masahiro Yamada 08 Dec '19

08 Dec '19

This file defines 'a32' and 'o32' macros to avoid magic numbers of operand/address-size prefixing. GAS supports 'data32' and 'addr32' for that purpose. Signed-off-by: Masahiro Yamada <masahiroy(a)kernel.org> --- arch/x86/cpu/start16.S | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S index 474efe4df5f4..bcabd76741ef 100644 --- a/arch/x86/cpu/start16.S +++ b/arch/x86/cpu/start16.S @@ -13,8 +13,6 @@ #include <asm/processor-flags.h> #define BOOT_SEG 0xffff0000 /* linear segment of boot code */ -#define a32 .byte 0x67; -#define o32 .byte 0x66; .section .start16, "ax" .code16 @@ -33,8 +31,8 @@ start16: wbinvd /* load the temporary Global Descriptor Table */ -o32 cs lidt idt_ptr -o32 cs lgdt gdt_ptr +data32 cs lidt idt_ptr +data32 cs lgdt gdt_ptr /* Now, we enter protected mode */ movl %cr0, %eax @@ -49,7 +47,7 @@ ff: movw $code32start, %ax movw %ax, %bp movl %ecx, %eax -o32 cs ljmp *(%bp) +data32 cs ljmp *(%bp) /* 48-bit far pointer */ code32start: -- 2.17.1

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[U-Boot] [PATCH] x86: simplify ljmp to 32-bit code
by Masahiro Yamada 08 Dec '19

08 Dec '19

You can directly specify the label as the operand for ljmp. This commit saves 4-byte code. Signed-off-by: Masahiro Yamada <masahiroy(a)kernel.org> --- arch/x86/cpu/start16.S | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S index bcabd76741ef..7bad9f3e4d87 100644 --- a/arch/x86/cpu/start16.S +++ b/arch/x86/cpu/start16.S @@ -44,10 +44,8 @@ data32 cs lgdt gdt_ptr ff: /* Finally restore BIST and jump to the 32-bit initialization code */ - movw $code32start, %ax - movw %ax, %bp movl %ecx, %eax -data32 cs ljmp *(%bp) +data32 cs ljmp code32start /* 48-bit far pointer */ code32start: -- 2.17.1

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