December 2019 - U-Boot

[PATCH 1/1] arm: -march=armv5t for ARM11
by Heinrich Schuchardt 09 Dec '19

09 Dec '19

In GCC 9 support for the Armv5 and Armv5E architectures (which have no known implementations) has been removed, cf. https://gcc.gnu.org/gcc-9/changes.html Commit 16540d07fd62 ("arm: fix -march for ARM11") changed the value of the compiler flag from -march=armv5 and -march=armv5t into -march=armv6 for ARM11. The values prior to this patch were: arch-$(CONFIG_CPU_ARM1136) =-march=armv5 arch-$(CONFIG_CPU_ARM1176) =-march=armv5t The change lead to a regression with the Raspberry Pi Zero W not booting anymore. Use -march=armv5t both for ARM1136 and ARM1176. Fixes: 16540d07fd62 ("arm: fix -march for ARM11") Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- I do not possess an ARM1136 board for testing. It would be great, if anybody could test on real hardware. --- arch/arm/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 60af7e3199..856f2d8608 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -12,8 +12,8 @@ arch-$(CONFIG_CPU_ARM926EJS) =-march=armv5te arch-$(CONFIG_CPU_ARM946ES) =-march=armv5te arch-$(CONFIG_CPU_SA1100) =-march=armv4 arch-$(CONFIG_CPU_PXA) = -arch-$(CONFIG_CPU_ARM1136) =-march=armv6 -arch-$(CONFIG_CPU_ARM1176) =-march=armv6 +arch-$(CONFIG_CPU_ARM1136) =-march=armv5t +arch-$(CONFIG_CPU_ARM1176) =-march=armv5t arch-$(CONFIG_CPU_V7A) =$(call cc-option, -march=armv7-a, \ $(call cc-option, -march=armv7)) arch-$(CONFIG_CPU_V7M) =-march=armv7-m -- 2.24.0

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[PATCH 1/1] linux/types.h: fix typo unchar
by Heinrich Schuchardt 09 Dec '19

09 Dec '19

unsigned char should be called uchar and not unchar. This fixes a build error in lib/crypto/x509_cert_parser.c. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- include/linux/types.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/types.h b/include/linux/types.h index 51cb284bb8..bd912bcb42 100644 --- a/include/linux/types.h +++ b/include/linux/types.h @@ -85,7 +85,7 @@ typedef unsigned int u_int; typedef unsigned long u_long; /* sysv */ -typedef unsigned char unchar; +typedef unsigned char uchar; typedef unsigned short ushort; typedef unsigned int uint; typedef unsigned long ulong; -- 2.20.1

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[GIT PULL] Pull request: u-boot-imx u-boot-imx-20191209
by Stefano Babic 09 Dec '19

09 Dec '19

Hi Tom, some fixes for 2020.01, please pull from u-boot-imx, thanks ! Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/621583741 u-boot-imx-20191209: Fixes for 2020.01 ----------------- - imx8qxp_mek: increase buffer sizes and args number - Fixes for imx7ulp - imx8mm: Fix the first root clock in imx8mm_ahb_sels[] - colibri_imx7: reserve DDR memory for Cortex-M4 - vining2000: fixes and convert to ethernet DM - imx8m: fix rom version check to unbreak some B0 chips - tbs2910: Disable VxWorks image booting support The following changes since commit 1297989804d66c8db92efbf9fa2e6cc76965a943: Prepare v2020.01-rc4 (2019-12-02 22:09:27 -0500) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git tags/u-boot-imx-20191209 for you to fetch changes up to 6a4b07e08605ad171823021aa158b6b9bebfc6e6: imx8m: fix rom version check to unbreak some B0 chips (2019-12-09 11:52:06 +0100) ---------------------------------------------------------------- Fixes for 2020.01 ----------------- - imx8qxp_mek: increase buffer sizes and args number - Fixes for imx7ulp - imx8mm: Fix the first root clock in imx8mm_ahb_sels[] - colibri_imx7: reserve DDR memory for Cortex-M4 - vining2000: fixes and convert to ethernet DM - imx8m: fix rom version check to unbreak some B0 chips - tbs2910: Disable VxWorks image booting support ---------------------------------------------------------------- Anatolij Gustschin (1): imx: imx8qxp_mek: increase buffer sizes and args number Fabio Estevam (8): mx7ulp: Print the LDO mode status mx7ulp: Introduce the CONFIG_LDO_ENABLED_MODE option mx7ulp: Remove the _RUN notation from the PMC1 LDOVL definitions mx7ulp: scg: Remove unnused scg_a7_apll_init() mx7ulp: Sync the device tree related files mx6cuboxi: Add Baruch as maintainer mx6: Allow configuring the NoC registers on i.MX6QP warp7: Fix U-Boot corruption after saving the environment Frieder Schrempf (1): clk: imx: imx8mm: Fix the first root clock in imx8mm_ahb_sels[] Igor Opaniuk (2): common: fdt_support: add support for setting usable memory board: colibri_imx7: reserve DDR memory for Cortex-M4 Marek Vasut (7): ARM: mx6: pmu: Expose PMU LDO configuration interface ARM: imx: vining2000: Convert to SPL framework ARM: imx: vining2000: Enable DDR DRAM calibration ARM: imx: vining2000: Convert to ethernet DM ARM: imx: vining2000: Enable fitImage support ARM: imx: vining2000: Repair PCIe support ARM: imx: vining2000: Align SOC and ARM LDO voltages Patrick Wildt (1): imx8m: fix rom version check to unbreak some B0 chips Tom Rini (1): tbs2910: Disable VxWorks image booting support arch/arm/dts/imx6sx-softing-vining-2000.dts | 17 ++ arch/arm/dts/imx7ulp-evk.dts | 157 +++++------- arch/arm/dts/imx7ulp-pinfunc.h | 1748 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------------------------- arch/arm/dts/imx7ulp.dtsi | 28 +- arch/arm/include/asm/arch-mx6/sys_proto.h | 8 + arch/arm/include/asm/arch-mx7ulp/scg.h | 1 - arch/arm/include/asm/mach-imx/sys_proto.h | 2 + arch/arm/mach-imx/imx8m/soc.c | 1 + arch/arm/mach-imx/mx6/Kconfig | 1 + arch/arm/mach-imx/mx6/soc.c | 43 +++- arch/arm/mach-imx/mx7ulp/Kconfig | 5 + arch/arm/mach-imx/mx7ulp/scg.c | 61 ----- arch/arm/mach-imx/mx7ulp/soc.c | 78 ++++++ board/softing/vining_2000/vining_2000.c | 256 ++++++++++++++++--- board/solidrun/mx6cuboxi/MAINTAINERS | 1 + board/toradex/colibri_imx7/colibri_imx7.c | 37 +++ common/fdt_support.c | 35 +++ configs/tbs2910_defconfig | 1 + configs/vining_2000_defconfig | 18 +- configs/warp7_defconfig | 2 +- drivers/clk/imx/clk-imx8mm.c | 2 +- include/configs/imx8qxp_mek.h | 5 + include/configs/vining_2000.h | 6 +- include/configs/warp7.h | 13 + include/fdt_support.h | 1 + 25 files changed, 1456 insertions(+), 1071 deletions(-) Regards, Stefano -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic(a)denx.de =====================================================================

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[U-Boot] amlogic a96 mini
by Belisko Marek 09 Dec '19

09 Dec '19

Hi, I'm trying to run mainline u-boot on amlogic a96mini device but before I try to flash it does anybody have an idea if it will work on mainline. As I have limited number of devices and I know that after flashing I can brick the board so would like to ask if anybody have experience with this device and running mainline. Thanks and BR, marek -- as simple and primitive as possible ------------------------------------------------- Marek Belisko - OPEN-NANDRA Freelance Developer Ruska Nova Ves 219 | Presov, 08005 Slovak Republic Tel: +421 915 052 184 skype: marekwhite twitter: #opennandra web: http://open-nandra.com

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Pull request: socfpga-next
by Simon Goldschmidt 09 Dec '19

09 Dec '19

The following changes since commit b38c3a641fc01fcd4eda5fa107ae3c247baa0196: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86 (2019-12-08 10:51:00 -0500) are available in the git repository at: https://github.com/goldsimon/u-boot.git socfpga-next for you to fetch changes up to ed2d3002c23d1c5632a03a64676102f0445d627e: arm: socfpga: agilex: Enable Agilex SoC build (2019-12-09 08:49:51 +0100) ---------------------------------------------------------------- Ley Foon Tan (24): spl: Allow cache drivers to be used in SPL arm: dts: socfpga: Add u-boot, dm-pre-reloc for sysmgr and clkmgr nodes arm: socfpga: Convert reset manager from struct to defines arm: socfpga: Convert system manager from struct to defines arm: socfpga: Convert clock manager from struct to defines arm: socfpga: agilex: Add base address for Intel Agilex SoC arm: socfpga: Move firewall code to firewall file arm: socfpga: Move Stratix10 and Agilex reset manager common code arm: socfpga: agilex: Add reset manager support arm: socfpga: Move Stratix10 and Agilex system manager common code arm: socfpga: agilex: Add system manager support arm: socfpga: Move Stratix10 and Agilex clock manager common code arm: socfpga: Fix CLKMGR_INTOSC_HZ to 400MHz clk: agilex: Add clock driver for Agilex arm: socfpga: agilex: Add clock wrapper functions cache: Add Arteris Ncore cache coherent unit driver arm: agilex: Add clock handoff offset for Agilex ddr: altera: Restructure Stratix 10 SDRAM driver ddr: altera: agilex: Add SDRAM driver for Agilex board: intel: agilex: Add socdk board support for Intel Agilex SoC arm: socfpga: agilex: Add SPL for Agilex SoC arm: dts: agilex: Add base dtsi and devkit dts configs: socfpga: Move Stratix10 and Agilex common CONFIGs arm: socfpga: agilex: Enable Agilex SoC build arch/arm/Kconfig | 4 +- arch/arm/dts/Makefile | 1 + arch/arm/dts/socfpga-common-u-boot.dtsi | 8 + arch/arm/dts/socfpga.dtsi | 2 +- arch/arm/dts/socfpga_agilex-u-boot.dtsi | 96 +++++++++++ arch/arm/dts/socfpga_agilex.dtsi | 622 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 39 +++++ arch/arm/dts/socfpga_agilex_socdk.dts | 141 +++++++++++++++ arch/arm/dts/socfpga_arria10.dtsi | 2 +- arch/arm/dts/socfpga_arria10_socdk.dtsi | 8 + arch/arm/dts/socfpga_stratix10.dtsi | 2 +- arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi | 8 + arch/arm/mach-socfpga/Kconfig | 16 ++ arch/arm/mach-socfpga/Makefile | 17 ++ arch/arm/mach-socfpga/clock_manager.c | 14 +- arch/arm/mach-socfpga/clock_manager_agilex.c | 85 ++++++++++ arch/arm/mach-socfpga/clock_manager_arria10.c | 155 +++++++++-------- arch/arm/mach-socfpga/clock_manager_gen5.c | 211 +++++++++++++---------- arch/arm/mach-socfpga/clock_manager_s10.c | 218 ++++++++++++++---------- arch/arm/mach-socfpga/firewall.c | 107 ++++++++++++ arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 4 + arch/arm/mach-socfpga/include/mach/clock_manager.h | 4 + arch/arm/mach-socfpga/include/mach/clock_manager_agilex.h | 14 ++ arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h | 133 ++++++--------- arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h | 112 +++++------- arch/arm/mach-socfpga/include/mach/clock_manager_s10.h | 131 ++++++-------- arch/arm/mach-socfpga/include/mach/clock_manager_soc64.h | 21 +++ arch/arm/mach-socfpga/include/mach/{firewall_s10.h => firewall.h} | 10 +- arch/arm/mach-socfpga/include/mach/handoff_s10.h | 9 +- arch/arm/mach-socfpga/include/mach/misc.h | 1 + arch/arm/mach-socfpga/include/mach/reset_manager.h | 7 +- arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h | 43 +---- arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h | 22 +-- arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 118 ------------- arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h | 38 +++++ arch/arm/mach-socfpga/include/mach/system_manager.h | 7 +- arch/arm/mach-socfpga/include/mach/system_manager_arria10.h | 94 +++------- arch/arm/mach-socfpga/include/mach/system_manager_gen5.h | 123 +++----------- arch/arm/mach-socfpga/include/mach/system_manager_s10.h | 176 ------------------- arch/arm/mach-socfpga/include/mach/system_manager_soc64.h | 123 ++++++++++++++ arch/arm/mach-socfpga/mailbox_s10.c | 6 +- arch/arm/mach-socfpga/misc.c | 66 ++++++++ arch/arm/mach-socfpga/misc_arria10.c | 11 +- arch/arm/mach-socfpga/misc_gen5.c | 38 +++-- arch/arm/mach-socfpga/misc_s10.c | 9 +- arch/arm/mach-socfpga/reset_manager_arria10.c | 73 ++++---- arch/arm/mach-socfpga/reset_manager_gen5.c | 37 ++-- arch/arm/mach-socfpga/reset_manager_s10.c | 56 +++--- arch/arm/mach-socfpga/scan_manager.c | 6 +- arch/arm/mach-socfpga/spl_a10.c | 12 +- arch/arm/mach-socfpga/spl_agilex.c | 98 +++++++++++ arch/arm/mach-socfpga/spl_gen5.c | 26 ++- arch/arm/mach-socfpga/spl_s10.c | 109 ++---------- arch/arm/mach-socfpga/system_manager_gen5.c | 42 +++-- arch/arm/mach-socfpga/system_manager_s10.c | 42 +++-- arch/arm/mach-socfpga/wrap_pll_config_s10.c | 20 ++- board/intel/agilex-socdk/MAINTAINERS | 7 + board/intel/agilex-socdk/Makefile | 7 + board/intel/agilex-socdk/socfpga.c | 7 + common/spl/Kconfig | 6 + configs/socfpga_agilex_defconfig | 60 +++++++ drivers/Makefile | 1 + drivers/cache/Kconfig | 8 + drivers/cache/Makefile | 3 +- drivers/cache/cache-ncore.c | 164 ++++++++++++++++++ drivers/clk/altera/Makefile | 1 + drivers/clk/altera/clk-agilex.c | 579 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/clk/altera/clk-agilex.h | 237 ++++++++++++++++++++++++++ drivers/ddr/altera/Kconfig | 6 +- drivers/ddr/altera/Makefile | 3 +- drivers/ddr/altera/sdram_agilex.c | 168 ++++++++++++++++++ drivers/ddr/altera/sdram_gen5.c | 12 +- drivers/ddr/altera/sdram_s10.c | 300 +------------------------------- drivers/ddr/altera/sdram_s10.h | 148 +--------------- drivers/ddr/altera/sdram_soc64.c | 305 +++++++++++++++++++++++++++++++++ drivers/ddr/altera/sdram_soc64.h | 187 ++++++++++++++++++++ drivers/fpga/socfpga_arria10.c | 7 +- drivers/fpga/socfpga_gen5.c | 4 +- drivers/mmc/socfpga_dw_mmc.c | 17 +- drivers/sysreset/sysreset_socfpga.c | 6 +- include/configs/socfpga_agilex_socdk.h | 12 ++ include/configs/socfpga_soc64_common.h | 203 ++++++++++++++++++++++ include/configs/socfpga_stratix10_socdk.h | 192 +-------------------- include/dt-bindings/clock/agilex-clock.h | 71 ++++++++ 84 files changed, 4369 insertions(+), 1949 deletions(-) create mode 100644 arch/arm/dts/socfpga_agilex-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_agilex.dtsi create mode 100644 arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_agilex_socdk.dts create mode 100644 arch/arm/mach-socfpga/clock_manager_agilex.c create mode 100644 arch/arm/mach-socfpga/firewall.c create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_agilex.h create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_soc64.h rename arch/arm/mach-socfpga/include/mach/{firewall_s10.h => firewall.h} (94%) delete mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h delete mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_soc64.h create mode 100644 arch/arm/mach-socfpga/spl_agilex.c create mode 100644 board/intel/agilex-socdk/MAINTAINERS create mode 100644 board/intel/agilex-socdk/Makefile create mode 100644 board/intel/agilex-socdk/socfpga.c create mode 100644 configs/socfpga_agilex_defconfig create mode 100644 drivers/cache/cache-ncore.c create mode 100644 drivers/clk/altera/clk-agilex.c create mode 100644 drivers/clk/altera/clk-agilex.h create mode 100644 drivers/ddr/altera/sdram_agilex.c create mode 100644 drivers/ddr/altera/sdram_soc64.c create mode 100644 drivers/ddr/altera/sdram_soc64.h create mode 100644 include/configs/socfpga_agilex_socdk.h create mode 100644 include/configs/socfpga_soc64_common.h create mode 100644 include/dt-bindings/clock/agilex-clock.h

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[PATCH v2 0/4] toradex: tegra: add update_uboot wrapper
by Igor Opaniuk 09 Dec '19

09 Dec '19

This patch series introduces universtal update_uboot wrapper that helps to update U-Boot image on internal storage (eMMC/NAND). Example of usage: > tftpboot ${loadaddr} ${board_name}/${board_name}.img > run update_uboot Igor Opaniuk (4): apalis-tk1: add update_uboot wrapper apalis_t30: add update_uboot wrapper colibri_t20: add update_uboot wrapper colibri_t30: add update_uboot wrapper include/configs/apalis-tk1.h | 9 +++++++++ include/configs/apalis_t30.h | 11 +++++++++++ include/configs/colibri_t20.h | 8 ++++++-- include/configs/colibri_t30.h | 11 +++++++++++ 4 files changed, 37 insertions(+), 2 deletions(-) -- 2.17.1

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[PATCH v4] mx7ulp: Add support for Embedded Artists COM board
by Fabio Estevam 09 Dec '19

09 Dec '19

The Embedded Artists COM board is based on NXP i.MX7ULP. It has a BD70528 PMIC from Rohm with discrete DCDC powering option and improved current observability (compared to the existing NXP i.MX7ULP EVK). Add the initial support for the board. Signed-off-by: Fabio Estevam <festevam(a)gmail.com> --- Changes since v3: - Rebased against the latest u-boot-imx tree. arch/arm/dts/Makefile | 3 +- arch/arm/dts/imx7ulp-com.dts | 90 ++++++++++++++++++++++ arch/arm/mach-imx/mx7ulp/Kconfig | 6 ++ board/ea/mx7ulp_com/Kconfig | 12 +++ board/ea/mx7ulp_com/MAINTAINERS | 6 ++ board/ea/mx7ulp_com/Makefile | 6 ++ board/ea/mx7ulp_com/imximage.cfg | 128 +++++++++++++++++++++++++++++++ board/ea/mx7ulp_com/mx7ulp_com.c | 48 ++++++++++++ configs/mx7ulp_com_defconfig | 61 +++++++++++++++ include/configs/mx7ulp_com.h | 103 +++++++++++++++++++++++++ 10 files changed, 462 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/imx7ulp-com.dts create mode 100644 board/ea/mx7ulp_com/Kconfig create mode 100644 board/ea/mx7ulp_com/MAINTAINERS create mode 100644 board/ea/mx7ulp_com/Makefile create mode 100644 board/ea/mx7ulp_com/imximage.cfg create mode 100644 board/ea/mx7ulp_com/mx7ulp_com.c create mode 100644 configs/mx7ulp_com_defconfig create mode 100644 include/configs/mx7ulp_com.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index d8846df1bd..9a92de71eb 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -657,7 +657,8 @@ dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \ imx7d-pico-hobbit.dtb -dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb +dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-com.dtb \ + imx7ulp-evk.dtb dtb-$(CONFIG_ARCH_IMX8) += \ fsl-imx8qm-apalis.dtb \ diff --git a/arch/arm/dts/imx7ulp-com.dts b/arch/arm/dts/imx7ulp-com.dts new file mode 100644 index 0000000000..c01e03dd06 --- /dev/null +++ b/arch/arm/dts/imx7ulp-com.dts @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright 2019 NXP +// Author: Fabio Estevam <fabio.estevam(a)nxp.com> + +/dts-v1/; + +#include "imx7ulp.dtsi" + +/ { + model = "Embedded Artists i.MX7ULP COM"; + compatible = "ea,imx7ulp-com", "fsl,imx7ulp"; + + chosen { + stdout-path = &lpuart4; + }; + + memory { + device_type = "memory"; + reg = <0x60000000 0x8000000>; + }; +}; + +&lpuart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart4>; + status = "okay"; +}; + +&usbotg1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg1_id>; + srp-disable; + hnp-disable; + adp-disable; + status = "okay"; +}; + +&usbphy1 { + fsl,tx-d-cal = <88>; +}; + +&usdhc0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc0>; + non-removable; + bus-width = <8>; + no-1-8-v; + status = "okay"; +}; + +&iomuxc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog_1>; + + pinctrl_hog_1: hoggrp-1 { + fsl,pins = < + IMX7ULP_PAD_PTC1__PTC1 0x20000 + >; + }; + + pinctrl_lpuart4: lpuart4grp { + fsl,pins = < + IMX7ULP_PAD_PTC3__LPUART4_RX 0x3 + IMX7ULP_PAD_PTC2__LPUART4_TX 0x3 + >; + }; + + pinctrl_usdhc0: usdhc0grp { + fsl,pins = < + IMX7ULP_PAD_PTD1__SDHC0_CMD 0x43 + IMX7ULP_PAD_PTD2__SDHC0_CLK 0x10042 + IMX7ULP_PAD_PTD3__SDHC0_D7 0x43 + IMX7ULP_PAD_PTD4__SDHC0_D6 0x43 + IMX7ULP_PAD_PTD5__SDHC0_D5 0x43 + IMX7ULP_PAD_PTD6__SDHC0_D4 0x43 + IMX7ULP_PAD_PTD7__SDHC0_D3 0x43 + IMX7ULP_PAD_PTD8__SDHC0_D2 0x43 + IMX7ULP_PAD_PTD9__SDHC0_D1 0x43 + IMX7ULP_PAD_PTD10__SDHC0_D0 0x43 + IMX7ULP_PAD_PTD11__SDHC0_DQS 0x42 + >; + }; + + pinctrl_usbotg1_id: otg1idgrp { + fsl,pins = < + IMX7ULP_PAD_PTC13__USB0_ID 0x10003 + >; + }; +}; diff --git a/arch/arm/mach-imx/mx7ulp/Kconfig b/arch/arm/mach-imx/mx7ulp/Kconfig index 138c58363f..6680f856c5 100644 --- a/arch/arm/mach-imx/mx7ulp/Kconfig +++ b/arch/arm/mach-imx/mx7ulp/Kconfig @@ -15,6 +15,11 @@ choice prompt "MX7ULP board select" optional +config TARGET_MX7ULP_COM + bool "Support MX7ULP COM board" + select MX7ULP + select SYS_ARCH_TIMER + config TARGET_MX7ULP_EVK bool "Support mx7ulp EVK board" select MX7ULP @@ -22,6 +27,7 @@ config TARGET_MX7ULP_EVK endchoice +source "board/ea/mx7ulp_com/Kconfig" source "board/freescale/mx7ulp_evk/Kconfig" endif diff --git a/board/ea/mx7ulp_com/Kconfig b/board/ea/mx7ulp_com/Kconfig new file mode 100644 index 0000000000..90883aced4 --- /dev/null +++ b/board/ea/mx7ulp_com/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MX7ULP_COM + +config SYS_BOARD + default "mx7ulp_com" + +config SYS_VENDOR + default "ea" + +config SYS_CONFIG_NAME + default "mx7ulp_com" + +endif diff --git a/board/ea/mx7ulp_com/MAINTAINERS b/board/ea/mx7ulp_com/MAINTAINERS new file mode 100644 index 0000000000..3f69511b1a --- /dev/null +++ b/board/ea/mx7ulp_com/MAINTAINERS @@ -0,0 +1,6 @@ +MX7ULPCOM BOARD +M: Fabio Estevam <festevam(a)gmail.com> +S: Maintained +F: board/ea/mx7ulp_com/ +F: include/configs/mx7ulp_com.h +F: configs/mx7ulp_com_defconfig diff --git a/board/ea/mx7ulp_com/Makefile b/board/ea/mx7ulp_com/Makefile new file mode 100644 index 0000000000..b3b230b172 --- /dev/null +++ b/board/ea/mx7ulp_com/Makefile @@ -0,0 +1,6 @@ +# (C) Copyright 2016 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := mx7ulp_com.o diff --git a/board/ea/mx7ulp_com/imximage.cfg b/board/ea/mx7ulp_com/imximage.cfg new file mode 100644 index 0000000000..bda4acfd91 --- /dev/null +++ b/board/ea/mx7ulp_com/imximage.cfg @@ -0,0 +1,128 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +#define __ASSEMBLY__ +#include <config.h> + +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi/sd/nand/onenand, qspi/nor + */ + +BOOT_FROM sd + +#ifdef CONFIG_USE_IMXIMG_PLUGIN +/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/ +PLUGIN board/freescale/mx7ulp_evk/plugin.bin 0x2F020000 +#else + +#ifdef CONFIG_SECURE_BOOT +CSF CONFIG_CSF_SIZE +#endif +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +DATA 4 0x403f00dc 0x00000000 +DATA 4 0x403e0040 0x01000020 +DATA 4 0x403e0500 0x01000000 +DATA 4 0x403e050c 0x80808080 +DATA 4 0x403e0508 0x00160002 +DATA 4 0x403E0510 0x00000001 +DATA 4 0x403E0514 0x00000014 +DATA 4 0x403e0500 0x00000001 +CHECK_BITS_SET 4 0x403e0500 0x01000000 +DATA 4 0x403e050c 0x8080801B +CHECK_BITS_SET 4 0x403e050c 0x00000040 +DATA 4 0x403E0030 0x00000001 +DATA 4 0x403e0040 0x11000020 +DATA 4 0x403f00dc 0x42000000 + +DATA 4 0x40B300AC 0x40000000 + +DATA 4 0x40AD0128 0x00040000 +DATA 4 0x40AD00F8 0x00000000 +DATA 4 0x40AD00D8 0x00000180 +DATA 4 0x40AD0104 0x00000180 +DATA 4 0x40AD0108 0x00000180 +DATA 4 0x40AD0124 0x00010000 +DATA 4 0x40AD0080 0x0000018C +DATA 4 0x40AD0084 0x0000018C +DATA 4 0x40AD0088 0x0000018C +DATA 4 0x40AD008C 0x0000018C + +DATA 4 0x40AD0120 0x00010000 +DATA 4 0x40AD010C 0x00000180 +DATA 4 0x40AD0110 0x00000180 +DATA 4 0x40AD0114 0x00000180 +DATA 4 0x40AD0118 0x00000180 +DATA 4 0x40AD0090 0x00000180 +DATA 4 0x40AD0094 0x00000180 +DATA 4 0x40AD0098 0x00000180 +DATA 4 0x40AD009C 0x00000180 + +DATA 4 0x40AD00E0 0x00040000 +DATA 4 0x40AD00E4 0x00040000 + +DATA 4 0x40AB001C 0x00008000 +DATA 4 0x40AB085C 0x0D3900A0 +DATA 4 0x40AB0800 0xA1390003 +DATA 4 0x40AB0890 0x00400000 +DATA 4 0x40AB081C 0x33333333 +DATA 4 0x40AB0820 0x33333333 +DATA 4 0x40AB0824 0x33333333 +DATA 4 0x40AB0828 0x33333333 +DATA 4 0x40AB08C0 0x24922492 +DATA 4 0x40AB0848 0x3A3E3838 +DATA 4 0x40AB0850 0x28282C2A +DATA 4 0x40AB083C 0x20000000 +DATA 4 0x40AB0840 0x00000000 +DATA 4 0x40AB08B8 0x00000800 +DATA 4 0x40AB000C 0x292C40F5 +DATA 4 0x40AB0004 0x00020064 +DATA 4 0x40AB0010 0xB6AD0A83 +DATA 4 0x40AB0014 0x00C70093 +DATA 4 0x40AB0018 0x00211708 +DATA 4 0x40AB002C 0x0F9F26D2 +DATA 4 0x40AB0030 0x009F0E10 +DATA 4 0x40AB0038 0x00130556 +DATA 4 0x40AB0008 0x12272000 +DATA 4 0x40AB0040 0x0000003F +DATA 4 0x40AB0000 0xC3110000 +DATA 4 0x40AB001C 0x00008010 +DATA 4 0x40AB001C 0x00008018 +DATA 4 0x40AB001C 0x003F8030 +DATA 4 0x40AB001C 0xFF0A8030 +DATA 4 0x40AB001C 0x82018030 +DATA 4 0x40AB001C 0x06028030 +DATA 4 0x40AB001C 0x01038030 +DATA 4 0x40AB001C 0x003F8038 +DATA 4 0x40AB001C 0xFF0A8038 +DATA 4 0x40AB001C 0x82018038 +DATA 4 0x40AB001C 0x06028038 +DATA 4 0x40AB001C 0x01038038 +DATA 4 0x40AB083C 0xA0000000 +DATA 4 0x40AB083C 0xA0000000 +DATA 4 0x40AB0020 0x00001800 +DATA 4 0x40AB0800 0xA1310003 +DATA 4 0x40AB001C 0x00000000 +#endif diff --git a/board/ea/mx7ulp_com/mx7ulp_com.c b/board/ea/mx7ulp_com/mx7ulp_com.c new file mode 100644 index 0000000000..6fc1631bf7 --- /dev/null +++ b/board/ea/mx7ulp_com/mx7ulp_com.c @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/mx7ulp-pins.h> +#include <asm/arch/iomux.h> +#include <asm/gpio.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PUS_UP) + +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + + return 0; +} + +static iomux_cfg_t const lpuart4_pads[] = { + MX7ULP_PAD_PTC3__LPUART4_RX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX7ULP_PAD_PTC2__LPUART4_TX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + mx7ulp_iomux_setup_multiple_pads(lpuart4_pads, + ARRAY_SIZE(lpuart4_pads)); +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} diff --git a/configs/mx7ulp_com_defconfig b/configs/mx7ulp_com_defconfig new file mode 100644 index 0000000000..68a720ae0c --- /dev/null +++ b/configs/mx7ulp_com_defconfig @@ -0,0 +1,61 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX7ULP=y +CONFIG_SYS_TEXT_BASE=0x67800000 +CONFIG_LDO_ENABLED_MODE=y +CONFIG_TARGET_MX7ULP_COM=y +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0xC0000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_IMX7ULP_LOWER_DDR_FREQUENCY=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ea/mx7ulp_com/imximage.cfg" +CONFIG_DEFAULT_FDT_FILE="imx7ulp-com" +CONFIG_BOUNCE_BUFFER=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_READ=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-com" +CONFIG_ENV_IS_IN_MMC=y +# CONFIG_NET is not set +CONFIG_DM=y +CONFIG_DM_GPIO=y +CONFIG_IMX_RGPIO2P=y +# CONFIG_MXC_GPIO is not set +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_IMX_LPI2C=y +CONFIG_DM_MMC=y +CONFIG_FSL_USDHC=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_SF_DEFAULT_SPEED=40000000 +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX7ULP=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y +CONFIG_FSL_LPUART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_QSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_ULP_WATCHDOG=y diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h new file mode 100644 index 0000000000..bccfea812d --- /dev/null +++ b/include/configs/mx7ulp_com.h @@ -0,0 +1,103 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * + * Configuration settings for the Embedded Artists i.MX7ULP COM board. + */ + +#ifndef __MX7ULP_COM_CONFIG_H +#define __MX7ULP_COM_CONFIG_H + +#include <linux/sizes.h> +#include <asm/arch/imx-regs.h> + +#define CONFIG_BOARD_POSTCLK_INIT +#define CONFIG_SYS_BOOTM_LEN 0x1000000 + +#define SRC_BASE_ADDR CMC1_RBASE +#define IRAM_BASE_ADDR OCRAM_0_BASE +#define IOMUXC_BASE_ADDR IOMUXC1_RBASE + +/* + * Detect overlap between U-Boot image and environment area in build-time + * + * CONFIG_BOARD_SIZE_LIMIT = CONFIG_ENV_OFFSET - u-boot-dtb.imx offset + * CONFIG_BOARD_SIZE_LIMIT = 768k - 1k = 767k = 785408 + * + * Currently CONFIG_BOARD_SIZE_LIMIT does not handle expressions, so + * write the direct value here + */ +#define CONFIG_BOARD_SIZE_LIMIT 785408 +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_MMCROOT "/dev/mmcblk0p2" +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + +/* Using ULP WDOG for reset */ +#define WDOG_BASE_ADDR WDG1_RBASE + +#define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1MHz from TSTMR */ + +#define CONFIG_INITRD_TAG +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M) + +/* UART */ +#define LPUART_BASE LPUART4_RBASE + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* Physical Memory Map */ + +#define PHYS_SDRAM 0x60000000 +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM + +#define CONFIG_LOADADDR 0x60800000 + +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M) + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "image=zImage\0" \ + "console=ttyLP0\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "fdt_file=imx7ulp-com.dtb\0" \ + "fdt_addr=0x63000000\0" \ + "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ + "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "root=${mmcroot}\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if run loadfdt; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "fi;\0" \ + +#define CONFIG_BOOTCOMMAND \ + "if run loadimage; then " \ + "run mmcboot; " \ + "fi; " \ + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE SZ_256K + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#endif /* __CONFIG_H */ -- 2.17.1

1 0

[U-Boot] imx8m: fix rom version check to unbreak some B0 chips
by Patrick Wildt 09 Dec '19

09 Dec '19

Recently the version check was improved to be able to determine that we're running on SoC revision 2.1. A check for B0 was tightened so that it now must equal 0x20 instead of being bigger than 0x20. On some B0 chips the value returned is 0x1020 instead of 0x20. This means even though it's B0, the check will fail and code relying on the correct chip revision will make wrong decisions. There is no documentation of those bits, but it seems that NXP always uses a byte to encode the revision. Thus remove the upper bits to fix the regression. Signed-off-by: Patrick Wildt <patrick(a)blueri.se> diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 9a203e4736..4d42368057 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -216,6 +216,7 @@ u32 get_cpu_rev(void) readl((void __iomem *)ROM_VERSION_A0); if (rom_version != CHIP_REV_1_0) { rom_version = readl((void __iomem *)ROM_VERSION_B0); + rom_version &= 0xff; if (rom_version == CHIP_REV_2_0) reg = CHIP_REV_2_0; }

2 2

[v4 1/8] rtc: pcf8563: Add driver model support
by Biwen Li 09 Dec '19

09 Dec '19

Add support of driver model of pcf8563 Signed-off-by: Biwen Li <biwen.li(a)nxp.com> --- Changes in v4: - update commit messages - update copyright Changes in v3: - update commit messages Changes in v2: - none drivers/rtc/pcf8563.c | 108 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 108 insertions(+) diff --git a/drivers/rtc/pcf8563.c b/drivers/rtc/pcf8563.c index a839d6cc98..d99e0b70a6 100644 --- a/drivers/rtc/pcf8563.c +++ b/drivers/rtc/pcf8563.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2001 + * (C) Copyright 2019 NXP * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. */ @@ -12,9 +13,11 @@ #include <common.h> #include <command.h> +#include <dm.h> #include <rtc.h> #include <i2c.h> +#if !CONFIG_IS_ENABLED(DM_RTC) static uchar rtc_read (uchar reg); static void rtc_write (uchar reg, uchar val); @@ -115,3 +118,108 @@ static void rtc_write (uchar reg, uchar val) { i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); } +#else +static int pcf8563_rtc_get(struct udevice *dev, struct rtc_time *tmp) +{ + int rel = 0; + uchar sec, min, hour, mday, wday, mon_cent, year; + + sec = dm_i2c_reg_read(dev, 0x02); + min = dm_i2c_reg_read(dev, 0x03); + hour = dm_i2c_reg_read(dev, 0x04); + mday = dm_i2c_reg_read(dev, 0x05); + wday = dm_i2c_reg_read(dev, 0x06); + mon_cent = dm_i2c_reg_read(dev, 0x07); + year = dm_i2c_reg_read(dev, 0x08); + + debug ("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " + "hr: %02x min: %02x sec: %02x\n", + year, mon_cent, mday, wday, + hour, min, sec); + debug ("Alarms: wday: %02x day: %02x hour: %02x min: %02x\n", + dm_i2c_reg_read(dev, 0x0C), + dm_i2c_reg_read(dev, 0x0B), + dm_i2c_reg_read(dev, 0x0A), + dm_i2c_reg_read(dev, 0x09)); + + if (sec & 0x80) { + puts ("### Warning: RTC Low Voltage - date/time not reliable\n"); + rel = -1; + } + + tmp->tm_sec = bcd2bin (sec & 0x7F); + tmp->tm_min = bcd2bin (min & 0x7F); + tmp->tm_hour = bcd2bin (hour & 0x3F); + tmp->tm_mday = bcd2bin (mday & 0x3F); + tmp->tm_mon = bcd2bin (mon_cent & 0x1F); + tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 1900 : 2000); + tmp->tm_wday = bcd2bin (wday & 0x07); + tmp->tm_yday = 0; + tmp->tm_isdst = 0; + + debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + return rel; +} + +static int pcf8563_rtc_set(struct udevice *dev, const struct rtc_time *tmp) +{ + uchar century; + + debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + dm_i2c_reg_write(dev, 0x08, bin2bcd(tmp->tm_year % 100)); + + century = (tmp->tm_year >= 2000) ? 0 : 0x80; + dm_i2c_reg_write(dev, 0x07, bin2bcd(tmp->tm_mon) | century); + + dm_i2c_reg_write(dev, 0x06, bin2bcd(tmp->tm_wday)); + dm_i2c_reg_write(dev, 0x05, bin2bcd(tmp->tm_mday)); + dm_i2c_reg_write(dev, 0x04, bin2bcd(tmp->tm_hour)); + dm_i2c_reg_write(dev, 0x03, bin2bcd(tmp->tm_min)); + dm_i2c_reg_write(dev, 0x02, bin2bcd(tmp->tm_sec)); + + return 0; +} + +static int pcf8563_rtc_reset(struct udevice *dev) +{ + /* clear all control & status registers */ + dm_i2c_reg_write(dev, 0x00, 0x00); + dm_i2c_reg_write(dev, 0x01, 0x00); + dm_i2c_reg_write(dev, 0x0D, 0x00); + + /* clear Voltage Low bit */ + dm_i2c_reg_write(dev, 0x02, dm_i2c_reg_read (dev, 0x02) & 0x7F); + + /* reset all alarms */ + dm_i2c_reg_write(dev, 0x09, 0x00); + dm_i2c_reg_write(dev, 0x0A, 0x00); + dm_i2c_reg_write(dev, 0x0B, 0x00); + dm_i2c_reg_write(dev, 0x0C, 0x00); + + return 0; +} + +static const struct rtc_ops pcf8563_rtc_ops = { + .get = pcf8563_rtc_get, + .set = pcf8563_rtc_set, + .reset = pcf8563_rtc_reset, +}; + +static const struct udevice_id pcf8563_rtc_ids[] = { + { .compatible = "nxp,pcf8563" }, + { } +}; + +U_BOOT_DRIVER(rtc_pcf8563) = { + .name = "rtc-pcf8563", + .id = UCLASS_RTC, + .of_match = pcf8563_rtc_ids, + .ops = &pcf8563_rtc_ops, +}; +#endif -- 2.17.1

1 7

[PATCH v3 00/16] efi_loader: add secure boot support
by AKASHI Takahiro 09 Dec '19

09 Dec '19

One of major missing features in current UEFI implementation is "secure boot." The ultimate goal of my attempt is to implement image authentication based on signature and provide UEFI secure boot support which would be fully compliant with UEFI specification, section 32[1]. (The code was originally developed by Patrick Wildt.) Please note, however, this patch doesn't work on its own; there are a couple of functional dependencies[2] and [3], that I have submitted before. For complete workable patch set, see my repository[4], which also contains exeperimental timestamp-based revocation suuport. My "non-volatile" support[5], which is under discussion, is not mandatory and so not included here, but this inevitably implies that, for example, signature database variables, like db and dbx, won't be persistent unless you explicitly run "env save" command and that UEFI variables are not separated from U-Boot environment. Anyhow, Linaro is also working on implementing real "secure storage" solution based on TF-A and OP-TEE. Supported features: * image authentication based on db and dbx * supported signature types are EFI_CERT_SHA256_GUID (SHA256 digest for unsigned images) EFI_CERT_X509_GUID (x509 certificate for signed images) * SecureBoot/SignatureSupport variables * SetupMode and user mode * variable authentication based on PK and KEK EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS * basic pytest test cases Unsupported features: (marked as TODO in most cases in the source code, and won't be included in this series) * hash algorithms other than SHA256 * dbt: timestamp(RFC6131)-based certificate revocation * dbr: OS recovery * xxxDefault: default values for signature stores * transition to AuditMode and DeployedMode * recording rejected images in EFI_IMAGE_EXECUTION_INFO_TABLE * verification "policy", in particular, check against signature's owner * private authenticated variables * variable authentication with EFI_VARIABLE_ENHANCED_AUTHENTICATED_ACCESS * real secure storage support, including hardware-specific PK (Platform Key) installation TODO's other than "Unsupported features": (won't be included in this series) * fail recovery, in particular, in modifying authenticated variables * support read-only attributes of well-defined global variables in particular, "SignatureSupport" * Extensive test suite (or more test cases) to confirm compatibility with EDK2 => I requested EDK SCT community to add tests[6]. Test: * my pytest, included in this patch set, passed. * efi_selftest passed. (At least no regression.) * Travis CI tests have passed. Known issues: * efitools is used in pytest, and its version must be v1.5.2 or later. (Solution: You can define EFITOOLS_PATH in defs.py for your own efitools.) * Pytest depends on standalone "helloworld" app for sandbox (Solution: You can define HELLO_PATH in defs.py or Heinrich's [7].) Hints about how to use: (Please see other documents, or my pytest scripts, for details.) * You can create your own certificates with openssl. * You can sign your application with sbsign (on Ubuntu). * You can create raw data for signature database with efitools, and install/manage authenticated variables with "env -set -e" command or efitools' "UpdateVars.efi" application. [1] https://uefi.org/sites/default/files/resources/UEFI_Spec_2_8_final.pdf [2] https://lists.denx.de/pipermail/u-boot/2019-November/390127.html (import x509/pkcs7 parsers from linux) [3] https://lists.denx.de/pipermail/u-boot/2019-November/390150.html (extend rsa_verify() for UEFI secure boot) [4] http://git.linaro.org/people/takahiro.akashi/u-boot.git/ efi/secboot [5] https://lists.denx.de/pipermail/u-boot/2019-September/382835.html (non-volatile variables support) [6] https://bugzilla.tianocore.org/show_bug.cgi?id=2230 [7] https://lists.denx.de/pipermail/u-boot/2019-November/389593.html Changes in v3 (Dec 9, 2019) * allow for arbitrary number of regions in efi_image_region_add() (patch#3, #5 and #8) * remove a redundant check in a while loop at efi_sigstore_free() (patch#4) Changes in v2 (Nov 26, 2019) * rebased to v2020.01-rc3 * rename IMAGE_DIRECTORY_ENTRY_CERTTABLE to IMAGE_DIRECTORY_ENTRY_SECURITY (patch#1,#9) * add comments (patch#1) * drop v1's patch#2 as it is no longer necessary * drop v1's patch#3 as other "SECURE_BOOT" architectures have renamed this option and no longer use it * add structure descriptions (patch#3) * rework hash calculation code in efi_signature_verify() and remove an odd constant, WinIndrectSha256 (patch#3) * move travis.yml changes to a seprate patch (patch#12, #16) * yield_fixture() -> fixture() (patch#12) * call console.restart_uboot() at every test case (13,#14) * add patch#15; enable UEFI-related configurations by default on sandbox * add patch#16; modify Travis CI environment to run UEFI secure boot test Changes in v1 (Nov 13, 2019) * rebased to v2020.01-rc * remove already-merged patches * re-work the patch set for easier reviews, including - move a config definition patch forward (patch#4) - refactor/rename verification functions (patch#5/#10) - split signature database parser as a separate patch (patch#6) - split secure state transition code as a separate patch (patch#8) - move most part of init_secure_boot() into init_variables() (patch#8) - split test environment setup from test patches (patch#14) * add function descriptions (patch#5-#11) * make sure the section list is sorted in ascending order in hash calculation of PE image (patch#10) * add a new "-at" (authenticated access) option to "env -e" (patch#13) * list required host packages, in particular udisks2, in pytest (patch#14) * modify conftest.py to run under python3 (patch#14) * use a partition on a disk instead of a whole disk without partition table (patch#14) * reduce depencendy on efitools, yet relying on its host tools (patch#14) * modify pytests to catch up wth latest changes of "env -e" syntax (patch#15,#16) RFC (Sept 18, 2019) AKASHI Takahiro (16): include: pe.h: add signature-related definitions efi_loader: add CONFIG_EFI_SECURE_BOOT config option efi_loader: add signature verification functions efi_loader: add signature database parser efi_loader: variable: support variable authentication efi_loader: variable: add secure boot state transition efi_loader: variable: add VendorKeys variable efi_loader: image_loader: support image authentication efi_loader: set up secure boot cmd: env: use appropriate guid for authenticated UEFI variable cmd: env: add "-at" option to "env set -e" command efi_loader, pytest: set up secure boot environment efi_loader, pytest: add UEFI secure boot tests (authenticated variables) efi_loader, pytest: add UEFI secure boot tests (image) sandbox: add extra configurations for UEFI and related tests travis: add packages for UEFI secure boot test .travis.yml | 11 +- cmd/nvedit.c | 5 +- cmd/nvedit_efi.c | 23 +- configs/sandbox64_defconfig | 3 + configs/sandbox_defconfig | 3 + include/efi_api.h | 87 ++ include/efi_loader.h | 85 +- include/pe.h | 18 + lib/efi_loader/Kconfig | 16 + lib/efi_loader/Makefile | 1 + lib/efi_loader/efi_boottime.c | 2 +- lib/efi_loader/efi_image_loader.c | 454 ++++++++- lib/efi_loader/efi_setup.c | 38 + lib/efi_loader/efi_signature.c | 810 +++++++++++++++ lib/efi_loader/efi_variable.c | 951 ++++++++++++++++-- test/py/README.md | 8 + test/py/tests/test_efi_secboot/conftest.py | 151 +++ test/py/tests/test_efi_secboot/defs.py | 21 + .../py/tests/test_efi_secboot/test_authvar.py | 282 ++++++ test/py/tests/test_efi_secboot/test_signed.py | 99 ++ .../tests/test_efi_secboot/test_unsigned.py | 103 ++ 21 files changed, 3043 insertions(+), 128 deletions(-) create mode 100644 lib/efi_loader/efi_signature.c create mode 100644 test/py/tests/test_efi_secboot/conftest.py create mode 100644 test/py/tests/test_efi_secboot/defs.py create mode 100644 test/py/tests/test_efi_secboot/test_authvar.py create mode 100644 test/py/tests/test_efi_secboot/test_signed.py create mode 100644 test/py/tests/test_efi_secboot/test_unsigned.py -- 2.24.0

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