December 2019 - U-Boot

[U-Boot] [PATCH v2 0/2] Fix BMP decode when BMP size is bigger than framebuffer
by Patrice Chotard 10 Dec '19

10 Dec '19

This series is fixing 2 issues found when trying to decode BMP bigger than the framebuffer: - Convert panel_picture_delta from unsigned long to long to insure to store correctly the difference between panel_size and picture_size in case the panel_size is smaller than picture_size. - Don't rely on BMP's width and height but in width and height value computed by video_bmp_display(). Changes in v2: - Convert panel_picture_delta from unsigned long to long Patrice Chotard (2): video: bmp: Fix video_splash_align_axis() video: bmp: Fix video_display_rle8_bitmap() drivers/video/video_bmp.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) -- 2.17.1

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[PATCH v2 1/3] wandboard: Fix the DM_PMIC conversion
by Fabio Estevam 10 Dec '19

10 Dec '19

Commit ec837c82d709 ("imx6: wandboard: convert to DM_PMIC") caused the following pmic_get() error: CPU: Freescale i.MX6QP rev1.0 at 792 MHz Reset cause: POR DRAM: 2 GiB PMIC: pmic_get() ret -19 ... and since the PMIC presence is used to determine the board D1 revision, the following error is seen when booting a board rev D1: WARNING: Could not determine dtb to use and the kernel does not boot at all. Fix the regression by passing "pfuze100@8" as the correct parameter to the pmic_get() function in the DM case. Fixes: ec837c82d709 ("imx6: wandboard: convert to DM_PMIC") Signed-off-by: Fabio Estevam <festevam(a)gmail.com> --- Changes since v1: - Remove a double 'the' in the Subject board/wandboard/wandboard.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index 6c1e4ef27d..b2f961a7f0 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -363,7 +363,7 @@ int power_init_board(void) puts("PMIC: "); - ret = pmic_get("pfuze100", &dev); + ret = pmic_get("pfuze100@8", &dev); if (ret < 0) { printf("pmic_get() ret %d\n", ret); return 0; -- 2.17.1

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[U-Boot] Pull request: u-boot-riscv/master
by uboot＠andestech.com 10 Dec '19

10 Dec '19

Hi Tom, Please pull some riscv updates: - Increase stack size to avoid a stack overflow during distro boot. - Add hifive-unleashed-a00.dts for SIFIVE FU540. - Add OF_SEPARATE support for SIFIVE FU540. - Add SPL support for Andes AX25 AE350. - Improve U-Boot SPL / OpenSBI smp boot flow for RISC-V. https://travis-ci.org/rickchen36/u-boot-riscv/builds/622462488 Thanks Rick The following changes since commit 0c5c3f293554614416a188d16a8c05e0a6c5bfbb: arm: -march=armv5t for ARM11 (2019-12-09 10:36:00 -0500) are available in the Git repository at: git@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 0e1233ce9069a87a84a4385de456665d2bc9229d: spl: opensbi: wait for ack from secondary harts before entering OpenSBI (2019-12-10 08:23:10 +0800) ---------------------------------------------------------------- Jagan Teki (1): riscv: dts: Add hifive-unleashed-a00 dts from Linux Lukas Auer (5): riscv: increase stack size to avoid a stack overflow during distro boot spl: opensbi: specify main hart as preferred boot hart riscv: add functions for reading the IPI status riscv: add option to wait for ack from secondary harts in smp functions spl: opensbi: wait for ack from secondary harts before entering OpenSBI Rick Chen (11): Use dts support from U-Boot via OF_SEPARATE instead of depending from opensbi. riscv: ax25: add SPL support riscv: ax25-ae350: add SPL configuration riscv: ax25-ae350: Use generic memory size setup riscv: andes_plic: Fix some wrong configurations riscv: ax25: cache: Add SPL_RISCV_MMODE for SPL spl: cache: Allow cache drivers in SPL riscv: Fix clear bss loop in the start-up code riscv: dts: Support four cores SMP riscv: dts: Add #address-cells and #size-cells in nor node doc: update AX25-AE350 RISC-V documentation arch/riscv/Kconfig | 2 +- arch/riscv/cpu/ax25/Kconfig | 4 ++- arch/riscv/cpu/ax25/cache.c | 60 ++++++++++++++++++++++++++++++++++----------- arch/riscv/cpu/start.S | 6 +++-- arch/riscv/cpu/u-boot-spl.lds | 2 +- arch/riscv/cpu/u-boot.lds | 2 +- arch/riscv/dts/Makefile | 1 + arch/riscv/dts/ae350_32.dts | 61 +++++++++++++++++++++++++++++++++++++++++++--- arch/riscv/dts/ae350_64.dts | 61 +++++++++++++++++++++++++++++++++++++++++++--- arch/riscv/dts/fu540-c000.dtsi | 251 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/riscv/dts/hifive-unleashed-a00.dts | 96 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/riscv/include/asm/smp.h | 3 ++- arch/riscv/lib/andes_plic.c | 22 ++++++++++++++--- arch/riscv/lib/bootm.c | 2 +- arch/riscv/lib/sbi_ipi.c | 11 +++++++++ arch/riscv/lib/sifive_clint.c | 9 +++++++ arch/riscv/lib/smp.c | 43 ++++++++++++++++++++++++++------- arch/riscv/lib/spl.c | 2 +- board/AndesTech/ax25-ae350/Kconfig | 9 +++++++ board/AndesTech/ax25-ae350/MAINTAINERS | 4 +++ board/AndesTech/ax25-ae350/ax25-ae350.c | 48 +++++++++++++++++++++--------------- common/spl/Kconfig | 7 ++++++ common/spl/spl_opensbi.c | 13 +++++++++- configs/ae350_rv32_spl_defconfig | 38 +++++++++++++++++++++++++++++ configs/ae350_rv32_spl_xip_defconfig | 40 ++++++++++++++++++++++++++++++ configs/ae350_rv64_spl_defconfig | 39 ++++++++++++++++++++++++++++++ configs/ae350_rv64_spl_xip_defconfig | 41 +++++++++++++++++++++++++++++++ configs/sifive_fu540_defconfig | 3 ++- doc/board/AndesTech/ax25-ae350.rst | 209 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++--- doc/board/sifive/fu540.rst | 5 +--- drivers/Makefile | 1 + include/configs/ax25-ae350.h | 17 +++++++++++++ include/opensbi.h | 18 +++++++++++++- 33 files changed, 1057 insertions(+), 73 deletions(-) create mode 100644 arch/riscv/dts/fu540-c000.dtsi create mode 100644 arch/riscv/dts/hifive-unleashed-a00.dts create mode 100644 configs/ae350_rv32_spl_defconfig create mode 100644 configs/ae350_rv32_spl_xip_defconfig create mode 100644 configs/ae350_rv64_spl_defconfig create mode 100644 configs/ae350_rv64_spl_xip_defconfig

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Re: Pull request: u-boot-net.git master
by Tom Rini 10 Dec '19

10 Dec '19

On Mon, Dec 09, 2019 at 09:51:32AM -0600, Joe Hershberger wrote: > Hi Tom, > > Between dropping the superceeded atheros series and applying your nfs trim patch, things appear to be all good. > > Passed testing at https://travis-ci.org/jhershbe/u-boot/builds/622465407 > > The following changes since commit b38c3a641fc01fcd4eda5fa107ae3c247baa0196: > > Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86 (2019-12-08 10:51:00 -0500) > > are available in the git repository at: > > https://gitlab.denx.de/u-boot/custodians/u-boot-net.git master > > for you to fetch changes up to 2c4e067d493d031d1267eea1c635d1eab93ce8f7: > > cmd: pxe: Increase maximum path length (2019-12-09 09:49:48 -0600) > Applied to u-boot/master, thanks! -- Tom

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[PATCH] wandboard: Remove repeated PMIC string
by Fabio Estevam 10 Dec '19

10 Dec '19

After the conversion to DM_PMIC the following output is seen: PMIC: PMIC: PFUZE100 ID=0x10 Remove the unnecessary PMIC string from the board file to avoid the repetead string. Signed-off-by: Fabio Estevam <festevam(a)gmail.com> --- Hi Stefano, This one depends on these two patches: [PATCH 1/2] wandboard: Fix the the DM_PMIC conversion [PATCH 2/2] wandboard: Propagate the error on PMIC function failure board/wandboard/wandboard.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index 7209cc8211..e386ad2cc1 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -361,8 +361,6 @@ int power_init_board(void) struct udevice *dev; int reg, ret; - puts("PMIC: "); - ret = pmic_get("pfuze100@8", &dev); if (ret < 0) { printf("pmic_get() ret %d\n", ret); -- 2.17.1

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Re: Pull request: u-boot-net.git master
by Tom Rini 10 Dec '19

10 Dec '19

On Mon, Dec 09, 2019 at 09:51:32AM -0600, Joe Hershberger wrote: > Hi Tom, > > Between dropping the superceeded atheros series and applying your nfs trim patch, things appear to be all good. > > Passed testing at https://travis-ci.org/jhershbe/u-boot/builds/622465407 > > The following changes since commit b38c3a641fc01fcd4eda5fa107ae3c247baa0196: > > Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86 (2019-12-08 10:51:00 -0500) > > are available in the git repository at: > > https://gitlab.denx.de/u-boot/custodians/u-boot-net.git master > > for you to fetch changes up to 2c4e067d493d031d1267eea1c635d1eab93ce8f7: > > cmd: pxe: Increase maximum path length (2019-12-09 09:49:48 -0600) > > ---------------------------------------------------------------- > Alex Marginean (18): > include: phy: define XFI and USXGMII interface types > include: phy: add data field for private driver data > drivers: net: aquantia: use XFI, USXGMII interface types > drivers: net: aquantia: add PHY generation information > drivers: net: aquantia: set up SI protocol based on interface type > drivers: net: aquantia: set MDI reversal based on DT property > drivers: net: aquantia: set SMBus addr based on DT property > drivers: net: aquantia: check system interface too when checking for link up > doc: bindings: add bindings document for PHY nodes > doc: bindings: Aquantia PHY node binding > drivers: net: fsl_enetc: use XFI, USXGMII interface type macros > net: mdio-uclass: rename arguments of dm_mdio_phy_connect for clarity > net: mdio-uclass: add dm_eth_phy_connect helper function > drivers: net: fsl_enetc: use the new MDIO DM helper functions > drivers: net: fsl_enetc: Add 2.5Gbps to supported link speeds > drivers: net: fsl_enetc: move PCS and PHY config to probe > drivers: net: fsl_enetc_mdio: return with time-out if HW is stuck > drivers: net: fsl_enetc: register internal MDIO bus > > Anatolij Gustschin (5): > net: phy: mv88e61xx: rework to enable detection of 88E6071 devices > net: phy: mv88e61xx: add CPU port parameter init for 88E6071 > net: phy: mv88E61xx: fix ENERGY_DET init for mv88E6071 > net: phy: mv88e61xx: register phy_driver struct for 88E6071 > net: phy: fix switch vendor name > > Andre Przywara (1): > net: tftp: Fix too small block size > > Ben Wolsieffer (1): > cmd: pxe: Increase maximum path length > > Bin Meng (1): > net: tftp: Fix tftp store address check in store_block() > > Cédric Le Goater (1): > net: ftgmac100: align RX/TX descriptors on ARCH_DMA_MINALIGN > > Florin Chiculita (1): > net: phy: aquantia: wait for phy init sequence to finish > > Grygorii Strashko (8): > net: phy: ti: rename ti.c to dp83867.c > net: phy: dp83867: move static initialization to .probe() > dt-bindings: phy: dp83867: Add documentation for disabling clock output > net: phy: dp83867: Add ability to disable output clock > net: phy: dp83867: rework delay rgmii delay handling > net: phy: dp83867: io impedance is not dependent on RGMII delay > net: phy: dp83867: refactor rgmii configuration > arm: dts: k3-am654-base-board-u-boot: change cpsw2g interface mode to rgmii-rxid > > Grzegorz Jaszczyk (1): > net: mvpp2: mark phy as invalid in case of missing appropriate driver > > Heinrich Schuchardt (1): > net: avoid address-of-packed-member error > > Joe Hershberger (3): > net: Always build the string_to_enetaddr() helper > net: Improve documentation for string_to_ip() > lib: Always build support for formatting MAC and IP address > > Josef Holzmayr (2): > net: macb: explicitly pass phy_adr to mdio read and write > net: macb: let miiphy_read/_write pass arbitrary addresses > > Michael Walle (1): > net: eth-uclass: ignore unavailable devices > > Nevo Hed (3): > arm: dts: armada-cp110-*dtsi: add xmdio nodes > net: mvpp2: use new MVMDIO driver > net: mvpp2: MVPP2 now needs MVMDIO > > Nicolas Ferre (1): > net: phy: micrel: make sure the factory test bit is cleared > > Priyanka Jain (1): > net/phy: Fix phy_connect() for phy addr 0 > > Ramon Fried (1): > cmd: mdio/mii: add Kconfig help and allow break dependency > > Stefan Chulski (1): > net: mvpp2x: fix traffic stuck after PHY start error > > Stefan Roese (1): > net: phy: Increase link up delay in genphy_update_link() > > Thierry Reding (1): > net: rtl8169: Support RTL-8168c/8111c > > Tom Rini (1): > net: nfs: Only link in NFS code outside of SPL builds > > Vignesh Raghavendra (6): > dma: Introduce dma_get_cfg() interface > dma: ti: k3-udma: Implement dma_get_cfg() interface > net: ti: am65-cpsw-nuss: Rework RX flow ID handling > net: ti: am65-cpsw-nuss: Add new compatible for J721e > arm: dts: k3-j721e-common-proc-board: Add DMA and CPSW related DT nodes > configs: j721e_evm_a72_defconfig: Enable DMA and Ethernet > > arch/arm/dts/armada-cp110-master.dtsi | 9 + > arch/arm/dts/armada-cp110-slave.dtsi | 9 + > arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 3 +- > .../arm/dts/k3-j721e-common-proc-board-u-boot.dtsi | 238 ++++++++++++++++++++ > arch/arm/mach-tegra/cboot.c | 2 +- > board/renesas/sh7752evb/sh7752evb.c | 2 +- > board/renesas/sh7753evb/sh7753evb.c | 2 +- > board/renesas/sh7757lcr/sh7757lcr.c | 4 +- > cmd/Kconfig | 18 +- > cmd/Makefile | 4 +- > cmd/ethsw.c | 2 +- > cmd/nvedit.c | 2 +- > cmd/pxe_utils.c | 2 +- > configs/j721e_evm_a72_defconfig | 8 + > doc/README.enetaddr | 4 +- > doc/device-tree-bindings/net/aquantia-phy.txt | 25 +++ > doc/device-tree-bindings/net/phy.txt | 24 ++ > doc/device-tree-bindings/net/ti,dp83867.txt | 6 +- > drivers/dma/dma-uclass.c | 12 + > drivers/dma/ti/k3-udma.c | 29 +++ > drivers/net/Kconfig | 2 + > drivers/net/fsl_enetc.c | 86 +++----- > drivers/net/fsl_enetc.h | 1 + > drivers/net/fsl_enetc_mdio.c | 7 +- > drivers/net/ftgmac100.c | 16 +- > drivers/net/macb.c | 39 ++-- > drivers/net/mvpp2.c | 241 +++++--------------- > drivers/net/phy/Kconfig | 2 +- > drivers/net/phy/Makefile | 2 +- > drivers/net/phy/aquantia.c | 241 ++++++++++++++++++-- > drivers/net/phy/{ti.c => dp83867.c} | 243 ++++++++++++++------- > drivers/net/phy/micrel_ksz8xxx.c | 21 +- > drivers/net/phy/mv88e61xx.c | 226 +++++++++++++++---- > drivers/net/phy/phy.c | 6 +- > drivers/net/rtl8169.c | 1 + > drivers/net/ti/am65-cpsw-nuss.c | 16 +- > include/dma-uclass.h | 11 + > include/dma.h | 12 + > include/dt-bindings/net/ti-dp83867.h | 3 +- > include/linux/soc/ti/ti-udma.h | 19 ++ > include/miiphy.h | 18 +- > include/net.h | 34 +-- > include/phy.h | 3 + > include/phy_interface.h | 4 + > lib/net_utils.c | 15 ++ > lib/vsprintf.c | 4 - > net/Kconfig | 2 +- > net/eth-uclass.c | 19 +- > net/eth_legacy.c | 2 +- > net/mdio-uclass.c | 100 ++++++++- > net/net.c | 36 +-- > net/tftp.c | 7 +- > 52 files changed, 1316 insertions(+), 528 deletions(-) > create mode 100644 doc/device-tree-bindings/net/aquantia-phy.txt > create mode 100644 doc/device-tree-bindings/net/phy.txt > rename drivers/net/phy/{ti.c => dp83867.c} (63%) I've reviewed this and tested it locally and things are OK. First, are you sure that a month out from release we should still take this large of a set of changes to master? Second, is there anything we can do about the growth of 'struct phy' ? We have some boards with a few possible PHY drivers and in turn a number of PHY drivers and it's a non-trivial growth to support this field. Thanks! -- Tom

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[PATCH 1/2] wandboard: Fix the the DM_PMIC conversion
by Fabio Estevam 10 Dec '19

10 Dec '19

Commit ec837c82d709 ("imx6: wandboard: convert to DM_PMIC") caused the following pmic_get() error: CPU: Freescale i.MX6QP rev1.0 at 792 MHz Reset cause: POR DRAM: 2 GiB PMIC: pmic_get() ret -19 ... and since the PMIC presence is used to determine the board D1 revision, the following error is seen when booting a board rev D1: WARNING: Could not determine dtb to use and the kernel does not boot at all. Fix the regression by passing "pfuze100@8" as the correct parameter to the pmic_get() function in the DM case. Fixes: ec837c82d709 ("imx6: wandboard: convert to DM_PMIC") Signed-off-by: Fabio Estevam <festevam(a)gmail.com> --- board/wandboard/wandboard.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index 6c1e4ef27d..b2f961a7f0 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -363,7 +363,7 @@ int power_init_board(void) puts("PMIC: "); - ret = pmic_get("pfuze100", &dev); + ret = pmic_get("pfuze100@8", &dev); if (ret < 0) { printf("pmic_get() ret %d\n", ret); return 0; -- 2.17.1

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[PATCH 1/4] serial: n16550: Support run-time configuration
by Simon Glass 10 Dec '19

10 Dec '19

At present this driver uses an assortment of CONFIG options to control how it accesses the hardware. This is painful for platforms that are supposed to be controlled by a device tree or a previous-stage bootloader. Add a new CONFIG option to enable fully dynamic configuration. This controls register spacing, size, offset and endianness. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- drivers/serial/Kconfig | 20 ++++++++++++++ drivers/serial/ns16550.c | 57 ++++++++++++++++++++++++++++++++++------ include/ns16550.h | 13 +++++++++ 3 files changed, 82 insertions(+), 8 deletions(-) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index d36a0108ea..50710ab998 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -598,6 +598,26 @@ config SYS_NS16550 be used. It can be a constant or a function to get clock, eg, get_serial_clock(). +config NS16550_DYNAMIC + bool "Allow NS16550 to be configured at runtime" + default y if SYS_COREBOOT + help + Enable this option to allow device-tree control of the driver. + + Normally this driver is controlled by the following options: + + CONFIG_SYS_NS16550_PORT_MAPPED - indicates that port I/O is used for + access. If not enabled, then the UART is memory-mapped. + CONFIG_SYS_NS16550_MEM32 - if memory-mapped, indicates that 32-bit + access should be used (instead of 8-bit) + CONFIG_SYS_NS16550_REG_SIZE - indicates endianness. If positive, + big-endian access is used. If negative, little-endian is used. + + It is not good practive for a driver to be statically configured, + since it prevents the same driver being used for different types of + UARTs in a system. This option avoids this problem at the cost of a + slightly increased code size. + config INTEL_MID_SERIAL bool "Intel MID platform UART support" depends on DM_SERIAL && OF_CONTROL diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 754b6e9921..96c4471efd 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -92,19 +92,57 @@ static inline int serial_in_shift(void *addr, int shift) #define CONFIG_SYS_NS16550_CLK 0 #endif +static void serial_out_dynamic(struct ns16550_platdata *plat, u8 *addr, + int value) +{ + if (plat->flags & NS16550_FLAG_BE) { + if (plat->reg_width == 1) + writeb(value, addr + (1 << plat->reg_shift) - 1); + else if (plat->flags & NS16550_FLAG_IO) + out_be32(addr, value); + else + writel(value, addr); + } else { + if (plat->reg_width == 1) + writeb(value, addr); + else if (plat->flags & NS16550_FLAG_IO) + out_le32(addr, value); + else + writel(value, addr); + } +} + +static int serial_in_dynamic(struct ns16550_platdata *plat, u8 *addr) +{ + if (plat->flags & NS16550_FLAG_BE) { + if (plat->reg_width == 1) + return readb(addr + (1 << plat->reg_shift) - 1); + else if (plat->flags & NS16550_FLAG_IO) + return in_be32(addr); + else + return readl(addr); + } else { + if (plat->reg_width == 1) + return readb(addr); + else if (plat->flags & NS16550_FLAG_IO) + return in_le32(addr); + else + return readl(addr); + } +} + static void ns16550_writeb(NS16550_t port, int offset, int value) { struct ns16550_platdata *plat = port->plat; unsigned char *addr; offset *= 1 << plat->reg_shift; - addr = (unsigned char *)plat->base + offset; + addr = (unsigned char *)plat->base + offset + plat->reg_offset; - /* - * As far as we know it doesn't make sense to support selection of - * these options at run-time, so use the existing CONFIG options. - */ - serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value); + if (IS_ENABLED(CONFIG_NS16550_DYNAMIC)) + serial_out_dynamic(plat, addr, value); + else + serial_out_shift(addr, plat->reg_shift, value); } static int ns16550_readb(NS16550_t port, int offset) @@ -113,9 +151,12 @@ static int ns16550_readb(NS16550_t port, int offset) unsigned char *addr; offset *= 1 << plat->reg_shift; - addr = (unsigned char *)plat->base + offset; + addr = (unsigned char *)plat->base + offset + plat->reg_offset; - return serial_in_shift(addr + plat->reg_offset, plat->reg_shift); + if (IS_ENABLED(CONFIG_NS16550_DYNAMIC)) + return serial_in_dynamic(plat, addr); + else + return serial_in_shift(addr, plat->reg_shift); } static u32 ns16550_getfcr(NS16550_t port) diff --git a/include/ns16550.h b/include/ns16550.h index 701efeea85..ba9b71962d 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -31,6 +31,9 @@ #define CONFIG_SYS_NS16550_REG_SIZE (-1) #endif +#ifdef CONFIG_NS16550_DYNAMIC +#define UART_REG(x) unsigned char x +#else #if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0) #error "Please define NS16550 registers size." #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_DM_SERIAL) @@ -44,6 +47,12 @@ unsigned char x; \ unsigned char postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE - 1]; #endif +#endif /* CONFIG_NS16550_DYNAMIC */ + +enum ns16550_flags { + NS16550_FLAG_IO = 1 << 0, /* Use I/O access (else mem-mapped) */ + NS16550_FLAG_BE = 1 << 1, /* Use big-endian access (else little) */ +}; /** * struct ns16550_platdata - information about a NS16550 port @@ -51,7 +60,10 @@ * @base: Base register address * @reg_width: IO accesses size of registers (in bytes) * @reg_shift: Shift size of registers (0=byte, 1=16bit, 2=32bit...) + * @reg_offset: Offset to start of registers * @clock: UART base clock speed in Hz + * @fcr: Offset of FCR register (normally UART_FCR_DEFVAL) + * @flags: A few flags (enum ns16550_flags) * @bdf: PCI slot/function (pci_dev_t) */ struct ns16550_platdata { @@ -61,6 +73,7 @@ struct ns16550_platdata { int reg_offset; int clock; u32 fcr; + int flags; #if defined(CONFIG_PCI) && defined(CONFIG_SPL) int bdf; #endif -- 2.24.0.393.g34dc348eaf-goog

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[PATCH] cros_ec: use uint instead of uint8_t for cmd param
by Michael Auchter 09 Dec '19

09 Dec '19

Chromium EC commands can be up to 16-bits, so using a uint8_t here can cause truncation. Update to use a uint instead. It looks like this should likely have been done as a part of 9fea76f5d30264dc08ac591a7a89427b8441555b, but this function was skipped for some reason. Signed-off-by: Michael Auchter <michael.auchter(a)ni.com> Cc: Simon Glass <sjg(a)chromium.org> --- drivers/misc/cros_ec.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c index 3b6370a6d5..3332c1c8a5 100644 --- a/drivers/misc/cros_ec.c +++ b/drivers/misc/cros_ec.c @@ -316,7 +316,7 @@ static int send_command(struct cros_ec_dev *dev, uint cmd, int cmd_version, * @param din_len Maximum size of response in bytes * @return number of bytes in response, or -ve on error */ -static int ec_command_inptr(struct udevice *dev, uint8_t cmd, +static int ec_command_inptr(struct udevice *dev, uint cmd, int cmd_version, const void *dout, int dout_len, uint8_t **dinp, int din_len) { -- 2.23.0

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[U-Boot] [PATCH 0/9] phy: atheros: cleanup and device tree bindings
by Michael Walle 09 Dec '19

09 Dec '19

This series cleans up the Atheros PHY AR803x PHY driver and adds a device tree binding for the most commonly used PHY settings like clock output. If you're a board maintainer you're getting this mail because you probably use an AR803x PHY on your board. Please have a look at your board specific code and see if you can use the device tree bindings instead. Let me know, if something is missing. Michael Walle (9): phy: atheros: introduce debug read and write functions phy: atheros: move delay config to common function phy: atheros: ar8035: remove extra delay config phy: atheros: ar8035: use phy_{read|write}_mmd() phy: atheros: don't overwrite debug register values phy: atheros: fix delay configuration phy: atheros: Add device tree bindings and config phy: atheros: ar8035: remove static clock config phy: atheros: consolidate {ar8031|ar8035}_config() doc/device-tree-bindings/net/phy/atheros.txt | 22 ++ drivers/net/phy/atheros.c | 262 +++++++++++++++---- 2 files changed, 240 insertions(+), 44 deletions(-) create mode 100644 doc/device-tree-bindings/net/phy/atheros.txt Cc: Joe Hershberger <joe.hershberger(a)ni.com> Cc: Fabio Estevam <fabio.estevam(a)nxp.com> Cc: Adam Ford <aford173(a)gmail.com> Cc: Otavio Salvador <otavio(a)ossystems.com.br> Cc: Ian Ray <ian.ray(a)ge.com> Cc: Jason Liu <jason.hui.liu(a)nxp.com> Cc: Ye Li <ye.li(a)nxp.com> Cc: Uri Mashiach <uri.mashiach(a)compulab.co.il> Cc: Nikita Kiryanov <nikita(a)compulab.co.il> Cc: Lukasz Majewski <lukma(a)denx.de> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: Vanessa Maegima <vanessa.maegima(a)nxp.com> Cc: Eric Bénard <eric(a)eukrea.com> -- 2.20.1

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