December 2019 - U-Boot

rk3328-firefly ddr4 tpl init
by Peter Geis 13 Dec '19

13 Dec '19

Good Evening, I am trying to get TPL/SPL working on the rk3328-firefly ddr4 4gb board. I've pulled the ddr4 dtsi from the rockchip u-boot repository [0]. Unfortunately I cannot get the ddr4 to detect correctly. With the u-boot tpl, I get the following: U-Boot TPL 2020.01-rc3-00072-g1a1bea82b2-dirty (Dec 04 2019 - 08:33:54) data training error row errordata training error DDR4, 333MHz BW=16 Col=10 Bk=4 BG=2 CS0 Row=17 CS=1 Die BW=16 Size=2048MB With the rk3328_ddr_333MHz_v1.16.bin, I get the following: DDR version 1.16 20190528 ID:0x805 N In DDR4 333MHz Bus Width=32 Col=10 Bank=4 Bank Group=2 Row=16/16 CS=2 Die Bus-Width=16 Size=4096MB ddrconfig:19 OUT [0] https://github.com/rockchip-linux/u-boot/blob/next-dev/arch/arm/dts/rk3328-…

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[PATCH] rockchip: px30-firefly add standalone dts
by Kever Yang 13 Dec '19

13 Dec '19

Firefly Core-PX30-JD4 use UART2M1 while PX30 evb using UART2M0, the U-Boot proper will use the dts setting to do the IOMUX init, and a separate dts is needed for px30-firefly. Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> --- arch/arm/dts/Makefile | 3 +- arch/arm/dts/px30-firefly-u-boot.dtsi | 84 ++++ arch/arm/dts/px30-firefly.dts | 531 ++++++++++++++++++++++++++ configs/firefly-px30_defconfig | 4 +- 4 files changed, 619 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/px30-firefly-u-boot.dtsi create mode 100644 arch/arm/dts/px30-firefly.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 3dc9c4d41c..68cad331d8 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -68,7 +68,8 @@ dtb-$(CONFIG_ARCH_OWL) += \ bubblegum_96.dtb dtb-$(CONFIG_ROCKCHIP_PX30) += \ - px30-evb.dtb + px30-evb.dtb \ + px30-firefly.dtb dtb-$(CONFIG_ROCKCHIP_RK3036) += \ rk3036-sdk.dtb diff --git a/arch/arm/dts/px30-firefly-u-boot.dtsi b/arch/arm/dts/px30-firefly-u-boot.dtsi new file mode 100644 index 0000000000..bb782b4e2d --- /dev/null +++ b/arch/arm/dts/px30-firefly-u-boot.dtsi @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * (C) Copyright 2019 Rockchip Electronics Co., Ltd + */ + +/ { + aliases { + mmc0 = &emmc; + mmc1 = &sdmmc; + }; + + chosen { + u-boot,spl-boot-order = &emmc, &sdmmc; + }; +}; + +&dmc { + u-boot,dm-pre-reloc; +}; + +&uart2 { + clock-frequency = <24000000>; + u-boot,dm-pre-reloc; +}; + +&uart5 { + clock-frequency = <24000000>; + u-boot,dm-pre-reloc; +}; + +&sdmmc { + u-boot,dm-pre-reloc; + + /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ + u-boot,spl-fifo-mode; +}; + +&emmc { + u-boot,dm-pre-reloc; + + /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ + u-boot,spl-fifo-mode; +}; + +&grf { + u-boot,dm-pre-reloc; +}; + +&pmugrf { + u-boot,dm-pre-reloc; +}; + +&xin24m { + u-boot,dm-pre-reloc; +}; + +&cru { + u-boot,dm-pre-reloc; +}; + +&pmucru { + u-boot,dm-pre-reloc; +}; + +&saradc { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&gpio0 { + u-boot,dm-pre-reloc; +}; + +&gpio1 { + u-boot,dm-pre-reloc; +}; + +&gpio2 { + u-boot,dm-pre-reloc; +}; + +&gpio3 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/px30-firefly.dts b/arch/arm/dts/px30-firefly.dts new file mode 100644 index 0000000000..c0a8e3009a --- /dev/null +++ b/arch/arm/dts/px30-firefly.dts @@ -0,0 +1,531 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd + */ + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include "px30.dtsi" + +/ { + model = "Firefly Core-PX30-JD4"; + compatible = "rockchip,px30-firefly", "rockchip,px30"; + + chosen { + stdout-path = "serial2:115200n8"; + }; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 2>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + esc-key { + label = "esc"; + linux,code = <KEY_ESC>; + press-threshold-microvolt = <1310000>; + }; + + home-key { + label = "home"; + linux,code = <KEY_HOME>; + press-threshold-microvolt = <624000>; + }; + + menu-key { + label = "menu"; + linux,code = <KEY_MENU>; + press-threshold-microvolt = <987000>; + }; + + vol-down-key { + label = "volume down"; + linux,code = <KEY_VOLUMEDOWN>; + press-threshold-microvolt = <300000>; + }; + + vol-up-key { + label = "volume up"; + linux,code = <KEY_VOLUMEUP>; + press-threshold-microvolt = <17000>; + }; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm1 0 25000 0>; + power-supply = <&vcc3v3_lcd>; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + pinctrl-0 = <&emmc_reset>; + pinctrl-names = "default"; + reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */ + }; + + vcc5v0_sys: vccsys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&cpu1 { + cpu-supply = <&vdd_arm>; +}; + +&cpu2 { + cpu-supply = <&vdd_arm>; +}; + +&cpu3 { + cpu-supply = <&vdd_arm>; +}; + +&display_subsystem { + status = "okay"; +}; + +&dsi { + status = "okay"; + + ports { + mipi_out: port@1 { + reg = <1>; + + mipi_out_panel: endpoint { + remote-endpoint = <&mipi_in_panel>; + }; + }; + }; + + panel@0 { + compatible = "sitronix,st7703"; + reg = <0>; + backlight = <&backlight>; + iovcc-supply = <&vcc_1v8>; + vci-supply = <&vcc3v3_lcd>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + mipi_in_panel: endpoint { + remote-endpoint = <&mipi_out_panel>; + }; + }; + }; + }; +}; + +&dsi_dphy { + status = "okay"; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + non-removable; + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vcc_3v0>; + vqmmc-supply = <&vccio_flash>; + status = "okay"; +}; + +&gmac { + clock_in_out = "output"; + phy-supply = <&vcc_rmii>; + snps,reset-gpio = <&gpio2 13 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 50000 50000>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <0>; + clock-output-names = "xin32k"; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc5v0_sys>; + + regulators { + vdd_log: DCDC_REG1 { + regulator-name = "vdd_log"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vdd_arm: DCDC_REG2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_3v0: vcc_rmii: DCDC_REG4 { + regulator-name = "vcc_3v0"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc3v3_sys: DCDC_REG5 { + regulator-name = "vcc3v3_sys"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_1v0: LDO_REG1 { + regulator-name = "vcc_1v0"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_1v8: vccio_flash: vccio_sdio: LDO_REG2 { + regulator-name = "vcc_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_1v0: LDO_REG3 { + regulator-name = "vdd_1v0"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc3v0_pmu: LDO_REG4 { + regulator-name = "vcc3v0_pmu"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_sd: LDO_REG6 { + regulator-name = "vcc_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc2v8_dvp: LDO_REG7 { + regulator-name = "vcc2v8_dvp"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <2800000>; + }; + }; + + vcc1v8_dvp: LDO_REG8 { + regulator-name = "vcc1v8_dvp"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc1v5_dvp: LDO_REG9 { + regulator-name = "vcc1v5_dvp"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <1500000>; + }; + }; + + vcc3v3_lcd: SWITCH_REG1 { + regulator-name = "vcc3v3_lcd"; + regulator-boot-on; + }; + + vcc5v0_host: SWITCH_REG2 { + regulator-name = "vcc5v0_host"; + regulator-always-on; + regulator-boot-on; + }; + }; + }; +}; + +&i2s1_2ch { + status = "okay"; +}; + +&io_domains { + status = "okay"; + + vccio1-supply = <&vccio_sdio>; + vccio2-supply = <&vccio_sd>; + vccio3-supply = <&vcc_3v0>; + vccio4-supply = <&vcc3v0_pmu>; + vccio5-supply = <&vcc_3v0>; + vccio6-supply = <&vccio_flash>; +}; + +&pinctrl { + headphone { + hp_det: hp-det { + rockchip,pins = + <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + emmc { + emmc_reset: emmc-reset { + rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int: pmic_int { + rockchip,pins = + <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + soc_slppin_gpio: soc_slppin_gpio { + rockchip,pins = + <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; + }; + + soc_slppin_slp: soc_slppin_slp { + rockchip,pins = + <0 RK_PA4 1 &pcfg_pull_none>; + }; + + soc_slppin_rst: soc_slppin_rst { + rockchip,pins = + <0 RK_PA4 2 &pcfg_pull_none>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = + <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pmu_io_domains { + status = "okay"; + + pmuio1-supply = <&vcc3v0_pmu>; + pmuio2-supply = <&vcc3v0_pmu>; +}; + +&pwm1 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc_1v8>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <800>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + vmmc-supply = <&vcc_sd>; + vqmmc-supply = <&vccio_sd>; +}; + +&sdio { + bus-width = <4>; + cap-sd-highspeed; + keep-power-in-suspend; + non-removable; + mmc-pwrseq = <&sdio_pwrseq>; + sd-uhs-sdr104; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_xfer &uart1_cts>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2m1_xfer>; + status = "okay"; +}; + +&uart5 { + status = "okay"; +}; + +&usb20_otg { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index 5171bf82ee..e24f1cf8c8 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -20,7 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y # CONFIG_CONSOLE_MUX is not set -CONFIG_DEFAULT_FDT_FILE="rockchip/px30-evb.dtb" +CONFIG_DEFAULT_FDT_FILE="rockchip/px30-firefly.dtb" CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -53,7 +53,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_DEFAULT_DEVICE_TREE="px30-evb" +CONFIG_DEFAULT_DEVICE_TREE="px30-firefly" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -- 2.17.1

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[PATCH] configs: socfpga: fix building Stratix10 and Agilex
by simon.k.r.goldschmidt＠gmail.com 13 Dec '19

13 Dec '19

From: Simon Goldschmidt <simon.k.r.goldschmidt(a)gmail.com> This fixes a merge error that accidentally left CONFIG_MTD_DEVICE active by removing it from the config file. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt(a)gmail.com> --- include/configs/socfpga_soc64_common.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 4b27483788..4afadafd35 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -62,7 +62,6 @@ /*#define CONFIG_ENV_IS_IN_SPI_FLASH*/ #ifndef CONFIG_SPL_BUILD -#define CONFIG_MTD_DEVICE #define CONFIG_MTD_PARTITIONS #define MTDIDS_DEFAULT "nor0=ff705000.spi.0" #endif /* CONFIG_SPL_BUILD */ -- 2.11.0

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[PATCH v2 0/3] mkimage/rockchip: support packing optional second level boot-loader
by Jeffy Chen 13 Dec '19

13 Dec '19

When enabling back-to-bootrom, the bootrom would continue to load the second level boot-loader. And currently we are packing it by appending the generated image manually (with a predefined max size): ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \ firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ cat firefly-rk3288/u-boot-dtb.bin >> out This series add support of packing optional second level loader with mkimage tool: ./tools/mkimage -n rk3399 -T rksd -d \ rk3399_ddr_800MHz_v1.24.bin:rk3399_miniloader_v1.19.bin out Changes in v2: Do rc4 encode for boot data when needed as well. Jeffy Chen (3): rockchip: mkimage: support packing optional second level boot-loader doc: rockchip: document packing second level loader with mkimage rockchip: mkimage: fix wrong range of rc4 encoding for boot image doc/README.rockchip | 11 +++ tools/imagetool.h | 1 + tools/mkimage.c | 8 ++ tools/rkcommon.c | 245 +++++++++++++++++++++++++++++++++++++++++++--------- tools/rkcommon.h | 18 ++-- tools/rkimage.c | 2 +- tools/rksd.c | 35 +------- tools/rkspi.c | 42 +++------ 8 files changed, 245 insertions(+), 117 deletions(-) -- 2.11.0

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[PATCH] rockchip: firefly-px30: Fix the MACRO for CONFIG_DEBUG_UART2_CHANNEL
by Kever Yang 13 Dec '19

13 Dec '19

The Macro has update without update the defconfig, update the defconfig to make Mcaro correct. Fixes: ec4fafdf1f ("rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to...") Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> --- configs/firefly-px30_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index fa4ac75b09..5171bf82ee 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -32,7 +32,7 @@ CONFIG_SPL_CRC32_SUPPORT=y CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set # CONFIG_CMD_BOOTD is not set -CONFIG_DEBUG_UART2_CHANNEL=1 +CONFIG_DEBUG_UART_CHANNEL=1 # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set -- 2.17.1

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DFU and UBI
by Guillermo Rodriguez Garcia 12 Dec '19

12 Dec '19

Hi all, I am trying to flash an UBI image using uboot's DFU support and have found that I need to pass the --space-fixup arg to mkfs.ubifs; otherwise I start getting all sorts of ECC errors and eventually cannot boot. Is this expected? I see that the DFU implementation already has some stuff in place to handle UBI images (https://github.com/u-boot/u-boot/commit/815c30b2b6f1920cfdb9d6c10eb13591293…). Should this be working without --space-fixup ? TIA, Guillermo Rodriguez Garcia guille.rodriguez(a)gmail.com

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Re: [U-Boot-Board-Maintainers] Raspberry pi 4 - u-boot - genet / scb
by Andreas Färber 12 Dec '19

12 Dec '19

Sascha, Am 07.12.19 um 07:23 schrieb Sascha Dewald: > Hello, > > is there any progress yet ? There is absolutely no reason to annoy all the board maintainers on this mailing list with nagging about an unimplemented driver for one board! Especially not with HTML mail and top-posting!!! Please take this discussion to the u-boot mailing list (Reply-to set). Regards, Andreas > Am Fr., 22. Nov. 2019 um 00:27 Uhr schrieb André Przywara > <andre.przywara(a)arm.com <mailto:andre.przywara@arm.com>>: > > On 21/11/2019 21:46, Sascha Dewald wrote: > > Hi, > > > could someone give me a summary which is missing in u-boot and what > > needs to be ported ? > > The PHY is pretty much standard and already supported, as far as I can > see, the MAC is not. > > > I found other broadcom drivers, which are already in u-boot. > > The RPi4 uses a Broadcom GENETv5 IP (with a slight tweak). The Linux > driver is quite sophisticated: it supports older revisions (v1..v4), > makes clever use of multiple priority queues and is of course fully > interrupt driven, including napi shortcuts, also enjoys all the glory of > the full Linux driver framework galore. > For U-Boot we can get away with a MUCH simpler driver. Amit and I spent > a while understanding the hardware based on the Linux driver, and Amit > saw the first ARP packet from U-Boot on his laptop yesterday. He is > currently working on the recv() function. > > > How difficult is it, to strip the drivers down, from the linux > kernel to > > work with u-boot? > > As mentioned, stripping the driver down (as in copying and editing) is > not a good idea, but the basic driver is already somewhat working > (probing, instantiation, sending packets), so we are not far away. > > If I could ask for just for a few more days of patience, then I am > looking forward for your help with review and testing! > > Cheers, > Andre > > > Am Mi., 20. Nov. 2019 um 12:21 Uhr schrieb Andre Przywara > > <andre.przywara(a)arm.com <mailto:andre.przywara@arm.com> > <mailto:andre.przywara@arm.com <mailto:andre.przywara@arm.com>>>: > > > > On Wed, 20 Nov 2019 12:13:55 +0100 > > Matthias Brugger <mbrugger(a)suse.com <mailto:mbrugger@suse.com> > <mailto:mbrugger@suse.com <mailto:mbrugger@suse.com>>> wrote: > > > > Hi, > > > > > Adding Andre as he helps in the effort to port the driver. More > > comments inline. > > > > > > On 19/11/2019 22:46, Heinrich Schuchardt wrote: > > > > On 11/19/19 9:48 PM, Simon Glass wrote: > > > >> Hi Sascha, > > > >> > > > >> On Tue, 19 Nov 2019 at 10:10, Sascha Dewald > > <sascha.dewald(a)gmail.com <mailto:sascha.dewald@gmail.com> > <mailto:sascha.dewald@gmail.com <mailto:sascha.dewald@gmail.com>>> > wrote: > > > >>> > > > >>> Hi Simon, > > > >>> > > > >>> it uses bcmgenet. > > > >>> > > > >>> Below some information from "hwinfo" and "dmesg" > > > >>> > > > >> > > > >> OK, well I think this is in linux as > > drivers/net/ethernet/broadcom/genet > > > >> > > > >> I'm not sure about the PHY but it looks like there is no > driver for > > > >> genet in U-Boot. I suggest poriting it over. > > > > Amit (CC:ed) is working on that. That is still quite rough and not > > really working yet, but as of yesterday he saw the first (empty) > > packets on the line at least. > > I would assume we get something working still this year. > > > > > > In linux-next/next-20191119 > > > > arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dtb > > > > there is no network device. > > > > > > > Florian send a new pull request, I think yesterday which > adds the > > genet driver > > > to RPi4. > > > > I found the burst length quirk together with the new compatible > > string in David's net-next/master two days ago. > > > > > > On Raspbian you can find for RPi4: > > > > > > > > compatible = "brcm,genet-v5" > > > > relating to Linux > drivers/net/ethernet/broadcom/genet/bcmgenet.c > > > > CONFIG_BCMGENET "Broadcom GENET internal MAC support" > > > > > > > > > > RPi4 is a special case as DMA burst size is different from plain > > genet-v5 > > > driver. But that might be of no relevance for U-Boot. > > > > Yeah, since there is no other user, we could just go ahead and fix > > the smaller burst length of 8 in U-Boot. I guess we don't care > about > > the performance impact that has. > > > > Cheers, > > Andre. > > > > > > > > > compatible = "ethernet-phy-ieee802.3-c22"; > > > > relating to Linux drivers/of/of_mdio.c. > > > > CONFIG_OF_MDIO OpenFirmware MDIO bus (Ethernet PHY) accessors > > > > > > > > compatible = "brcm,genet-mdio-v5"; > > > > relating to Linux drivers/net/phy/mdio-bcm-unimac.c > > > > CONFIG_MDIO_BCM_UNIMAC "Broadcom UniMAC MDIO bus controller" > > > > > > > > So wouldn't we need all three drivers? > > > > > > > > Maybe Joe can tell us. > > > > > > > > Best regards > > > > > > > > Heinrich > > > > > > > > > > > >> > > > >> Regards, > > > >> Simon > > > >> _______________________________________________ > > > >> U-Boot-Board-Maintainers mailing list > > > >> U-Boot-Board-Maintainers(a)lists.denx.de > <mailto:U-Boot-Board-Maintainers@lists.denx.de> > > <mailto:U-Boot-Board-Maintainers@lists.denx.de > <mailto:U-Boot-Board-Maintainers@lists.denx.de>> > > > >> https://lists.denx.de/listinfo/u-boot-board-maintainers > > > >> > > > > > > > -- SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Felix Imendörffer HRB 36809 (AG Nürnberg)

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Please pull u-boot-dm/next to next branch
by Simon Glass 12 Dec '19

12 Dec '19

Hi Tom, This is my first attempt at sending a -next pull request. https://gitlab.denx.de/u-boot/custodians/u-boot-dm/pipelines/1608 The following changes since commit 520f9559020894950d4e962aba52220c8a1d6bfe: Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-riscv (2019-12-09 21:53:23 -0500) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-dm.git tags/dm-next-13dec19 for you to fetch changes up to b4f98b3b16ec513f7fa6b97ec49792a5e99ec165: cros_ec: use uint instead of uint8_t for cmd param (2019-12-10 21:11:31 -0700) ---------------------------------------------------------------- buildman improvements including toolchain environment feature sandbox unicode support in serial ---------------------------------------------------------------- Cristian Ciocaltea (1): buildman: Improve [make-flags] section parser to allow quoted strings Heinrich Schuchardt (2): sandbox: add missing compatible property in device tree serial: sandbox: support Unicode Michael Auchter (1): cros_ec: use uint instead of uint8_t for cmd param Simon Glass (5): test.py: Make search for autoconf.mk more permissive genboardcfg: Support a quiet mode buildman: Ask genboardscfg to be quiet buildman: Figure out boards before commits buildman: Add options to get the arch and toolchain info Tom Rini (1): buildman: Ignore blank lines during size checks arch/sandbox/dts/sandbox.dts | 1 + arch/sandbox/dts/sandbox64.dts | 1 + drivers/misc/cros_ec.c | 2 +- drivers/serial/sandbox.c | 2 +- test/py/conftest.py | 39 ++++++++++++++++++++++----------- tools/buildman/README | 3 +++ tools/buildman/builder.py | 3 ++- tools/buildman/cmdline.py | 4 ++++ tools/buildman/control.py | 96 +++++++++++++++++++++++++++++++++++++++++++++++++++++++--------------------------- tools/buildman/test.py | 18 ++++++++++++++++ tools/buildman/toolchain.py | 29 ++++++++++++++++++++++++- tools/genboardscfg.py | 10 ++++++--- 12 files changed, 158 insertions(+), 50 deletions(-) Regards, SImon

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[U-Boot] 答复: 答复: 答复: [PATCH 0/4] Make some changes to SDP
by Sherry Sun 12 Dec '19

12 Dec '19

Hi Angus, Hi Sherry, On Aug. 8, 2019 2:38 a.m., Sherry Sun <sherry.sun(a)nxp.com<mailto:sherry.sun@nxp.com>> wrote: Hi Angus, Sorry for the late reply. > -----邮件原件----- > 发件人: Angus Ainslie <angus(a)akkea.ca<mailto:angus@akkea.ca>> > 发送时间: 2019年8月2日 10:30 > 收件人: Peng Fan <peng.fan(a)nxp.com<mailto:peng.fan@nxp.com>> > 抄送: Sherry Sun <sherry.sun(a)nxp.com<mailto:sherry.sun@nxp.com>>; sbabic(a)denx.de<mailto:sbabic@denx.de>; > festevam(a)gmail.com<mailto:festevam@gmail.com>; lukma(a)denx.de<mailto:lukma@denx.de>; marex(a)denx.de<mailto:marex@denx.de>; > u-boot(a)lists.denx.de<mailto:u-boot@lists.denx.de>; dl-uboot-imx <uboot-imx(a)nxp.com<mailto:uboot-imx@nxp.com>> > 主题: Re: 答复: [U-Boot] [PATCH 0/4] Make some changes to SDP > > Hi Peng, > > On 2019-08-01 18:01, Peng Fan wrote: > > Angus, > > > >> Subject: Re: 答复: [U-Boot] [PATCH 0/4] Make some changes to SDP > >> > >> Hi Sherry, > >> > >> On 2019-07-31 19:56, Sherry Sun wrote: > >> > Hi Angus > >> > > >> >> > >> >> Hi Sherry, > >> >> > >> >> On 2019-07-17 18:40, sherry sun wrote: > >> >> > From: Sherry Sun <sherry.sun(a)nxp.com<mailto:sherry.sun@nxp.com>> > >> >> > > >> >> > This patchset adds: > >> >> > 1. Add usb_gadget_initialize() and usb_gadget_release() to > >> >> > initialize and release UDC during sdp download. > >> >> > 2. Add high speed endpoint descriptor for sdp. > >> >> > 3. Add a macro definition--CONFIG_SDP_LOADADDR as default sdp > >> >> > load address while SDP_WRITE and SDP_JUMP command addr is zero. > >> >> > > >> >> > Sherry Sun (4): > >> >> > imx: spl: Change USB boot device type > >> >> > SDP: use CONFIG_SDP_LOADADDR as default load address > >> >> > SDP: fix wrong usb request size and add high speed endpoint > >> >> > descriptor > >> >> > SDP: Call usb_gadget_initialize and usb_gadget_release to > >> >> > support UDC > >> >> > >> >> These changes look like like they target SDP on imx8. For imx8mq > >> >> is this all that is required to get SDP working with uuu or are > >> >> there additional changes required ? > >> >> > >> > > >> > The changes in patch 1/4 are target on both imx8 and imx8m. > >> > The rest three patches are target on all boards which used SDP. > >> > So for imx8mq, if your usb gadget driver is ready ,these changes > >> > are enough to get SDP working with UUU. > >> > > >> > >> I'm trying to use SDP on the imx8mq-evk but it doesn't look like it's > >> enabled there. Do you have patches to enable SDP on the imx8mq-evk , > >> even if they aren't ready to go upstream ? > > > > You could try downstream code, > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fsour > > > ce.codeaurora.org%2Fexternal%2Fimx%2Fuboot-imx%2F&data=02%7C01 > %7Cs > > > herry.sun%40nxp.com%7C6d63289fbb104168bce308d716f157c4%7C686ea1 > d3bc2b4 > > > c6fa92cd99c5c301635%7C0%7C0%7C637003098143081621&sdata=beh > 08%2Fv3f > > s8ZZPP29F1iVMfo3uNTWGf91SYYyak2GVU%3D&reserved=0 > > branch: imx_v2019.04_4.19.35_1.0.0 > > > > I already have SDP working with the vendor u-boot. I'm trying to switch to > mainline u-boot so I'm looking for mainline patches. > May I ask, is your usb gadget driver is working? Such as you can use it for fastboot or ums. >If I enable dwc3 gadget and DM for the SPL then I must start removing other SPL features to get it to fit in the 124k allocation. > >It sounds like you haven't tested this on the imx8mq-evk then ? Yes, I have not used imx8mq-evk yet. I will try to test it later. Best regards Sherry sun >Thanks >Angus Best regards Sherry sun > Thanks > Angus > > > Regards, > > Peng. > > > >> > >> Thanks > >> Angus > >> > >> > Best regards > >> > Sherry sun > >> > > >> >> Thanks > >> >> Angus > >> >> > >> >> > > >> >> > arch/arm/mach-imx/spl.c | 2 +- > >> >> > common/spl/spl_sdp.c | 4 ++++ > >> >> > drivers/usb/gadget/Kconfig | 4 ++++ > >> >> > drivers/usb/gadget/f_sdp.c | > >> >> > 39 > >> >> > +++++++++++++++++++++++++++++++++----- > >> >> > 4 files changed, 43 insertions(+), 6 deletions(-)

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s5p4418: friendlyarm nanopi2: add support
by pm.stefan 12 Dec '19

12 Dec '19

Hello, I just finished the migration of the friendlyARM U-Boot from https://github.com/friendlyarm/u-boot/tree/nanopi2-v2016.01 (for boards with s5p4418 SoC) to the current (official) U-Boot version because of a private project. For v2016.01 I have also made a working SPL (FriendlyARM U-Boot is using a closed source 2nd-bootloader). My plan is to migrate this also to the current U-Boot. Now, I need a value for "#define MACH_TYPE_S5P4418" in arch/arm/include/asm/mach-types.h. After this I will send the appropriate patches. Regards, Stefan

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