December 2019 - U-Boot

IMX Serial Downloader mode detection
by Igor Opaniuk 19 Dec '19

19 Dec '19

Hi, Currently I'm working on generalizing recovery mode handling, particularly making sure upon recovery mode (U-boot is loaded via Serial Downloader) detection the default U-Boot environment is used rather than the one stored in flash to avoid any bad side-effects. For the moment we're trying to do that in runtime instead of keeping two binaries of U-boot, where the first one uses default recovery, another one uses env from eMMC/NAND. For iMX8QM/QX Serial Downloader mode detection is done via MU (which currently exists and workins only in the downstream NXP U-boot fork) communication with SCFW (sc_misc_get_boot_dev() call etc). However, for MX6/MX7 series there no any unified way to do so, and the only way I saw in the downstream NXP U-boot is using some indirect checks (that don't definetely say that serial download mode was used to upload this instance of running U-boot) are used, like: 1. Reading value of SRC_SBMR1/SRC_SBMR2 2. Checking for the status of USB OTG PHY, if it was enabled before U-boot initialed usb stack (is_usbotg_phy_active() from arch/arm/mach-imx/spl.c NXP U-boot) etc. The question is: are there any other more proper ways to detect Serial Download mode? Thanks -- Best regards - Freundliche Grüsse - Meilleures salutations Igor Opaniuk mailto: igor.opaniuk(a)gmail.com skype: igor.opanyuk +380 (93) 836 40 67 http://ua.linkedin.com/in/iopaniuk

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Kindly need help debugging start of kernel
by Matthias Schoepfer 19 Dec '19

19 Dec '19

Hi! We have a Dragonboard 410c. We chainload u-boot from little kernel (lk), and from there the linux kernel obviously. All of it (not little kernel) is build within yocto / Openembedded. It will generate a fitImage, that we put into an ext4 partition, from there we bootm the stuff after loading fitImage into RAM. This basically works, *but* small changes (i.e. "random" changing a kernel config parameter, rebuild with slightly other toolchain) will lead to a failed boot, meaning, that we get no output whatsoever after Starting kernel ... Which puzzles me a lot, since I change only parameters, that should at least make the Kernel print its first lines. I suspect, that something goes wrong on initialization of the kernel. I do not expect that anyone can reproduce and fix the bug for me, but maybe, you can give me some hints how I can approach to debug this. I do not have a hardware debugger, so it is pretty much printk debugging... Thanks and Regards, Matthias -- Dr.-Ing. Matthias Schöpfer matthias.schoepfer(a)googlemail.com

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[PATCH 1/1] test/py: describe env__efi_loader_helloworld_file
by Heinrich Schuchardt 19 Dec '19

19 Dec '19

Describe the components of environment variable env__efi_loader_helloworld_file. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- test/py/tests/test_efi_loader.py | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/test/py/tests/test_efi_loader.py b/test/py/tests/test_efi_loader.py index d6b214f845..adf9d77452 100644 --- a/test/py/tests/test_efi_loader.py +++ b/test/py/tests/test_efi_loader.py @@ -43,9 +43,10 @@ env__net_static_env_vars = [ # Details regarding a file that may be read from a TFTP server. This variable # may be omitted or set to None if TFTP testing is not possible or desired. env__efi_loader_helloworld_file = { - 'fn': 'lib/efi_loader/helloworld.efi', - 'size': 5058624, - 'crc32': 'c2244b26', + 'fn': 'lib/efi_loader/helloworld.efi', # file name + 'size': 5058624, # file length in bytes + 'crc32': 'c2244b26', # CRC32 check sum + 'addr': 0x40400000, # load address } """ -- 2.24.0

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mtk_sd on Vocore2 board
by Mauro Condarelli 19 Dec '19

19 Dec '19

I am having trouble understanding how to handle SD driver on my Vocore2 board. I already managed to make it work under Linux (5.3.0). Root problem is VoCore2 has no support for power switching on the SD/MMC slot; a direct wire goes directly to the 3.3V supply. Similar issue for the clock (here I needed a very ugly patch (below)). Questions are twofold: 1) Is this really needed (on mainstream kernel) or did I miss some DT setting that would have achieved the same effect? 2) How to achieve equivalent effect on U-Boot .../mtk_sd.c which looks very different from the above? If I do a "naive" porting SD will NOT work; any commands (e.g.: "mmc info") results in error: "mmc_init: -95, time 6201" (curiously always with the same "time") which I *think* I traced to inability to handle voltage changes. Any hint would be very welcome. Regards and Merry Christmas and very Happy New Year! Mauro ========================================================================= >From 3d239054fd01fbeb03863eee7eefd2a76b82dc02 Mon Sep 17 00:00:00 2001 From: Mauro Condarelli <mc5686(a)mclink.it> Date: Wed, 18 Sep 2019 14:07:22 +0200 Subject: [PATCH 8/8] MIPS, MMC, VoCore2: Preliminary fix for mtk-sd --- arch/mips/boot/dts/ralink/mt7628a.dtsi | 37 ++++++++++++++++++++++++++ arch/mips/boot/dts/ralink/vocore2.dts | 4 +++ arch/mips/ralink/clk.c | 2 +- drivers/mmc/host/mtk-sd.c | 8 ++++++ 4 files changed, 50 insertions(+), 1 deletion(-) diff --git a/arch/mips/boot/dts/ralink/mt7628a.dtsi b/arch/mips/boot/dts/ralink/mt7628a.dtsi index 376536489415..9636709edc5d 100644 --- a/arch/mips/boot/dts/ralink/mt7628a.dtsi +++ b/arch/mips/boot/dts/ralink/mt7628a.dtsi @@ -259,6 +259,43 @@ reset-names = "host", "device"; }; + clk48m: clk48m@0 { + compatible = "fixed-clock"; + clock-frequency = <48000000>; + #clock-cells = <0>; + }; + + vmmcsd_fixed: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "vmmcsd_fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + mmc: mmc@10130000 { + compatible = "mediatek,mt7620-mmc"; + reg = <0x10130000 0x4000>; + builtin-cd = <1>; + r_smpl = <1>; + + interrupt-parent = <&intc>; + interrupts = <14>; + + clocks = <&clk48m>, <&clk48m>; + clock-names = "source", "hclk"; + + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&pinmux_sdmode_sdxc>; + pinctrl-1 = <&pinmux_sdmode_sdxc>; + + vmmc-supply = <&vmmcsd_fixed>; + vqmmc-supply = <&vmmcsd_fixed>; + + resets = <&resetc 30>; + + status = "disabled"; + }; + ehci@101c0000 { compatible = "generic-ehci"; reg = <0x101c0000 0x1000>; diff --git a/arch/mips/boot/dts/ralink/vocore2.dts b/arch/mips/boot/dts/ralink/vocore2.dts index 559c4256d48a..19e8ece4aa2a 100644 --- a/arch/mips/boot/dts/ralink/vocore2.dts +++ b/arch/mips/boot/dts/ralink/vocore2.dts @@ -62,3 +62,7 @@ status = "okay"; mediatek,mtd-eeprom = <&eeprom 0x0000>; }; + +&mmc { + status = "okay"; +}; diff --git a/arch/mips/ralink/clk.c b/arch/mips/ralink/clk.c index 0e57845d7f9a..930c2776f6fd 100644 --- a/arch/mips/ralink/clk.c +++ b/arch/mips/ralink/clk.c @@ -90,4 +90,4 @@ struct clk *clk_get_parent(struct clk *clk) { return NULL; } -EXPORT_SYMBOL(clk_get_parent); +EXPORT_SYMBOL_GPL(clk_get_parent); diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c index 33f4b6387ef7..13464161521c 100644 --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c @@ -721,18 +721,22 @@ static void msdc_set_timeout(struct msdc_host *host, u32 ns, u32 clks) static void msdc_gate_clock(struct msdc_host *host) { +#ifdef handle_clocks clk_disable_unprepare(host->src_clk_cg); clk_disable_unprepare(host->src_clk); clk_disable_unprepare(host->bus_clk); clk_disable_unprepare(host->h_clk); +#endif//handle_clocks } static void msdc_ungate_clock(struct msdc_host *host) { +#ifdef handle_clocks clk_prepare_enable(host->h_clk); clk_prepare_enable(host->bus_clk); clk_prepare_enable(host->src_clk); clk_prepare_enable(host->src_clk_cg); +#endif//handle_clocks while (!(readl(host->base + MSDC_CFG) & MSDC_CFG_CKSTB)) cpu_relax(); } @@ -2199,6 +2203,9 @@ static int msdc_drv_probe(struct platform_device *pdev) if (ret) goto host_free; + +#ifdef handle_clocks +#error "should NOT compile!" host->src_clk = devm_clk_get(&pdev->dev, "source"); if (IS_ERR(host->src_clk)) { ret = PTR_ERR(host->src_clk); @@ -2218,6 +2225,7 @@ static int msdc_drv_probe(struct platform_device *pdev) host->src_clk_cg = devm_clk_get(&pdev->dev, "source_cg"); if (IS_ERR(host->src_clk_cg)) host->src_clk_cg = NULL; +#endif //handle_clocks host->irq = platform_get_irq(pdev, 0); if (host->irq < 0) { -- 2.23.0

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[U-Boot] [PATCH] net/phy: Fix phy_connect() for phy addr 0
by Priyanka Jain 19 Dec '19

19 Dec '19

Fix 'mask' calculation in phy_connect() for phy addr '0'. 'mask' is getting set to '0xffffffff' for phy addr '0' in phy_connect() whereas expected value is '0'. Signed-off-by: Priyanka Jain <priyanka.jain(a)nxp.com> --- drivers/net/phy/phy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index ae37dd6c1e..419e6869c0 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -952,7 +952,7 @@ struct phy_device *phy_connect(struct mii_dev *bus, int addr, #endif { struct phy_device *phydev = NULL; - uint mask = (addr > 0) ? (1 << addr) : 0xffffffff; + uint mask = (addr >= 0) ? (1 << addr) : 0xffffffff; #ifdef CONFIG_PHY_FIXED phydev = phy_connect_fixed(bus, dev, interface); -- 2.17.1

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[PATCH v4] armv8: ls1046afrwy: Fix get_board_version implementation
by Pramod Kumar 19 Dec '19

19 Dec '19

Current implementation to get board version through GPIO is brocken due to endianness issue hence it is not working for rev B board. Fix it to make it work for Rev A as well as Rev B boards Signed-off-by: Pramod Kumar <pramod.kumar_1(a)nxp.com> --- Changes in v4: - updated commit message Changes in v3: - incorporate review comment Changes in v2: - incorporate review comments board/freescale/ls1046afrwy/ls1046afrwy.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/board/freescale/ls1046afrwy/ls1046afrwy.c b/board/freescale/ls1046afrwy/ls1046afrwy.c index ac2f8ee..db8b3a5 100644 --- a/board/freescale/ls1046afrwy/ls1046afrwy.c +++ b/board/freescale/ls1046afrwy/ls1046afrwy.c @@ -24,7 +24,8 @@ #define LS1046A_PORSR1_REG 0x1EE0000 #define BOOT_SRC_SD 0x20000000 #define BOOT_SRC_MASK 0xFF800000 -#define BOARD_REV_GPIO 13 +#define BOARD_REV_GPIO_SHIFT 17 +#define BOARD_REV_MASK 0x03 #define USB2_SEL_MASK 0x00000100 #define BYTE_SWAP_32(word) ((((word) & 0xff000000) >> 24) | \ @@ -87,10 +88,14 @@ int board_early_init_f(void) static inline uint8_t get_board_version(void) { - u8 val; struct ccsr_gpio *pgpio = (void *)(GPIO2_BASE_ADDR); - val = (in_le32(&pgpio->gpdat) >> BOARD_REV_GPIO) & 0x03; + /* GPIO 13 and GPIO 14 are used for Board Rev */ + u32 gpio_val = ((in_be32(&pgpio->gpdat) >> BOARD_REV_GPIO_SHIFT)) + & BOARD_REV_MASK; + + /* GPIOs' are 0..31 in Big Endiness, swap GPIO 13 and GPIO 14 */ + u8 val = ((gpio_val >> 1) | (gpio_val << 1)) & BOARD_REV_MASK; return val; } -- 2.7.4

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[Patch v2 0/7] Transition of fsl qspi driver to spi-mem framework
by Kuldeep Singh 19 Dec '19

19 Dec '19

This entire patch series migrate freescale qspi driver to spi-mem framework. v2 version of series includes changes in qspi driver to have 1k size instead of complete flash size so as to make driver independent of flash size. This also makes it align with linux version of driver. Also added support for imx platforms to set TDH bits correctly. There are other minor changes in commit messages. Dependency on patches[1][2]. These patches are required to resolve booting crash observed in LS1012ARDB. One crash was related to pfe driver as it was accessing flash memory directly and other was based on environment. [1] https://patchwork.ozlabs.org/patch/1207610/ [2] https://patchwork.ozlabs.org/patch/1208299/ Patch 1 in series adds new qspi driver incorporating spi-mem framework and also removal of old driver which was based on spi-nor. The driver is a ported version of linux qspi driver. Initial port was done by Frieder. Now, no more direct memory access to spi-nor memory is possible i.e accessing flash memory using absolute address is not possible. Patch 2 removes unused qspi config options. Patch 3 moves FSL_QSPI to defconfig instead of defining it in header files. Patch 4 removes unused num-cs property from imx platforms. Patch 5 enables SPI_FLASH_SPANSION in ls1012a defconfig as FSL_QSPI is already enabled. Patch 6 enables SPI_FLASH_SPANSION in defconfigs of LS1046a boards instead of defining in header files. Patch 7 updates the device-tree properties treewide for layerscape boards by aligning with linux device-tree properties. Frieder Schrempf (1): imx: imx6sx: Remove unused 'num-cs' property Kuldeep Singh (6): spi: Transform the FSL QuadSPI driver to use the SPI MEM API treewide: Remove unused FSL QSPI config options configs: ls1043a: Move CONFIG_FSL_QSPI to defconfig configs: ls1012a: Enable CONFIG_SPI_FLASH_SPANSION configs: ls1046a: Move SPI_FLASH_SPANSION to defconfig treewide: Update fsl qspi node dt properties as per spi-mem driver arch/arm/dts/fsl-ls1012a-2g5rdb.dts | 5 +- arch/arm/dts/fsl-ls1012a-frdm.dtsi | 5 +- arch/arm/dts/fsl-ls1012a-qds.dtsi | 5 +- arch/arm/dts/fsl-ls1012a-rdb.dtsi | 5 +- arch/arm/dts/fsl-ls1012a.dtsi | 4 +- arch/arm/dts/fsl-ls1043a-qds.dtsi | 5 +- arch/arm/dts/fsl-ls1043a.dtsi | 6 +- arch/arm/dts/fsl-ls1046a-frwy.dts | 5 +- arch/arm/dts/fsl-ls1046a-qds.dtsi | 5 +- arch/arm/dts/fsl-ls1046a-rdb.dts | 5 +- arch/arm/dts/fsl-ls1046a.dtsi | 4 +- arch/arm/dts/fsl-ls1088a-qds.dts | 5 +- arch/arm/dts/fsl-ls1088a-rdb.dts | 5 +- arch/arm/dts/fsl-ls1088a.dtsi | 2 +- arch/arm/dts/fsl-ls2080a-qds.dts | 5 +- arch/arm/dts/fsl-ls2080a.dtsi | 4 +- arch/arm/dts/fsl-ls2088a-rdb-qspi.dts | 5 +- arch/arm/dts/imx6sx-sabreauto-u-boot.dtsi | 2 - arch/arm/dts/imx6sx-sdb-u-boot.dtsi | 2 - arch/arm/dts/ls1021a-twr.dtsi | 5 +- arch/arm/dts/ls1021a.dtsi | 6 +- .../include/asm/arch-fsl-layerscape/config.h | 1 - arch/arm/include/asm/arch-ls102xa/config.h | 1 - configs/ls1012a2g5rdb_qspi_defconfig | 1 + configs/ls1012a2g5rdb_tfa_defconfig | 1 + configs/ls1012afrdm_qspi_defconfig | 1 + configs/ls1012afrdm_tfa_defconfig | 1 + configs/ls1012aqds_qspi_defconfig | 1 + configs/ls1012aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012aqds_tfa_defconfig | 1 + configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012ardb_qspi_defconfig | 1 + configs/ls1012ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012ardb_tfa_defconfig | 1 + configs/ls1043aqds_qspi_defconfig | 1 + configs/ls1043aqds_sdcard_qspi_defconfig | 1 + configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 2 + configs/ls1043aqds_tfa_defconfig | 1 + configs/ls1046aqds_qspi_defconfig | 1 + configs/ls1046aqds_sdcard_qspi_defconfig | 1 + configs/ls1046aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046aqds_tfa_defconfig | 1 + configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_qspi_defconfig | 1 + configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_tfa_defconfig | 1 + drivers/spi/fsl_qspi.c | 1562 +++++++---------- drivers/spi/fsl_qspi.h | 145 -- include/configs/ls1012a_common.h | 17 +- include/configs/ls1012afrwy.h | 3 - include/configs/ls1012ardb.h | 3 - include/configs/ls1021aiot.h | 6 - include/configs/ls1021aqds.h | 11 - include/configs/ls1021atwr.h | 10 - include/configs/ls1043aqds.h | 10 - include/configs/ls1046afrwy.h | 9 - include/configs/ls1046aqds.h | 19 - include/configs/ls1046ardb.h | 20 - include/configs/ls1088a_common.h | 6 - include/configs/ls1088aqds.h | 8 - include/configs/ls1088ardb.h | 18 - include/configs/ls2080aqds.h | 2 - include/configs/ls2080ardb.h | 8 +- include/configs/mx6sxsabreauto.h | 6 - include/configs/mx6sxsabresd.h | 11 - include/configs/mx6ul_14x14_evk.h | 6 - include/configs/mx6ullevk.h | 6 - include/configs/mx7dsabresd.h | 8 - include/configs/pcm052.h | 7 - include/configs/vf610twr.h | 8 - scripts/config_whitelist.txt | 5 - 71 files changed, 655 insertions(+), 1380 deletions(-) delete mode 100644 drivers/spi/fsl_qspi.h -- 2.17.1

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[PATCH v1] serdes: ls1046afwry: Disable sgmi support
by Pramod Kumar 19 Dec '19

19 Dec '19

LS1046A SoC serdes protocol 0x3040 supports both sgmi and qsgmii, however frwy-ls1046a supports only QSGMI on board. Disable unsupported sgmii on bord. Signed-off-by: Pramod Kumar <pramod.kumar_1(a)nxp.com> --- arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c | 56 +++++++++++++++++++--- 1 file changed, 50 insertions(+), 6 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c index 9347e51..e5b2269 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c @@ -38,6 +38,31 @@ static struct serdes_config serdes1_cfg_tbl[] = { {} }; +static struct serdes_config serdes1_cfg_tbl_frwy_ls1046a[] = { + /* SerDes 1 */ + {0x3333, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5, + SGMII_FM1_DTSEC6} }, + {0x1133, {XFI_FM1_MAC9, XFI_FM1_MAC10, SGMII_FM1_DTSEC5, + SGMII_FM1_DTSEC6} }, + {0x1333, {XFI_FM1_MAC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5, + SGMII_FM1_DTSEC6} }, + {0x2333, {SGMII_2500_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5, + SGMII_FM1_DTSEC6} }, + {0x2233, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, + {0x1040, {XFI_FM1_MAC9, NONE, QSGMII_FM1_A, NONE} }, + {0x2040, {SGMII_2500_FM1_DTSEC9, NONE, QSGMII_FM1_A, NONE} }, + {0x1163, {XFI_FM1_MAC9, XFI_FM1_MAC10, PCIE1, SGMII_FM1_DTSEC6} }, + {0x2263, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10, PCIE1, + SGMII_FM1_DTSEC6} }, + {0x3363, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, PCIE1, + SGMII_FM1_DTSEC6} }, + {0x2223, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10, + SGMII_2500_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, + {0x3040, {NONE, NONE, QSGMII_FM1_A, NONE} }, + {} +}; + static struct serdes_config serdes2_cfg_tbl[] = { /* SerDes 2 */ {0x8888, {PCIE1, PCIE1, PCIE1, PCIE1} }, @@ -56,14 +81,26 @@ static struct serdes_config *serdes_cfg_tbl[] = { serdes2_cfg_tbl, }; +static struct serdes_config *serdes_cfg_tbl_frwy_ls1046a[] = { + serdes1_cfg_tbl_frwy_ls1046a, + serdes2_cfg_tbl, +}; + enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane) { struct serdes_config *ptr; + char *board_type = CONFIG_SYS_BOARD; - if (serdes >= ARRAY_SIZE(serdes_cfg_tbl)) - return 0; + if (!strncmp(board_type, "ls1046afrwy", strlen("ls1046afrwy"))) { + if (serdes >= ARRAY_SIZE(serdes_cfg_tbl_frwy_ls1046a)) + return 0; + ptr = serdes_cfg_tbl_frwy_ls1046a[serdes]; + } else { + if (serdes >= ARRAY_SIZE(serdes_cfg_tbl)) + return 0; + ptr = serdes_cfg_tbl[serdes]; + } - ptr = serdes_cfg_tbl[serdes]; while (ptr->protocol) { if (ptr->protocol == cfg) return ptr->lanes[lane]; @@ -77,11 +114,18 @@ int is_serdes_prtcl_valid(int serdes, u32 prtcl) { int i; struct serdes_config *ptr; + char *board_type = CONFIG_SYS_BOARD; - if (serdes >= ARRAY_SIZE(serdes_cfg_tbl)) - return 0; + if (!strncmp(board_type, "ls1046afrwy", strlen("ls1046afrwy"))) { + if (serdes >= ARRAY_SIZE(serdes_cfg_tbl)) + return 0; + ptr = serdes_cfg_tbl_frwy_ls1046a[serdes]; + } else { + if (serdes >= ARRAY_SIZE(serdes_cfg_tbl)) + return 0; + ptr = serdes_cfg_tbl[serdes]; + } - ptr = serdes_cfg_tbl[serdes]; while (ptr->protocol) { if (ptr->protocol == prtcl) break; -- 2.7.4

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OMAP L138 LCDK - giving up maintainership
by Peter Howard 19 Dec '19

19 Dec '19

Tom and others, I finish at my current job on Friday, as such I will have no immediate involvement with the L138 chip (not that I've had that much in recent times). So it makes sense to remove me as maintainer. Especially as the email listed for me will start bouncing. so is the simplest way just to submit a patch clearing out the maintainer entry in board/davinci/da8xxevm/MAINTAINERS ? Also does anyone on the list wish to take over? Adam, I know you don't have the time from recent emails. Bartosz? Sekhar - do you want to nominate someone from TI? -- Peter Howard <pjh(a)northern-ridge.com.au> Peter Howard <phoward(a)gme.net.au>

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U-boot: device tree overlay and symbols path
by laurent vaudoit 19 Dec '19

19 Dec '19

Hi, i want to use device tree overlay in U-boot. my overlay looks like this: ----------------------------- /dts-v1/; /plugin/; / { fragment@1 { //target = <&i2c1>; target-path = "/soc/aips-bus@2100000/i2c@21a4000/"; __overlay__ { status = "okay"; isl7998x_mipi: isl7998x_mipi@44 { compatible = "intersil,isl7998x_mipi"; reg = <0x44>; //clocks = <&clks 201>; clocks = <&{/soc/aips-bus@2000000/ccm@20c4000} 201>; clock-names = "csi_mclk"; csi_id = <0>; mclk = <27000000>; mclk_source = <0>; }; }; }; ----------------------------- If i build the base device tree with -@, and use the &i2c1 and &clks symbols, the overlays works. I use yocto to build and it seems the -@ is not used for building DT. So i wanted to use the path corresponding to each symbols. for the target-path, it's working well in U-boot. The problem i have is for the clks path. the binary gives me some __fixup__ like this: __fixups__ { /soc/aips-bus@2000000/ccm@20c4000 = "/fragment@1 /__overlay__/isl7998x_mipi@44:clocks:0"; }; but when U-boot try to apply the overlay, i have an error in "overlay_fixup_one_phandle" because base device tree symbols offset is null. So it seems that fixup can not work if the base DT is not build with -@? Is there something i'm missing, or something wrong in my overlay? Thanks in advance for your help regards Laurent

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