December 2019 - U-Boot

[U-Boot] [PATCH V2 0/4] aes: add support for aes192 and aes256
by Philippe Reynes 06 Jan '20

06 Jan '20

This serie add the support of aes192 and aes256. This first commit clean a bit the code, and introduce a constant for the block (instead of using the key size). The second commit add the support of aes192 and aes256 to the lib and the cmd. The third update the code of crypto for tegra20, and the forth one add tests in pytest for aes192 and aes256. Philippe Reynes (4): aes: add a define for the size of a block aes: add support of aes192 and aes256 tegra20: crypto: update code to use new aes api pytest: aes: add test for aes192 and aes256 arch/arm/mach-tegra/tegra20/crypto.c | 41 ++++++------ cmd/aes.c | 40 ++++++++---- include/uboot_aes.h | 39 ++++++++---- lib/aes.c | 111 ++++++++++++++++++++------------ test/py/tests/test_aes.py | 118 +++++++++++++++++++++++++++-------- 5 files changed, 237 insertions(+), 112 deletions(-) -- 2.7.4

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[PATCH] ram: rk3399: don't assume phy_io_config() uses real regs
by Thomas Hebb 06 Jan '20

06 Jan '20

In the RK3399 DRAM driver, the function set_ds_odt() supports operating in two different modes, selected by the ctl_phy_reg argument: when true, the function reads and writes directly from the DRAM registers, accessed through "chan->pctl->denali_*"; when false, the function reads and writes from an array, accessed through "params->pctl_regs.denali_*", which is written to DRAM registers at a later time. However, phy_config_io(), which is called by set_ds_odt() to do a subset of its register operations, operates directly on DRAM registers at all times. This means that it reads incorrect values (and writes new values prematurely) when ctl_phy_reg in set_ds_odt() is false. Fix this by passing in the address of the registers to work with. This prevents an "Invalid DRV value" error in the SPL debug log and (presumably) results in a more correct end state. See the following logs from a RK3399 NanoPi M4 board (4GB LPDDR3): Before: sdram_init() Starting SDRAM initialization... phy_io_config() Invalid DRV value. phy_io_config() Invalid DRV value. sdram_init() sdram_init: data trained for rank 2, ch 0 phy_io_config() Invalid DRV value. phy_io_config() Invalid DRV value. sdram_init() sdram_init: data trained for rank 2, ch 1 Channel 0: LPDDR3, 933MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB Channel 1: LPDDR3, 933MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB 256B stride 256B stride sdram_init() Finish SDRAM initialization... After: sdram_init() Starting SDRAM initialization... sdram_init() sdram_init: data trained for rank 2, ch 0 sdram_init() sdram_init: data trained for rank 2, ch 1 Channel 0: LPDDR3, 933MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB Channel 1: LPDDR3, 933MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB 256B stride 256B stride sdram_init() Finish SDRAM initialization... Signed-off-by: Thomas Hebb <tommyhebb(a)gmail.com> --- drivers/ram/rockchip/sdram_rk3399.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index aa2ea920ba..9e61641511 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -337,11 +337,9 @@ static void set_memory_map(const struct chan_info *chan, u32 channel, writel(0x2EC7FFFF, &denali_pi[34]); } -static int phy_io_config(const struct chan_info *chan, +static int phy_io_config(u32 *denali_phy, u32 *denali_ctl, const struct rk3399_sdram_params *params, u32 mr5) { - u32 *denali_phy = chan->publ->denali_phy; - u32 *denali_ctl = chan->pctl->denali_ctl; u32 vref_mode_dq, vref_value_dq, vref_mode_ac, vref_value_ac; u32 mode_sel; u32 speed; @@ -780,7 +778,7 @@ static void set_ds_odt(const struct chan_info *chan, /* phy_pad_fdbk_term 1bit DENALI_PHY_930 offset_17 */ clrsetbits_le32(&denali_phy[930], 0x1 << 17, reg_value); - phy_io_config(chan, params, mr5); + phy_io_config(denali_phy, denali_ctl, params, mr5); } static void pctl_start(struct dram_info *dram, -- 2.24.1

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[PATCH] travis: Setup latest qemu version for Versal
by Michal Simek 06 Jan '20

06 Jan '20

Qemu v4.2.0 maps bootmode registers to address space which was the reason why board_late_init() was disabled and accesses were failing. With new Qemu board_late_init() can be called without any issue. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- Not sure which qemu version azure and gitlab are using but I think that also make sense to move the whole travis to v4.2. As of now I am sending this patch to open that discussion. --- .travis.yml | 1 + configs/xilinx_versal_virt_defconfig | 1 - 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index 5da046ca7ed5..168455bd9f68 100644 --- a/.travis.yml +++ b/.travis.yml @@ -514,6 +514,7 @@ matrix: - TEST_PY_BD="xilinx_versal_virt" TEST_PY_TEST_SPEC="not sleep" QEMU_TARGET="aarch64-softmmu" + QEMU_VERSION="v4.2.0" TEST_PY_ID="--id qemu" BUILDMAN="^xilinx_versal_virt$" - name: "test/py xtfpga" diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 11428e1e03c1..6488bca2c004 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -9,7 +9,6 @@ CONFIG_FIT_VERBOSE=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOOTDELAY=5 CONFIG_SUPPORT_RAW_INITRD=y -# CONFIG_BOARD_LATE_INIT is not set # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y -- 2.24.0

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[PATCH] arm64: zynqmp: Fix emmc boot mode boot_target sequennce
by Michal Simek 06 Jan '20

06 Jan '20

From: T Karthik Reddy <t.karthik.reddy(a)xilinx.com> Emmc boot devcie is mounted to mmc@ff160000 controller on zynqmp. Detect mmc alias at run time for setting up proper boot_targets sequence instead of setting boot_targets manually. Removed setting "modeboot" variable as it not longer need as we switched to distro boot. Signed-off-by: T Karthik Reddy <t.karthik.reddy(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- board/xilinx/zynqmp/zynqmp.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index aac2eb7bc1a2..b72eade43eea 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -580,8 +580,17 @@ int board_late_init(void) break; case EMMC_MODE: puts("EMMC_MODE\n"); - mode = "mmc0"; - env_set("modeboot", "emmcboot"); + if (uclass_get_device_by_name(UCLASS_MMC, + "mmc@ff160000", &dev) && + uclass_get_device_by_name(UCLASS_MMC, + "sdhci@ff160000", &dev)) { + puts("Boot from EMMC but without SD0 enabled!\n"); + return -1; + } + debug("mmc0 device found at %p, seq %d\n", dev, dev->seq); + + mode = "mmc"; + bootseq = dev->seq; break; case SD_MODE: puts("SD_MODE\n"); -- 2.24.0

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[PATCH 00/22] imx: add i.MX8MP support
by Peng Fan 06 Jan '20

06 Jan '20

i.IMX8M Plus is part of the i.MX8M SoC family, targeting industrial and consumer market. It includes an ML and AI accelerator, together with 4 Cortex-A53 core, DSP, GPU, VPU, M7 and etc. This patchset is to add the support. CI: https://travis-ci.org/MrVan/u-boot/builds/630883217 Peng Fan (21): imx: get cpu id/type of i.MX8MP imx8mp: set BYPASS ID SWAP to avoid AXI bus errors imx: cpu: enlarge bit mask to 0x1FF for cpu type imx: imx8m: add Kconfig entry for i.MX8MP imx: spl: support i.MX8MP spl_boot_device dt-bindings: clock: add i.MX8MP clock header arm: dts: add i.MX8MP pinfunc header imx: imx8mp: add basic clock imx: imx8m: add 1GHz fracpll entry pinctrl: imx8m: support i.MX8MP mxc_ocotp: support i.MX8MP ddr: imx8m: Add DRAM PLL to generate 1000Mhz output arm: dts: freescale: Add i.MX8MP dtsi support imx: imx8mp: add pin header file imx: add i.MX8MP PE property imx: Kconfig: make SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MP imx: imx8m: only support non-dm code in clock_imx8mm.c clk: imx: add imx_clk_mux2_flags clk: imx: add i.MX8MP clk driver imx: imx8m: add imximage-8mp-lpddr4.cfg imx: add i.MX8MP EVK board Ye Li (1): power: Add new PMIC PCA9450 driver arch/arm/dts/Makefile | 3 +- arch/arm/dts/imx8mp-evk-u-boot.dtsi | 121 ++ arch/arm/dts/imx8mp-evk.dts | 231 +++ arch/arm/dts/imx8mp-pinfunc.h | 931 ++++++++++++ arch/arm/dts/imx8mp.dtsi | 598 ++++++++ arch/arm/include/asm/arch-imx/cpu.h | 1 + arch/arm/include/asm/arch-imx8m/clock.h | 3 +- arch/arm/include/asm/arch-imx8m/clock_imx8mm.h | 112 +- arch/arm/include/asm/arch-imx8m/imx8mp_pins.h | 1080 +++++++++++++ arch/arm/include/asm/mach-imx/iomux-v3.h | 2 +- arch/arm/include/asm/mach-imx/sys_proto.h | 1 + arch/arm/mach-imx/Kconfig | 3 +- arch/arm/mach-imx/cpu.c | 6 +- arch/arm/mach-imx/imx8m/Kconfig | 11 + arch/arm/mach-imx/imx8m/Makefile | 2 +- arch/arm/mach-imx/imx8m/clock_imx8mm.c | 340 ++++- arch/arm/mach-imx/imx8m/clock_slice.c | 272 ++++ arch/arm/mach-imx/imx8m/imximage-8mp-lpddr4.cfg | 17 + arch/arm/mach-imx/imx8m/soc.c | 9 +- arch/arm/mach-imx/spl.c | 3 +- board/freescale/imx8mp_evk/Kconfig | 14 + board/freescale/imx8mp_evk/Makefile | 12 + board/freescale/imx8mp_evk/imx8mp_evk.c | 94 ++ board/freescale/imx8mp_evk/lpddr4_timing.c | 1847 +++++++++++++++++++++++ board/freescale/imx8mp_evk/spl.c | 158 ++ configs/imx8mp_evk_defconfig | 84 ++ drivers/clk/imx/Kconfig | 16 + drivers/clk/imx/Makefile | 2 + drivers/clk/imx/clk-imx8mp.c | 362 +++++ drivers/clk/imx/clk.h | 10 + drivers/ddr/imx/imx8m/ddrphy_utils.c | 4 + drivers/misc/mxc_ocotp.c | 13 + drivers/pinctrl/nxp/pinctrl-imx8m.c | 1 + drivers/power/pmic/Kconfig | 7 + drivers/power/pmic/Makefile | 2 + drivers/power/pmic/pca9450.c | 93 ++ drivers/power/pmic/pmic_pca9450.c | 50 + include/configs/imx8mp_evk.h | 165 ++ include/dt-bindings/clock/imx8mp-clock.h | 300 ++++ include/power/pca9450.h | 60 + 40 files changed, 6994 insertions(+), 46 deletions(-) create mode 100644 arch/arm/dts/imx8mp-evk-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mp-evk.dts create mode 100644 arch/arm/dts/imx8mp-pinfunc.h create mode 100644 arch/arm/dts/imx8mp.dtsi create mode 100644 arch/arm/include/asm/arch-imx8m/imx8mp_pins.h create mode 100644 arch/arm/mach-imx/imx8m/imximage-8mp-lpddr4.cfg create mode 100644 board/freescale/imx8mp_evk/Kconfig create mode 100644 board/freescale/imx8mp_evk/Makefile create mode 100644 board/freescale/imx8mp_evk/imx8mp_evk.c create mode 100644 board/freescale/imx8mp_evk/lpddr4_timing.c create mode 100644 board/freescale/imx8mp_evk/spl.c create mode 100644 configs/imx8mp_evk_defconfig create mode 100644 drivers/clk/imx/clk-imx8mp.c create mode 100644 drivers/power/pmic/pca9450.c create mode 100644 drivers/power/pmic/pmic_pca9450.c create mode 100644 include/configs/imx8mp_evk.h create mode 100644 include/dt-bindings/clock/imx8mp-clock.h create mode 100644 include/power/pca9450.h -- 2.16.4

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[U-Boot] [PATCH 0/9] efi_loader: rework bootefi/bootmgr
by AKASHI Takahiro 06 Jan '20

06 Jan '20

There are several reasons that I want to rework/refactor bootefi command as well as bootmgr: * Some previous commits on bootefi.c have made the code complicated and a bit hard to understand. * do_bootefi_exec() would better be implemented using load_image() along with start_image() to be aligned with UEFI interfaces. * Contrary to the other part, efi_selftest part of the code is unusual in terms of loading/execution path in do_bootefi(). * When we will support "secure boot" in the future, EFI Boot Manager is expected to be invoked as a standalone command without any arguments to mitigate security surfaces. In this patch set, Patch#1 to #7 are preparatory patches for patch#8. Patch#8 is a core part of reworking. Patch#9 is for standalone boot manager. # Please note that some patches, say patch#2 and #3, can be combined into one # but I intentionally keep them separated to clarify my intentions of changes. Issues: * It would be better off to change the semantics of efi_dp_from_name(). no chance to free loaded_image_info->load_options. (see patch #8) -Takahiro Akashi Changes in v1 (Apr 19, 2019) * Travis CI: https://travis-ci.org/t-akashi/u-boot/builds/521984187 * rebased on efi-2019-07 * delete already-merged patches * rework set_load_options() (patch#1 and #8) * fix compile/Travis CI errors (patch#2, #7 and #8) * rename do_boot_efi() to do_bootefi_image() (patch#7) * free file_path in do_bootefi_image() (patch#8) * use EFI_PRINT instead of debug() (patch#8) * remove improper warning messages (patch#8) Changes in RFC v3 (Apr 16, 2019) * rebased on v2019.04 * delete already-merged patches * add patch#2 for exporting root node * use correct/more appropriate return code (CMD_RET_xxx) (patch#3,5,7) * remove a message at starting an image in bootefi command, instead adding a debug message in efi_start_image() * use root node as a dummy parent handle when calling efi_start_image() * remove efi_unload_image() in bootefi command Changes in RFC v2 (Mar 27, 2019) * rebased on v2019.04-rc4 * use load_image API in do_bootmgr_load() * merge efi_install_fdt() and efi_process_fdt() * add EFI_LOADED_IMAGE_DEVICE_PATH_PROTOCOL to image (patch#1) * lots of minor changes AKASHI Takahiro (9): cmd: bootefi: rework set_load_options() cmd: bootefi: carve out fdt handling from do_bootefi() cmd: bootefi: merge efi_install_fdt() and efi_process_fdt() cmd: bootefi: carve out efi_selftest code from do_bootefi() cmd: bootefi: move do_bootefi_bootmgr_exec() forward cmd: bootefi: carve out bootmgr code from do_bootefi() cmd: bootefi: carve out do_bootefi_image() from do_bootefi() efi_loader: rework bootmgr/bootefi using load_image API cmd: add efibootmgr command cmd/Kconfig | 8 + cmd/bootefi.c | 540 ++++++++++++++++++++++------------ include/efi_loader.h | 5 +- lib/efi_loader/efi_bootmgr.c | 43 +-- lib/efi_loader/efi_boottime.c | 2 + 5 files changed, 383 insertions(+), 215 deletions(-) -- 2.20.1

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[PATCH v5 0/6] rsa: extend rsa_verify() for UEFI secure boot
by AKASHI Takahiro 06 Jan '20

06 Jan '20

# This patch set is a prerequisite for UEFI secure boot. The current rsa_verify() requires five parameters for a RSA public key for efficiency while RSA, in theory, requires only two. In addition, those parameters are expected to come from FIT image. So this function won't fit very well when we want to use it for the purpose of implementing UEFI secure boot, in particular, image authentication as well as variable authentication, where the essential two parameters are set to be retrieved from one of X509 certificates in signature database. So, in this patch, additional three parameters will be calculated on the fly when rsa_verify() is called without fdt which should contain parameters above. This calculation heavily relies on "big-number (or multi-precision) library." Therefore some routines from BearSSL[1] under MIT license are imported in this implementation. See Patch#4. # Please let me know if this is not appropriate. Prerequisite: * public key parser in my "import x509/pkcs7 parser" patch[2] # Checkpatch will complain with lots of warnings/errors, but # I intentionally don't fix them for maximum maintainability. [1] https://bearssl.org/ [2] https://lists.denx.de/pipermail/u-boot/2019-November/390127.html Changes in v5 (Dec 17, 2019) * modify RSA_VERIFY-related configuration to fix size growth problem on some platforms (T1042RDB_PI_NAND_SECURE_BOOT and else), adding IMAGE_SIGN_INFO config (patch #1, #2, #6) * simplify kconfig dependencies; - RSA_VERIFY_WITH_PKEY *selects* RSA_VERIFY instead of "depends on" (patch#2) - remove some implicit dependencies (patch#6) Changes in v4 (Nov 21, 2019) * rebased to v2020.01-rc3 * change a function prototype of rsa_gen_key_prop() to return an error code (patch#4,#5) * re-order include files in alphabetical order (patch#6) * add some comments per Simon's review comments Changes in v3 (Nov 13, 2019) * remove RSA_VERIFY_WITH_PKEY, which is to be added in patch#2 (patch#1) * modify unit test Kconfg due to removal of test/lib/Kconfig (patch#6) Changes in v2 (Oct 29, 2019) * fix build errors at Travis CI * not include linux/kconfig.h (patch#1) * add a separate patch for adding CONFIG_RSA_VERIFY_WITH_PKEY (patch#2) * take a prerequisite patch from my "secure boot patch" (patch#3) * add a dependency on RSA_PUBLIC_KEY_PARSER (patch#4) * remove "inline" directives (patch#4) * add function descriptions, which mostly come from BearSSL's src/inner.h (patch#4) * improve Kconfig help text after Simon's comment (patch#5) * add function description of rsa_verify_with_pkey() (patch#5) * modify rsa_verify() to use "if (CONFIG_IS_ENABLED(...) " style rather than "#ifdef CONFIG_..." (patch#5) * add function tests (patch#6) Changes in v1 (Oct 9, 2019) * fix a build error on pine64-lts_defconfig (reported by Heinrich) by defining FIT_IMAGE_ENABLE_VERIFY flag and adding SPL_RSA_VERIFY config (patch#1) * remove FIT-specific code from image-sig.c and put them to new image-fit-sig.c to allow us to disable CONFIG_FIT_SIGNATURE (patch#1) * compile rsa-keyprop.c only if necessary (i.e. if CONFIG_RSA_VERIFY_WITH_PKEY) (patch#2) * add SPDX license identifier in rsa-keyprop.c (patch#2) * include <common.h> instead of <stdio.h> (patch#2) * use U-Boot's byteorder helper functions instead of BearSSL's (patch#2) AKASHI Takahiro (6): lib: rsa: decouple rsa from FIT image verification rsa: add CONFIG_RSA_VERIFY_WITH_PKEY config include: image.h: add key info to image_sign_info lib: rsa: generate additional parameters for public key lib: rsa: add rsa_verify_with_pkey() test: add rsa_verify() unit test Kconfig | 4 + common/Kconfig | 7 + common/Makefile | 3 +- common/image-fit-sig.c | 417 ++++++++++++++++++++ common/image-fit.c | 6 +- common/image-sig.c | 396 ------------------- include/image.h | 20 +- include/u-boot/rsa-mod-exp.h | 23 ++ lib/rsa/Kconfig | 27 ++ lib/rsa/Makefile | 3 +- lib/rsa/rsa-keyprop.c | 725 +++++++++++++++++++++++++++++++++++ lib/rsa/rsa-verify.c | 137 +++++-- test/Kconfig | 10 + test/lib/Makefile | 1 + test/lib/rsa.c | 206 ++++++++++ tools/Makefile | 2 +- 16 files changed, 1552 insertions(+), 435 deletions(-) create mode 100644 common/image-fit-sig.c create mode 100644 lib/rsa/rsa-keyprop.c create mode 100644 test/lib/rsa.c -- 2.24.0

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commit "dm: spi: Avoid setting the speed with every transfer"
by Rasmus Villemoes 04 Jan '20

04 Jan '20

Hi I'm wondering how commit 60e2809a84 (dm: spi: Avoid setting the speed with every transfer) works. AFAIU, the currently selected speed is a property of the SPI master, so suppose we have two slaves, A which has max_hz = 10MHz and B which has max_hz = 20MHz. Now suppose we do transfers to A, then B, then A again. The third time we still compute speed = 10MHz, but since that matches what we cached in slave->speed, we don't call spi_set_speed_mode(), hence we proceed to do the xfer with a too large speed? I'm probably missing something obvious here since the commit is more than 4 years old. Thanks, Rasmus

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[U-Boot] [PATCH 0/4] arm: mxs: mxs_set_gpmiclk
by Rasmus Villemoes 04 Jan '20

04 Jan '20

While trying to implement an mxs_set_gpmiclk() I stumbled on a few minor things. Rasmus Villemoes (4): arm: mxs: fix register definitions for clkctrl_gpmi and clkctrl_sspX arm: mxs: fix comments in arch_cpu_init to match the code arm: mxs: be more careful when enabling gpmi_clk arm: mxs: implement mxs_set_gpmiclk arch/arm/cpu/arm926ejs/mxs/clock.c | 41 +++++++++++++++++++ arch/arm/cpu/arm926ejs/mxs/mxs.c | 9 ++-- arch/arm/include/asm/arch-mxs/clock.h | 1 + .../include/asm/arch-mxs/regs-clkctrl-mx23.h | 6 ++- .../include/asm/arch-mxs/regs-clkctrl-mx28.h | 15 ++++--- 5 files changed, 62 insertions(+), 10 deletions(-) -- 2.20.1

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[PATCH 1/3] mx7dsabresd: Fix the pmic_get() parameter in the DM case
by Fabio Estevam 04 Jan '20

04 Jan '20

When pmic_get() is used with DM the first parameter must be the complete node name plus the unit address, so fix it accordingly. Reported-by: Igor Opaniuk <igor.opaniuk(a)toradex.com> Signed-off-by: Fabio Estevam <festevam(a)gmail.com> --- board/freescale/mx7dsabresd/mx7dsabresd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c index f1120d67e3..05cf8c8c7c 100644 --- a/board/freescale/mx7dsabresd/mx7dsabresd.c +++ b/board/freescale/mx7dsabresd/mx7dsabresd.c @@ -326,7 +326,7 @@ int power_init_board(void) struct udevice *dev; int ret, dev_id, rev_id; - ret = pmic_get("pfuze3000", &dev); + ret = pmic_get("pfuze3000@08", &dev); if (ret == -ENODEV) return 0; if (ret != 0) -- 2.17.1

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