November 2019 - U-Boot

[U-Boot] [PATCH 1/2] rockchip: rk3399: fix force power on reset
by Vasily Khoruzhick 19 May '22

19 May '22

Currently code doesn't even compile since it uses wrong define for ifdef. Fix that and also add missing include Fixes: 07586ee4322a ("rockchip: rk3399: Support common spl_board_init") Signed-off-by: Vasily Khoruzhick <anarsoul(a)gmail.com> --- arch/arm/mach-rockchip/rk3399/rk3399.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 863024d071..eeb99dd11b 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -11,6 +11,7 @@ #include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/clock.h> +#include <asm/arch-rockchip/cru_rk3399.h> #include <asm/arch-rockchip/gpio.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> @@ -213,7 +214,7 @@ void spl_perform_fixups(struct spl_image_info *spl_image) "u-boot,spl-boot-device", boot_ofpath); } -#if defined(SPL_GPIO_SUPPORT) +#if defined(CONFIG_SPL_GPIO_SUPPORT) static void rk3399_force_power_on_reset(void) { ofnode node; @@ -239,7 +240,7 @@ static void rk3399_force_power_on_reset(void) void spl_board_init(void) { -#if defined(SPL_GPIO_SUPPORT) +#if defined(CONFIG_SPL_GPIO_SUPPORT) struct rk3399_cru *cru = rockchip_get_cru(); /* -- 2.24.0

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[U-Boot] cfb_console.c: DM_VIDEO conversion questions/suggestions
by Igor Opaniuk 18 Nov '21

18 Nov '21

Hi everyone, I've finally started looking into the cfb_console.c driver and it's conversion to DM_VIDEO after our initial discussion [1]. Unfortunately I've a bit underestimated the amount of effort that should be done, as mxsfb.c in the Linux mainline obviously pulls the whole core fb subsystem (drivers/video/fbdev/core), which can take a while and frankly I doubt that this is a proper way to do things here. Taking into account that the deadline for DM_VIDEO conversion is 2019.07, it's unlikely that we will manage to do the full conversions this cfb_console driver and all dependent hw specific drivers in a proper way (where we can provide information about videomodes as properties in a proper nodes in DT). Currently the init chain for fb stuff in U-boot (on the other hand, in the Linux, hw specific driver is probed initially, then they trigger fb common routines that are needed from `video/fbdev/core`): stdio_add_devices() -> ./common/stdio.c -> drv_video_init () (drivers/cfb_console.c) - > video_hw_init (particular hw backend, which was statically linked at compile time with a proper video_hw_init() implementation, for example look into mxsfb.c) 2 ways of conversion that come to my mind: 1. Start with simple DM wrappers in cfb_console.c, and introduce dumb DT nodes so the device at least can be probed. All video configuration will be stored the same way as before in the U-boot env (for example, "videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0"). Then, step by step, driver by driver, we can move some properties to DT and try to sync Linux/U-boot video DT nodes (at least avoid divergence of tree nodes, so Linux/U-boot video-related DT nodes conform to each other). Yes, this is kind of dirty workaround, but at least this something we can start with, and with minimal amount of intrusive changes. 2. Perform full conversion, where everything works the same way as in Linux kernel. Initially I thought that it could be the proper way to go, but taking into account all differences in the implementation of fb in U-boot/Linux (even the way how the drivers are initialized), I think we will just end up pulling the whole big piece from the Linux kernel, that will definitely take a while (especially further support of this code base, testing/fixing issues etc.). Just to be aware about the amount of effort that should be done: : u-boot.git$ grep -e CONFIG_CFB_CONSOLE -r ./configs/ ./configs/T1042RDB_PI_SDCARD_defconfig:CONFIG_CFB_CONSOLE_ANSI=y ./configs/T1042D4RDB_SDCARD_defconfig:CONFIG_CFB_CONSOLE_ANSI=y ./configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig:CONFIG_CFB_CONSOLE_ANSI=y ./configs/nokia_rx51_defconfig:CONFIG_CFB_CONSOLE_ANSI=y ./configs/T1042D4RDB_NAND_defconfig:CONFIG_CFB_CONSOLE_ANSI=y ./configs/T1042RDB_PI_SPIFLASH_defconfig:CONFIG_CFB_CONSOLE_ANSI=y ./configs/T1042RDB_PI_NAND_defconfig:CONFIG_CFB_CONSOLE_ANSI=y ./configs/T1042D4RDB_defconfig:CONFIG_CFB_CONSOLE_ANSI=y ./configs/T1042RDB_PI_defconfig:CONFIG_CFB_CONSOLE_ANSI=y ./configs/eb_cpu5282_internal_defconfig:# CONFIG_CFB_CONSOLE is not set ./configs/T1042D4RDB_SPIFLASH_defconfig:CONFIG_CFB_CONSOLE_ANSI=y ./configs/eb_cpu5282_defconfig:# CONFIG_CFB_CONSOLE is not set ./configs/T1042D4RDB_SECURE_BOOT_defconfig:CONFIG_CFB_CONSOLE_ANSI=y Additional Kconfig symbols, that depend on CFB_CONSOLE: * VGA_AS_SINGLE_DEVICE * CONSOLE_EXTRA_INFO * CONSOLE_SCROLL_LINES * SYS_CONSOLE_BG_COL * SYS_CONSOLE_FG_COL Drivers, that don't imply CFG_CONSOLE, but are used alongside with cfb_console.c (kind of particular hw backend driver for fb console): * mxsfb.c * mb862xx.c * sunxi_display.c * ati_radeon_fb.c * fsl_dcu_fb.c * omap3_dss.c * da8xx-fb.c Looking forward to your suggestions/recommendations here (and let me know if I missed something), thanks! [1] https://lists.denx.de/pipermail/u-boot/2019-April/365506.html -- Best regards - Freundliche Grüsse - Meilleures salutations Igor Opaniuk mailto: igor.opaniuk(a)gmail.com skype: igor.opanyuk +380 (93) 836 40 67 http://ua.linkedin.com/in/iopaniuk

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[U-Boot] [PATCH] usb: Make USB_MUSB_PIO_ONLY conditional on USB_MUSB_{HOST, GADGET}
by Samuel Dionne-Riel 15 Nov '21

15 Nov '21

This ensures the USB_MUSB_PIO_ONLY config is set to an apppropriate default values from the changes enabling USB_MUSB_GADGET does. Namely, USB_MUSB_PIO_ONLY default to =y on USB_MUSB_SUNXI being y. Since USB_MUSB_SUNXI is behind the conditional, the option does not exist when using make ..._defconfig, thus the default of USB_MUSB_PIO_ONLY is kept "# ... is not set". This, _is_ counter-intuitively a set value, meaning that the default will not be applied once USB_MUSB_SUNXI is set to y by toggling USB_MUSB_GADGET via menuconfig. Signed-off-by: Samuel Dionne-Riel <samuel(a)dionne-riel.com> --- Some additional context about the bug. Using `make ..._defconfig` for a sunxi board, then using `make menuconfig` to change the option `CONFIG_USB_MUSB_GADGET=y` causes builds to fail. When the same option is set to `=y` via the defconfig file, the option work. Follows the failure: ``` CC drivers/usb/musb-new/musb_gadget.o drivers/usb/musb-new/musb_gadget.c: In function 'map_dma_buffer': drivers/usb/musb-new/musb_gadget.c:103:26: warning: implicit declaration of function 'dma_map_single'; did you mean 'malloc_simple'? [-Wimplicit-function-declaration] request->request.dma = dma_map_single( ^~~~~~~~~~~~~~ malloc_simple drivers/usb/musb-new/musb_gadget.c:108:8: error: 'DMA_TO_DEVICE' undeclared (first use in this function); did you mean 'USB_DT_DEVICE'? ? DMA_TO_DEVICE ^~~~~~~~~~~~~ USB_DT_DEVICE drivers/usb/musb-new/musb_gadget.c:108:8: note: each undeclared identifier is reported only once for each function it appears in drivers/usb/musb-new/musb_gadget.c:109:8: error: 'DMA_FROM_DEVICE' undeclared (first use in this function); did you mean 'U_BOOT_DEVICE'? : DMA_FROM_DEVICE); ^~~~~~~~~~~~~~~ U_BOOT_DEVICE drivers/usb/musb-new/musb_gadget.c:112:3: warning: implicit declaration of function 'dma_sync_single_for_device' [-Wimplicit-function-declaration] dma_sync_single_for_device(musb->controller, ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/usb/musb-new/musb_gadget.c: In function 'unmap_dma_buffer': drivers/usb/musb-new/musb_gadget.c:135:3: warning: implicit declaration of function 'dma_unmap_single' [-Wimplicit-function-declaration] dma_unmap_single(musb->controller, ^~~~~~~~~~~~~~~~ drivers/usb/musb-new/musb_gadget.c:139:7: error: 'DMA_TO_DEVICE' undeclared (first use in this function); did you mean 'USB_DT_DEVICE'? ? DMA_TO_DEVICE ^~~~~~~~~~~~~ USB_DT_DEVICE drivers/usb/musb-new/musb_gadget.c:140:7: error: 'DMA_FROM_DEVICE' undeclared (first use in this function); did you mean 'U_BOOT_DEVICE'? : DMA_FROM_DEVICE); ^~~~~~~~~~~~~~~ U_BOOT_DEVICE drivers/usb/musb-new/musb_gadget.c:143:3: warning: implicit declaration of function 'dma_sync_single_for_cpu' [-Wimplicit-function-declaration] dma_sync_single_for_cpu(musb->controller, ^~~~~~~~~~~~~~~~~~~~~~~ make[1]: *** [scripts/Makefile.build:279: drivers/usb/musb-new/musb_gadget.o] Error 1 ``` By diffing the resulting configuration, Othe main difference found is `CONFIG_USB_MUSB_PIO_ONLY` is not set when failing, and set to `=y` when working. This was verified to be the missing option. As far as I understand it in Kconfig, "is not set" basically marks the option as using a negative "unset" value, and does not mean that it will use the default value. This difference in meaning makes it so that when toggling the option with `make menuconfig`, the option has already been set to "is not set", and it does not change to its default value. The actual bug may be that there is a regression and the code should work when this value is unset, in this case I do not know how to provide the proper fix. This fix corrects the issue by gating the option behind `if USB_MUSB_HOST || USB_MUSB_GADGET`. To me, it looks like this was the intention, in the initial patch, but might have been overlooked. I assume so since the option was defined after the `if`, rather than before, like the other options not gated behind the option. drivers/usb/musb-new/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/usb/musb-new/Kconfig b/drivers/usb/musb-new/Kconfig index 79ad14ef66..95499f1b17 100644 --- a/drivers/usb/musb-new/Kconfig +++ b/drivers/usb/musb-new/Kconfig @@ -72,11 +72,11 @@ config USB_MUSB_DISABLE_BULK_COMBINE_SPLIT support it yet. Select this option to disable the feature until the driver adds the support. -endif - config USB_MUSB_PIO_ONLY bool "Disable DMA (always use PIO)" default y if USB_MUSB_AM35X || USB_MUSB_PIC32 || USB_MUSB_OMAP2PLUS || USB_MUSB_DSPS || USB_MUSB_SUNXI help All data is copied between memory and FIFO by the CPU. DMA controllers are ignored. + +endif -- 2.23.0

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[U-Boot] [PATCH v3 00/20] Bring NAND support to Nintendo NES Classic
by Miquel Raynal 07 Jul '21

07 Jul '21

Hello, This series first adds fixes and enhancements to sunxi NAND drivers (SPL and U-Boot). Once this is done, the SPL NAND driver is converted to use PIO instead of DMA with the goal to support all SoCs with this IP without the need for DMA-related code. Finally, NAND support is added to Nintendo NES Classic through Kconfig and DT additions. Thanks, Miquèl Changes since v2: ================= - Added Boris and Maxime Acked-by tags. - Removed extra space in nand_reset_column() - Fixed the useless wait period on failure in nand_change_column(). - Changed the title "sunxi: allow NAND support to be compiled for..." (removed the "in SPL" precision which is wrong). - Enbraced the deassertion of the reset line by #if statements about the SoCs in use. Wolfgang Denk made a comment on my proposal but I could not find a better solution, so I kept it for now. - s/alwinner,[pin,functions]/[pin,functions]/ in the DT. - Change Alwinner-specific parts in the SPL to generic sentences. Changes since v1: ================= All: ---- - Enhance all commit messages. - Rebased on top of master branch (I should have done that earlier but I forgot I was on an old revision). Fix binman_sym output check --------------------------- - SPL seems to be broken for a few weeks when using raw NAND, fix it by changing the error condition. Fix strength ------------ - Add comment explaining the added line and moved the line for clarification on why it is needed. - Add forgotten Boris' Suggested-by tag. Fix second case of modulo by zero error ---------------------------------------- - Added a reference to the first occurence of this issue. Allow SPL to be compiled for sun8i platforms -------------------------------------------- - This commit is not about compiling the SPL, but the NAND support in the SPL, as corrected by Maxime. Enhancements and cleaning ------------------------- - Patch split into several logical chunks, as requested. - Removed useless udelay(1), that was added for debugging purpose. - Introduced the nand_exec_cmd() helper to mutualize code one step further. - Add an udelay(1) after changing the column to respect the minimum tCCS delay (Change Column Setup time). - Canceled moving to global scope the ecc_strength array. Use PIO instead of DMA ---------------------- - Change commit message/title. - Cancel removing NFC related definitions: they can be useful as the this IP is quite under-documented. - Merge nand_reset_column and nand_change_column (in another patch). - Moved the copy of the data after the check of the ECC status. - ECC chunks are read manually, return if the first chunk is empty only (needed for configuration research), otherwise it should not be treated as an error. Add NAND node to sun8i ---------------------- - U-Boot master branch already has this node, remove the patch. Enable NAND on NES classic -------------------------- - Change the DT cells size from 2 to 1. Add NAND support for NES classic -------------------------------- - Split in several patches, moving SPL_NAND_SUPPORT and NAND_SUNXI out of the defconfig files (NES and CHIP pro) to be automatically selected depending on NAND_SUNXI and ARCH_SUNXI. - Moved the NAND parameters to Kconfig (only for SUNXI because the tool did not work as expected, maybe due to some definitions that are not "numbers" but multiplications and sometimes use other definitions (NAND page size, 2K_SZ, etc). Miquel Raynal (20): spl: fix binman_sym output check mtd: nand: sunxi: fix ECC strength choice spl: nand: sunxi: fix second case of modulo by zero error spl: nand: sunxi: fix typo on register name spl: nand: sunxi: introduce the nand_wait_int() helper spl: nand: sunxi: introduce the nand_wait_cmd_fifo_empty() helper spl: nand: sunxi: add missing status clear spl: nand: sunxi: create an helper to handle command execution spl: nand: sunxi: ensure enough time has passed after changing the column spl: nand: sunxi: make the reset column helper more generic sunxi: spl: deassert the NAND controller reset line spl: nand: sunxi: declare the ecc_bytes array globally spl: nand: sunxi: use PIO instead of DMA sunxi: spl: remove DMA related settings of the NAND controller sunxi: allow NAND support to be compiled for sun8i platforms sunxi: dts: enable NAND on NES classic sunxi: automatically select SPL_NAND_SUPPORT in Kconfig sunxi: make NAND_SUNXI use ARCH_SUNXI as default in Kconfig sunxi: move the NAND parameters to Kconfig configs: add NAND support for NES Classic arch/arm/dts/sun8i-a23-a33.dtsi | 17 ++ .../dts/sun8i-r16-nintendo-nes-classic-edition.dts | 14 ++ arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 6 + board/sunxi/board.c | 7 +- common/spl/spl.c | 10 +- configs/CHIP_pro_defconfig | 6 +- configs/Nintendo_NES_Classic_Edition_defconfig | 4 + drivers/mtd/nand/Kconfig | 26 ++- drivers/mtd/nand/sunxi_nand.c | 8 +- drivers/mtd/nand/sunxi_nand_spl.c | 242 ++++++++++----------- 10 files changed, 208 insertions(+), 132 deletions(-) -- 2.14.1

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[U-Boot] [PATCH] cmd: pxe: Use internal FDT if external one cannot be retrieved
by Anton Leontiev 02 Dec '20

02 Dec '20

From: Anton Leontiev <aleontiev(a)elvees.com> Original commit c61d94d86035 ("pxe: implement fdtdir extlinux.conf tag") states, that if FDT file cannot be retrieved then FDT packaged in firmware should be used. If FDT file cannot be retrieved and it is specified explicitly using FDT keyword then the label is skipped. If it cannot be found in FDTDIR then internal FDT is tried first. Signed-off-by: Anton Leontiev <aleontiev(a)elvees.com> --- cmd/pxe.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/cmd/pxe.c b/cmd/pxe.c index 2059975446..28390c114c 100644 --- a/cmd/pxe.c +++ b/cmd/pxe.c @@ -795,9 +795,13 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label) int err = get_relfile_envaddr(cmdtp, fdtfile, "fdt_addr_r"); free(fdtfilefree); if (err < 0) { - printf("Skipping %s for failure retrieving fdt\n", - label->name); - goto cleanup; + bootm_argv[3] = NULL; + + if (label->fdt) { + printf("Skipping %s for failure retrieving FDT\n", + label->name); + goto cleanup; + } } } else { bootm_argv[3] = NULL; -- 2.22.1

3 10

[U-Boot] [PATCH] Adds basic support for ProxyDHCP
by lylejfranklin＠gmail.com 02 Dec '20

02 Dec '20

From: Lyle Franklin <lylejfranklin(a)gmail.com> - ProxyDHCP allows a second DHCP server to exist alongside your main DHCP server and supply additional BOOTP related options - When u-boot sends out a DHCP request, the real DHCP server will respond with a normal response containing the new client IP address while simultaneously the ProxyDHCP server will respond with a blank client IP address and a `bootfile` option - This patch adds CONFIG_SERVERIP_FROM_PROXYDHCP (default false) to enable this behavior and CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS (default 100) which tells u-boot to wait additional time after receiving the main DHCP response to give the ProxyDHCP response time to arrive - The PXE spec for ProxyDHCP is more complicated than the solution added here as diagramed on page 16: http://www.pix.net/software/pxeboot/archive/pxespec.pdf: ``` DHCP Discover will be retried four times. The four timeouts are 4, 8, 16 and 32 seconds respectively. If a DHCPOFFER is received without an Option timeouts in an attempt to receive a PXE response. ``` - Adding a simple delay worked for my purposes but let me know if a more robust solution is required Signed-off-by: Lyle Franklin <lylejfranklin(a)gmail.com> --- net/Kconfig | 14 ++++++++++++++ net/bootp.c | 27 ++++++++++++++++++++++----- 2 files changed, 36 insertions(+), 5 deletions(-) diff --git a/net/Kconfig b/net/Kconfig index 68cecf75a2..e46eb7833a 100644 --- a/net/Kconfig +++ b/net/Kconfig @@ -35,4 +35,18 @@ config TFTP_BLOCKSIZE help Default TFTP block size. +config SERVERIP_FROM_PROXYDHCP + bool "Get serverip value from Proxy DHCP response" + help + Allows bootfile config to be fetched from Proxy DHCP server + while IP is obtained from main DHCP server. + +config SERVERIP_FROM_PROXYDHCP_DELAY_MS + int "# of additional milliseconds to wait for ProxyDHCP response" + default 100 + help + Amount of additional time to wait for ProxyDHCP response after + receiving response from main DHCP server. Has no effect if + SERVERIP_FROM_PROXYDHCP is false. + endif # if NET diff --git a/net/bootp.c b/net/bootp.c index 9a2b512e4a..218dfde728 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -140,10 +140,7 @@ static int check_reply_packet(uchar *pkt, unsigned dest, unsigned src, return retval; } -/* - * Copy parameters of interest from BOOTP_REPLY/DHCP_OFFER packet - */ -static void store_net_params(struct bootp_hdr *bp) +static void store_bootp_params(struct bootp_hdr *bp) { #if !defined(CONFIG_BOOTP_SERVERIP) struct in_addr tmp_ip; @@ -176,6 +173,16 @@ static void store_net_params(struct bootp_hdr *bp) */ if (*net_boot_file_name) env_set("bootfile", net_boot_file_name); +#endif +} + +/* + * Copy parameters of interest from BOOTP_REPLY/DHCP_OFFER packet + */ +static void store_net_params(struct bootp_hdr *bp) +{ +#if !defined(CONFIG_SERVERIP_FROM_PROXYDHCP) + store_bootp_params(bp); #endif net_copy_ip(&net_ip, &bp->bp_yiaddr); } @@ -1049,8 +1056,12 @@ static void dhcp_handler(uchar *pkt, unsigned dest, struct in_addr sip, debug("DHCPHandler: got DHCP packet: (src=%d, dst=%d, len=%d) state: " "%d\n", src, dest, len, dhcp_state); - if (net_read_ip(&bp->bp_yiaddr).s_addr == 0) + if (net_read_ip(&bp->bp_yiaddr).s_addr == 0) { +#if defined(CONFIG_SERVERIP_FROM_PROXYDHCP) + store_bootp_params(bp); +#endif return; + } switch (dhcp_state) { case SELECTING: @@ -1069,6 +1080,12 @@ static void dhcp_handler(uchar *pkt, unsigned dest, struct in_addr sip, dhcp_packet_process_options(bp); efi_net_set_dhcp_ack(pkt, len); +#if defined(CONFIG_SERVERIP_FROM_PROXYDHCP) + if (!net_server_ip.s_addr) + udelay(CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS * + 1000); +#endif /* CONFIG_SERVERIP_FROM_PROXYDHCP */ + debug("TRANSITIONING TO REQUESTING STATE\n"); dhcp_state = REQUESTING; -- 2.22.0

2 1

[U-Boot] Booting on RK3399
by Simon Glass 19 Nov '20

19 Nov '20

Hi Kever, I have a firefly-rk3399 and would like to boot it into U-Boot (as a start) from an uSD card. Are there instructions somewhere on how to do this? I gather that I need OP-TEE but not how to build it or how to put the image together. I would like to have instructions in README.rockchip if possible. I'm planning to add U-Boot support for bob and maybe kevin (both Chromebooks) but am not sure where to start. I thought the firefly might be best since it is pretty common. Thanks for any help you can provide. Regards, Simon

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[U-Boot] [PATCH] board: Add support for iMX8QXP AI_ML board
by Manivannan Sadhasivam 27 Jul '20

27 Jul '20

This commit adds initial board support for iMX8QXP AI_ML board from Einfochips. This board is one of the 96Boards Consumer Edition and AI boards of the 96Boards family based on i.MX8QXP SoC from NXP/Freescale. This initial supports contains following peripherals which are tested and known to work: 1. Debug serial via UART2 2. SD card 3. Ethernet More information about this board can be found in arrow website: https://www.arrow.com/en/products/imx8-ai-ml/arrow-development-tools Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam(a)linaro.org> Reviewed-by: Peng Fan <peng.fan(a)nxp.com> --- arch/arm/mach-imx/imx8/Kconfig | 6 ++ board/einfochips/imx8qxp_ai_ml/Kconfig | 21 ++++ board/einfochips/imx8qxp_ai_ml/MAINTAINERS | 6 ++ board/einfochips/imx8qxp_ai_ml/Makefile | 8 ++ board/einfochips/imx8qxp_ai_ml/README | 49 ++++++++++ .../einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c | 78 +++++++++++++++ board/einfochips/imx8qxp_ai_ml/imximage.cfg | 24 +++++ board/einfochips/imx8qxp_ai_ml/spl.c | 39 ++++++++ configs/imx8qxp_ai_ml_defconfig | 83 ++++++++++++++++ include/configs/imx8qxp_ai_ml.h | 95 +++++++++++++++++++ 10 files changed, 409 insertions(+) create mode 100644 board/einfochips/imx8qxp_ai_ml/Kconfig create mode 100644 board/einfochips/imx8qxp_ai_ml/MAINTAINERS create mode 100644 board/einfochips/imx8qxp_ai_ml/Makefile create mode 100644 board/einfochips/imx8qxp_ai_ml/README create mode 100644 board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c create mode 100644 board/einfochips/imx8qxp_ai_ml/imximage.cfg create mode 100644 board/einfochips/imx8qxp_ai_ml/spl.c create mode 100644 configs/imx8qxp_ai_ml_defconfig create mode 100644 include/configs/imx8qxp_ai_ml.h diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index cdb78afacf..25fe4e2be0 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -55,6 +55,11 @@ config TARGET_COLIBRI_IMX8X select BOARD_LATE_INIT select IMX8QXP +config TARGET_IMX8QXP_AI_ML + bool "Support i.MX8QXP AI_ML board" + select BOARD_EARLY_INIT_F + select IMX8QXP + config TARGET_IMX8QM_MEK bool "Support i.MX8QM MEK board" select BOARD_LATE_INIT @@ -73,6 +78,7 @@ config TARGET_IMX8QXP_MEK endchoice +source "board/einfochips/imx8qxp_ai_ml/Kconfig" source "board/freescale/imx8qm_mek/Kconfig" source "board/freescale/imx8qxp_mek/Kconfig" source "board/advantech/imx8qm_rom7720_a1/Kconfig" diff --git a/board/einfochips/imx8qxp_ai_ml/Kconfig b/board/einfochips/imx8qxp_ai_ml/Kconfig new file mode 100644 index 0000000000..b6806b8859 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Kconfig @@ -0,0 +1,21 @@ +if TARGET_IMX8QXP_AI_ML + +config SYS_BOARD + default "imx8qxp_ai_ml" + +config SYS_VENDOR + default "einfochips" + +config SYS_CONFIG_NAME + default "imx8qxp_ai_ml" + +config SYS_MALLOC_LEN + default 0x2400000 + +config ENV_SIZE + default 0x1000 + +config ENV_OFFSET + default 0x400000 + +endif diff --git a/board/einfochips/imx8qxp_ai_ml/MAINTAINERS b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS new file mode 100644 index 0000000000..add0bd9431 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS @@ -0,0 +1,6 @@ +i.MX8QXP AI_ML BOARD +M: Manivannan Sadhasivam <manivannan.sadhasivam(a)linaro.org> +S: Maintained +F: board/einfochips/imx8qxp_ai_ml/ +F: include/configs/imx8qxp_ai_ml.h +F: configs/imx8qxp_ai_ml_defconfig diff --git a/board/einfochips/imx8qxp_ai_ml/Makefile b/board/einfochips/imx8qxp_ai_ml/Makefile new file mode 100644 index 0000000000..e08774dc6e --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Makefile @@ -0,0 +1,8 @@ +# +# Copyright 2019 Linaro Ltd. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += imx8qxp_ai_ml.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/einfochips/imx8qxp_ai_ml/README b/board/einfochips/imx8qxp_ai_ml/README new file mode 100644 index 0000000000..488920580f --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/README @@ -0,0 +1,49 @@ +U-Boot for the Einfochips i.MX8QXP AI_ML board + +Quick Start +=========== + +- Get and Build the ARM Trusted firmware +- Get scfw_tcm.bin and ahab-container.img +- Build U-Boot +- Flash the binary into the SD card +- Boot + +Get and Build the ARM Trusted firmware +====================================== + +$ git clone https://source.codeaurora.org/external/imx/imx-atf +$ cd imx-atf/ +$ git checkout origin/imx_4.9.88_imx8qxp_beta2 -b imx_4.9.88_imx8qxp_beta2 +$ make PLAT=imx8qxp bl31 + +Get scfw_tcm.bin and ahab-container.img +======================================= + +$ wget https://raw.githubusercontent.com/96boards-ai-ml/binaries/master/mx8qx-aiml… +$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.1.bin +$ chmod +x firmware-imx-8.1.bin +$ ./firmware-imx-8.1.bin + +Copy the following binaries to U-Boot folder: + +$ cp imx-atf/build/imx8qxp/release/bl31.bin . +$ cp firmware-imx-8.1/firmware/seco/mx8qx-ahab-container.img . + +Build U-Boot +============ + +$ make imx8qxp_ai_ml_defconfig +$ make u-boot-dtb.imx + +Flash the binary into the SD card +================================= + +Burn the u-boot-dtb.imx binary to SD card offset 32KB: + +$ sudo dd if=u-boot-dtb.imx of=/dev/sd[x] bs=1024 seek=32 + +Boot +==== + +Set Boot switch SW2: 1100. diff --git a/board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c b/board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c new file mode 100644 index 0000000000..465fea65f8 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + * Copyright 2019 Linaro Ltd. + */ + +#include <common.h> +#include <errno.h> +#include <linux/libfdt.h> +#include <fsl_esdhc.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/sci/sci.h> +#include <asm/arch/imx8-pins.h> +#include <asm/arch/iomux.h> +#include <asm/arch/sys_proto.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + sc_pm_clock_rate_t rate = SC_80MHZ; + int ret; + + /* Set UART2 clock root to 80 MHz */ + ret = sc_pm_setup_uart(SC_R_UART_2, rate); + if (ret) + return ret; + + return 0; +} + +#if IS_ENABLED(CONFIG_FEC_MXC) +#include <miiphy.h> + +int board_phy_config(struct phy_device *phydev) +{ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); + + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); + + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} +#endif + +int checkboard(void) +{ + puts("Board: iMX8QXP AI_ML\n"); + + build_info(); + print_bootinfo(); + + return 0; +} + +int board_init(void) +{ + return 0; +} + +/* Board specific reset that is system reset */ + +void reset_cpu(ulong addr) +{ + /* TODO */ +} + +#ifdef CONFIG_OF_BOARD_SETUP +int ft_board_setup(void *blob, bd_t *bd) +{ + return 0; +} +#endif diff --git a/board/einfochips/imx8qxp_ai_ml/imximage.cfg b/board/einfochips/imx8qxp_ai_ml/imximage.cfg new file mode 100644 index 0000000000..4fc5ade313 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/imximage.cfg @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + * + * Refer doc/README.imx8image for more details about how-to configure + * and create imx8image boot image + */ + +#define __ASSEMBLY__ + +/* Boot from SD, sector size 0x400 */ +BOOT_FROM SD 0x400 +/* SoC type IMX8QX */ +SOC_TYPE IMX8QX +/* Append seco container image */ +APPEND mx8qx-ahab-container.img +/* Create the 2nd container */ +CONTAINER +/* Add scfw image with exec attribute */ +IMAGE SCU mx8qx-aiml-scfw-tcm.bin +/* Add ATF image with exec attribute */ +IMAGE A35 bl31.bin 0x80000000 +/* Add U-Boot image with load attribute */ +DATA A35 u-boot-dtb.bin 0x80020000 diff --git a/board/einfochips/imx8qxp_ai_ml/spl.c b/board/einfochips/imx8qxp_ai_ml/spl.c new file mode 100644 index 0000000000..2e6e0741e5 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/spl.c @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + * Copyright 2019 Linaro Ltd. + * + */ + +#include <common.h> +#include <dm.h> +#include <spl.h> +#include <dm/uclass.h> +#include <dm/device.h> +#include <dm/uclass-internal.h> +#include <dm/device-internal.h> +#include <dm/lists.h> + +DECLARE_GLOBAL_DATA_PTR; + +void spl_board_init(void) +{ + arch_cpu_init(); + + timer_init(); + + preloader_console_init(); + + puts("Normal Boot\n"); +} + +void board_init_f(ulong dummy) +{ + /* Clear global data */ + memset((void *)gd, 0, sizeof(gd_t)); + + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end - __bss_start); + + board_init_r(NULL, 0); +} diff --git a/configs/imx8qxp_ai_ml_defconfig b/configs/imx8qxp_ai_ml_defconfig new file mode 100644 index 0000000000..e20a0c783e --- /dev/null +++ b/configs/imx8qxp_ai_ml_defconfig @@ -0,0 +1,83 @@ +CONFIG_ARM=y +CONFIG_ARCH_IMX8=y +CONFIG_SYS_TEXT_BASE=0x80020000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_TARGET_IMX8QXP_AI_ML=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=4 +CONFIG_SPL=y +CONFIG_FIT=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/einfochips/imx8qxp_ai_ml/imximage.cfg" +CONFIG_BOOTDELAY=3 +CONFIG_LOG=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_CPU=y +# CONFIG_CMD_IMPORTENV is not set +CONFIG_CMD_CLK=y +CONFIG_CMD_DM=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_FAT_WRITE=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-ai_ml" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SPL_DM=y +CONFIG_SPL_CLK=y +CONFIG_CLK_IMX8=y +CONFIG_CPU=y +CONFIG_DM_GPIO=y +CONFIG_MXC_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_IMX_LPI2C=y +CONFIG_MISC=y +CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_ADDR_ENABLE=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_PHY_GIGE=y +CONFIG_FEC_MXC_SHARE_MDIO=y +CONFIG_FEC_MXC_MDIO_BASE=0x5B040000 +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_IMX8=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SPL_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y +CONFIG_FSL_LPUART=y +CONFIG_SPL_TINY_MEMSET=y +# CONFIG_EFI_LOADER is not set diff --git a/include/configs/imx8qxp_ai_ml.h b/include/configs/imx8qxp_ai_ml.h new file mode 100644 index 0000000000..bdac710103 --- /dev/null +++ b/include/configs/imx8qxp_ai_ml.h @@ -0,0 +1,95 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + * Copyright 2019 Linaro Ltd. + */ + +#ifndef __IMX8QXP_AI_ML_H +#define __IMX8QXP_AI_ML_H + +#include <linux/sizes.h> +#include <asm/arch/imx-regs.h> + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_MAX_SIZE (124 * SZ_1K) +#define CONFIG_SYS_MONITOR_LEN (SZ_1K * SZ_1K) +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x250 +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0 + +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" +#define CONFIG_SPL_STACK 0x013E000 +#define CONFIG_SPL_BSS_START_ADDR 0x00128000 +#define CONFIG_SPL_BSS_MAX_SIZE SZ_4K /* 4 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x00120000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ +#define CONFIG_SERIAL_LPUART_BASE 0x5a080000 +#define CONFIG_MALLOC_F_ADDR 0x00120000 + +#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE + +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE + +#define CONFIG_OF_SEPARATE +#endif + +#define CONFIG_REMAKE_ELF + +/* Flat Device Tree Definitions */ +#define CONFIG_OF_BOARD_SETUP + +#define CONFIG_FSL_USDHC + +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttyLP2 earlycon\0" \ + "fdt_addr_r=0x83000000\0" \ + "kernel_addr_r=0x81000000\0" \ + "ramdisk_addr_r=0x94400000\0" \ + "scriptaddr=0x89000000\0" \ + "fdtfile=imx8qxp-ai_ml.dtb\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "image=Image\0" \ + "initrd_addr=0x83800000\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "netargs=setenv bootargs console=${console},${baudrate} " \ + "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \ + "\0" \ + "nfsboot=run netargs; dhcp ${loadaddr} ${image}; tftp ${fdt_addr} " \ + "imx8qxp-ai_ml/${fdt_file}; booti ${loadaddr} - ${fdt_addr}\0" \ + BOOTENV + +/* Link Definitions */ +#define CONFIG_LOADADDR 0x80280000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_SYS_INIT_SP_ADDR 0x80200000 + +/* USDHC2 is the SD card interface */ +#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define PHYS_SDRAM_1 0x80000000 +#define PHYS_SDRAM_2 0x880000000 +#define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */ +#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */ + +/* Generic Timer Definitions */ +#define COUNTER_FREQUENCY 8000000 /* 8MHz */ + +/* Networking */ +#define CONFIG_FEC_XCV_TYPE RGMII +#define FEC_QUIRK_ENET_MAC + +#endif /* __IMX8QXP_AI_ML_H */ -- 2.17.1

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[U-Boot] [PATCH v1 00/10] arm: pxa: mmc: add driver model support
by Marcel Ziswiler 30 Jun '20

30 Jun '20

This series, after some initial clean-up, ultimately adds support for the driver model (DM) in the PXA MMC driver. Marcel Ziswiler (10): mmc: add missing space before comment delimiter mmc: fsl_esdhc: annotate endifs serial: pxa: clean-up platform data include file Makefile: allow dm_mmc without of_control dm: core: gracefully handle alias seq without of kconfig: mmc: move pxa_mmc_generic to kconfig arm: pxa: mmc: add driver model support colibri_pxa270_defconfig: enable cmd_dm colibri_pxa270: add mmc platform data colibri_pxa270_defconfig: enable dm_mmc Makefile | 2 +- board/toradex/colibri_pxa270/colibri_pxa270.c | 20 ++- configs/colibri_pxa270_defconfig | 3 + configs/zipitz2_defconfig | 1 + drivers/core/read.c | 4 +- drivers/mmc/Kconfig | 8 + drivers/mmc/fsl_esdhc.c | 4 +- drivers/mmc/mmc.c | 2 +- drivers/mmc/pxa_mmc_gen.c | 160 +++++++++++++++--- include/configs/pxa-common.h | 7 - include/configs/zipitz2.h | 8 - include/dm/platform_data/pxa_mmc_gen.h | 22 +++ include/dm/platform_data/serial_pxa.h | 8 +- include/dm/read.h | 4 + scripts/config_whitelist.txt | 1 - 15 files changed, 196 insertions(+), 58 deletions(-) create mode 100644 include/dm/platform_data/pxa_mmc_gen.h -- 2.21.0

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[U-Boot] [PATCH v2 00/16] Add Intel Stratix 10 SoC support
by Ley Foon Tan 11 Jun '20

11 Jun '20

This is 2nd version of patchset to adds support for Intel Stratix 10 SoC. This patchset is work on top of patchset in [1]. Changes: - update base addresses header - use reset framework for periperhals (16550 UART, MMC, EMAC) - change to use serial DM driver - move bridge command to misc common driver and reuse for other platforms - rework board_init_f() in SPL - update S10 dts and dtsi - Mailbox: - change to use register offset to access register instead of register structure - rename function with __xxx prefix - DDR: - rework DDR driver - change to use register offset to access register instead of register structure - remove union bitwise structure - use wait_for_bit to poll Patchset history: [v1]: https://patchwork.ozlabs.org/cover/900499/ [1]: https://patchwork.ozlabs.org/cover/910018/ Ley Foon Tan (16): arm: socfpga: stratix10: Add watchdog and firewall base addresses arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC arm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switch arm: socfpga: misc: Move bridge command to misc common arm: socfpga: stratix10: Add misc support for Stratix10 SoC arm: socfpga: stratix10: Add mailbox support for Stratix10 SoC arm: socfpga: stratix10: Add MMU support for Stratix10 SoC arm: socfpga: Restructure the SPL file arm: socfpga: stratix10: Add SPL driver for Stratix10 SoC arm: socfpga: stratix10: Add timer support for Stratix10 SoC ddr: altera: stratix10: Add DDR support for Stratix10 SoC board: altera: stratix10: Add socdk board support for Stratix10 SoC arm: dts: socfpga: stratix10: update dtsi and dts arm: socfpga: stratix10: Enable Stratix10 SoC build arch/arm/Kconfig | 9 +- arch/arm/dts/socfpga_stratix10.dtsi | 22 +- arch/arm/dts/socfpga_stratix10_socdk.dts | 3 + arch/arm/mach-socfpga/Kconfig | 16 + arch/arm/mach-socfpga/Makefile | 23 +- arch/arm/mach-socfpga/clock_manager.c | 4 +- arch/arm/mach-socfpga/clock_manager_s10.c | 380 +++++++++++++++++++ arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 11 + arch/arm/mach-socfpga/include/mach/clock_manager.h | 2 + .../mach-socfpga/include/mach/clock_manager_s10.h | 210 +++++++++++ arch/arm/mach-socfpga/include/mach/firewall_s10.h | 120 ++++++ arch/arm/mach-socfpga/include/mach/handoff_s10.h | 34 ++ arch/arm/mach-socfpga/include/mach/mailbox_s10.h | 144 ++++++++ arch/arm/mach-socfpga/include/mach/misc.h | 2 + arch/arm/mach-socfpga/include/mach/reset_manager.h | 2 + .../mach-socfpga/include/mach/reset_manager_s10.h | 116 ++++++ arch/arm/mach-socfpga/include/mach/sdram_s10.h | 183 +++++++++ .../arm/mach-socfpga/include/mach/system_manager.h | 5 +- .../mach-socfpga/include/mach/system_manager_s10.h | 176 +++++++++ arch/arm/mach-socfpga/mailbox_s10.c | 380 +++++++++++++++++++ arch/arm/mach-socfpga/misc.c | 34 ++ arch/arm/mach-socfpga/misc_gen5.c | 26 +-- arch/arm/mach-socfpga/misc_s10.c | 133 +++++++ arch/arm/mach-socfpga/mmu-arm64_s10.c | 71 ++++ arch/arm/mach-socfpga/reset_manager.c | 13 + arch/arm/mach-socfpga/reset_manager_s10.c | 140 +++++++ arch/arm/mach-socfpga/spl_a10.c | 105 ++++++ arch/arm/mach-socfpga/{spl.c => spl_gen5.c} | 57 +--- arch/arm/mach-socfpga/spl_s10.c | 199 ++++++++++ arch/arm/mach-socfpga/system_manager_s10.c | 91 +++++ arch/arm/mach-socfpga/timer_s10.c | 26 ++ arch/arm/mach-socfpga/wrap_pinmux_config_s10.c | 56 +++ arch/arm/mach-socfpga/wrap_pll_config_s10.c | 59 +++ board/altera/stratix10-socdk/MAINTAINERS | 7 + board/altera/stratix10-socdk/Makefile | 7 + board/altera/stratix10-socdk/socfpga.c | 7 + configs/socfpga_stratix10_defconfig | 58 +++ drivers/ddr/altera/Makefile | 1 + drivers/ddr/altera/sdram_s10.c | 388 ++++++++++++++++++++ include/configs/socfpga_stratix10_socdk.h | 222 +++++++++++ 40 files changed, 3459 insertions(+), 83 deletions(-) create mode 100644 arch/arm/mach-socfpga/clock_manager_s10.c create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/firewall_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/handoff_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/mailbox_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/sdram_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_s10.h create mode 100644 arch/arm/mach-socfpga/mailbox_s10.c create mode 100644 arch/arm/mach-socfpga/misc_s10.c create mode 100644 arch/arm/mach-socfpga/mmu-arm64_s10.c create mode 100644 arch/arm/mach-socfpga/reset_manager_s10.c create mode 100644 arch/arm/mach-socfpga/spl_a10.c rename arch/arm/mach-socfpga/{spl.c => spl_gen5.c} (82%) create mode 100644 arch/arm/mach-socfpga/spl_s10.c create mode 100644 arch/arm/mach-socfpga/system_manager_s10.c create mode 100644 arch/arm/mach-socfpga/timer_s10.c create mode 100644 arch/arm/mach-socfpga/wrap_pinmux_config_s10.c create mode 100644 arch/arm/mach-socfpga/wrap_pll_config_s10.c create mode 100644 board/altera/stratix10-socdk/MAINTAINERS create mode 100644 board/altera/stratix10-socdk/Makefile create mode 100644 board/altera/stratix10-socdk/socfpga.c create mode 100644 configs/socfpga_stratix10_defconfig create mode 100644 drivers/ddr/altera/sdram_s10.c create mode 100644 include/configs/socfpga_stratix10_socdk.h

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