August 2018 - U-Boot

[U-Boot] [PATCH v1 1/2] x86: zImage: Move subarch assignment out of cmd_line check
by Andy Shevchenko 22 Aug '18

22 Aug '18

The commit 20bfac0599bd ("x86: zImage: add Intel MID platforms support") introduced an assignment of subarch field in boot parameters, though missed the right place of doing that. It doesn't matter if we have or not a kernel command line supplied, we just set that field. Although guard it by protocol version which supports it. Fixes: 20bfac0599bd ("x86: zImage: add Intel MID platforms support") Cc: Vincent Tinelli <vincent.tinelli(a)intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- arch/x86/lib/zimage.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index 00172dc7c1..d224db4e07 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -246,14 +246,15 @@ int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot, hdr->setup_move_size = 0x9100; } -#if defined(CONFIG_INTEL_MID) - hdr->hardware_subarch = X86_SUBARCH_INTEL_MID; -#endif - /* build command line at COMMAND_LINE_OFFSET */ build_command_line(cmd_line, auto_boot); } +#ifdef CONFIG_INTEL_MID + if (bootproto >= 0x0207) + hdr->hardware_subarch = X86_SUBARCH_INTEL_MID; +#endif + setup_video(&setup_base->screen_info); return 0; -- 2.15.1

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[U-Boot] [PATCH] mmc: sdhci-of-arasan: Do now show error message in case of deffered probe
by Michal Simek 22 Aug '18

22 Aug '18

When mmc-pwrseq property is passed mmc_pwrseq_alloc() can return -EPROBE_DEFER because driver for power sequence provider is not probed yet. Do not show error message when this situation happens. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- drivers/mmc/host/sdhci-of-arasan.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index e3332a522a5d..e65f3bce3643 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c @@ -772,7 +772,8 @@ static int sdhci_arasan_probe(struct platform_device *pdev) ret = mmc_of_parse(host->mmc); if (ret) { - dev_err(&pdev->dev, "parsing dt failed (%d)\n", ret); + if (ret != -EPROBE_DEFER) + dev_err(&pdev->dev, "parsing dt failed (%d)\n", ret); goto unreg_clk; } -- 1.9.1

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Re: [U-Boot] Unaligned memory accesses exception
by Bin Meng 22 Aug '18

22 Aug '18

Hi Fernando, On Wed, Aug 22, 2018 at 5:16 PM, Fernando AE <fernando.ae2017(a)gmail.com> wrote: > Hi Bin, > > The problem lies in these 2 lines, in the ping_send function: > > eth_hdr_size = net_set_ether(net_tx_packet, net_null_ethaddr, PROT_IP); > pkt = (uchar *)net_tx_packet + eth_hdr_size; > > While net_tx_packet is aligned to 32 bits, eth_hdr_size is 14. As a > result 'pkt' is not aligned to 32 bits. Thanks for the information. I see the alignment issue here. > > Further in the code structs like ip_hdr and icmp_hdr (correctly > defined with words aligned to 32 bits) will point to 'pkt', generating > the exceptions. > > Just to highlight, that I'm rather OK with U-Boot having the alignment > exception disabled. I'm just wondering if the kernel expects such > traps enabled or not, and the performance impact of userspace programs > (further developed without alignment in mind). Like I mentioned in the previous email, did you check how other ARMv7 targets behave? Do they turn off this check? My understanding is that newer ARM targets support unaligned access by default. Added Tom to this loop as he has more ARM experience than me. Regards, Bin

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[U-Boot] [PATCH v3 00/10] splash screen on the stm32f769 disco board
by Yannick Fertré 22 Aug '18

22 Aug '18

Version 1: - Initial commit. Version 2: - swap patches to avoid compilation issue. - remove panel timings from device tree. Version 3: - Share same include file mipi_display.h with kernel linux. - Rework ltdc driver with last comments of Anatolij Gustshin. - Check ordering (file dw_mipi_dsi.c). - Rename mipi_display.c to mipi_dsi.c. This serie contains all patchsets needed for displaying a splash screen on the stm32f769 disco board. A new config has been created configs/stm32f769-disco_defconfig. This is necessary due to the difference of panels between stm32f769-disco & stm32f746-disco boards. Yannick Fertré (10): video: stm32: stm32_ltdc: add bridge to display controller include: Add new DCS commands in the enum list video: add support of MIPI DSI interface video: add MIPI DSI host controller bridge video: add support of STM32 MIPI DSI controller driver video: add support of panel OTM8009A video: add support of panel RM68200 arm: dts: stm32: add dsi for STM32F746 arm: dts: stm32: add display for STM32F769 disco board board: Add STM32F769 SoC, discovery board support arch/arm/dts/stm32f746.dtsi | 12 + arch/arm/dts/stm32f769-disco.dts | 41 ++ configs/stm32f769-disco_defconfig | 67 +++ drivers/video/Kconfig | 33 ++ drivers/video/Makefile | 4 + drivers/video/dw_mipi_dsi.c | 827 ++++++++++++++++++++++++++++++++++++ drivers/video/mipi_dsi.c | 828 +++++++++++++++++++++++++++++++++++++ drivers/video/orisetech_otm8009a.c | 367 ++++++++++++++++ drivers/video/raydium-rm68200.c | 339 +++++++++++++++ drivers/video/stm32/Kconfig | 10 + drivers/video/stm32/Makefile | 1 + drivers/video/stm32/stm32_dsi.c | 428 +++++++++++++++++++ drivers/video/stm32/stm32_ltdc.c | 143 ++++--- include/dw_mipi_dsi.h | 33 ++ include/mipi_display.h | 8 + include/mipi_dsi.h | 451 ++++++++++++++++++++ 16 files changed, 3531 insertions(+), 61 deletions(-) create mode 100644 configs/stm32f769-disco_defconfig create mode 100644 drivers/video/dw_mipi_dsi.c create mode 100644 drivers/video/mipi_dsi.c create mode 100644 drivers/video/orisetech_otm8009a.c create mode 100644 drivers/video/raydium-rm68200.c create mode 100644 drivers/video/stm32/stm32_dsi.c create mode 100644 include/dw_mipi_dsi.h create mode 100644 include/mipi_dsi.h -- 2.7.4

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[U-Boot] ext4: Issue with ext4write
by Aaron Williams 22 Aug '18

22 Aug '18

Hi all, I am sometimes seeing issues when using ext4write where fsck later complains that the group descriptor has an invalid number of unused inodes. Is this a known problem? Also, I think the assert(offset == sizeof(*desc)); in ext4fs_checksum_update() is invalid since with ext4 the descriptor is larger than the offset. When debugging was enabled I'd always hit this assert. Also, in ext4fs_write, the debug statement should say blocks and not bytes. -Aaron -- Aaron Williams Senior Software Engineer Cavium, Inc. (408) 943-7198 (510) 789-8988 (cell)

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[U-Boot] Disabling CONFIG_DM_I2C_COMPAT in twl4030 PMIC
by Adam Ford 21 Aug '18

21 Aug '18

I am working to disable CONFIG_DM_I2C_COMPAT for the omap3 boards. Some of these boards use the TWL4030 PMIC which is still using the older i2c_write and i2c_read functions. I wonder if someone can point me to a good patch that I can use a model one how to appropriately port I2C drivers forward? I'd like to disable this feature so the notice goes away since it seems like DM_I2C should be do-able by now. thanks adam

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[U-Boot] [PATCH v2 0/2] Add Rock960 board support
by Manivannan Sadhasivam 21 Aug '18

21 Aug '18

This patchset adds board support for Vamrs Limited Rock960, which is one of the 96Boards Consumer Edition platform based on Rockchip RK3399 SoC. On this board, U-Boot will be loaded by ATF as a BL33 image which in turn loads Linux kernel from eMMC or SD card. Instructions for building and flashing the images are specified in board README.md file. More information about this board can be found in 96Boards product page: https://www.96boards.org/product/rock960/ The board support includes only the necessary interfaces required to boot Linux kernel. Thanks, Mani Manivannan Sadhasivam (2): arm: dts: Add Rock960 devicetree support board: Add Vamrs Limited Rock960 board support arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3399-rock960.dts | 348 ++++++++++++++++++++ arch/arm/mach-rockchip/rk3399/Kconfig | 16 + board/vamrs/rock960_rk3399/Kconfig | 15 + board/vamrs/rock960_rk3399/MAINTAINERS | 6 + board/vamrs/rock960_rk3399/Makefile | 6 + board/vamrs/rock960_rk3399/README | 79 +++++ board/vamrs/rock960_rk3399/rock960-rk3399.c | 50 +++ configs/rock960-rk3399_defconfig | 62 ++++ include/configs/rock960_rk3399.h | 15 + 10 files changed, 598 insertions(+) create mode 100644 arch/arm/dts/rk3399-rock960.dts create mode 100644 board/vamrs/rock960_rk3399/Kconfig create mode 100644 board/vamrs/rock960_rk3399/MAINTAINERS create mode 100644 board/vamrs/rock960_rk3399/Makefile create mode 100644 board/vamrs/rock960_rk3399/README create mode 100644 board/vamrs/rock960_rk3399/rock960-rk3399.c create mode 100644 configs/rock960-rk3399_defconfig create mode 100644 include/configs/rock960_rk3399.h -- 2.17.1

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[U-Boot] [PATCH] ARM: dts: socfpga: Drop ad-hoc UART clock frequency encoding from DT
by Marek Vasut 21 Aug '18

21 Aug '18

The UART clock frequency can be obtained from the clock framework by the ns16550 driver, so drop this redundant DT node. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Chin Liang See <chin.liang.see(a)intel.com> Cc: Dinh Nguyen <dinguyen(a)kernel.org> Cc: Ley Foon Tan <ley.foon.tan(a)intel.com> --- arch/arm/dts/socfpga_arria10_socdk.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/dts/socfpga_arria10_socdk.dtsi b/arch/arm/dts/socfpga_arria10_socdk.dtsi index 9160c20bd0..b202b382f4 100644 --- a/arch/arm/dts/socfpga_arria10_socdk.dtsi +++ b/arch/arm/dts/socfpga_arria10_socdk.dtsi @@ -154,7 +154,6 @@ }; &uart1 { - clock-frequency = <50000000>; u-boot,dm-pre-reloc; status = "okay"; }; -- 2.17.1

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[U-Boot] [PATCH] ARM: socfpga: Fix Arria10 SPI and NAND U-Boot offset
by Marek Vasut 21 Aug '18

21 Aug '18

The SPL size on Gen5 is 4*64kiB, but on A10 it is 4*256kiB. Handle the difference. Signed-off-by: Marek Vasut <marex(a)denx.de> --- include/configs/socfpga_common.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 55ca0fb5b0..fbfc6b63a0 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -266,12 +266,20 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* SPL QSPI boot support */ #ifdef CONFIG_SPL_SPI_SUPPORT +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 +#endif #endif /* SPL NAND boot support */ #ifdef CONFIG_SPL_NAND_SUPPORT +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x100000 +#endif #endif /* -- 2.17.1

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[U-Boot] [PATCH] ARM: dts: socfpga: Add missing NAND reset
by Marek Vasut 21 Aug '18

21 Aug '18

The NAND reset is missing from DT, so the reset manager cannot unreset the NAND. Add the missing DT reset entry. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Chin Liang See <chin.liang.see(a)intel.com> Cc: Dinh Nguyen <dinguyen(a)kernel.org> Cc: Ley Foon Tan <ley.foon.tan(a)intel.com> --- arch/arm/dts/socfpga_arria10.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi index 573974be04..46f2fd4b69 100644 --- a/arch/arm/dts/socfpga_arria10.dtsi +++ b/arch/arm/dts/socfpga_arria10.dtsi @@ -673,6 +673,7 @@ interrupts = <0 99 4>; dma-mask = <0xffffffff>; clocks = <&nand_clk>; + resets = <&rst NAND_RESET>; status = "disabled"; }; -- 2.17.1

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