July 2018 - U-Boot

[U-Boot] Pull request: u-boot-net.git master
by Joe Hershberger 03 Jul '18

03 Jul '18

Hi Tom, The following changes since commit ac378bb05fa3cac3197085431f577e0dbddd4b4a: Merge git://git.denx.de/u-boot-x86 (2018-07-01 22:13:34 -0400) are available in the git repository at: git://git.denx.de/u-boot-net.git master for you to fetch changes up to a9ea30d267f26bee0b3a5cdd659624a866da3d19: ax25: Switch to CONFIG_BOOTP_PREFER_SERVERIP (2018-07-02 14:14:21 -0500) ---------------------------------------------------------------- Alex Kiernan (1): net: fastboot: Fix build when FASTBOOT_FLASH is disabled Alexander Graf (3): net: Prefer command line arguments net: Add option to prefer bootp/dhcp serverip ax25: Switch to CONFIG_BOOTP_PREFER_SERVERIP Lothar Felten (1): net: Add new wol command - Wake on LAN Michal Simek (1): net: zynq_gem: Initialize val variable in zynq_gem_miiphy_read() Rabeeh Khoury (2): net: mvneta: dcache flush TX descriptors at init net: mvneta: zero Tx descriptors on init cmd/Kconfig | 15 +++++++ cmd/Makefile | 1 + cmd/net.c | 10 ++++- cmd/wol.c | 33 +++++++++++++++ configs/ax25-ae350_defconfig | 1 + configs/pengwyn_defconfig | 1 + drivers/net/mvneta.c | 2 + drivers/net/zynq_gem.c | 2 +- include/configs/ax25-ae350.h | 1 - include/net.h | 5 ++- net/Makefile | 1 + net/bootp.c | 21 +++++++--- net/fastboot.c | 2 + net/net.c | 21 ++++++++++ net/wol.c | 96 ++++++++++++++++++++++++++++++++++++++++++++ net/wol.h | 65 ++++++++++++++++++++++++++++++ 16 files changed, 266 insertions(+), 11 deletions(-) create mode 100644 cmd/wol.c create mode 100644 net/wol.c create mode 100644 net/wol.h Thanks! -Joe

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[U-Boot] Pull request: u-boot-spi/master
by Jagan Teki 03 Jul '18

03 Jul '18

Hi, Please pull this PR. thanks, Jagan. The following changes since commit 51dce7d2bfdecd974412634e4a0758ac55edcc00: mtd: spi: Correct parameters for s25fs512s flash (2018-06-25 15:50:33 +0530) are available in the Git repository at: git://git.denx.de/u-boot-spi.git master for you to fetch changes up to 069b746ad9e66ab75973020f992e059c06cf3a7c: sf: Enable FSR polling on N25Q256(A) (2018-06-28 19:58:40 +0530) ---------------------------------------------------------------- Hannes Schmelzer (1): spi: omap3: fix claim/release bus within DM Marek Vasut (1): sf: Enable FSR polling on N25Q256(A) drivers/mtd/spi/spi_flash_ids.c | 4 ++-- drivers/spi/omap3_spi.c | 14 +++++++------- 2 files changed, 9 insertions(+), 9 deletions(-)

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[U-Boot] [PATCH v5 1/6] sunxi: R40: add gigabit ethernet clocks
by Lothar Felten 02 Jul '18

02 Jul '18

Add clock control entries for the gigabit interface of the Allwinner R40/V40 CPU Acked-by: Maxime Ripard <maxime.ripard(a)bootlin.com> Reviewed-by: Joe Hershberger <joe.hershberger(a)ni.com> Signed-off-by: Lothar Felten <lothar.felten(a)gmail.com> --- Changelog: new in v2 v2->v3->4->v5: none --- arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index 8afeaf872e..016b811de1 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h @@ -60,7 +60,11 @@ struct sunxi_ccm_reg { u32 reserved11; u32 sata_clk_cfg; /* 0xc8 SATA clock control (R40 only) */ u32 usb_clk_cfg; /* 0xcc USB clock control */ - u32 gmac_clk_cfg; /* 0xd0 GMAC clock control */ +#ifdef CONFIG_MACH_SUN8I_R40 + u32 cir0_clk_cfg; /* 0xd0 CIR0 clock control (R40 only) */ +#else + u32 gmac_clk_cfg; /* 0xd0 GMAC clock control (not for R40) */ +#endif u32 reserved12[7]; u32 mdfs_clk_cfg; /* 0xf0 MDFS clock control */ u32 dram_clk_cfg; /* 0xf4 DRAM configuration clock control */ @@ -103,7 +107,11 @@ struct sunxi_ccm_reg { u32 mtc_clk_cfg; /* 0x158 MTC module clock */ u32 mbus0_clk_cfg; /* 0x15c MBUS0 module clock */ u32 mbus1_clk_cfg; /* 0x160 MBUS1 module clock */ +#ifdef CONFIG_MACH_SUN8I_R40 + u32 gmac_clk_cfg; /* 0x164 GMAC clock control (R40 only) */ +#else u32 reserved16; +#endif u32 mipi_dsi_clk_cfg; /* 0x168 MIPI DSI clock control */ u32 mipi_csi_clk_cfg; /* 0x16c MIPI CSI clock control */ u32 reserved17[4]; -- 2.14.1

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[U-Boot] [PATCH 1/2] net: mvgbe: prepare for conversion to driver model
by Chris Packham 02 Jul '18

02 Jul '18

Extract some function bodies to helper functions that can be reused in the DM/non-DM implementations. Signed-off-by: Chris Packham <judge.packham(a)gmail.com> --- drivers/net/mvgbe.c | 109 ++++++++++++++++++++++++++++++++------------ 1 file changed, 80 insertions(+), 29 deletions(-) diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c index e6585ef8b3e7..96ca35512f01 100644 --- a/drivers/net/mvgbe.c +++ b/drivers/net/mvgbe.c @@ -55,20 +55,13 @@ static int smi_wait_ready(struct mvgbe_device *dmvgbe) return 0; } -/* - * smi_reg_read - miiphy_read callback function. - * - * Returns 16bit phy register value, or -EFAULT on error - */ -static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad, - int reg_ofs) +static int __mvgbe_mdio_read(struct mvgbe_device *dmvgbe, int phy_adr, + int devad, int reg_ofs) { - u16 data = 0; - struct eth_device *dev = eth_get_dev_by_name(bus->name); - struct mvgbe_device *dmvgbe = to_mvgbe(dev); struct mvgbe_registers *regs = dmvgbe->regs; u32 smi_reg; u32 timeout; + u16 data = 0; /* Phyadr read request */ if (phy_adr == MV_PHY_ADR_REQUEST && @@ -127,15 +120,22 @@ static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad, } /* - * smi_reg_write - miiphy_write callback function. + * smi_reg_read - miiphy_read callback function. * - * Returns 0 if write succeed, -EFAULT on error + * Returns 16bit phy register value, or -EFAULT on error */ -static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad, - int reg_ofs, u16 data) +static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad, + int reg_ofs) { struct eth_device *dev = eth_get_dev_by_name(bus->name); struct mvgbe_device *dmvgbe = to_mvgbe(dev); + + return __mvgbe_mdio_read(dmvgbe, phy_adr, devad, reg_ofs); +} + +static int __mvgbe_mdio_write(struct mvgbe_device *dmvgbe, int phy_adr, + int devad, int reg_ofs, u16 data) +{ struct mvgbe_registers *regs = dmvgbe->regs; u32 smi_reg; @@ -171,6 +171,20 @@ static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad, return 0; } + +/* + * smi_reg_write - miiphy_write callback function. + * + * Returns 0 if write succeed, -EFAULT on error + */ +static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad, + int reg_ofs, u16 data) +{ + struct eth_device *dev = eth_get_dev_by_name(bus->name); + struct mvgbe_device *dmvgbe = to_mvgbe(dev); + + return __mvgbe_mdio_write(dmvgbe, phy_adr, devad, reg_ofs, data); +} #endif /* Stop and checks all queues */ @@ -357,8 +371,9 @@ static int port_uc_addr(struct mvgbe_registers *regs, u8 uc_nibble, /* * port_uc_addr_set - This function Set the port Unicast address. */ -static void port_uc_addr_set(struct mvgbe_registers *regs, u8 * p_addr) +static void port_uc_addr_set(struct mvgbe_device *dmvgbe, u8 *p_addr) { + struct mvgbe_registers *regs = dmvgbe->regs; u32 mac_h; u32 mac_l; @@ -400,9 +415,8 @@ static void mvgbe_init_rx_desc_ring(struct mvgbe_device *dmvgbe) dmvgbe->p_rxdesc_curr = dmvgbe->p_rxdesc; } -static int mvgbe_init(struct eth_device *dev) +static int __mvgbe_init(struct mvgbe_device *dmvgbe) { - struct mvgbe_device *dmvgbe = to_mvgbe(dev); struct mvgbe_registers *regs = dmvgbe->regs; #if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) && \ !defined(CONFIG_PHYLIB) && \ @@ -422,7 +436,7 @@ static int mvgbe_init(struct eth_device *dev) set_dram_access(regs); port_init_mac_tables(regs); - port_uc_addr_set(regs, dmvgbe->dev.enetaddr); + port_uc_addr_set(dmvgbe, dmvgbe->dev.enetaddr); /* Assign port configuration and command. */ MVGBE_REG_WR(regs->pxc, PRT_CFG_VAL); @@ -478,9 +492,15 @@ static int mvgbe_init(struct eth_device *dev) return 0; } -static int mvgbe_halt(struct eth_device *dev) +static int mvgbe_init(struct eth_device *dev) { struct mvgbe_device *dmvgbe = to_mvgbe(dev); + + return __mvgbe_init(dmvgbe); +} + +static void __mvgbe_halt(struct mvgbe_device *dmvgbe) +{ struct mvgbe_registers *regs = dmvgbe->regs; /* Disable all gigE address decoder */ @@ -502,6 +522,13 @@ static int mvgbe_halt(struct eth_device *dev) MVGBE_REG_WR(regs->ice, 0); MVGBE_REG_WR(regs->pim, 0); MVGBE_REG_WR(regs->peim, 0); +} + +static int mvgbe_halt(struct eth_device *dev) +{ + struct mvgbe_device *dmvgbe = to_mvgbe(dev); + + __mvgbe_halt(dmvgbe); return 0; } @@ -509,16 +536,15 @@ static int mvgbe_halt(struct eth_device *dev) static int mvgbe_write_hwaddr(struct eth_device *dev) { struct mvgbe_device *dmvgbe = to_mvgbe(dev); - struct mvgbe_registers *regs = dmvgbe->regs; /* Programs net device MAC address after initialization */ - port_uc_addr_set(regs, dmvgbe->dev.enetaddr); + port_uc_addr_set(dmvgbe, dmvgbe->dev.enetaddr); return 0; } -static int mvgbe_send(struct eth_device *dev, void *dataptr, int datasize) +static int __mvgbe_send(struct mvgbe_device *dmvgbe, void *dataptr, + int datasize) { - struct mvgbe_device *dmvgbe = to_mvgbe(dev); struct mvgbe_registers *regs = dmvgbe->regs; struct mvgbe_txdesc *p_txdesc = dmvgbe->p_txdesc; void *p = (void *)dataptr; @@ -571,13 +597,23 @@ static int mvgbe_send(struct eth_device *dev, void *dataptr, int datasize) return 0; } -static int mvgbe_recv(struct eth_device *dev) +static int mvgbe_send(struct eth_device *dev, void *dataptr, int datasize) { struct mvgbe_device *dmvgbe = to_mvgbe(dev); + + return __mvgbe_send(dmvgbe, dataptr, datasize); +} + +static int __mvgbe_recv(struct mvgbe_device *dmvgbe, uchar **packetp) +{ struct mvgbe_rxdesc *p_rxdesc_curr = dmvgbe->p_rxdesc_curr; u32 cmd_sts; u32 timeout = 0; u32 rxdesc_curr_addr; + unsigned char *data; + int rx_bytes = 0; + + *packetp = NULL; /* wait untill rx packet available or timeout */ do { @@ -621,11 +657,11 @@ static int mvgbe_recv(struct eth_device *dev) " upper layer (net_process_received_packet)\n", __func__); - /* let the upper layer handle the packet */ - net_process_received_packet((p_rxdesc_curr->buf_ptr + - RX_BUF_OFFSET), - (int)(p_rxdesc_curr->byte_cnt - - RX_BUF_OFFSET)); + data = (p_rxdesc_curr->buf_ptr + RX_BUF_OFFSET); + rx_bytes = (int)(p_rxdesc_curr->byte_cnt - + RX_BUF_OFFSET); + + *packetp = data; } /* * free these descriptors and point next in the ring @@ -638,6 +674,21 @@ static int mvgbe_recv(struct eth_device *dev) rxdesc_curr_addr = (u32)&dmvgbe->p_rxdesc_curr; writel((unsigned)p_rxdesc_curr->nxtdesc_p, rxdesc_curr_addr); + return rx_bytes; +} + +static int mvgbe_recv(struct eth_device *dev) +{ + struct mvgbe_device *dmvgbe = to_mvgbe(dev); + uchar *packet; + int ret; + + ret = __mvgbe_recv(dmvgbe, &packet); + if (ret < 0) + return ret; + + net_process_received_packet(packet, ret); + return 0; } -- 2.18.0

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[U-Boot] [PATCH v4 1/6] sunxi: R40: add gigabit ethernet clocks
by Lothar Felten 02 Jul '18

02 Jul '18

Add clock control entries for the gigabit interface of the Allwinner R40/V40 CPU Acked-by: Maxime Ripard <maxime.ripard(a)bootlin.com> Reviewed-by: Joe Hershberger <joe.hershberger(a)ni.com> Signed-off-by: Lothar Felten <lothar.felten(a)gmail.com> --- Changelog: new in v2 v2->v3->4: none arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index 8afeaf872e..016b811de1 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h @@ -60,7 +60,11 @@ struct sunxi_ccm_reg { u32 reserved11; u32 sata_clk_cfg; /* 0xc8 SATA clock control (R40 only) */ u32 usb_clk_cfg; /* 0xcc USB clock control */ - u32 gmac_clk_cfg; /* 0xd0 GMAC clock control */ +#ifdef CONFIG_MACH_SUN8I_R40 + u32 cir0_clk_cfg; /* 0xd0 CIR0 clock control (R40 only) */ +#else + u32 gmac_clk_cfg; /* 0xd0 GMAC clock control (not for R40) */ +#endif u32 reserved12[7]; u32 mdfs_clk_cfg; /* 0xf0 MDFS clock control */ u32 dram_clk_cfg; /* 0xf4 DRAM configuration clock control */ @@ -103,7 +107,11 @@ struct sunxi_ccm_reg { u32 mtc_clk_cfg; /* 0x158 MTC module clock */ u32 mbus0_clk_cfg; /* 0x15c MBUS0 module clock */ u32 mbus1_clk_cfg; /* 0x160 MBUS1 module clock */ +#ifdef CONFIG_MACH_SUN8I_R40 + u32 gmac_clk_cfg; /* 0x164 GMAC clock control (R40 only) */ +#else u32 reserved16; +#endif u32 mipi_dsi_clk_cfg; /* 0x168 MIPI DSI clock control */ u32 mipi_csi_clk_cfg; /* 0x16c MIPI CSI clock control */ u32 reserved17[4]; -- 2.14.1

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[U-Boot] [PATCH v3 0/3] net: Sanitize DHCP variable override
by Alexander Graf 02 Jul '18

02 Jul '18

While trying to boot from network on a RISC-V AX25 platform, I saw that the DHCP IP address did not get populated from the DHCP server IP address. The reason for that was simple: CONFIG_BOOTP_SERVERIP was set. I don't know the history of that option, but it seems to decrease intuitivity levels of the dhcp command rather than improve it. What I usually would expect is that explicitly set values populate through all layers. So if I set a TFTP file name, it populates. If I set a target IP address, it populates. If I don't set anything, the values get filled in automatically. This patch set is trying to move us into that direction without breaking people that rely on the existing behavior. With this patch set applied, boards have the option to prefer the 'serverip' environment variable (ax25-ae350 gets moved to it) over the DHCP given address and any value explicitly set on the command line is always preferred. This hopefully makes the command line a bit more intuitive. v1 -> v2: - new patch: net: Prefer command line arguments - remove README entry - improve Kconfig help texts v2 -> v3: - also check for net_boot_file_name_explicit on option 67 Alexander Graf (3): net: Prefer command line arguments net: Add option to prefer bootp/dhcp serverip ax25: Switch to CONFIG_BOOTP_PREFER_SERVERIP cmd/Kconfig | 11 +++++++++++ cmd/net.c | 10 ++++++++-- configs/ax25-ae350_defconfig | 1 + include/configs/ax25-ae350.h | 1 - include/net.h | 2 ++ net/bootp.c | 21 +++++++++++++++------ net/net.c | 2 ++ 7 files changed, 39 insertions(+), 9 deletions(-) -- 2.12.3

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[U-Boot] [PATCH v2 1/1] net: new command: wol - Wake on LAN
by Lothar Felten 02 Jul '18

02 Jul '18

Add a new command 'wol': Wait for an incoming Wake-on-LAN packet or time out if no WoL packed is received. If the WoL packet contains a password, it is saved in the environment variable 'wolpassword' using the etherwake format (dot or colon separated decimals). Intended use case: a networked device should boot an alternate image. It's attached to a network on a client site, modifying the DHCP server configuration or setup of a tftp server is not allowed. After power on the device waits a few seconds for a WoL packet. If a packet is received, the device boots the alternate image. Otherwise it boots the default image. This method is a simple way to interact with a system via network even if only the MAC address is known. Tools to send WoL packets are available on all common platforms. Some ethernet drivers seem to pad the incoming packet. The additional padding bytes might be recognized as Wake-on-LAN password bytes. By default enabled in pengwyn_defconfig. Signed-off-by: Lothar Felten <lothar.felten(a)gmail.com> --- Changes v1 -> v2: - UDP support (suggested by Joe Hershberger) - moved to separate command file cmd/wol.c - style and formatting cmd/Kconfig | 5 +++ cmd/Makefile | 1 + cmd/wol.c | 33 ++++++++++++++++ configs/pengwyn_defconfig | 1 + include/net.h | 3 +- net/Makefile | 1 + net/net.c | 19 ++++++++++ net/wol.c | 96 +++++++++++++++++++++++++++++++++++++++++++++++ net/wol.h | 65 ++++++++++++++++++++++++++++++++ 9 files changed, 223 insertions(+), 1 deletion(-) create mode 100644 cmd/wol.c create mode 100644 net/wol.c create mode 100644 net/wol.h diff --git a/cmd/Kconfig b/cmd/Kconfig index 1eb55e5250..00c208843d 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -1239,6 +1239,11 @@ config CMD_PXE help Boot image via network using PXE protocol +config CMD_WOL + bool "wol" + help + Wait for wake-on-lan Magic Packet + endif menu "Misc commands" diff --git a/cmd/Makefile b/cmd/Makefile index e0088df33b..2875fd4b4b 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -100,6 +100,7 @@ obj-$(CONFIG_CMD_PCI) += pci.o endif obj-y += pcmcia.o obj-$(CONFIG_CMD_PXE) += pxe.o +obj-$(CONFIG_CMD_WOL) += wol.o obj-$(CONFIG_CMD_QFW) += qfw.o obj-$(CONFIG_CMD_READ) += read.o obj-$(CONFIG_CMD_REGINFO) += reginfo.o diff --git a/cmd/wol.c b/cmd/wol.c new file mode 100644 index 0000000000..91b3929025 --- /dev/null +++ b/cmd/wol.c @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2018 + * Lothar Felte, lothar.felten(a)gmail.com + */ + +/* + * Wake-on-LAN support + */ +#include <common.h> +#include <command.h> +#include <net.h> + +#if defined(CONFIG_CMD_WOL) +void wol_set_timeout(ulong); + +int do_wol(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + /* Validate arguments */ + if (argc < 2) + return CMD_RET_USAGE; + wol_set_timeout(simple_strtol(argv[1], NULL, 10) * 1000); + if (net_loop(WOL) < 0) + return CMD_RET_FAILURE; + return CMD_RET_SUCCESS; +} + +U_BOOT_CMD( + wol, 2, 1, do_wol, + "wait for an incoming wake-on-lan packet", + "Timeout" +); +#endif diff --git a/configs/pengwyn_defconfig b/configs/pengwyn_defconfig index 0ee8e6e1b9..76b5715a99 100644 --- a/configs/pengwyn_defconfig +++ b/configs/pengwyn_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y +CONFIG_CMD_WOL=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y diff --git a/include/net.h b/include/net.h index 5760685556..9c7199aca9 100644 --- a/include/net.h +++ b/include/net.h @@ -344,6 +344,7 @@ struct vlan_ethernet_hdr { #define PROT_IP 0x0800 /* IP protocol */ #define PROT_ARP 0x0806 /* IP ARP protocol */ +#define PROT_WOL 0x0842 /* ether-wake WoL protocol */ #define PROT_RARP 0x8035 /* IP ARP protocol */ #define PROT_VLAN 0x8100 /* IEEE 802.1q protocol */ #define PROT_IPV6 0x86dd /* IPv6 over bluebook */ @@ -535,7 +536,7 @@ extern int net_restart_wrap; /* Tried all network devices */ enum proto_t { BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP, - TFTPSRV, TFTPPUT, LINKLOCAL, FASTBOOT + TFTPSRV, TFTPPUT, LINKLOCAL, FASTBOOT, WOL }; extern char net_boot_file_name[1024];/* Boot File name */ diff --git a/net/Makefile b/net/Makefile index 07466879f5..c3699d309d 100644 --- a/net/Makefile +++ b/net/Makefile @@ -23,6 +23,7 @@ obj-$(CONFIG_CMD_PING) += ping.o obj-$(CONFIG_CMD_RARP) += rarp.o obj-$(CONFIG_CMD_SNTP) += sntp.o obj-$(CONFIG_CMD_TFTPBOOT) += tftp.o +obj-$(CONFIG_CMD_WOL) += wol.o obj-$(CONFIG_UDP_FUNCTION_FASTBOOT) += fastboot.o # Disable this warning as it is triggered by: diff --git a/net/net.c b/net/net.c index b4563a4cab..084269e31e 100644 --- a/net/net.c +++ b/net/net.c @@ -78,6 +78,12 @@ * - own IP address * We want: - network time * Next step: none + * + * WOL: + * + * Prerequisites: - own ethernet address + * We want: - magic packet or timeout + * Next step: none */ @@ -108,6 +114,9 @@ #if defined(CONFIG_CMD_SNTP) #include "sntp.h" #endif +#if defined(CONFIG_CMD_WOL) +#include "wol.h" +#endif /** BOOTP EXTENTIONS **/ @@ -514,6 +523,11 @@ restart: case LINKLOCAL: link_local_start(); break; +#endif +#if defined(CONFIG_CMD_WOL) + case WOL: + wol_start(); + break; #endif default: break; @@ -1281,6 +1295,11 @@ void net_process_received_packet(uchar *in_packet, int len) ntohs(ip->udp_src), ntohs(ip->udp_len) - UDP_HDR_SIZE); break; +#ifdef CONFIG_CMD_WOL + case PROT_WOL: + wol_receive(ip, len); + break; +#endif } } diff --git a/net/wol.c b/net/wol.c new file mode 100644 index 0000000000..b95b03ce5e --- /dev/null +++ b/net/wol.c @@ -0,0 +1,96 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 Lothar Felten, lothar.felten(a)gmail.com + */ + +#include <common.h> +#include <command.h> +#include <net.h> +#include <environment.h> +#include "wol.h" + +static ulong wol_timeout = WOL_DEFAULT_TIMEOUT; + +/* + * Check incoming Wake-on-LAN packet for: + * - sync bytes + * - sixteen copies of the target MAC address + * + * @param wol Wake-on-LAN packet + * @param len Packet length + */ +static int wol_check_magic(struct wol_hdr *wol, unsigned int len) +{ + int i; + + if (len < sizeof(struct wol_hdr)) + return 0; + + for (i = 0; i < WOL_SYNC_COUNT; i++) + if (wol->wol_sync[i] != WOL_SYNC_BYTE) + return 0; + + for (i = 0; i < WOL_MAC_REPETITIONS; i++) + if (memcmp(&wol->wol_dest[i * ARP_HLEN], + net_ethaddr, ARP_HLEN) != 0) + return 0; + + return 1; +} + +void wol_receive(struct ip_udp_hdr *ip, unsigned int len) +{ + struct wol_hdr *wol; + + wol = (struct wol_hdr *)ip; + + if (!wol_check_magic(wol, len)) + return; + + /* save the optional password using the ether-wake formats */ + /* don't check for exact length, the packet might have padding */ + if (len >= (sizeof(struct wol_hdr) + WOL_PASSWORD_6B)) { + eth_env_set_enetaddr("wolpassword", wol->wol_passwd); + } else if (len >= (sizeof(struct wol_hdr) + WOL_PASSWORD_4B)) { + char buffer[16]; + struct in_addr *ip = (struct in_addr *)(wol->wol_passwd); + + ip_to_string(*ip, buffer); + env_set("wolpassword", buffer); + } + net_set_state(NETLOOP_SUCCESS); +} + +static void wol_udp_handler(uchar *pkt, unsigned int dest, struct in_addr sip, + unsigned int src, unsigned int len) +{ + struct wol_hdr *wol; + + wol = (struct wol_hdr *)pkt; + + /* UDP destination port must be 0, 7 or 9 */ + if (dest != 0 && dest != 7 && dest != 9) + return; + + if (!wol_check_magic(wol, len)) + return; + + net_set_state(NETLOOP_SUCCESS); +} + +void wol_set_timeout(ulong timeout) +{ + wol_timeout = timeout; +} + +static void wol_timeout_handler(void) +{ + eth_halt(); + net_set_state(NETLOOP_FAIL); +} + +void wol_start(void) +{ + net_set_timeout_handler(wol_timeout, wol_timeout_handler); + net_set_udp_handler(wol_udp_handler); +} diff --git a/net/wol.h b/net/wol.h new file mode 100644 index 0000000000..ebc81f24b6 --- /dev/null +++ b/net/wol.h @@ -0,0 +1,65 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * wol - Wake-on-LAN + * + * Supports both Wake-on-LAN packet types: + * - EtherType 0x0842 packets + * - UDP packets on ports 0, 7 and 9. + * + * Copyright 2018 Lothar Felten, lothar.felten(a)gmail.com + */ + +#if defined(CONFIG_CMD_WOL) + +#ifndef __WOL_H__ +#define __WOL_H__ + +#include <net.h> + +/**********************************************************************/ + +#define WOL_SYNC_BYTE 0xFF +#define WOL_SYNC_COUNT 6 +#define WOL_MAC_REPETITIONS 16 +#define WOL_DEFAULT_TIMEOUT 5000 +#define WOL_PASSWORD_4B 4 +#define WOL_PASSWORD_6B 6 + +/* + * Wake-on-LAN header + */ +struct wol_hdr { + u8 wol_sync[WOL_SYNC_COUNT]; /* sync bytes */ + u8 wol_dest[WOL_MAC_REPETITIONS * ARP_HLEN]; /* 16x MAC */ + u8 wol_passwd[0]; /* optional */ +}; + +/* + * Initialize wol (beginning of netloop) + */ +void wol_start(void); + +/* + * Check incoming Wake-on-LAN packet for: + * - sync bytes + * - sixteen copies of the target MAC address + * + * Optionally store the four or six byte password in the environment + * variable "wolpassword" + * + * @param ip IP header in the packet + * @param len Packet length + */ +void wol_receive(struct ip_udp_hdr *ip, unsigned int len); + +/* + * Set the timeout for the reception of a Wake-on-LAN packet + * + * @param timeout in milliseconds + */ +void wol_set_timeout(ulong timeout); + +/**********************************************************************/ + +#endif /* __WOL_H__ */ +#endif -- 2.14.1

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[U-Boot] [PATCH v2 1/2] net: mvneta: dcache flush TX descriptors at init
by Baruch Siach 02 Jul '18

02 Jul '18

From: Rabeeh Khoury <rabeeh(a)solid-run.com> This fixes sporadic timeout on initial packet Tx (usually ARP), with an error message like: timeout: packet not sent Reviewed-by: Stefan Roese <sr(a)denx.de> Tested-by: Chris Packham <judge.packham(a)gmail.com> Acked-by: Joe Hershberger <joe.hershberger(a)ni.com> Signed-off-by: Rabeeh Khoury <rabeeh(a)solid-run.com> Signed-off-by: Baruch Siach <baruch(a)tkos.co.il> --- v2: Make the patch checkpatch compliant (Stefan Roese) --- drivers/net/mvneta.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c index 45e5eda95522..254dd04697db 100644 --- a/drivers/net/mvneta.c +++ b/drivers/net/mvneta.c @@ -1702,6 +1702,7 @@ static int mvneta_probe(struct udevice *dev) /* Align buffer area for descs and rx_buffers to 1MiB */ bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE); + flush_dcache_range((ulong)bd_space, (ulong)bd_space + BD_SPACE); mmu_set_region_dcache_behaviour((phys_addr_t)bd_space, BD_SPACE, DCACHE_OFF); buffer_loc.tx_descs = (struct mvneta_tx_desc *)bd_space; -- 2.17.1

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[U-Boot] [PATCH] net: fastboot: Fix build when FASTBOOT_FLASH is disabled
by Alex Kiernan 02 Jul '18

02 Jul '18

When building without FASTBOOT_FLASH we don't include the intermediate update callback to keep the client alive, so ensure we don't try setting it here. Signed-off-by: Alex Kiernan <alex.kiernan(a)gmail.com> --- net/fastboot.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/net/fastboot.c b/net/fastboot.c index a9f7c0743d..8afc5529cd 100644 --- a/net/fastboot.c +++ b/net/fastboot.c @@ -309,7 +309,9 @@ void fastboot_start_server(void) fastboot_our_port = WELL_KNOWN_PORT; +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH) fastboot_set_progress_callback(fastboot_timed_send_info); +#endif net_set_udp_handler(fastboot_handler); /* zero out server ether in case the server ip has changed */ -- 2.17.0

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[U-Boot] [PATCH] net: zynq_gem: Initialize val variable in zynq_gem_miiphy_read()
by Michal Simek 02 Jul '18

02 Jul '18

phyread can timeout and val will contain random value. Initialize it to zero not to report random value in case of error. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- Reported by: Coverity (local) --- drivers/net/zynq_gem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index a817f2e5d69b..d1138fe0903d 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -609,7 +609,7 @@ static int zynq_gem_miiphy_read(struct mii_dev *bus, int addr, { struct zynq_gem_priv *priv = bus->priv; int ret; - u16 val; + u16 val = 0; ret = phyread(priv, addr, reg, &val); debug("%s 0x%x, 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, val, ret); -- 1.9.1

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