July 2018 - U-Boot

[U-Boot] [PATCH] sysreset: dm: Support manual relocation for sysreset
by Michal Simek 15 Jul '18

15 Jul '18

Relocate sysreset ops as was done by: "dm: Add support for all targets which requires MANUAL_RELOC" (sha1: 484fdf5ba058b07be5ca82763aa2b72063540ef3) Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- drivers/sysreset/sysreset-uclass.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c index 7e06c3c90a71..840eab6b5703 100644 --- a/drivers/sysreset/sysreset-uclass.c +++ b/drivers/sysreset/sysreset-uclass.c @@ -74,7 +74,23 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 0; } +static int sysreset_post_bind(struct udevice *dev) +{ +#if defined(CONFIG_NEEDS_MANUAL_RELOC) + struct sysreset_ops *ops = sysreset_get_ops(dev); + static int reloc_done; + + if (!reloc_done) { + if (ops->request) + ops->request += gd->reloc_off; + reloc_done++; + } +#endif + return 0; +} + UCLASS_DRIVER(sysreset) = { .id = UCLASS_SYSRESET, .name = "sysreset", + .post_bind = sysreset_post_bind, }; -- 1.9.1

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[U-Boot] [PATCH v2] microblaze: Do not call timer init that early
by Michal Simek 15 Jul '18

15 Jul '18

Timer needs to be converted to DM but as of now it can't be called so early because intc controller is not ready. Call it later in board_r.c. Before this patch timer_init is called twice which is wrong. The patch is blocking initialization before relocation. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- Changes in v2: - Do not add new ifdef to board_f and use GD_FLG_RELOC instead - reported-by sjg - Change commit message arch/microblaze/cpu/timer.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/microblaze/cpu/timer.c b/arch/microblaze/cpu/timer.c index ef229023bf08..58e5c3075085 100644 --- a/arch/microblaze/cpu/timer.c +++ b/arch/microblaze/cpu/timer.c @@ -51,6 +51,10 @@ int timer_init (void) debug("TIMER: Initialization\n"); + /* Do not init before relocation */ + if (!(gd->flags & GD_FLG_RELOC)) + return 0; + node = fdt_node_offset_by_compatible(blob, node, "xlnx,xps-timer-1.00.a"); if (node != -1) { -- 1.9.1

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[U-Boot] Raspberry Pi / fdt_addr bug with environment
by Pascal Vizeli 15 Jul '18

15 Jul '18

Hi, I found a funny bug. I don't think that is a raspberry pi only bug. It is the handling how env restore work. We use the origin device tree from first bootloader. We store also the environment to SSD for a fallback scenario. Now it store also the fdt_addr to environment. On next boot, it overwrite the origin fdt address with last known address from environment. It look like the rpi don't change the address a lot. I see that only after I update the firmware/first stage bootloader. I can fix that inside script with a workaround, but maybe we need change the handling of restore a bit? Greets Pascal

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[U-Boot] [PATCH] efi.h: Fix truncation of constant value
by Eugeniu Rosca 14 Jul '18

14 Jul '18

Starting with commit 867a6ac86dd8 ("efi: Add start-up library code"), sparse constantly complains about truncated constant value in efi.h: include/efi.h:176:35: warning: cast truncates bits from constant value (8000000000000000 becomes 0) This can get quite noisy, preventing real issues to be noticed: $ make defconfig *** Default configuration is based on 'sandbox_defconfig' $ make C=2 -j12 2>&1 | grep truncates | wc -l 441 After the patch is applied: $ make C=2 -j12 2>&1 | grep truncates | wc -l 0 $ sparse --version v0.5.2 Fixes: 867a6ac86dd8 ("efi: Add start-up library code") Signed-off-by: Eugeniu Rosca <erosca(a)de.adit-jv.com> --- include/efi.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/efi.h b/include/efi.h index 0fe15e65c06c..3e3f23b42f8a 100644 --- a/include/efi.h +++ b/include/efi.h @@ -172,11 +172,11 @@ enum { EFI_MEMORY_RP_SHIFT = 13, /* read-protect */ EFI_MEMORY_XP_SHIFT = 14, /* execute-protect */ EFI_MEMORY_RUNTIME_SHIFT = 63, /* range requires runtime mapping */ - - EFI_MEMORY_RUNTIME = 1ULL << EFI_MEMORY_RUNTIME_SHIFT, - EFI_MEM_DESC_VERSION = 1, }; +#define EFI_MEMORY_RUNTIME (1ULL << EFI_MEMORY_RUNTIME_SHIFT) +#define EFI_MEM_DESC_VERSION 1 + #define EFI_PAGE_SHIFT 12 #define EFI_PAGE_SIZE (1UL << EFI_PAGE_SHIFT) #define EFI_PAGE_MASK (EFI_PAGE_SIZE - 1) -- 2.18.0

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[U-Boot] [PATCH 0/2] avb 2.0: fix multiple compilation issues in sandbox
by Igor Opaniuk 14 Jul '18

14 Jul '18

This series of two patches fixes compilation issues when AVB 2.0 is enabled for the 'sandbox' architecture: 1. Since libavb library alone is highly portable, it introduce dedicated Kconfig symbol for AVB compiler-dependent operations, so it's possible to build libavb separately. 2. Add CONFIG_FASTBOOT dependency, as fastboot buffer is re-used in partition verification operations. 3. Use blk_dread()/blk_dwrite() in mmc_read()/mmc_write() AVB operation implementations. This fixes compilation issues when CONFIG_BLK is enabled. Igor Opaniuk (2): avb2.0: add proper dependencies avb2.0: use block API in AVB ops cmd/Kconfig | 2 +- common/Kconfig | 7 +++++++ common/avb_verify.c | 9 +++++---- doc/README.avb2 | 1 + 4 files changed, 14 insertions(+), 5 deletions(-) -- 2.7.4

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[U-Boot] tpm TIS TPMv2.0
by Hecht, Martin (Avnet Silica) 14 Jul '18

14 Jul '18

Hi Miquel, Simon, Is there any specific reason why the new tpm2_tis_spi_xfer doesn't support full duplex? It seems we did some work in parallel but you sent the patches earlier. Is that codes tested against an existing TPM v2? I have a working implementation what runs on SLB9670 including full duplex. Regards, Martin Dipl. Inform. Martin Hecht Senior Embedded Specialist / Functional Safety Engineer TA1130871952 Avnet SILICA [http://digital.avnet.com/signature/images/silica/Avnet_silica_logo.png] Englische Straße 27 10587 Berlin martin.hecht(a)avnet.eu<mailto:%20martin.hecht@avnet.eu> O +49 (0) 30 214 88 227 M +49 (0) 172 890 60 19 avnet-silica.com<http://avnet-silica.eu/> [cid:image002.png@01D404BE.4B5BC5F0]

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[U-Boot] [PATCH 1/3] ARM: socfpga: Assure correct CPACR configuration
by Marek Vasut 14 Jul '18

14 Jul '18

Make sure the ARM CPACR register is zeroed out, this is mandatory on Arria10. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Chin Liang See <chin.liang.see(a)intel.com> Cc: Dinh Nguyen <dinguyen(a)kernel.org> --- arch/arm/mach-socfpga/board.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c index 26d84be6e9..e8c7503fba 100644 --- a/arch/arm/mach-socfpga/board.c +++ b/arch/arm/mach-socfpga/board.c @@ -21,12 +21,14 @@ DECLARE_GLOBAL_DATA_PTR; void s_init(void) { #ifndef CONFIG_ARM64 /* - * Preconfigure ACTLR, make sure Write Full Line of Zeroes is disabled. + * Preconfigure ACTLR and CPACR, make sure Write Full Line of Zeroes + * is disabled in ACTLR. * This is optional on CycloneV / ArriaV. * This is mandatory on Arria10, otherwise Linux refuses to boot. */ asm volatile( "mcr p15, 0, %0, c1, c0, 1\n" + "mcr p15, 0, %0, c1, c0, 2\n" "isb\n" "dsb\n" ::"r"(0x0)); -- 2.16.2

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[U-Boot] [PATCH] sandbox_flattree: Switch to TPMv2 support
by Tom Rini 14 Jul '18

14 Jul '18

In order to have the test.py tests for TPMv2 run automatically we need to have one of our sandbox builds use TPMv2 rather than TPMv1. Switch sandbox_flattree over to this style of TPM. Cc: Simon Glass <sjg(a)chromium.org> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- I'm tempted to switch the main sandbox target over instead as I don't quite see where we're running the tpm1.x tests automatically. Would that be a better idea? --- configs/sandbox_flattree_defconfig | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index 08072e8f0312..ca67de1be8aa 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -51,8 +51,8 @@ CONFIG_CMD_BOOTSTAGE=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_TPM=y -CONFIG_CMD_TPM_TEST=y CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_LOG=y CONFIG_MAC_PARTITION=y CONFIG_AMIGA_PARTITION=y CONFIG_OF_CONTROL=y @@ -156,7 +156,8 @@ CONFIG_SYSRESET=y CONFIG_TIMER=y CONFIG_TIMER_EARLY=y CONFIG_SANDBOX_TIMER=y -CONFIG_TPM_TIS_SANDBOX=y +# CONFIG_TPM_V1 is not set +CONFIG_TPM_V2=y CONFIG_TPM2_TIS_SANDBOX=y CONFIG_USB=y CONFIG_DM_USB=y -- 2.7.4

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[U-Boot] CONFIG_SPL_TINY_MEMSET for configs/smartweb_defconfig?
by Dr. Philipp Tomsich 14 Jul '18

14 Jul '18

Heiko, I have a SPL change assigned in my queue that breaks the smartweb config due to increasing SPL by a few bytes of extra code. I’d like to enable CONFIG_SPL_TINY_MEMSET in configs/smartweb_defconfig to fix this. If this is ok with you, I’ll submit a patch against the defconfing and then take it through the rockchip-tree (so I have a clean Travis run), once you give it a Reviewed or Acked tag. Let me know if you have any concerns, Philipp.

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[U-Boot] [PATCH] mach-stm32: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET
by Ley Foon Tan 14 Jul '18

14 Jul '18

Commit bfc6bae8fa1f2d8a9c51548767b02f1a1e0ffe52 This commit rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET. Update with new CONFIG name. Signed-off-by: Ley Foon Tan <ley.foon.tan(a)intel.com> --- arch/arm/mach-stm32/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig index 759f545..a45f3fd 100644 --- a/arch/arm/mach-stm32/Kconfig +++ b/arch/arm/mach-stm32/Kconfig @@ -36,6 +36,7 @@ config STM32F7 select SPL_BOARD_INIT select SPL_CLK select SPL_DM + select SPL_DM_RESET select SPL_DM_SEQ_ALIAS select SPL_DRIVERS_MISC_SUPPORT select SPL_GPIO_SUPPORT @@ -48,7 +49,6 @@ config STM32F7 imply SPL_OS_BOOT select SPL_PINCTRL select SPL_RAM - select SPL_RESET_SUPPORT select SPL_SERIAL_SUPPORT select SPL_SYS_MALLOC_SIMPLE select SPL_TIMER -- 2.7.4

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