April 2018 - U-Boot

[U-Boot] [PATCH v3 00/20] Bring NAND support to Nintendo NES Classic
by Miquel Raynal 07 Jul '21

07 Jul '21

Hello, This series first adds fixes and enhancements to sunxi NAND drivers (SPL and U-Boot). Once this is done, the SPL NAND driver is converted to use PIO instead of DMA with the goal to support all SoCs with this IP without the need for DMA-related code. Finally, NAND support is added to Nintendo NES Classic through Kconfig and DT additions. Thanks, Miquèl Changes since v2: ================= - Added Boris and Maxime Acked-by tags. - Removed extra space in nand_reset_column() - Fixed the useless wait period on failure in nand_change_column(). - Changed the title "sunxi: allow NAND support to be compiled for..." (removed the "in SPL" precision which is wrong). - Enbraced the deassertion of the reset line by #if statements about the SoCs in use. Wolfgang Denk made a comment on my proposal but I could not find a better solution, so I kept it for now. - s/alwinner,[pin,functions]/[pin,functions]/ in the DT. - Change Alwinner-specific parts in the SPL to generic sentences. Changes since v1: ================= All: ---- - Enhance all commit messages. - Rebased on top of master branch (I should have done that earlier but I forgot I was on an old revision). Fix binman_sym output check --------------------------- - SPL seems to be broken for a few weeks when using raw NAND, fix it by changing the error condition. Fix strength ------------ - Add comment explaining the added line and moved the line for clarification on why it is needed. - Add forgotten Boris' Suggested-by tag. Fix second case of modulo by zero error ---------------------------------------- - Added a reference to the first occurence of this issue. Allow SPL to be compiled for sun8i platforms -------------------------------------------- - This commit is not about compiling the SPL, but the NAND support in the SPL, as corrected by Maxime. Enhancements and cleaning ------------------------- - Patch split into several logical chunks, as requested. - Removed useless udelay(1), that was added for debugging purpose. - Introduced the nand_exec_cmd() helper to mutualize code one step further. - Add an udelay(1) after changing the column to respect the minimum tCCS delay (Change Column Setup time). - Canceled moving to global scope the ecc_strength array. Use PIO instead of DMA ---------------------- - Change commit message/title. - Cancel removing NFC related definitions: they can be useful as the this IP is quite under-documented. - Merge nand_reset_column and nand_change_column (in another patch). - Moved the copy of the data after the check of the ECC status. - ECC chunks are read manually, return if the first chunk is empty only (needed for configuration research), otherwise it should not be treated as an error. Add NAND node to sun8i ---------------------- - U-Boot master branch already has this node, remove the patch. Enable NAND on NES classic -------------------------- - Change the DT cells size from 2 to 1. Add NAND support for NES classic -------------------------------- - Split in several patches, moving SPL_NAND_SUPPORT and NAND_SUNXI out of the defconfig files (NES and CHIP pro) to be automatically selected depending on NAND_SUNXI and ARCH_SUNXI. - Moved the NAND parameters to Kconfig (only for SUNXI because the tool did not work as expected, maybe due to some definitions that are not "numbers" but multiplications and sometimes use other definitions (NAND page size, 2K_SZ, etc). Miquel Raynal (20): spl: fix binman_sym output check mtd: nand: sunxi: fix ECC strength choice spl: nand: sunxi: fix second case of modulo by zero error spl: nand: sunxi: fix typo on register name spl: nand: sunxi: introduce the nand_wait_int() helper spl: nand: sunxi: introduce the nand_wait_cmd_fifo_empty() helper spl: nand: sunxi: add missing status clear spl: nand: sunxi: create an helper to handle command execution spl: nand: sunxi: ensure enough time has passed after changing the column spl: nand: sunxi: make the reset column helper more generic sunxi: spl: deassert the NAND controller reset line spl: nand: sunxi: declare the ecc_bytes array globally spl: nand: sunxi: use PIO instead of DMA sunxi: spl: remove DMA related settings of the NAND controller sunxi: allow NAND support to be compiled for sun8i platforms sunxi: dts: enable NAND on NES classic sunxi: automatically select SPL_NAND_SUPPORT in Kconfig sunxi: make NAND_SUNXI use ARCH_SUNXI as default in Kconfig sunxi: move the NAND parameters to Kconfig configs: add NAND support for NES Classic arch/arm/dts/sun8i-a23-a33.dtsi | 17 ++ .../dts/sun8i-r16-nintendo-nes-classic-edition.dts | 14 ++ arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 6 + board/sunxi/board.c | 7 +- common/spl/spl.c | 10 +- configs/CHIP_pro_defconfig | 6 +- configs/Nintendo_NES_Classic_Edition_defconfig | 4 + drivers/mtd/nand/Kconfig | 26 ++- drivers/mtd/nand/sunxi_nand.c | 8 +- drivers/mtd/nand/sunxi_nand_spl.c | 242 ++++++++++----------- 10 files changed, 208 insertions(+), 132 deletions(-) -- 2.14.1

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[U-Boot] Starting u-boot in USB otg mode
by rivael_il 27 Feb '20

27 Feb '20

Hello u-booters! I want to load u-boot-sunxi-with-spl.bin and make it operate the USB in otg mode. (Where the host can still be connected to the board). How can I achieve this? (I have attempted to use: "usb0:dr_mode=otg,phy_type=utmi\0" without success). Thank you, Michael

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[U-Boot] [usb dwc3] xHCI driver -- a hint needed.
by Yuri Frolov 11 Sep '19

11 Sep '19

Hi, I've been trying to bring up a dwc3 usb controller included in 32-bit MIPS chip. Usb is the one port usb2.0 host module, compliant with xHCI Revision 1.0, UTMI+ Low Pin interface (ULPI) Revision 1.1 and AMBA AXI Protocol specification. g_snpsid register reports 0x5533290a revision. It's verified, that linux kernel support is ok, usb is fully functional. axi { <...> usb@1F04D050 { compatible = "be,baikal-dwc3"; reg = <0x1f04d050 0x4>; interrupts = <0x0 0x45 0x4>; #address-cells = <0x1>; #size-cells = <0x1>; clocks = <0xf 0x0>; clock-names = "usb"; ranges; status = "okay"; dwc3@1F100000 { compatible = "snps,dwc3", "synopsys,dwc3", "generic-xhci"; reg = <0x1f100000 0x10000>; interrupts = <0x0 0x44 0x4>; dr_mode = "host"; tx-fifo-resize; maximum-speed = "high-speed"; }; }; }; whereas in u-boot 'usb start' fails on hub initialization (as I can see): Any ideas why this could happen?.. Any direction where to look at? Any suggestions will be greatly appreciated. # usb start (Re)start USB... USB0: dwc3_reg->g_snpsid: 0x5533290a Register 1000140 NbrPorts 1 Starting the controller USB XHCI 1.00 scanning bus 0 for devices... New Device 0 set address 1 usb_control_msg: request: 0x5, requesttype: 0x0, value 0x1 index 0x0 length 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 0x12 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x9 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x1F get_conf_no 0 Result 25, wLength 31 if 0, ep 0 ##EP epmaxpacketin[1] = 8 set configuration 1 usb_control_msg: request: 0x9, requesttype: 0x0, value 0x1 index 0x0 length 0x0 new device strings: Mfr=1, Product=2, SerialNumber=0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x300 index 0x0 length 0xFF USB device number 1 default language ID 0x409 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x301 index 0x409 length 0xFF usb_control_msg: request: 0x6, requesttype: 0x80, value 0x302 index 0x409 length 0xFF Manufacturer U-Boot Product XHCI Host Controller SerialNumber USB hub found usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2A00 index 0x0 length 0x4 usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2A00 index 0x0 length 0xC 1 ports detected ganged power switching standalone hub individual port over-current protection TT requires at most 8 FS bit times (666 ns) power on to power good time: 20ms hub controller current requirement: 0mA port 1 is removable usb_control_msg: request: 0x0, requesttype: 0xA0, value 0x0 index 0x0 length 0x4 get_hub_status returned status 1, change 801 local power source is lost (inactive) no over-current condition exists enabling power on all ports usb_control_msg: request: 0x3, requesttype: 0x23, value 0x8 index 0x1 length 0x0 port 1 returns 0 devnum=1 poweron: query_delay=100 connect_timeout=1100 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 Port 1 Status 101 Change 1 devnum=1 port=1: USB dev found usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 portstatus 101, change 1, 12 Mb/s usb_control_msg: request: 0x1, requesttype: 0x23, value 0x10 index 0x1 length 0x0 usb_hub_port_reset: resetting port 1... usb_control_msg: request: 0x3, requesttype: 0x23, value 0x4 index 0x1 length 0x0 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 portstatus 111, change 0, 12 Mb/s STAT_C_CONNECTION = 0 STAT_CONNECTION = 1 USB_PORT_STAT_ENABLE 0 usb_control_msg: request: 0x3, requesttype: 0x23, value 0x4 index 0x1 length 0x0 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 portstatus 503, change 10, 480 Mb/s STAT_C_CONNECTION = 0 STAT_CONNECTION = 1 USB_PORT_STAT_ENABLE 1 usb_control_msg: request: 0x1, requesttype: 0x23, value 0x14 index 0x1 length 0x0 New Device 1 XHCI timeout on event type 33... cannot recover. BUG: failure at drivers/usb/host/xhci-ring.c:474/xhci_wait_for_event()! BUG! Reset CPU by CPC Here is the drivers/usb/host/xhci-baikal.c: #include <common.h> #include <usb.h> #include <linux/errno.h> #include <linux/compat.h> #include <linux/usb/dwc3.h> #include <linux/usb/xhci-omap.h> #include "xhci.h" /* Declare global data pointer */ DECLARE_GLOBAL_DATA_PTR; struct baikal_xhci { struct xhci_hccr *hcd; struct dwc3 *dwc3_reg; }; static struct baikal_xhci baikal; int __attribute__((weak)) board_usb_init(int index, enum usb_init_type init); static int baikal_xhci_core_init(struct baikal_xhci *baikal) { int ret = 0; ret = dwc3_core_init(baikal->dwc3_reg); if (ret) { debug("%s:failed to initialize core\n", __func__); return ret; } /* We are hard-coding DWC3 core to Host Mode */ dwc3_set_mode(baikal->dwc3_reg, DWC3_GCTL_PRTCAP_HOST); return ret; } static void baikal_xhci_core_exit(struct baikal_xhci *baikal) { } int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) { struct baikal_xhci *ctx = &baikal; int ret = 0; ctx->hcd = (struct xhci_hccr *)CONFIG_USB_XHCI_BAIKAL_BASE; ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET); ret = board_usb_init(index, USB_INIT_HOST); if (ret != 0) { puts("Failed to initialize board for USB\n"); return ret; } ret = baikal_xhci_core_init(ctx); if (ret < 0) { puts("Failed to initialize xhci\n"); return ret; } *hccr = (struct xhci_hccr *)(CONFIG_USB_XHCI_BAIKAL_BASE); *hcor = (struct xhci_hcor *)((uint32_t) *hccr + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); debug("baikal-xhci: init hccr %x and hcor %x hc_length %d\n", (uint32_t)*hccr, (uint32_t)*hcor, (uint32_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); return ret; } void xhci_hcd_stop(int index) { } TIA, Yuri

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[U-Boot] [PATCH 2/2] efi_loader: set the dhcp ack received flag
by Patrick Wildt 06 Aug '19

06 Aug '19

The PXE object contains a flag that specifies whether or not a DHCP ACK has been received. This can be used by EFI Applications to find out whether or not it is worth to read the DHCP information from our object. Signed-off-by: Patrick Wildt <patrick(a)blueri.se> --- lib/efi_loader/efi_net.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c index 8c5d5b492c..0b9c7b9345 100644 --- a/lib/efi_loader/efi_net.c +++ b/lib/efi_loader/efi_net.c @@ -332,8 +332,10 @@ int efi_net_register(void) netobj->net_mode.max_packet_size = PKTSIZE; netobj->pxe.mode = &netobj->pxe_mode; - if (dhcp_ack) + if (dhcp_ack) { netobj->pxe_mode.dhcp_ack = *dhcp_ack; + netobj->pxe_mode.dhcp_ack_received = 1; + } /* * Create WaitForPacket event. -- 2.14.3 (Apple Git-98)

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[U-Boot] [PATCH 0/10] x86: Add generic VESA video driver
by Simon Glass 01 Aug '19

01 Aug '19

This series introduces a generic VESA video driver and adjusts the generic PCI ROM support to support it. It also fixes up some problems which prevent this from working on PowerPC at present. It is now possible to use VESA graphics: - On PowerPC, using the x86 emulator - On x86, using either the x86 emulator or native code execution As it turns out, on the only platform I have tested (link), the x86 emulator is only slightly slower that native code execution (200ms difference). Still, we may as well leave this feature in there. VGA ROMs are a very old technology but they are still used by modern platforms, including at least link and some Atom designs. Simon Glass (10): bios_emulator: Fix an #ifdef typo in the header file x86: Correct endianness isues in pci_rom x86: Support ROMs on other archs bios_emulator: Don't display error when emulator terminates bios_emulator: Add some VESA interface debugging x86: pci: Don't stop when we get a vendor/device mismatch x86: Add a VESA video driver x86: Drop the x86_fb driver x86: Access the VGA ROM when needed RFC: Test code for glacier PCI video support arch/x86/include/asm/u-boot-x86.h | 2 + drivers/bios_emulator/atibios.c | 161 +++++++++++++++++++++++---- drivers/bios_emulator/include/x86emu/debug.h | 2 +- drivers/bios_emulator/x86emu/ops.c | 2 +- drivers/pci/pci_auto.c | 28 ++++- drivers/pci/pci_rom.c | 40 ++++--- drivers/video/Makefile | 2 +- drivers/video/vesa_fb.c | 64 +++++++++++ drivers/video/x86_fb.c | 38 ------- include/configs/canyonlands.h | 31 ++++++ include/configs/chromebook_link.h | 2 +- include/pci.h | 9 ++ include/pci_rom.h | 1 - include/vbe.h | 9 +- 14 files changed, 312 insertions(+), 79 deletions(-) create mode 100644 drivers/video/vesa_fb.c delete mode 100644 drivers/video/x86_fb.c -- 2.2.0.rc0.207.ga3a616c

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[U-Boot] [RFC] Reserve ATF memory on Marvell Armdada 3700/7K/8K
by Mark Kettenis 13 Jun '19

13 Jun '19

Currently U-Boot doesn't make any effort to reserve the memory used by ARM Trusted Firmware on these platforms. The result is that the memory is listed as available in the EFI memory map. And as soon as a loaded kernel tries to use this memory things explode. I've seen this with the OpenBSD kernel. But I totally expect a Linux kernel to suffer the same fate. I'm currently using the diff below, but it is not entirely clear to me if arch_early_init_r() is the appropriate place to do this. I'm also wondering whether the block should also be marked as reserved in the FDT using fdt_add_mem_rsv(). If the latter is required this probably needs to be done by ft_board_setup() or ft_system_setup(). The address and size of the region have been taken from Marvell's ATF fork at https://github.com/MarvellEmbeddedProcessors/atf-marvell The memory layout is defined in plat/marvell/a8k/common/include/platform_def.h where there are lots of defines and a diagram that attempt to describe the memory. It is not entirely obvious to me what part needs to be reserved. But 0x0400000-0x04200000 works. diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c index 3c84043a2c..895cd2852f 100644 --- a/arch/arm/mach-mvebu/arm64-common.c +++ b/arch/arm/mach-mvebu/arm64-common.c @@ -95,5 +95,11 @@ int arch_early_init_r(void) pci_init(); #endif +#ifdef CONFIG_EFI_LOADER + /* Reserve trusted SRAM section */ + efi_add_memory_map(0x04000000, 0x00200000 >> EFI_PAGE_SHIFT, + EFI_RESERVED_MEMORY_TYPE, false); +#endif + return 0; }

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[U-Boot] [PATCH V3 01/10] disk: support host devices in dev_print()
by Stephen Warren 18 May '19

18 May '19

Add a case statement for IF_TYPE_HOST in dev_print() so that it prints the device type rather than the "device type unknown" message. Signed-off-by: Stephen Warren <swarren(a)wwwdotorg.org> --- disk/part.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/disk/part.c b/disk/part.c index 43485c9148b0..4e72257434b6 100644 --- a/disk/part.c +++ b/disk/part.c @@ -179,6 +179,9 @@ void dev_print (block_dev_desc_t *dev_desc) case IF_TYPE_DOC: puts("device type DOC\n"); return; + case IF_TYPE_HOST: + puts("host device\n"); + break; case IF_TYPE_UNKNOWN: puts("device type unknown\n"); return; -- 1.9.1

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[U-Boot] [PATCH v2 1/2] x86: TunnelCreek: switch P state to the highest freq
by Christian Gmeiner 04 Apr '19

04 Apr '19

Fixes performance related issue when running vxWorks 5/7 images. The overall memory performance (L1, L2 cache and ram) was measured with Bandwidth [0]. Without this patch we get following numbers: - sequential 128-bit reads: ~5.2 GB/s - sequential 128-bit copy: ~2.1 GB/s - random 32-bit writes: ~1.2 GB/s With this patch patch we get the following numbers: - sequential 128-bit reads: ~18.0 GB/s - sequential 128-bit copy: ~9.5 GB/s - random 32-bit writes: ~5.0 GB/s [0] https://zsmith.co/bandwidth.html v1 -> v2: - incorporate feedback from Bin Meng Signed-off-by: Christian Gmeiner <christian.gmeiner(a)gmail.com> --- arch/x86/cpu/queensbay/Makefile | 2 +- arch/x86/cpu/queensbay/cpu.c | 58 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 59 insertions(+), 1 deletion(-) create mode 100644 arch/x86/cpu/queensbay/cpu.c diff --git a/arch/x86/cpu/queensbay/Makefile b/arch/x86/cpu/queensbay/Makefile index c0681995bd..3dd23465d4 100644 --- a/arch/x86/cpu/queensbay/Makefile +++ b/arch/x86/cpu/queensbay/Makefile @@ -5,4 +5,4 @@ # obj-y += fsp_configs.o irq.o -obj-y += tnc.o +obj-y += tnc.o cpu.o diff --git a/arch/x86/cpu/queensbay/cpu.c b/arch/x86/cpu/queensbay/cpu.c new file mode 100644 index 0000000000..805a94cc27 --- /dev/null +++ b/arch/x86/cpu/queensbay/cpu.c @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2018, Bachmann electronic GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <cpu.h> +#include <dm.h> +#include <asm/cpu.h> +#include <asm/cpu_x86.h> +#include <asm/msr.h> + +static void set_max_freq(void) +{ + msr_t msr; + + /* Enable enhanced speed step */ + msr = msr_read(MSR_IA32_MISC_ENABLES); + msr.lo |= (1 << 16); + msr_write(MSR_IA32_MISC_ENABLES, msr); + + /* Set new performance state */ + msr = msr_read(MSR_IA32_PERF_CTL); + msr.lo = 0x101f; + msr_write(MSR_IA32_PERF_CTL, msr); +} + +static int cpu_x86_tunnelcreek_probe(struct udevice *dev) +{ + if (!ll_boot_init()) + return 0; + debug("Init TunnelCreek core\n"); + + /* Set core to max frequency ratio */ + set_max_freq(); + + return 0; +} + +static const struct cpu_ops cpu_x86_tunnelcreek_ops = { + .get_desc = cpu_x86_get_desc, + .get_count = cpu_x86_get_count, +}; + +static const struct udevice_id cpu_x86_tunnelcreek_ids[] = { + { .compatible = "intel,tunnelcreek-cpu" }, + { } +}; + +U_BOOT_DRIVER(cpu_x86_tunnelcreek_drv) = { + .name = "cpu_x86_tunnelcreek", + .id = UCLASS_CPU, + .of_match = cpu_x86_tunnelcreek_ids, + .bind = cpu_x86_bind, + .probe = cpu_x86_tunnelcreek_probe, + .ops = &cpu_x86_tunnelcreek_ops, +}; -- 2.14.3

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[U-Boot] [PATCH 0/5] Use Android DT image format for TI boards
by Sam Protsenko 29 Mar '19

29 Mar '19

Android documentation recommends using new image format for storing dtb and dtbo files: [1]. Using that format, we can pack several dtb files to dtb.img, and also pack several dtbo files to dtbo.img. Then those images should be flashed to eMMC partitions, called "dtb" and "dtbo" respectively. This patch series introduces support for mentioned Android DT image format, adds "dtimg" command to deal with that image format from U-Boot shell, and provides new Android boot scheme to TI boards (AM57x and DRA7 boards). So with this patch series we will have next procedure for Android boot: 1. Read next images from eMMC partitions to RAM: - boot.img - dtb.img - dtbo.img 2. Take addresses of desired dtb/dtbo files from that images (for current board) 3. Apply dtbo overlays to main dtb, if needed 4. Boot the kernel from Android boot image, using resulting dtb It was tested on X15 and AM57x EVM boards. [1] https://source.android.com/devices/architecture/dto/partitions Sam Protsenko (5): common: Add support for Android DT image cmd: Add dtimg command arm: ti: boot: Extract PARTS_DEFAULT to boot.h arm: ti: boot: Add dtbo partition for Android boot arm: ti: boot: Implement Android boot using DT image format board/ti/common/Kconfig | 1 + cmd/Kconfig | 8 ++ cmd/Makefile | 1 + cmd/dtimg.c | 142 ++++++++++++++++++++++++++++++ common/Makefile | 4 + common/image-android-dt.c | 134 ++++++++++++++++++++++++++++ configs/am57xx_evm_defconfig | 1 + configs/am57xx_hs_evm_defconfig | 1 + configs/dra7xx_evm_defconfig | 1 + configs/dra7xx_hs_evm_defconfig | 1 + include/configs/am57xx_evm.h | 25 ------ include/configs/cl-som-am57x.h | 2 + include/configs/cm_t54.h | 2 + include/configs/dra7xx_evm.h | 25 ------ include/configs/ti_armv7_common.h | 1 + include/dt_table.h | 46 ++++++++++ include/environment/ti/boot.h | 68 ++++++++++++-- include/image-android-dt.h | 18 ++++ 18 files changed, 422 insertions(+), 59 deletions(-) create mode 100644 cmd/dtimg.c create mode 100644 common/image-android-dt.c create mode 100644 include/dt_table.h create mode 100644 include/image-android-dt.h -- 2.17.0

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[U-Boot] [PATCH 00/36] rockchip: clean up board file for rockchip SoCs
by Kever Yang 29 Mar '19

29 Mar '19

This patch set is to clean code for board related file, after this patch set, all the Rockchip SoCs will share the same tpl/spl/board file and very similar boot flow. tpl.c: target for init DDR sdram, only internal sram available, prefer tpl to be as simple as possible and then back to backrom; spl.c: target for load U-Boot and Trust(option) image and boot into next stage, init DDR sdram if no tpl exist; board.c: use for U-Boot proper for all Rockchip SoCs. We prefer to reduce boot flow option like RETURN_TO_BROM in SPL/TPL, and will enable trust(ATF or OPTEE) support for all SoCs with TrustZone, will share scripts for link and firmware package. Only rk3399 is using spl+Trust/U-Boot and all other SoCs should go to tpl+spl_Trust/U-Boot mode now. Kever Yang (36): rockchip: rk3288: move configure_l2ctlr back to rk3288 rockchip: add common MACRO to enable sys arch timer rockchip: enable SYS_NS16550 for all SoCs by default rockchip: defconfig: remove CONFIG_SYS_NS16550 rockchip: add STIMER_BASE for all SoCs rockchip: add IRAM_START_ADDR for all SoCs rockchip: rk3328: add BOOT_MODE_REG for rk3328 rockchip: rk322x: remove use rockchip timer as sys timer rockchip: rk322x: sdram: use common udelay instead of rockchip_udelay rockchip: rk322x: prepare to use common board file rockchip: defconfig enable sysreset for rk3229 spl rockchip: rk3036: sdram: use udelay instead of rockchip_udelay rockchip: rk3036: remove sys timer rockchip: rk3036: prepare to use commong board file rockchip: declare sdram_init() in common header rockchip: sdram-common: add api to pass dram info to trust os rockchip: sdram_common: add common dram_init_banksize rockchip: rk3188: remove rockchip timer as sys timer rockchip: rk3188: prepare to use common board file rockchip: rk3128: remove rockchip timer as systimer rockchip: rk3128: prepare use common board file rockchip: dts: rk3288: update spl-boot-order rockchip: rk3288: remove rockchip timer for sys timer armv8: add timer_get_boot_us() for generic timer rockchip: rk3288: prepare to use common board file rockchip: rk1108: remove rockchip timer for sys timer rockchip: rv1108: prepare to use common board file rockchip: rk3328: prepare to use common board file rockchip: rk3368: prepare to use common board file rockchip: lion-rk3368: remove rockchip timer rockchip: rk3399: prepare to use common board file rockchip: remove rk_timer rockchip: dts: rk3399-firefly: enable uart2 in spl rockchip: spl-boot-order: do not enable with OF_PLATDATA rockchip: declear boot_devices in bootrom.h rockchip: add common board file for rockchip platform arch/arm/Kconfig | 1 + arch/arm/cpu/armv8/generic_timer.c | 6 + arch/arm/dts/rk3288-phycore-rdk.dts | 6 +- arch/arm/dts/rk3288-veyron.dtsi | 6 +- arch/arm/dts/rk3399-firefly.dts | 1 + arch/arm/include/asm/arch-rockchip/bootrom.h | 2 + arch/arm/include/asm/arch-rockchip/sdram_common.h | 4 + arch/arm/include/asm/arch-rockchip/sys_proto.h | 25 +- arch/arm/mach-rockchip/Kconfig | 38 ++- arch/arm/mach-rockchip/Makefile | 23 +- arch/arm/mach-rockchip/{rk3128-board.c => board.c} | 93 +++--- arch/arm/mach-rockchip/rk3036-board.c | 104 ------- arch/arm/mach-rockchip/rk3036/Makefile | 2 +- .../{rk3036-board-spl.c => rk3036/rk3036.c} | 41 +-- arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 33 +- arch/arm/mach-rockchip/rk3188-board-spl.c | 226 -------------- arch/arm/mach-rockchip/rk3188-board.c | 82 ----- arch/arm/mach-rockchip/rk3188/Makefile | 1 + arch/arm/mach-rockchip/rk3188/rk3188.c | 23 ++ arch/arm/mach-rockchip/rk322x-board.c | 155 ---------- arch/arm/mach-rockchip/rk322x/Makefile | 2 +- .../{rk322x-board-spl.c => rk322x/rk322x.c} | 86 ++---- arch/arm/mach-rockchip/rk3288-board-spl.c | 304 ------------------ arch/arm/mach-rockchip/rk3288-board-tpl.c | 84 ----- arch/arm/mach-rockchip/rk3288-board.c | 338 --------------------- arch/arm/mach-rockchip/rk3288/rk3288.c | 328 +++++++++++++++++++- arch/arm/mach-rockchip/rk3328/rk3328.c | 59 +++- arch/arm/mach-rockchip/rk3368-board-spl.c | 73 ----- arch/arm/mach-rockchip/rk3368-board-tpl.c | 157 ---------- arch/arm/mach-rockchip/rk3368/rk3368.c | 116 ++++++- arch/arm/mach-rockchip/rk3399-board-spl.c | 179 ----------- arch/arm/mach-rockchip/rk3399-board.c | 14 - arch/arm/mach-rockchip/rk3399/rk3399.c | 86 +++++- arch/arm/mach-rockchip/rk_timer.c | 48 --- arch/arm/mach-rockchip/rv1108/rv1108.c | 8 - arch/arm/mach-rockchip/sdram_common.c | 84 ++++- arch/arm/mach-rockchip/spl-boot-order.c | 2 +- arch/arm/mach-rockchip/spl.c | 195 ++++++++++++ arch/arm/mach-rockchip/tpl.c | 111 +++++++ board/chipspark/popmetal_rk3288/popmetal-rk3288.c | 9 +- board/geekbuying/geekbox/geekbox.c | 5 - board/mqmaker/miqi_rk3288/miqi-rk3288.c | 7 - board/phytec/phycore_rk3288/phycore-rk3288.c | 45 ++- board/rockchip/evb_px5/evb-px5.c | 5 - board/rockchip/evb_rk3288/evb-rk3288.c | 7 - .../rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c | 8 + board/rockchip/evb_rk3328/evb-rk3328.c | 66 ---- board/rockchip/evb_rk3399/evb-rk3399.c | 56 ++-- board/rockchip/evb_rv1108/evb_rv1108.c | 6 - board/rockchip/fennec_rk3288/fennec-rk3288.c | 7 - board/rockchip/sheep_rk3368/sheep_rk3368.c | 5 - board/rockchip/tinker_rk3288/tinker-rk3288.c | 2 +- board/theobroma-systems/lion_rk3368/lion_rk3368.c | 8 - board/theobroma-systems/puma_rk3399/puma-rk3399.c | 17 +- configs/evb-rk3128_defconfig | 1 - configs/evb-rk3229_defconfig | 2 +- configs/evb-rk3288_defconfig | 1 - configs/evb-rk3328_defconfig | 1 - configs/evb-rk3399_defconfig | 1 - configs/fennec-rk3288_defconfig | 1 - configs/firefly-rk3288_defconfig | 1 - configs/firefly-rk3399_defconfig | 1 - configs/lion-rk3368_defconfig | 4 - configs/miqi-rk3288_defconfig | 1 - configs/phycore-rk3288_defconfig | 1 - configs/popmetal-rk3288_defconfig | 1 - configs/puma-rk3399_defconfig | 1 - configs/tinker-rk3288_defconfig | 1 - configs/vyasa-rk3288_defconfig | 1 - drivers/ram/rockchip/sdram_rk322x.c | 29 +- include/configs/rk3036_common.h | 7 - include/configs/rk3128_common.h | 6 - include/configs/rk3188_common.h | 5 - include/configs/rk322x_common.h | 4 - include/configs/rk3288_common.h | 6 - include/configs/rk3328_common.h | 2 - include/configs/rk3368_common.h | 4 - include/configs/rk3399_common.h | 4 - include/configs/rockchip-common.h | 6 + include/configs/rv1108_common.h | 8 - 80 files changed, 1248 insertions(+), 2251 deletions(-) rename arch/arm/mach-rockchip/{rk3128-board.c => board.c} (63%) delete mode 100644 arch/arm/mach-rockchip/rk3036-board.c rename arch/arm/mach-rockchip/{rk3036-board-spl.c => rk3036/rk3036.c} (50%) delete mode 100644 arch/arm/mach-rockchip/rk3188-board-spl.c delete mode 100644 arch/arm/mach-rockchip/rk3188-board.c create mode 100644 arch/arm/mach-rockchip/rk3188/rk3188.c delete mode 100644 arch/arm/mach-rockchip/rk322x-board.c rename arch/arm/mach-rockchip/{rk322x-board-spl.c => rk322x/rk322x.c} (51%) delete mode 100644 arch/arm/mach-rockchip/rk3288-board-spl.c delete mode 100644 arch/arm/mach-rockchip/rk3288-board-tpl.c delete mode 100644 arch/arm/mach-rockchip/rk3288-board.c delete mode 100644 arch/arm/mach-rockchip/rk3368-board-spl.c delete mode 100644 arch/arm/mach-rockchip/rk3368-board-tpl.c delete mode 100644 arch/arm/mach-rockchip/rk3399-board-spl.c delete mode 100644 arch/arm/mach-rockchip/rk3399-board.c delete mode 100644 arch/arm/mach-rockchip/rk_timer.c create mode 100644 arch/arm/mach-rockchip/spl.c create mode 100644 arch/arm/mach-rockchip/tpl.c create mode 100644 board/rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c -- 1.9.1

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