February 2018 - U-Boot

[U-Boot] [PATCH] Make cmd_get_data_size() a dependency of setexpr
by qlb1234 02 May '18

02 May '18

This commit broke the command setexpr. http://git.denx.de/?p=u-boot.git;a=commit;h=6f62d7c4f7a2242a76e19b09dccca6f… setexpr uses cmd_get_data_size(). If none of I2C, ITEST or PCI is chosen, setexpr will fail to be built.

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[U-Boot] [RFC PATCH] rockchip: asus c201 support
by Marty E. Plummer 02 May '18

02 May '18

From: "Marty E. Plummer" <hanetzer(a)protonmail.com> I realize this patch is not up to standards for the sake of mainlining right now, but I'm mostly interested in getting some feedback on how to make it work before getting into the nicities of mainline inclusion. As of right now the bulk of this is the rk3288-veyron-speedy.dts file, which I assume has a similar enough boot system to the jerry and minnie. If the resultant u-boot-spl.bin and u-boot-dtb.img are prepared according to the instructions in doc/README.rockchip and then flashed to the c201's spi memory I get very little in the way of result; the most I/O that to be seen is the board reacts to the power switch (led on, led off). I can not seem to get it to output the u-boot console to the built-in screen, and currently do not have a mini-hdmi cable to see if that is working or not (one is ordered, arrives thursday). Can't find a location to purchase a servo board for better debugging possibilities. I was hoping someone on this mailing list could assist me in getting this to work; once a working setup is figured I'll do proper patchset for mainline inclusion. Regards, Marty --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3288-veyron-speedy.dts | 203 ++++++++++++++++++++++++++++++ arch/arm/mach-rockchip/rk3288-board-spl.c | 3 +- arch/arm/mach-rockchip/rk3288/Kconfig | 11 ++ board/google/veyron/Kconfig | 16 +++ configs/chromebook_speedy_defconfig | 92 ++++++++++++++ drivers/mtd/spi/spi_flash_ids.c | 1 + 7 files changed, 326 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/rk3288-veyron-speedy.dts create mode 100644 configs/chromebook_speedy_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7c062f0cad..c8630889dc 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -41,6 +41,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3288-veyron-jerry.dtb \ rk3288-veyron-mickey.dtb \ rk3288-veyron-minnie.dtb \ + rk3288-veyron-speedy.dtb \ rk3288-vyasa.dtb \ rk3328-evb.dtb \ rk3368-lion.dtb \ diff --git a/arch/arm/dts/rk3288-veyron-speedy.dts b/arch/arm/dts/rk3288-veyron-speedy.dts new file mode 100644 index 0000000000..51e155d141 --- /dev/null +++ b/arch/arm/dts/rk3288-veyron-speedy.dts @@ -0,0 +1,203 @@ +/* + * Google Veyron Speedy Rev 1+ board device tree source + * + * Copyright 2015 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0 + */ + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include "rk3288-veyron-chromebook.dtsi" +#include "cros-ec-sbs.dtsi" + +/ { + model = "Google Jerry"; + compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8", + "google,veyron-speedy-rev7", "google,veyron-speedy-rev6", + "google,veyron-speedy-rev5", "google,veyron-speedy-rev4", + "google,veyron-speedy-rev3", "google,veyron-speedy-rev2", + "google,veyron-speedy", "google,veyron", "rockchip,rk3288"; + + /* chosen { */ + /* stdout-path = &uart1; */ + /* }; */ + + panel_regulator: panel-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_enable_h>; + regulator-name = "panel_regulator"; + vin-supply = <&vcc33_sys>; + }; + + vcc18_lcd: vcc18-lcd { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&avdd_1v8_disp_en>; + regulator-name = "vcc18_lcd"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc18_wl>; + }; + + backlight_regulator: backlight-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&bl_pwr_en>; + regulator-name = "backlight_regulator"; + vin-supply = <&vcc33_sys>; + startup-delay-us = <15000>; + }; +}; + +&dmc { + rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d + 0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6 + 0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0 + 0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4 + 0x8 0x1f4>; + rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076 + 0x0 0xc3 0x6 0x1>; + rockchip,sdram-params = <0x20D266A4 0x5B6 6 533000000 6 13 0>; +}; + +&gpio_keys { + power { + gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; + }; +}; + +&backlight { + power-supply = <&backlight_regulator>; +}; + +&cpu_alert0 { + temperature = <65000>; +}; + +&cpu_alert1 { + temperature = <70000>; +}; + +&panel { + power-supply = <&panel_regulator>; +}; + +&rk808 { + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; +}; + +&sdmmc { + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio + &sdmmc_bus4>; + disable-wp; +}; + +&vcc_5v { + enable-active-high; + /* gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>; */ + pinctrl-names = "default"; + pinctrl-0 = <&drv_5v>; +}; + +&vcc50_hdmi { + enable-active-high; + gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc50_hdmi_en>; +}; + +&edp { + /* pinctrl-names = "default"; */ + /* pinctrl-0 = <&edp_hpd>; */ + /delete-property/pinctrl-names; + /delete-property/pinctrl-0; + + force-hpd; +}; + +&pinctrl { + backlight { + bl_pwr_en: bl_pwr_en { + rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + buck-5v { + drv_5v: drv-5v { + rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + edp { + edp_hpd: edp_hpd { + rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>; + }; + }; + + emmc { + /* Make sure eMMC is not in reset */ + emmc_deassert_reset: emmc-deassert-reset { + rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hdmi { + vcc50_hdmi_en: vcc50-hdmi-en { + rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + lcd { + lcd_enable_h: lcd-en { + rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + avdd_1v8_disp_en: avdd-1v8-disp-en { + rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + dvs_1: dvs-1 { + rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + dvs_2: dvs-2 { + rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +}; + +/* &i2c4 { */ +/* status = "okay"; */ + +/* pinctrl-names = "default"; */ +/* pinctrl-0 = <&i2c4_xfer>; */ + +/* trackpad@15 { */ +/* compatible = "elan,i2c_touchpad"; */ +/* interrupt-parent = <&gpio7>; */ +/* interrupts = <3 IRQ_TYPE_EDGE_FALLING>; */ +/* /* */ +/* * Remove the inherited pinctrl settings to avoid clashing */ +/* * with bus-wide ones. */ +/* *1/ */ +/* /delete-property/pinctrl-names; */ +/* /delete-property/pinctrl-0; */ +/* reg = <0x15>; */ +/* vcc-supply = <&vcc33_io>; */ +/* wakeup-source; */ +/* }; */ +/* }; */ diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c index 6b7bf85d8d..5b76114d9b 100644 --- a/arch/arm/mach-rockchip/rk3288-board-spl.c +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c @@ -69,7 +69,8 @@ u32 spl_boot_device(void) fallback: #elif defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \ defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \ - defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) + defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \ + defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY) return BOOT_DEVICE_SPI; #endif return BOOT_DEVICE_MMC1; diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index 4ad2940069..04377f9ea8 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -30,6 +30,17 @@ config TARGET_CHROMEBOOK_MINNIE functions. It includes 2 or 4GB of SDRAM and 16 or 32GB of internal MMC. The product name is ASUS Chromebook Flip. +config TARGET_CHROMEBOOK_SPEEDY + bool "Google/Rockchip Veyron-Speedy Chromebook" + select BOARD_LATE_INIT + help + Speedy is a RK3288-based clamshell device with 2 USB 2.0 ports, + micro HDMI, an 11.6 inch display, micro-SD card, + HD camera, touchpad, wifi and Bluetooth. It includes a Chrome OS + EC (Cortex-M3) to provide access to the keyboard and battery + functions. It includes 2 or 4GB of SDRAM and 16GB of internal MMC. + The product name is Asus Chromebook C201PA. + config TARGET_EVB_RK3288 bool "Evb-RK3288" select BOARD_LATE_INIT diff --git a/board/google/veyron/Kconfig b/board/google/veyron/Kconfig index 770e9aad28..7f55d78dac 100644 --- a/board/google/veyron/Kconfig +++ b/board/google/veyron/Kconfig @@ -45,3 +45,19 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y endif + +if TARGET_CHROMEBOOK_SPEEDY + +config SYS_BOARD + default "veyron" + +config SYS_VENDOR + default "google" + +config SYS_CONFIG_NAME + default "veyron" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig new file mode 100644 index 0000000000..9626be9743 --- /dev/null +++ b/configs/chromebook_speedy_defconfig @@ -0,0 +1,92 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ROCKCHIP_RK3288=y +# CONFIG_SPL_MMC_SUPPORT is not set +CONFIG_TARGET_CHROMEBOOK_SPEEDY=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy" +CONFIG_DEBUG_UART=y +# CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_SILENT_CONSOLE=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_SPI=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SPL_PARTITION_UUIDS=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_OF_PLATDATA=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +# CONFIG_SPL_SIMPLE_BUS is not set +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_I2C_CROS_EC_TUNNEL=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_I2C_MUX=y +CONFIG_DM_KEYBOARD=y +CONFIG_CROS_EC_KEYB=y +CONFIG_CROS_EC=y +CONFIG_CROS_EC_SPI=y +CONFIG_PWRSEQ=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINCTRL_FULL is not set +CONFIG_PINCTRL_ROCKCHIP_RK3288=y +CONFIG_DM_PMIC=y +# CONFIG_SPL_PMIC_CHILDREN is not set +CONFIG_PMIC_RK8XX=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550=y +CONFIG_ROCKCHIP_SERIAL=y +CONFIG_ROCKCHIP_SPI=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="Rockchip" +CONFIG_G_DNL_VENDOR_NUM=0x2207 +CONFIG_G_DNL_PRODUCT_NUM=0x320a +CONFIG_DM_VIDEO=y +CONFIG_DISPLAY=y +CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_EDP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_USE_TINY_PRINTF=y +CONFIG_CMD_DHRYSTONE=y +CONFIG_ERRNO_STR=y +# CONFIG_SPL_OF_LIBFDT is not set diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index 13f64e773f..cbfd8b7636 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -63,6 +63,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"en25s64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) }, #endif #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */ + {"gd25q32b", INFO(0xc84016, 0x0, 64 * 1024, 64, SECT_4K) }, {"gd25q64b", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) }, {"gd25lq32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) }, #endif -- 2.14.2

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[U-Boot] [PATCH] arm: imx: Rework i.MX specific commands to be excluded from SPL
by Tom Rini 25 Apr '18

25 Apr '18

The "clocks" and "bootaux" commands are only usable in full U-Boot, not SPL, so do not link them inside of SPL. Rework a little of the bootaux related code to make use of __weak and declare parts of it static as it's local to the file. Cc: Stefano Babic <sbabic(a)denx.de> Cc: Fabio Estevam <fabio.estevam(a)nxp.com> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- arch/arm/mach-imx/Makefile | 2 ++ arch/arm/mach-imx/imx_bootaux.c | 13 ++++--------- arch/arm/mach-imx/mx5/clock.c | 4 +++- arch/arm/mach-imx/mx7/clock.c | 2 ++ arch/arm/mach-imx/mx7ulp/clock.c | 2 ++ 5 files changed, 13 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index d77c10e17684..783b2c8602ba 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -28,7 +28,9 @@ obj-y += cache.o init.o obj-$(CONFIG_SATA) += sata.o obj-$(CONFIG_IMX_VIDEO_SKIP) += video.o obj-$(CONFIG_IMX_RDC) += rdc-sema.o +ifneq ($(CONFIG_SPL_BUILD),y) obj-$(CONFIG_IMX_BOOTAUX) += imx_bootaux.o +endif obj-$(CONFIG_SECURE_BOOT) += hab.o endif ifeq ($(SOC),$(filter $(SOC),mx7ulp)) diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c index 69026df7630f..b62dfbf6bf6c 100644 --- a/arch/arm/mach-imx/imx_bootaux.c +++ b/arch/arm/mach-imx/imx_bootaux.c @@ -6,27 +6,22 @@ #include <common.h> #include <command.h> +#include <linux/compiler.h> /* Allow for arch specific config before we boot */ -static int __arch_auxiliary_core_up(u32 core_id, u32 boot_private_data) +int __weak arch_auxiliary_core_up(u32 core_id, u32 boot_private_data) { /* please define platform specific arch_auxiliary_core_up() */ return CMD_RET_FAILURE; } -int arch_auxiliary_core_up(u32 core_id, u32 boot_private_data) - __attribute__((weak, alias("__arch_auxiliary_core_up"))); - /* Allow for arch specific config before we boot */ -static int __arch_auxiliary_core_check_up(u32 core_id) +int __weak arch_auxiliary_core_check_up(u32 core_id) { /* please define platform specific arch_auxiliary_core_check_up() */ return 0; } -int arch_auxiliary_core_check_up(u32 core_id) - __attribute__((weak, alias("__arch_auxiliary_core_check_up"))); - /* * To i.MX6SX and i.MX7D, the image supported by bootaux needs * the reset vector at the head for the image, with SP and PC @@ -40,7 +35,7 @@ int arch_auxiliary_core_check_up(u32 core_id) * The TCMUL is mapped to (M4_BOOTROM_BASE_ADDR) at A core side for * accessing the M4 TCMUL. */ -int do_bootaux(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +static int do_bootaux(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { ulong addr; int ret, up; diff --git a/arch/arm/mach-imx/mx5/clock.c b/arch/arm/mach-imx/mx5/clock.c index 610098c175e9..284f6d4cde3d 100644 --- a/arch/arm/mach-imx/mx5/clock.c +++ b/arch/arm/mach-imx/mx5/clock.c @@ -911,10 +911,11 @@ void mxc_set_sata_internal_clock(void) } #endif +#ifndef CONFIG_SPL_BUILD /* * Dump some core clockes. */ -int do_mx5_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +static int do_mx5_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { u32 freq; @@ -947,3 +948,4 @@ U_BOOT_CMD( "display clocks", "" ); +#endif diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c index 8150faa1a313..c11042d6f5ed 100644 --- a/arch/arm/mach-imx/mx7/clock.c +++ b/arch/arm/mach-imx/mx7/clock.c @@ -1096,6 +1096,7 @@ void epdc_clock_disable(void) } #endif +#ifndef CONFIG_SPL_BUILD /* * Dump some core clockes. */ @@ -1131,3 +1132,4 @@ U_BOOT_CMD( "display clocks", "" ); +#endif diff --git a/arch/arm/mach-imx/mx7ulp/clock.c b/arch/arm/mach-imx/mx7ulp/clock.c index 77b282addd6e..553d62149de6 100644 --- a/arch/arm/mach-imx/mx7ulp/clock.c +++ b/arch/arm/mach-imx/mx7ulp/clock.c @@ -323,6 +323,7 @@ void hab_caam_clock_enable(unsigned char enable) } #endif +#ifndef CONFIG_SPL_BUILD /* * Dump some core clockes. */ @@ -363,3 +364,4 @@ U_BOOT_CMD( "display clocks", "" ); +#endif -- 2.7.4

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[U-Boot] [PATCH 0/2] Add fix for Pine64 gigabit throughput issues
by kevans＠FreeBSD.org 18 Apr '18

18 Apr '18

The Pine64 has a known issue on gigabit links (see [1]); some boards suffer significant packet loss on Gigabit links. This patch sets the magical bits in CONFREG on the RTL8211E PHY to turn off the internal delay and do some other undocumented stuff. [1] https://forum.pine64.org/showthread.php?tid=835&pid=19704#pid19704 Kyle Evans (2): net: phy: Add PHY_RTL8211E_PINE64_GIGABIT_FIX for realtek phys Configs: Use the newly added PHY_RTL8211E_PINE64_GIGABIT_FIX configs/pine64_plus_defconfig | 2 ++ drivers/net/phy/Kconfig | 10 ++++++++++ drivers/net/phy/realtek.c | 34 ++++++++++++++++++++++++++++++++++ 3 files changed, 46 insertions(+) -- 2.15.1

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[U-Boot] [RFC][PATCH] cmd: fdt: Fix fdt address information after the movement
by Marek Vasut 17 Apr '18

17 Apr '18

From: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx(a)renesas.com> This patch fixes the address information of fdt. wrong case: => fdt addr 0x48000000 => fdt move 0x48000000 0x41000000 0xa000 => fdt addr The address of the fdt is 48000000 Active address in this case is 0x41000000. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx(a)renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx(a)renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Pantelis Antoniou <pantelis.antoniou(a)konsulko.com> --- cmd/fdt.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/cmd/fdt.c b/cmd/fdt.c index b783b0df42..1245bc24eb 100644 --- a/cmd/fdt.c +++ b/cmd/fdt.c @@ -204,6 +204,8 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 1; } working_fdt = newaddr; + env_set_hex("fdtaddr", (ulong)working_fdt); + #ifdef CONFIG_OF_SYSTEM_SETUP /* Call the board-specific fixup routine */ } else if (strncmp(argv[1], "sys", 3) == 0) { -- 2.16.1

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[U-Boot] [PATCH v2 0/7] Add support of SD3.0 UHS modes for ZynqMP
by Siva Durga Prasad Paladugu 12 Apr '18

12 Apr '18

This patch series is meant to add SD3.0 support for ZynqMP platform. The first five patches in the series mostly setting up things in sdhci layer to support SD3.0 , the sixth patch is to add SD3.0 support for ZynqMP platform and the last patch is to enable this support for ZynqMP zcu102 rev1.0 eval board. Repo: u-boot-mmc.git Branch: hs200-working Siva Durga Prasad Paladugu (7): mmc: sdhci: Add support for disabling clock mmc: sdhci: Handle execute tuning command in sdhci_send_command sdhci: Add new sdhci ops for platform specific tuning and delays mmc: sdhci: Invoke platform specific tuning and delay routines mmc : sdhci: Read capabilities register1 and update host caps mmc: zynq_sdhci: Add support for SD3.0 zynqmp: zcu102: Enable UHS support for ZCU102 Rev1.0 board board/xilinx/zynqmp/Makefile | 2 + board/xilinx/zynqmp/tap_delays.c | 230 ++++++++++++++++++++++++++ configs/xilinx_zynqmp_zcu102_rev1_0_defconfig | 2 + drivers/mmc/sdhci.c | 67 +++++++- drivers/mmc/zynq_sdhci.c | 230 +++++++++++++++++++++++++- include/sdhci.h | 9 + include/zynqmp_tap_delay.h | 20 +++ 7 files changed, 550 insertions(+), 10 deletions(-) create mode 100644 board/xilinx/zynqmp/tap_delays.c create mode 100644 include/zynqmp_tap_delay.h -- 2.7.4

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[U-Boot] [RFC PATCH 00/13] Nexell S5P6818 SoC support
by Andre Przywara 12 Apr '18

12 Apr '18

Hi, this is a first draft of the things Amit and I have been working on in the last months. It introduces support for an SoC called "Nexell S5P6818". This is an Octa-core ARMv8 SoC with Cortex-A53 cores, which apparently is closely related to (older) Samsung SoCs. Many peripherals are compatible to Samsung IP (UART, MMC, Ethernet, timers, ...), but some core peripherals like the clocks and the pin controller seem to be completely different. We used the NanoPi M3 board [1] for testing, which uses this SoC along with the usual suspects of on-board components and connectors. This port is done completely from scratch, by just looking at the manual. This allows a much cleaner and modern U-Boot support than the BSP code. The ARM Generic Timer (aka. arch timer) does not seem to work on this SoC. Ideally there would be some (hidden?) register enabling the right clock source, though we haven't found one (yet). But as also other code for this SoC out there on the net does not seem to be able to use the arch timer, I am not too hopeful here. While this does not impose a real problem to U-Boot (patch 3/13 takes care of that), it is a showstopper for mainline arm64 Linux, which heavily relies on the arch timer (since it's a mandatory part of the ARMv8 architecture). There is only a very small chance that the arch timer ever becomes optional in the mainline arm64 kernel. However our arm(32) kernel ports works quite nicely so far, also a (hacked) arm64 kernel boots to the prompt. We will submit Linux patches at a later time. We would be grateful to get some comments on the patches. The first five patches adapt existing code to simplify support for this SoC. The following six patches then successively enable and add SoC support, culmulating in the addition of a nanopi_m3_defconfig file in patch 11/13. The SoC support code is actually architecture agnostic, though up until the last patch it generates an AArch64 binary. To overcome the problems with the arch timer mentioned above, the final patch switches the port over to AArch32, which can more naturally launch arm kernels. This code so far does not include an SPL, instead it relies on some vendor provided code to initialise the DRAM and load U-Boot proper. The original BSP code provided a binary blob for that (called "secondboot"), although there is some GPLed version of that available on github([2]). We can load a 32-bit U-Boot with both the vendor blob and Rafaello's GPL version, the 64-bit version is only usable with the GPL code. Instruction on how to create a bootable SD card are contained in the arch/arm/mach-nexell/README file. We would be very grateful to get some first feedback on those patches and the approach in general taken here. Cheers, Andre. [1] http://nanopi.io/nanopi-m3.html [2] https://github.com/rafaello7/bl1-nanopi-m3 Amit Singh Tomar (4): reset: add driver for generic reset controllers mmc: add MMC (glue) driver for Nexell SoCs arm: nexell: add ARM64 MMU regions arm: nexell: add timer support Andre Przywara (9): serial: s5p: rework Samsung UART driver to get rid of uart.h serial: S5P/Samsung: refactor and Kconfig-ize UART selection arm: move SYS_ARCH_TIMER to KConfig arm: add basic framework for Nexell S5P6818 support arm: nexell: embed NSIH header arm: nexell: add UART support arm: nexell: add preliminary S5P6818 SoC device tree arm: add NanoPi M3 board support arm: nexell: switch to 32-bit arch/arm/Kconfig | 29 +++++ arch/arm/Makefile | 1 + arch/arm/cpu/armv8/Makefile | 2 +- arch/arm/dts/s5p6818-nanopi-m3.dts | 30 +++++ arch/arm/dts/s5p6818.dtsi | 196 ++++++++++++++++++++++++++++++ arch/arm/dts/s5pc1xx-goni.dts | 2 +- arch/arm/dts/s5pc1xx-smdkc100.dts | 2 +- arch/arm/include/asm/arch-nexell/boot0.h | 35 ++++++ arch/arm/include/asm/arch-nexell/clk.h | 15 +++ arch/arm/include/asm/arch-nexell/pwm.h | 62 ++++++++++ arch/arm/mach-exynos/include/mach/uart.h | 44 ------- arch/arm/mach-imx/mx7ulp/Kconfig | 1 + arch/arm/mach-nexell/Kconfig | 9 ++ arch/arm/mach-nexell/Makefile | 10 ++ arch/arm/mach-nexell/README | 49 ++++++++ arch/arm/mach-nexell/board.c | 128 +++++++++++++++++++ arch/arm/mach-nexell/mmu-arm64.c | 39 ++++++ arch/arm/mach-s5pc1xx/Kconfig | 2 + arch/arm/mach-s5pc1xx/include/mach/uart.h | 44 ------- configs/nanopi_m3_defconfig | 12 ++ drivers/mmc/Kconfig | 8 ++ drivers/mmc/Makefile | 1 + drivers/mmc/nexell_dw_mmc.c | 159 ++++++++++++++++++++++++ drivers/reset/Kconfig | 6 + drivers/reset/Makefile | 1 + drivers/reset/reset-generic.c | 111 +++++++++++++++++ drivers/serial/Kconfig | 6 + drivers/serial/Makefile | 2 +- drivers/serial/serial_s5p.c | 45 ++++++- include/configs/mx7ulp_evk.h | 1 - include/configs/s5p6818.h | 35 ++++++ include/configs/ti_armv7_keystone2.h | 1 - scripts/config_whitelist.txt | 1 - 33 files changed, 989 insertions(+), 100 deletions(-) create mode 100644 arch/arm/dts/s5p6818-nanopi-m3.dts create mode 100644 arch/arm/dts/s5p6818.dtsi create mode 100644 arch/arm/include/asm/arch-nexell/boot0.h create mode 100644 arch/arm/include/asm/arch-nexell/clk.h create mode 100644 arch/arm/include/asm/arch-nexell/pwm.h delete mode 100644 arch/arm/mach-exynos/include/mach/uart.h create mode 100644 arch/arm/mach-nexell/Kconfig create mode 100644 arch/arm/mach-nexell/Makefile create mode 100644 arch/arm/mach-nexell/README create mode 100644 arch/arm/mach-nexell/board.c create mode 100644 arch/arm/mach-nexell/mmu-arm64.c delete mode 100644 arch/arm/mach-s5pc1xx/include/mach/uart.h create mode 100644 configs/nanopi_m3_defconfig create mode 100644 drivers/mmc/nexell_dw_mmc.c create mode 100644 drivers/reset/reset-generic.c create mode 100644 include/configs/s5p6818.h -- 2.14.1

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[U-Boot] [PATCH 01/10] mmc: uniphier-sd: Add compatible strings for RCar Gen2
by Marek Vasut 08 Apr '18

08 Apr '18

Add DT compatible strings for RCar Gen2 SoCs, so that this driver can bind with them. Unlike Gen3, which uses 64bit FIFO, the Gen2 uses 16bit FIFO. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Jaehoon Chung <jh80.chung(a)samsung.com> Cc: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- drivers/mmc/uniphier-sd.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c index 741f9dfd9c..a080674c8a 100644 --- a/drivers/mmc/uniphier-sd.c +++ b/drivers/mmc/uniphier-sd.c @@ -847,6 +847,11 @@ static int uniphier_sd_probe(struct udevice *dev) } static const struct udevice_id uniphier_sd_match[] = { + { .compatible = "renesas,sdhi-r8a7790", .data = 0 }, + { .compatible = "renesas,sdhi-r8a7791", .data = 0 }, + { .compatible = "renesas,sdhi-r8a7792", .data = 0 }, + { .compatible = "renesas,sdhi-r8a7793", .data = 0 }, + { .compatible = "renesas,sdhi-r8a7794", .data = 0 }, { .compatible = "renesas,sdhi-r8a7795", .data = UNIPHIER_SD_CAP_64BIT }, { .compatible = "renesas,sdhi-r8a7796", .data = UNIPHIER_SD_CAP_64BIT }, { .compatible = "renesas,sdhi-r8a77970", .data = UNIPHIER_SD_CAP_64BIT }, -- 2.15.1

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[U-Boot] [RFC PATCH] Allow providing default environment from file
by Rasmus Villemoes 07 Apr '18

07 Apr '18

It is sometimes useful to be able to define the entire default environment in an external file. This implements a Kconfig option for allowing that. It is somewhat annoying to have two visible Kconfig options; it would probably be more user-friendly to just have the string option (with empty string obviously meaning not to use this feature). But then we'd also need a hidden CONFIG that we can use in the #ifdef in env_default.h, and I don't think one can set a def_bool based on whether a string-valued config is empty or not. I've tried to make the accepted format the same as the one the mkenvimage tool accepts. I have no idea how portable the sed script implementing the "allow embedded newlines in values" is. Nor do I know if one can expect xxd to be available. Signed-off-by: Rasmus Villemoes <rasmus.villemoes(a)prevas.dk> --- Makefile | 16 ++++++++++++++++ env/Kconfig | 18 ++++++++++++++++++ include/env_default.h | 4 ++++ 3 files changed, 38 insertions(+) diff --git a/Makefile b/Makefile index 4981a2ed6f..e5ba5213fd 100644 --- a/Makefile +++ b/Makefile @@ -423,6 +423,7 @@ endif version_h := include/generated/version_autogenerated.h timestamp_h := include/generated/timestamp_autogenerated.h +defaultenv_h := include/generated/defaultenv_autogenerated.h no-dot-config-targets := clean clobber mrproper distclean \ help %docs check% coccicheck \ @@ -1366,6 +1367,10 @@ ifeq ($(wildcard $(LDSCRIPT)),) @/bin/false endif +ifeq ($(CONFIG_DEFAULT_ENV_FROM_FILE),y) +prepare1: $(defaultenv_h) +endif + archprepare: prepare1 scripts_basic prepare0: archprepare FORCE @@ -1413,12 +1418,23 @@ define filechk_timestamp.h fi) endef +define filechk_defaultenv.h + (grep -v '^#' | \ + grep -v '^$$' | \ + tr '\n' '\0' | \ + sed -e 's/\\\x0/\n/' | \ + xxd -i ; echo ", 0x00" ; ) +endef + $(version_h): include/config/uboot.release FORCE $(call filechk,version.h) $(timestamp_h): $(srctree)/Makefile FORCE $(call filechk,timestamp.h) +$(defaultenv_h): $(CONFIG_DEFAULT_ENV_FILE:"%"=%) FORCE + $(call filechk,defaultenv.h) + # --------------------------------------------------------------------------- quiet_cmd_cpp_lds = LDS $@ cmd_cpp_lds = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) \ diff --git a/env/Kconfig b/env/Kconfig index a24370786b..1baebd743b 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -482,4 +482,22 @@ config ENV_SIZE endif +config DEFAULT_ENV_FROM_FILE + bool "Create default environment from file" + help + Normally, the default environment is automatically generated + based on the settings of various CONFIG_* options, as well + as the CONFIG_EXTRA_ENV_SETTINGS. By selecting this option, + you can instead define the entire default environment in an + external file. + +config DEFAULT_ENV_FILE + string "Path to default environment file" + depends on DEFAULT_ENV_FROM_FILE + help + The path containing the default environment. The format is + the same as accepted by the mkenvimage tool: lines + containing key=value pairs, blank lines and lines beginning + with # are ignored. + endmenu diff --git a/include/env_default.h b/include/env_default.h index b574345af2..656d202cc7 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -22,6 +22,7 @@ static char default_environment[] = { #else const uchar default_environment[] = { #endif +#ifndef CONFIG_DEFAULT_ENV_FROM_FILE #ifdef CONFIG_ENV_CALLBACK_LIST_DEFAULT ENV_CALLBACK_VAR "=" CONFIG_ENV_CALLBACK_LIST_DEFAULT "\0" #endif @@ -108,6 +109,9 @@ const uchar default_environment[] = { CONFIG_EXTRA_ENV_SETTINGS #endif "\0" +#else /* CONFIG_DEFAULT_ENV_FROM_FILE */ +#include "generated/defaultenv_autogenerated.h" +#endif #ifdef DEFAULT_ENV_INSTANCE_EMBEDDED } #endif -- 2.15.1

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[U-Boot] [PATCH v3 00/15] env: Multiple env support and env transition for sunxi
by Maxime Ripard 05 Apr '18

05 Apr '18

Hi, Here is a second attempt at transitioning away from the MMC raw environment to a FAT-based one for Allwinner SoCs. Since the RFC was quite well received, I actually tested it and fixed a few rough edges. You'll find the first RFC here for reference: https://lists.denx.de/pipermail/u-boot/2017-October/310111.html And the second that originated in this series: https://lists.denx.de/pipermail/u-boot/2017-November/311608.html I gave it a travis run, and it passes all tests: https://travis-ci.org/mripard/u-boot Thanks! Maxime Original description of the patches: The fundamental issue I'm trying to adress is that we've had for a very long time the assumption that the main U-Boot binary wouldn't exceed around 500 bytes. However, we're starting to get real close to that limit, and are running out of silver bullets to deal with the consequences of having a bigger U-Boot binary, the main consequence being that we would have some overlap between the environment and U-Boot. One way to address this that has been suggested by Tom is to move away from the raw MMC environment to a FAT-based one. This would allow us to slowly migrate away, and eventually remove the MMC-raw option entirely to reclaim that space for the binary. That cannot be done in a single release however, since we might have environments in the wild already that people rely on. And since we always encouraged people to use the raw MMC environment, noone would expect that. This is even worse since some platforms are using the U-Boot environment to deal with implement their upgrade mechanism, such as mender.io, and force moving the environment would break any further upgrade. The suggested implementation is to allow U-Boot to compile multiple environments backend at once, based on the work done by Simon. The default behaviour shouldn't change obviously. We can then piggy-back on this to tweak on a per-board basis the environment lookup algorithm to always favour the FAT-based environment and then fallback to the MMC. It will allow us to migrate a raw-MMC user to a FAT based solution as soon as they update their environment (assuming that there is a bootable FAT partition in the system). This has just been compile tested on sunxi so far, and I'd like general comments on the approach taken. Obviously, this will need to work properly before being merged. Changes from v2: - Fix a bug showing up on travis that resulted in the vexpress_ca_15 DHCP unit test failing. This was due to an improper return of ENVL_UNKNOWN. - Added Simon reviewed-by tag Changes from v1: - Collect tags - Rebased on v2018.01 - Fixed build failures on a couple of boards - Added back the message and the error code when an environment is failing - Added some comments about the printf in environments - Added a build time check about the number of our locations array to see if we're overflowing the location variable - Fixed the drv->init return code being ignored - Added helpers to manage the init status - Changed the ENVO prefix for the operations to ENVOP - Added some comments and documentation Changes from the RFC: - Added more useful messages to see where we're loading / saving - Init all the environments no matter what, and the deal with whatever env we want to pick at load time - Added the various tags collected Maxime Ripard (15): cmd: nvedit: Get rid of the env lookup env: Rename env_driver_lookup_default and env_get_default_location env: Pass additional parameters to the env lookup function env: Make the env save message a bit more explicit env: Make it explicit where we're loading our environment from env: fat: Make the debug messages play a little nicer env: mmc: Make the debug messages play a little nicer env: common: Make the debug messages play a little nicer env: Support multiple environments env: Initialise all the environments env: mmc: depends on the MMC framework env: Allow to build multiple environments in Kconfig env: Mark env_get_location as weak sunxi: Transition from the MMC to a FAT-based environment env: sunxi: Enable FAT-based environment support by default board/sunxi/board.c | 16 ++- cmd/nvedit.c | 4 +- configs/MPC8313ERDB_NAND_33_defconfig | 1 +- configs/MPC8313ERDB_NAND_66_defconfig | 1 +- configs/cl-som-imx7_defconfig | 1 +- configs/microblaze-generic_defconfig | 1 +- env/Kconfig | 70 ++++---- env/common.c | 2 +- env/env.c | 251 +++++++++++++++++++-------- env/fat.c | 25 ++- env/mmc.c | 1 +- include/asm-generic/global_data.h | 1 +- include/environment.h | 15 +- 13 files changed, 266 insertions(+), 123 deletions(-) base-commit: f3dd87e0b98999a78e500e8c6d2b063ebadf535a -- git-series 0.9.1

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