February 2018 - U-Boot

[U-Boot] [PATCH] am335x, shc: kconfig: Fix misspelled choice default
by Ulf Magnusson 06 Feb '18

06 Feb '18

There is no EMMC symbol in the "enable different boot versions for the shc board" choice. SHC_EMMC was probably intended. No functional changes. Kconfig choices fall back on using the first (visible) symbol in the choice as the default if the default symbol is not visible. Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib), which prints the following warning: warning: the default selection EMMC (undefined) of <choice> (defined at board/bosch/shc/Kconfig:15) is not contained in the choice I've added a corresponding warning to the C tools too, which is currently in linux-next: https://patchwork.kernel.org/patch/9983667/ Signed-off-by: Ulf Magnusson <ulfalizer(a)gmail.com> --- board/bosch/shc/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/bosch/shc/Kconfig b/board/bosch/shc/Kconfig index c71af11c1c..e0e56e6bfd 100644 --- a/board/bosch/shc/Kconfig +++ b/board/bosch/shc/Kconfig @@ -14,7 +14,7 @@ config SYS_CONFIG_NAME choice prompt "enable different boot versions for the shc board" - default EMMC + default SHC_EMMC help Select the boot version of the shc board. -- 2.14.1

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[U-Boot] [PATCH] Fix FreeBSD endian checks
by Justin Hibbits 06 Feb '18

06 Feb '18

FreeBSD, like OpenBSD, uses BIG_ENDIAN, LITTLE_ENDIAN, and BYTE_ORDER, whereas Linux and compatibles use __-prefixed names. Define the names the same as the OpenBSD block below it. --- include/compiler.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/compiler.h b/include/compiler.h index a43fb6a738..957f4b5d49 100644 --- a/include/compiler.h +++ b/include/compiler.h @@ -50,6 +50,9 @@ typedef unsigned long ulong; #endif #ifdef __FreeBSD__ # include <sys/endian.h> /* htole32 and friends */ +# define __BYTE_ORDER BYTE_ORDER +# define __LITTLE_ENDIAN LITTLE_ENDIAN +# define __BIG_ENDIAN BIG_ENDIAN #elif defined(__OpenBSD__) # include <endian.h> # define __BYTE_ORDER BYTE_ORDER -- 2.15.1

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[U-Boot] [PATCH 1/2] fpga: Resync various CONFIG_FPGA_* symbols
by Tuomas Tynkkynen 06 Feb '18

06 Feb '18

These are declared in Kconfig, but some #defines have crept in. CONFIG_FPGA CONFIG_FPGA_ALTERA CONFIG_FPGA_CYCLON2 CONFIG_FPGA_SOCFPGA CONFIG_FPGA_XILINX CONFIG_FPGA_ZYNQMPPL Signed-off-by: Tuomas Tynkkynen <tuomas(a)tuxera.com> --- configs/apf27_defconfig | 1 + configs/astro_mcf5373l_defconfig | 2 ++ configs/mt_ventoux_defconfig | 1 + configs/x600_defconfig | 1 + include/configs/M54455EVB.h | 1 - include/configs/apf27.h | 4 ---- include/configs/astro_mcf5373l.h | 2 -- include/configs/mt_ventoux.h | 2 -- include/configs/x600.h | 2 -- 9 files changed, 5 insertions(+), 11 deletions(-) diff --git a/configs/apf27_defconfig b/configs/apf27_defconfig index f09c5a828b..6949b711fd 100644 --- a/configs/apf27_defconfig +++ b/configs/apf27_defconfig @@ -31,6 +31,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=mxc_nand.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=mxc_nand.0:1M(u-boot)ro,512K(env),512K(env2),512K(firmware),512K(dtb),5M(kernel),-(rootfs)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_FPGA_XILINX=y CONFIG_MMC_MXC=y CONFIG_NAND=y CONFIG_NAND_MXC=y diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig index cababcf990..1e3708fcb5 100644 --- a/configs/astro_mcf5373l_defconfig +++ b/configs/astro_mcf5373l_defconfig @@ -16,4 +16,6 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_CMD_JFFS2=y CONFIG_FPGA_ALTERA=y +CONFIG_FPGA_CYCLON2=y +CONFIG_FPGA_XILINX=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig index 3dd8adb5ce..c059a49576 100644 --- a/configs/mt_ventoux_defconfig +++ b/configs/mt_ventoux_defconfig @@ -31,6 +31,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1m(u-boot),256k(env1),256k(env2),8m(ubisystem),-(rootfs)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_FPGA_XILINX=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y diff --git a/configs/x600_defconfig b/configs/x600_defconfig index 4658f977a4..18720daafc 100644 --- a/configs/x600_defconfig +++ b/configs/x600_defconfig @@ -37,6 +37,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:64M(ubi0),64M(ubi1)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_FLASH=y +CONFIG_FPGA_XILINX=y CONFIG_SYS_I2C_DW=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index a709fbbf63..c5a0a0371d 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -182,7 +182,6 @@ /* FPGA - Spartan 2 */ /* experiment -#define CONFIG_FPGA #define CONFIG_FPGA_COUNT 1 #define CONFIG_SYS_FPGA_PROG_FEEDBACK #define CONFIG_SYS_FPGA_CHECK_CTRLC diff --git a/include/configs/apf27.h b/include/configs/apf27.h index 24afc84a02..16345ca2b5 100644 --- a/include/configs/apf27.h +++ b/include/configs/apf27.h @@ -215,11 +215,7 @@ /* * FPGA */ -#ifndef CONFIG_SPL_BUILD -#define CONFIG_FPGA -#endif #define CONFIG_FPGA_COUNT 1 -#define CONFIG_FPGA_XILINX #define CONFIG_FPGA_SPARTAN3 #define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */ #define CONFIG_SYS_FPGA_PROG_FEEDBACK diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 540db79a27..c8d5c1bd3d 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -177,9 +177,7 @@ #define CONFIG_SYS_LONGHELP #define CONFIG_FPGA_COUNT 1 -#define CONFIG_FPGA_XILINX #define CONFIG_FPGA_SPARTAN3 -#define CONFIG_FPGA_CYCLON2 #define CONFIG_SYS_FPGA_PROG_FEEDBACK #define CONFIG_SYS_FPGA_WAIT 1000 diff --git a/include/configs/mt_ventoux.h b/include/configs/mt_ventoux.h index 11ba3e752a..bee8ddd4f2 100644 --- a/include/configs/mt_ventoux.h +++ b/include/configs/mt_ventoux.h @@ -33,8 +33,6 @@ /* * FPGA */ -#define CONFIG_FPGA -#define CONFIG_FPGA_XILINX #define CONFIG_FPGA_SPARTAN3 #define CONFIG_SYS_FPGA_PROG_FEEDBACK #define CONFIG_SYS_FPGA_WAIT 10000 diff --git a/include/configs/x600.h b/include/configs/x600.h index 4aa5a2a924..cd3bd94efb 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -87,8 +87,6 @@ #define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* FPGA config options */ -#define CONFIG_FPGA -#define CONFIG_FPGA_XILINX #define CONFIG_FPGA_SPARTAN3 #define CONFIG_FPGA_COUNT 1 -- 2.16.1

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[U-Boot] [PATCH 1/2] Convert CONFIG_BOOTP_BOOTPATH et al to Kconfig
by Adam Ford 05 Feb '18

05 Feb '18

This converts the following to Kconfig: CONFIG_BOOTP_BOOTPATH CONFIG_BOOTP_DNS CONFIG_BOOTP_GATEWAY CONFIG_BOOTP_HOSTNAME CONFIG_BOOTP_PXE CONFIG_BOOTP_SUBNETMASK CONFIG_CMDLINE_EDITING CONFIG_AUTO_COMPLETE CONFIG_SYS_LONGHELP CONFIG_SUPPORT_RAW_INITRD CONFIG_ENV_VARS_UBOOT_CONFIG Signed-off-by: Adam Ford <aford173(a)gmail.com> --- Kconfig | 34 +++++++++++++++++++++++++ cmd/Kconfig | 9 +++++++ configs/amcore_defconfig | 1 + configs/colibri_pxa270_defconfig | 3 +++ configs/colibri_vf_defconfig | 1 + configs/devkit8000_defconfig | 1 + configs/s32v234evb_defconfig | 1 + configs/vct_platinum_onenand_small_defconfig | 1 + configs/vct_platinum_small_defconfig | 1 + configs/vct_platinumavc_onenand_small_defconfig | 1 + configs/vct_platinumavc_small_defconfig | 1 + configs/vct_premium_onenand_small_defconfig | 1 + configs/vct_premium_small_defconfig | 1 + configs/vf610twr_defconfig | 1 + configs/vf610twr_nand_defconfig | 1 + configs/zynq_cse_qspi_defconfig | 3 +++ include/config_distro_defaults.h | 13 ---------- include/config_fallbacks.h | 5 ---- include/configs/10m50_devboard.h | 6 ----- include/configs/3c120_devboard.h | 6 ----- include/configs/B4860QDS.h | 3 --- include/configs/BSC9131RDB.h | 3 --- include/configs/BSC9132QDS.h | 3 --- include/configs/C29XPCIE.h | 3 --- include/configs/M5208EVBE.h | 1 - include/configs/M52277EVB.h | 5 ---- include/configs/M5235EVB.h | 4 --- include/configs/M5249EVB.h | 6 ----- include/configs/M5253DEMO.h | 2 -- include/configs/M5253EVBE.h | 5 ---- include/configs/M5272C3.h | 5 ---- include/configs/M5275EVB.h | 5 ---- include/configs/M5282EVB.h | 5 ---- include/configs/M53017EVB.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/M54418TWR.h | 5 ---- include/configs/M54451EVB.h | 5 ---- include/configs/M54455EVB.h | 5 ---- include/configs/M5475EVB.h | 1 - include/configs/M5485EVB.h | 1 - include/configs/MCR3000.h | 2 -- include/configs/MPC8308RDB.h | 6 ----- include/configs/MPC8313ERDB.h | 7 ----- include/configs/MPC8315ERDB.h | 7 ----- include/configs/MPC8323ERDB.h | 7 ----- include/configs/MPC832XEMDS.h | 7 ----- include/configs/MPC8349EMDS.h | 7 ----- include/configs/MPC8349ITX.h | 6 ----- include/configs/MPC837XEMDS.h | 7 ----- include/configs/MPC837XERDB.h | 7 ----- include/configs/MPC8536DS.h | 3 --- include/configs/MPC8540ADS.h | 6 ----- include/configs/MPC8541CDS.h | 6 ----- include/configs/MPC8544DS.h | 6 ----- include/configs/MPC8548CDS.h | 6 ----- include/configs/MPC8555CDS.h | 6 ----- include/configs/MPC8560ADS.h | 6 ----- include/configs/MPC8568MDS.h | 6 ----- include/configs/MPC8569MDS.h | 6 ----- include/configs/MPC8572DS.h | 3 --- include/configs/MPC8610HPCD.h | 5 ---- include/configs/MPC8641HPCN.h | 5 ---- include/configs/MigoR.h | 1 - include/configs/P1010RDB.h | 3 --- include/configs/P1022DS.h | 3 --- include/configs/P1023RDB.h | 2 -- include/configs/P2041RDB.h | 3 --- include/configs/T102xQDS.h | 3 --- include/configs/T102xRDB.h | 3 --- include/configs/T1040QDS.h | 3 --- include/configs/T104xRDB.h | 3 --- include/configs/T208xQDS.h | 3 --- include/configs/T208xRDB.h | 3 --- include/configs/T4240RDB.h | 3 --- include/configs/TQM834x.h | 7 ----- include/configs/UCP1020.h | 2 -- include/configs/adp-ae3xx.h | 3 --- include/configs/adp-ag101p.h | 3 --- include/configs/advantech_dms-ba16.h | 4 --- include/configs/am335x_shc.h | 4 --- include/configs/am3517_crane.h | 2 -- include/configs/am3517_evm.h | 4 --- include/configs/am43xx_evm.h | 3 --- include/configs/am57xx_evm.h | 3 --- include/configs/amcore.h | 2 -- include/configs/ap121.h | 3 --- include/configs/ap143.h | 3 --- include/configs/ap325rxa.h | 1 - include/configs/ap_sh4a_4a.h | 1 - include/configs/apalis-tk1.h | 1 - include/configs/apalis_imx6.h | 7 ----- include/configs/apf27.h | 9 ------- include/configs/armadillo-800eva.h | 1 - include/configs/aspeed-common.h | 7 ----- include/configs/astro_mcf5373l.h | 4 --- include/configs/at91-sama5_common.h | 9 ------- include/configs/at91rm9200ek.h | 3 --- include/configs/at91sam9260ek.h | 7 ----- include/configs/at91sam9261ek.h | 7 ----- include/configs/at91sam9263ek.h | 7 ----- include/configs/at91sam9m10g45ek.h | 7 ----- include/configs/at91sam9n12ek.h | 7 ----- include/configs/at91sam9rlek.h | 4 --- include/configs/at91sam9x5ek.h | 7 ----- include/configs/axs10x.h | 4 --- include/configs/bcm23550_w1d.h | 3 --- include/configs/bcm28155_ap.h | 3 --- include/configs/bcm_ep_board.h | 3 --- include/configs/bcm_northstar2.h | 2 -- include/configs/boston.h | 1 - include/configs/bur_cfg_common.h | 6 ----- include/configs/calimain.h | 4 --- include/configs/cl-som-am57x.h | 3 --- include/configs/cm_t35.h | 3 --- include/configs/cm_t3517.h | 3 --- include/configs/cm_t43.h | 1 - include/configs/cobra5272.h | 5 ---- include/configs/colibri_imx6.h | 7 ----- include/configs/colibri_imx7.h | 2 -- include/configs/colibri_pxa270.h | 7 ----- include/configs/colibri_vf.h | 4 --- include/configs/comtrend_ar5315u.h | 3 --- include/configs/comtrend_ar5387un.h | 3 --- include/configs/comtrend_ct5361.h | 4 --- include/configs/comtrend_vr3032u.h | 3 --- include/configs/comtrend_wap5813n.h | 4 --- include/configs/controlcenterd.h | 5 ---- include/configs/corenet_ds.h | 3 --- include/configs/corvus.h | 7 ----- include/configs/cyrus.h | 3 --- include/configs/da850evm.h | 4 --- include/configs/dbau1x00.h | 4 --- include/configs/devkit3250.h | 4 --- include/configs/devkit8000.h | 7 ----- include/configs/dh_imx6.h | 4 --- include/configs/dra7xx_evm.h | 3 --- include/configs/dragonboard410c.h | 1 - include/configs/dragonboard820c.h | 1 - include/configs/ea20.h | 4 --- include/configs/eb_cpu5282.h | 6 ----- include/configs/eco5pk.h | 1 - include/configs/ecovec.h | 1 - include/configs/edb93xx.h | 1 - include/configs/edison.h | 3 --- include/configs/edminiv2.h | 2 -- include/configs/espt.h | 1 - include/configs/ethernut5.h | 5 ---- include/configs/flea3.h | 6 ----- include/configs/ge_bx50v3.h | 4 --- include/configs/hikey.h | 5 ---- include/configs/hrcon.h | 4 --- include/configs/hsdk.h | 3 --- include/configs/huawei_hg556a.h | 4 --- include/configs/ids8313.h | 6 ----- include/configs/imgtec_xilfpga.h | 1 - include/configs/imx27lite-common.h | 2 -- include/configs/imx31_phycore.h | 3 --- include/configs/integrator-common.h | 1 - include/configs/integratorap.h | 3 --- include/configs/ipam390.h | 4 --- include/configs/kc1.h | 4 --- include/configs/km/keymile-common.h | 6 ----- include/configs/kzm9g.h | 1 - include/configs/legoev3.h | 3 --- include/configs/liteboard.h | 2 -- include/configs/ls1012a_common.h | 4 --- include/configs/ls1021aiot.h | 3 --- include/configs/ls1021aqds.h | 3 --- include/configs/ls1021atwr.h | 2 -- include/configs/ls1043a_common.h | 10 -------- include/configs/ls1043aqds.h | 2 -- include/configs/ls1046a_common.h | 4 --- include/configs/ls1046aqds.h | 2 -- include/configs/ls1088a_common.h | 7 ----- include/configs/ls1088aqds.h | 1 - include/configs/ls1088ardb.h | 1 - include/configs/ls2080a_common.h | 5 ---- include/configs/ls2080ardb.h | 1 - include/configs/lsxl.h | 1 - include/configs/m53evk.h | 3 --- include/configs/malta.h | 5 ---- include/configs/mcx.h | 5 ---- include/configs/meesc.h | 6 ----- include/configs/meson-gxbb-common.h | 3 --- include/configs/microblaze-generic.h | 6 ----- include/configs/mpc8308_p1m.h | 6 ----- include/configs/mpr2.h | 1 - include/configs/ms7720se.h | 1 - include/configs/ms7722se.h | 1 - include/configs/ms7750se.h | 1 - include/configs/mt_ventoux.h | 1 - include/configs/mv-common.h | 3 --- include/configs/mvebu_armada-8k.h | 3 --- include/configs/mx25pdk.h | 5 ---- include/configs/mx31ads.h | 3 --- include/configs/mx31pdk.h | 3 --- include/configs/mx35pdk.h | 7 ----- include/configs/mx51evk.h | 4 --- include/configs/mx53ard.h | 4 --- include/configs/mx53cx9020.h | 5 ---- include/configs/mx53evk.h | 4 --- include/configs/mx53loco.h | 5 ---- include/configs/mx53ppd.h | 7 ----- include/configs/mx53smd.h | 4 --- include/configs/mx6_common.h | 4 --- include/configs/mx6ul_14x14_evk.h | 2 -- include/configs/mx7_common.h | 3 --- include/configs/mx7ulp_evk.h | 5 ---- include/configs/mxs.h | 3 --- include/configs/nas220.h | 3 --- include/configs/netgear_cg3100d.h | 3 --- include/configs/nokia_rx51.h | 4 --- include/configs/nsim.h | 3 --- include/configs/nx25-ae250.h | 2 -- include/configs/omapl138_lcdk.h | 4 --- include/configs/origen.h | 2 -- include/configs/p1_p2_rdb_pc.h | 2 -- include/configs/p1_twr.h | 2 -- include/configs/pb1x00.h | 4 --- include/configs/pcm052.h | 3 --- include/configs/pic32mzdask.h | 5 ---- include/configs/pico-imx6ul.h | 2 -- include/configs/picosam9g45.h | 7 ----- include/configs/pm9261.h | 6 ----- include/configs/pm9263.h | 6 ----- include/configs/pm9g45.h | 7 ----- include/configs/poplar.h | 3 --- include/configs/qemu-mips.h | 7 ----- include/configs/qemu-mips64.h | 7 ----- include/configs/qemu-ppce500.h | 3 --- include/configs/r0p7734.h | 1 - include/configs/r2dplus.h | 1 - include/configs/r7780mp.h | 1 - include/configs/rcar-gen2-common.h | 2 -- include/configs/rcar-gen3-common.h | 3 --- include/configs/rpi.h | 2 -- include/configs/rsk7203.h | 1 - include/configs/rsk7264.h | 1 - include/configs/rsk7269.h | 1 - include/configs/s32v234evb.h | 7 ----- include/configs/s5p_goni.h | 3 --- include/configs/s5pc210_universal.h | 1 - include/configs/sagem_f(a)st1704.h | 3 --- include/configs/sandbox.h | 4 --- include/configs/sbc8349.h | 7 ----- include/configs/sbc8548.h | 6 ----- include/configs/sbc8641d.h | 2 -- include/configs/sfr_nb4_ser.h | 4 --- include/configs/sh7752evb.h | 3 --- include/configs/sh7753evb.h | 3 --- include/configs/sh7757lcr.h | 1 - include/configs/sh7763rdp.h | 1 - include/configs/sh7785lcr.h | 1 - include/configs/shmin.h | 1 - include/configs/siemens-am33x-common.h | 8 ------ include/configs/smartweb.h | 7 ----- include/configs/smdkc100.h | 2 -- include/configs/snapper9260.h | 6 ----- include/configs/snapper9g45.h | 6 ----- include/configs/sniper.h | 4 --- include/configs/socfpga_common.h | 3 --- include/configs/socrates.h | 7 ----- include/configs/spear-common.h | 2 -- include/configs/stih410-b2260.h | 7 ----- include/configs/stm32f429-discovery.h | 3 --- include/configs/stm32f429-evaluation.h | 3 --- include/configs/stm32f469-discovery.h | 3 --- include/configs/stm32f746-disco.h | 3 --- include/configs/stm32h743-disco.h | 3 --- include/configs/stm32h743-eval.h | 3 --- include/configs/stmark2.h | 2 -- include/configs/strider.h | 4 --- include/configs/stv0991.h | 2 -- include/configs/t4qds.h | 3 --- include/configs/tam3517-common.h | 6 ----- include/configs/tao3530.h | 3 --- include/configs/taurus.h | 4 --- include/configs/tb100.h | 4 --- include/configs/tegra-common.h | 2 -- include/configs/thunderx_88xx.h | 6 ----- include/configs/ti814x_evm.h | 5 ---- include/configs/ti816x_evm.h | 3 --- include/configs/ti_am335x_common.h | 3 --- include/configs/ti_armv7_common.h | 6 ----- include/configs/ti_armv7_keystone2.h | 1 - include/configs/tplink_wdr4300.h | 3 --- include/configs/trats.h | 1 - include/configs/trats2.h | 1 - include/configs/tricorder.h | 3 --- include/configs/ts4800.h | 4 --- include/configs/uniphier.h | 5 ---- include/configs/usb_a9263.h | 7 ----- include/configs/vct.h | 7 ----- include/configs/ve8313.h | 7 ----- include/configs/vexpress_aemv8a.h | 8 ------ include/configs/vexpress_common.h | 4 --- include/configs/vf610twr.h | 2 -- include/configs/vme8349.h | 7 ----- include/configs/wb45n.h | 6 ----- include/configs/wb50n.h | 6 ----- include/configs/woodburn_common.h | 7 ----- include/configs/work_92105.h | 4 --- include/configs/x600.h | 3 --- include/configs/x86-common.h | 7 ----- include/configs/xilinx_zynqmp.h | 13 ---------- include/configs/xpedite517x.h | 2 -- include/configs/xpedite520x.h | 5 ---- include/configs/xpedite537x.h | 3 --- include/configs/xpedite550x.h | 3 --- include/configs/xpress.h | 2 -- include/configs/xtfpga.h | 3 --- include/configs/zipitz2.h | 2 -- include/configs/zmx25.h | 6 ----- include/configs/zynq-common.h | 6 ----- include/configs/zynq_cse.h | 4 --- net/Kconfig | 24 +++++++++++++++++ scripts/config_whitelist.txt | 11 -------- 318 files changed, 85 insertions(+), 1182 deletions(-) diff --git a/Kconfig b/Kconfig index f713c6a..d192ce4 100644 --- a/Kconfig +++ b/Kconfig @@ -83,12 +83,46 @@ config DISTRO_DEFAULTS Select this to enable various options and commands which are suitable for building u-boot for booting general purpose Linux distributions. +config ENV_VARS_UBOOT_CONFIG + bool "Add arch, board, vendor and soc variables to default environment" + default y + help + Define this in order to add variables describing the + U-Boot build configuration to the default environment. + These will be named arch, cpu, board, vendor, and soc. + Enabling this option will cause the following to be defined: + - CONFIG_SYS_ARCH + - CONFIG_SYS_CPU + - CONFIG_SYS_BOARD + - CONFIG_SYS_VENDOR + - CONFIG_SYS_SOC + config SYS_BOOT_GET_CMDLINE bool "Enable kernel command line setup" help Enables allocating and saving kernel cmdline in space between "bootm_low" and "bootm_low" + BOOTMAPSZ. +config CMDLINE_EDITING + bool "Enable command line editing" + default y + help + Enable editing and History functions for interactive command line + input operations + +config AUTO_COMPLETE + bool "Enable auto complete using TAB" + default y + help + Enable auto completion of commands using TAB. + +config SYS_LONGHELP + bool "Enable long help messages" + default y + help + Defined when you want long help messages included + Do not set this option when short of memory. + config SYS_BOOT_GET_KBD bool "Enable kernel board information setup" help diff --git a/cmd/Kconfig b/cmd/Kconfig index 676011d..43462b7 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -189,6 +189,15 @@ config CMD_BOOTZ help Boot the Linux zImage +config SUPPORT_RAW_INITRD + bool "Enable raw initrd images" + default y + help + Note, defining the SUPPORT_RAW_INITRD allows user to supply + kernel with raw initrd images. The syntax is slightly different, the + address of the initrd must be augmented by it's size, in the following + format: "<initrd addres>:<initrd size>". + config CMD_BOOTI bool "booti" depends on ARM64 diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig index 3332a31..0ed5de7 100644 --- a/configs/amcore_defconfig +++ b/configs/amcore_defconfig @@ -2,6 +2,7 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xffc00000 CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_TARGET_AMCORE=y +# CONFIG_SYS_LONGHELP is not set CONFIG_BOOTDELAY=1 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/colibri_pxa270_defconfig b/configs/colibri_pxa270_defconfig index 9720b5f..24fa692 100644 --- a/configs/colibri_pxa270_defconfig +++ b/configs/colibri_pxa270_defconfig @@ -1,5 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_COLIBRI_PXA270=y +# CONFIG_CMDLINE_EDITING is not set +# CONFIG_AUTO_COMPLETE is not set +# CONFIG_SYS_LONGHELP is not set CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=tty0 console=ttyS0,115200" # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 9b8c407..cc77128 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_VF610=y CONFIG_TARGET_COLIBRI_VF=y CONFIG_DEFAULT_DEVICE_TREE="vf610-colibri" +# CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,IMX_NAND" CONFIG_BOOTDELAY=1 CONFIG_LOGLEVEL=3 diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 0d970ca..0bec85b 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -7,6 +7,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y +# CONFIG_SUPPORT_RAW_INITRD is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x680000 diff --git a/configs/s32v234evb_defconfig b/configs/s32v234evb_defconfig index c3d199e..0aafea0 100644 --- a/configs/s32v234evb_defconfig +++ b/configs/s32v234evb_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_S32V234EVB=y CONFIG_DISTRO_DEFAULTS=y +# CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_MALLOC_F=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/s32v234evb/s32v234evb.cfg" CONFIG_USE_BOOTARGS=y diff --git a/configs/vct_platinum_onenand_small_defconfig b/configs/vct_platinum_onenand_small_defconfig index c0c5afd..a5573f7 100644 --- a/configs/vct_platinum_onenand_small_defconfig +++ b/configs/vct_platinum_onenand_small_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_VCT=y CONFIG_VCT_PLATINUM=y CONFIG_VCT_ONENAND=y CONFIG_VCT_SMALL_IMAGE=y +# CONFIG_SYS_LONGHELP is not set CONFIG_BOOTDELAY=5 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_PROMPT="$ " diff --git a/configs/vct_platinum_small_defconfig b/configs/vct_platinum_small_defconfig index 5c53850..b927e3f 100644 --- a/configs/vct_platinum_small_defconfig +++ b/configs/vct_platinum_small_defconfig @@ -2,6 +2,7 @@ CONFIG_MIPS=y CONFIG_TARGET_VCT=y CONFIG_VCT_PLATINUM=y CONFIG_VCT_SMALL_IMAGE=y +# CONFIG_SYS_LONGHELP is not set CONFIG_BOOTDELAY=5 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_PROMPT="$ " diff --git a/configs/vct_platinumavc_onenand_small_defconfig b/configs/vct_platinumavc_onenand_small_defconfig index 75ba8f2..1dcbed5 100644 --- a/configs/vct_platinumavc_onenand_small_defconfig +++ b/configs/vct_platinumavc_onenand_small_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_VCT=y CONFIG_VCT_PLATINUMAVC=y CONFIG_VCT_ONENAND=y CONFIG_VCT_SMALL_IMAGE=y +# CONFIG_SYS_LONGHELP is not set CONFIG_BOOTDELAY=5 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_PROMPT="$ " diff --git a/configs/vct_platinumavc_small_defconfig b/configs/vct_platinumavc_small_defconfig index 9931f5f..ebf1166 100644 --- a/configs/vct_platinumavc_small_defconfig +++ b/configs/vct_platinumavc_small_defconfig @@ -2,6 +2,7 @@ CONFIG_MIPS=y CONFIG_TARGET_VCT=y CONFIG_VCT_PLATINUMAVC=y CONFIG_VCT_SMALL_IMAGE=y +# CONFIG_SYS_LONGHELP is not set CONFIG_BOOTDELAY=5 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_PROMPT="$ " diff --git a/configs/vct_premium_onenand_small_defconfig b/configs/vct_premium_onenand_small_defconfig index 6dfeab5..de77c0d 100644 --- a/configs/vct_premium_onenand_small_defconfig +++ b/configs/vct_premium_onenand_small_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_VCT=y CONFIG_VCT_PREMIUM=y CONFIG_VCT_ONENAND=y CONFIG_VCT_SMALL_IMAGE=y +# CONFIG_SYS_LONGHELP is not set CONFIG_BOOTDELAY=5 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_PROMPT="$ " diff --git a/configs/vct_premium_small_defconfig b/configs/vct_premium_small_defconfig index b0ec5f2..bad1e60 100644 --- a/configs/vct_premium_small_defconfig +++ b/configs/vct_premium_small_defconfig @@ -2,6 +2,7 @@ CONFIG_MIPS=y CONFIG_TARGET_VCT=y CONFIG_VCT_PREMIUM=y CONFIG_VCT_SMALL_IMAGE=y +# CONFIG_SYS_LONGHELP is not set CONFIG_BOOTDELAY=5 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_PROMPT="$ " diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig index 46d1ea4..0d4ee5b 100644 --- a/configs/vf610twr_defconfig +++ b/configs/vf610twr_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_VF610=y CONFIG_DEFAULT_DEVICE_TREE="vf610-twr" +# CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_LOGLEVEL=3 diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig index 6be20f5..8529216 100644 --- a/configs/vf610twr_nand_defconfig +++ b/configs/vf610twr_nand_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_VF610=y CONFIG_DEFAULT_DEVICE_TREE="vf610-twr" +# CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_LOGLEVEL=3 diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 9659fae..8ce92a0 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -6,6 +6,9 @@ CONFIG_SPL_STACK_R_ADDR=0x200000 # CONFIG_ZYNQ_DDRC_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single" CONFIG_DEBUG_UART=y +# CONFIG_CMDLINE_EDITING is not set +# CONFIG_AUTO_COMPLETE is not set +# CONFIG_SYS_LONGHELP is not set # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOOTDELAY=-1 # CONFIG_DISPLAY_CPUINFO is not set diff --git a/include/config_distro_defaults.h b/include/config_distro_defaults.h index 41bbfb9..35e704e 100644 --- a/include/config_distro_defaults.h +++ b/include/config_distro_defaults.h @@ -13,17 +13,4 @@ * consistent manner. */ -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_DNS -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_PXE -#define CONFIG_BOOTP_SUBNETMASK - -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_LONGHELP -#define CONFIG_SUPPORT_RAW_INITRD -#define CONFIG_ENV_VARS_UBOOT_CONFIG - #endif /* _CONFIG_CMD_DISTRO_DEFAULTS_H */ diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h index 9695ee7..805df51 100644 --- a/include/config_fallbacks.h +++ b/include/config_fallbacks.h @@ -92,9 +92,4 @@ # endif #endif -#ifndef CONFIG_CMDLINE -#undef CONFIG_CMDLINE_EDITING -#undef CONFIG_SYS_LONGHELP -#endif - #endif /* __CONFIG_FALLBACKS_H */ diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h index ec30ed0..c9742f3 100644 --- a/include/configs/10m50_devboard.h +++ b/include/configs/10m50_devboard.h @@ -37,9 +37,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * FDT options @@ -77,7 +74,6 @@ /* * MISC */ -#define CONFIG_SYS_LONGHELP /* Provide extended help */ #define CONFIG_SYS_LOAD_ADDR 0xcc000000 /* Half of RAM */ #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE @@ -85,7 +81,5 @@ CONFIG_ENV_SIZE - \ CONFIG_SYS_MALLOC_LEN - \ 0x10000) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #endif /* __CONFIG_H */ diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h index f934a17..afd6488 100644 --- a/include/configs/3c120_devboard.h +++ b/include/configs/3c120_devboard.h @@ -40,9 +40,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * FDT options @@ -80,7 +77,6 @@ /* * MISC */ -#define CONFIG_SYS_LONGHELP /* Provide extended help */ #define CONFIG_SYS_LOAD_ADDR 0xd4000000 /* Half of RAM */ #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE @@ -88,7 +84,5 @@ CONFIG_ENV_SIZE - \ CONFIG_SYS_MALLOC_LEN - \ 0x10000) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #endif /* __CONFIG_H */ diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 6c0ea17..5c1612d 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -701,9 +701,6 @@ unsigned long get_board_ddr_clk(void); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 35712c0..27e3584 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -286,9 +286,6 @@ extern unsigned long get_sdram_size(void); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ #if defined(CONFIG_CMD_KGDB) diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 1378bf2..b79de18 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -509,9 +509,6 @@ combinations. this should be removed later /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 52ac738..8c33abf 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -425,9 +425,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index fca3adb..5c04eb3 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -77,7 +77,6 @@ "" #define CONFIG_PRAM 512 /* 512 KB */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x40010000 diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h index 584882f..f2a84ba 100644 --- a/include/configs/M52277EVB.h +++ b/include/configs/M52277EVB.h @@ -30,9 +30,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #define CONFIG_HOSTNAME M52277EVB #define CONFIG_SYS_UBOOT_END 0x3FFFF @@ -127,8 +124,6 @@ #define CONFIG_PRAM 2048 /* 2048 KB */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000) #define CONFIG_SYS_MBAR 0xFC000000 diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index ffecbad..c4b699f 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -29,9 +29,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC @@ -92,7 +89,6 @@ "" #define CONFIG_PRAM 512 /* 512 KB */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE+0x20000) diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index ccd40b2..6b37e46 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -31,18 +31,12 @@ * BOOTP options */ #undef CONFIG_BOOTP_BOOTFILESIZE -#undef CONFIG_BOOTP_BOOTPATH -#undef CONFIG_BOOTP_GATEWAY -#undef CONFIG_BOOTP_HOSTNAME /* * Command line configuration. */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - #define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */ -#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */ #define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */ #define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */ diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index f89007a..7186084 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -89,8 +89,6 @@ #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFFFE7FF) #define CONFIG_SYS_I2C_PINMUX_SET (0) -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - #define CONFIG_SYS_LOAD_ADDR 0x00100000 #define CONFIG_SYS_MEMTEST_START 0x400 diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h index 8d7250a..daa44b3 100644 --- a/include/configs/M5253EVBE.h +++ b/include/configs/M5253EVBE.h @@ -35,9 +35,6 @@ * BOOTP options */ #undef CONFIG_BOOTP_BOOTFILESIZE -#undef CONFIG_BOOTP_BOOTPATH -#undef CONFIG_BOOTP_GATEWAY -#undef CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -60,8 +57,6 @@ #define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */ #define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - #define CONFIG_SYS_LOAD_ADDR 0x00100000 #define CONFIG_SYS_MEMTEST_START 0x400 diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 52ca7de..936a91e 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -46,9 +46,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -96,8 +93,6 @@ "save\0" \ "" -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - #define CONFIG_SYS_LOAD_ADDR 0x20000 #define CONFIG_SYS_MEMTEST_START 0x400 #define CONFIG_SYS_MEMTEST_END 0x380000 diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 5cc2cdf..815de50 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -46,9 +46,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* Available command configuration */ @@ -86,8 +83,6 @@ #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0) #define CONFIG_SYS_I2C_PINMUX_SET (0x000F) -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - #define CONFIG_SYS_LOAD_ADDR 0x800000 #define CONFIG_BOOTCOMMAND "bootm ffe40000" diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 3886469..b295150 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -38,9 +38,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -88,8 +85,6 @@ "save\0" \ "" -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - #define CONFIG_SYS_LOAD_ADDR 0x20000 #define CONFIG_SYS_MEMTEST_START 0x400 diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 5045ad5..c322417 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -94,7 +94,6 @@ "" #define CONFIG_PRAM 512 /* 512 KB */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x40010000 diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index f0a8c9d..2272dc2 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -86,7 +86,6 @@ "" #define CONFIG_PRAM 512 /* 512 KB */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x40010000 diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 9ff15da..89e024f 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -86,7 +86,6 @@ "" #define CONFIG_PRAM 512 /* 512 KB */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x40010000 diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h index 3e2b6e1..4f91ef9 100644 --- a/include/configs/M54418TWR.h +++ b/include/configs/M54418TWR.h @@ -33,9 +33,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * NAND FLASH @@ -177,8 +174,6 @@ #define CONFIG_PRAM 2048 /* 2048 KB */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000) #define CONFIG_SYS_MBAR 0xFC000000 diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h index 5a66dda..4c771b4 100644 --- a/include/configs/M54451EVB.h +++ b/include/configs/M54451EVB.h @@ -33,9 +33,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* Network configuration */ #define CONFIG_MCFFEC @@ -141,8 +138,6 @@ #define CONFIG_PRAM 2048 /* 2048 KB */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000) diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index b583660..6128e97 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -33,9 +33,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* Network configuration */ #define CONFIG_MCFFEC @@ -192,8 +189,6 @@ #define CONFIG_PRAM 2048 /* 2048 KB */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000) #define CONFIG_SYS_MBAR 0xFC000000 diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h index 24ecc62..96fa12c 100644 --- a/include/configs/M5475EVB.h +++ b/include/configs/M5475EVB.h @@ -123,7 +123,6 @@ "" #define CONFIG_PRAM 512 /* 512 KB */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x00010000 diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h index a6a820b..111c8d8 100644 --- a/include/configs/M5485EVB.h +++ b/include/configs/M5485EVB.h @@ -111,7 +111,6 @@ "" #define CONFIG_PRAM 512 /* 512 KB */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x00010000 diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index 9d2c486..6b03873 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -69,9 +69,7 @@ #define CONFIG_WATCHDOG 1 /* watchdog enabled */ /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING 1 #ifdef CONFIG_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "S3K> " #endif diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index 9ad1cf9..ff72922 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -406,20 +406,14 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. */ -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ - /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index c20a984..4c9e90c 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -452,21 +452,14 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. */ -#define CONFIG_CMDLINE_EDITING 1 -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ - /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index 2bdec42..1b59221 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -428,23 +428,16 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. */ -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ - #undef CONFIG_WATCHDOG /* watchdog disabled */ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 0ae48e6..dfa5f59 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -218,9 +218,6 @@ #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ - /* I2C */ #define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 400000 @@ -310,9 +307,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -323,7 +317,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index fdbac9b..723a5f6 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -299,9 +299,6 @@ #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ - /* I2C */ #define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 400000 @@ -394,9 +391,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -407,7 +401,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 86acf33..03e5c32 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -317,9 +317,6 @@ #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ - /* I2C */ #define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 400000 @@ -452,9 +449,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -465,7 +459,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index cf078cc..9d69da7 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -465,9 +465,6 @@ boards, we say we have two, but don't display a message if we find only one. */ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* Watchdog */ #undef CONFIG_WATCHDOG /* watchdog disabled */ @@ -475,9 +472,6 @@ boards, we say we have two, but don't display a message if we find only one. */ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ #define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */ diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 2cad8e5..b21ad76 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -453,17 +453,11 @@ extern int board_pci_host_broken(void); * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. */ -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ - #undef CONFIG_WATCHDOG /* watchdog disabled */ #ifdef CONFIG_MMC @@ -475,7 +469,6 @@ extern int board_pci_host_broken(void); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index ef12e6d..b8247c2 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -467,17 +467,11 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. */ -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ - #undef CONFIG_WATCHDOG /* watchdog disabled */ #ifdef CONFIG_MMC @@ -489,7 +483,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index b0e011f..37dc5ad 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -594,9 +594,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index dae3db9..ce5db40 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -305,9 +305,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -318,9 +315,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 8dbdd3b..c3e2d90 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -333,18 +333,12 @@ extern unsigned long get_clock_freq(void); * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #undef CONFIG_WATCHDOG /* watchdog disabled */ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 066d22c..001d6b1 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -334,9 +334,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * USB @@ -352,9 +349,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 9304f04..88b59b5 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -451,18 +451,12 @@ extern unsigned long get_clock_freq(void); * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #undef CONFIG_WATCHDOG /* watchdog disabled */ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 6416bb0..6a00362 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -331,18 +331,12 @@ extern unsigned long get_clock_freq(void); * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #undef CONFIG_WATCHDOG /* watchdog disabled */ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index b31f68d..e8efee5 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -344,18 +344,12 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #undef CONFIG_WATCHDOG /* watchdog disabled */ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default load address */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 5ce570a..979831e 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -346,18 +346,12 @@ extern unsigned long get_clock_freq(void); * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #undef CONFIG_WATCHDOG /* watchdog disabled */ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index 227e712..ecafcaf 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -438,9 +438,6 @@ extern unsigned long get_clock_freq(void); * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #undef CONFIG_WATCHDOG /* watchdog disabled */ @@ -453,9 +450,6 @@ extern unsigned long get_clock_freq(void); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_SYS_CBSIZE 2048 /* Console I/O Buffer Size */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 353cec6..4f8b09d 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -550,9 +550,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 04d2fec..72aca3d 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -411,9 +411,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -425,8 +422,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 7e42686..bd9656e 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -573,17 +573,12 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #undef CONFIG_WATCHDOG /* watchdog disabled */ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h index dbdf3dc..cc69195 100644 --- a/include/configs/MigoR.h +++ b/include/configs/MigoR.h @@ -24,7 +24,6 @@ #define MIGO_R_FLASH_BANK_SIZE (64 * 1024 * 1024) #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 71eb946..beebd5e 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -710,9 +710,6 @@ extern unsigned long get_sdram_size(void); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 8dbb13a..e3f0ddb 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -580,9 +580,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index ad6bd15..e46e84f 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -247,8 +247,6 @@ extern unsigned long get_clock_freq(void); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index b48f7f1..cfc89f6 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -584,9 +584,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index 005aa27..e195bca 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -758,9 +758,6 @@ unsigned long get_board_ddr_clk(void); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 7325567..c21f213 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -772,9 +772,6 @@ unsigned long get_board_ddr_clk(void); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index c1a7020..5757556 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -636,9 +636,6 @@ unsigned long get_board_ddr_clk(void); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 442122b..8a3372a 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -759,9 +759,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 1f63771..0a2d033 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -724,9 +724,6 @@ unsigned long get_board_ddr_clk(void); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index f8564e8..b20ef15 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -671,9 +671,6 @@ unsigned long get_board_ddr_clk(void); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 7f2f421..a1f4581 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -267,9 +267,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index a9d0abb..e064881 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -258,19 +258,12 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ - #undef CONFIG_WATCHDOG /* watchdog disabled */ /* diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index f8c04b8..6e842db 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -434,8 +434,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms tick */ diff --git a/include/configs/adp-ae3xx.h b/include/configs/adp-ae3xx.h index f75274e..2963bfd 100644 --- a/include/configs/adp-ae3xx.h +++ b/include/configs/adp-ae3xx.h @@ -20,8 +20,6 @@ #define CONFIG_SKIP_TRUNOFF_WATCHDOG -#define CONFIG_CMDLINE_EDITING - #define CONFIG_ARCH_MAP_SYSMEM #define CONFIG_BOOTP_SEND_HOSTNAME @@ -96,7 +94,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ /* * Size of malloc() pool diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index f836593..0720e87 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -18,8 +18,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_CMDLINE_EDITING - #define CONFIG_ARCH_MAP_SYSMEM #define CONFIG_BOOTP_SEND_HOSTNAME @@ -101,7 +99,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ /* * Size of malloc() pool diff --git a/include/configs/advantech_dms-ba16.h b/include/configs/advantech_dms-ba16.h index c05bcd5..80ef13b 100644 --- a/include/configs/advantech_dms-ba16.h +++ b/include/configs/advantech_dms-ba16.h @@ -203,8 +203,6 @@ #define CONFIG_ARP_TIMEOUT 200UL /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MEMTEST_START 0x10000000 #define CONFIG_SYS_MEMTEST_END 0x10010000 @@ -212,8 +210,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_CMDLINE_EDITING - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h index e2d329a..8d87d5a 100644 --- a/include/configs/am335x_shc.h +++ b/include/configs/am335x_shc.h @@ -65,7 +65,6 @@ # define CONFIG_RESET_TO_RETRY #endif -#define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #ifndef CONFIG_SPL_BUILD @@ -258,11 +257,8 @@ #define CONFIG_DRIVER_TI_CPSW #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_PHY_ADDR 0 #define CONFIG_PHY_SMSC diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index c620b09..58aac65 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -153,11 +153,9 @@ "fi; " \ "else run nandboot; fi" -#define CONFIG_AUTO_COMPLETE 1 /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_MAXARGS 32 /* max number of command */ /* args */ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 4d94078..356dc6e 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -62,7 +62,6 @@ #define CONFIG_DRIVER_TI_EMAC_USE_RMII #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 @@ -171,9 +170,6 @@ "else run nandboot; fi" /* Miscellaneous configurable options */ -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP /* We set the max number of command args high to avoid HUSH bugs. */ #define CONFIG_SYS_MAXARGS 64 diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 726dbba..a0d2b36 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -216,11 +216,8 @@ /* CPSW Ethernet */ #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10 #endif diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index 7546b3f..9c76862 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -77,11 +77,8 @@ #define CONFIG_HSMMC2_8BIT /* CPSW Ethernet */ -#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ #define CONFIG_MII /* Required in net/eth.c */ diff --git a/include/configs/amcore.h b/include/configs/amcore.h index b9fc5b5..569fd98 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -30,9 +30,7 @@ "cp.b 0x20000 0xfff00000 ${filesize}\0" /* undef to save memory */ -#undef CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */ #define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */ #define CONFIG_SYS_LOAD_ADDR 0x20000 /* default load address */ diff --git a/include/configs/ap121.h b/include/configs/ap121.h index 251d258..e1a192d 100644 --- a/include/configs/ap121.h +++ b/include/configs/ap121.h @@ -37,9 +37,6 @@ #define CONFIG_ENV_SIZE 0x10000 /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE /* * Diagnostics diff --git a/include/configs/ap143.h b/include/configs/ap143.h index cfea0b2..94b5332 100644 --- a/include/configs/ap143.h +++ b/include/configs/ap143.h @@ -41,9 +41,6 @@ #define CONFIG_ENV_SIZE 0x10000 /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE /* * Diagnostics diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h index 4c2a2bd..e01b963 100644 --- a/include/configs/ap325rxa.h +++ b/include/configs/ap325rxa.h @@ -23,7 +23,6 @@ #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 /* undef to save memory */ -#define CONFIG_SYS_LONGHELP /* Monitor Command Prompt */ /* Buffer size for Console output */ #define CONFIG_SYS_PBSIZE 256 diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h index 2a01000..d156677 100644 --- a/include/configs/ap_sh4a_4a.h +++ b/include/configs/ap_sh4a_4a.h @@ -26,7 +26,6 @@ #define CONFIG_BITBANGMII_MULTI /* undef to save memory */ -#define CONFIG_SYS_LONGHELP /* Monitor Command Prompt */ /* Buffer size for Console output */ #define CONFIG_SYS_PBSIZE 256 diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h index c13e446..5f53a52 100644 --- a/include/configs/apalis-tk1.h +++ b/include/configs/apalis-tk1.h @@ -147,7 +147,6 @@ #define CONFIG_CMD_TIME -#define CONFIG_SUPPORT_RAW_INITRD #define CONFIG_SYS_BOOT_RAMDISK_HIGH #include "tegra-common-usb-gadget.h" diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 6955310..654f745 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -41,7 +41,6 @@ /* Make the HW version stuff available in U-Boot env */ #define CONFIG_VERSION_VARIABLE /* ver environment variable */ -#define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG /* I2C Configs */ @@ -252,8 +251,6 @@ "fbmem=32M\0 " /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE #undef CONFIG_SYS_CBSIZE #define CONFIG_SYS_CBSIZE 1024 #undef CONFIG_SYS_MAXARGS @@ -266,8 +263,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_CMDLINE_EDITING - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR @@ -297,6 +292,4 @@ #define CONFIG_CMD_TIME -#define CONFIG_SUPPORT_RAW_INITRD - #endif /* __CONFIG_H */ diff --git a/include/configs/apf27.h b/include/configs/apf27.h index 607b27c..d2a0d9a 100644 --- a/include/configs/apf27.h +++ b/include/configs/apf27.h @@ -39,12 +39,7 @@ /* * BOOTP options */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_HOSTNAME CONFIG_BOARD_NAME @@ -90,13 +85,9 @@ /* * U-Boot general configurations */ -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_PREBOOT "run check_flash check_env;" /* diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index cade5bb..a122cda 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -33,7 +33,6 @@ #define ARMADILLO_800EVA_SDRAM_BASE 0x40000000 #define ARMADILLO_800EVA_SDRAM_SIZE (512 * 1024 * 1024) -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_PBSIZE 256 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h index 1e182a1..f219349 100644 --- a/include/configs/aspeed-common.h +++ b/include/configs/aspeed-common.h @@ -16,8 +16,6 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG -#define CONFIG_CMDLINE_EDITING - /* Enable cache controller */ #define CONFIG_SYS_DCACHE_OFF @@ -48,15 +46,10 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_SUBNETMASK /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP #define CONFIG_BOOTCOMMAND "bootm 20080000 20300000" #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 84ce35c..8b154d4 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -55,8 +55,6 @@ #define ENABLE_JFFS 1 #endif -#define CONFIG_CMDLINE_EDITING - #define CONFIG_MCFRTC #undef RTC_DEBUG @@ -173,8 +171,6 @@ /* default RAM address for user programs */ #define CONFIG_SYS_LOAD_ADDR 0x20000 -#define CONFIG_SYS_LONGHELP - #define CONFIG_FPGA_COUNT 1 #define CONFIG_FPGA_XILINX #define CONFIG_FPGA_SPARTAN3 diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h index dc36c2a..68d23b4 100644 --- a/include/configs/at91-sama5_common.h +++ b/include/configs/at91-sama5_common.h @@ -22,8 +22,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #endif -#define CONFIG_ENV_VARS_UBOOT_CONFIG - /* general purpose I/O */ #ifndef CONFIG_DM_GPIO #define CONFIG_AT91_GPIO @@ -34,9 +32,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -84,10 +79,6 @@ #endif -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE - /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index 8dcd6f4..f768c39 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -171,9 +171,6 @@ /* * Shell Settings */ -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE /* * Size of malloc() pool diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index ea7478b..19af4a3 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -50,9 +50,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE 1 -#define CONFIG_BOOTP_BOOTPATH 1 -#define CONFIG_BOOTP_GATEWAY 1 -#define CONFIG_BOOTP_HOSTNAME 1 /* * SDRAM: 1 bank, min 32, max 128 MB @@ -159,10 +156,6 @@ "fatload mmc 0:1 0x22000000 uImage; bootm" #endif -#define CONFIG_SYS_LONGHELP 1 -#define CONFIG_CMDLINE_EDITING 1 -#define CONFIG_AUTO_COMPLETE - /* * Size of malloc() pool */ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 39e4b38..3477bb0 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -51,9 +51,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* SDRAM */ #define CONFIG_NR_DRAM_BANKS 1 @@ -136,10 +133,6 @@ #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" #endif -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE - /* * Size of malloc() pool */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index 9431777..10eff62 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -59,9 +59,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE 1 -#define CONFIG_BOOTP_BOOTPATH 1 -#define CONFIG_BOOTP_GATEWAY 1 -#define CONFIG_BOOTP_HOSTNAME 1 /* SDRAM */ #define CONFIG_NR_DRAM_BANKS 1 @@ -252,10 +249,6 @@ #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" #endif -#define CONFIG_SYS_LONGHELP 1 -#define CONFIG_CMDLINE_EDITING 1 -#define CONFIG_AUTO_COMPLETE - /* * Size of malloc() pool */ diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 2957da9..a436fa7 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -44,9 +44,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* SDRAM */ #define CONFIG_NR_DRAM_BANKS 1 @@ -98,10 +95,6 @@ "bootz 0x72000000 - 0x71000000" #endif -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE - /* * Size of malloc() pool */ diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 87728df..d95c4b4 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -35,9 +35,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 @@ -147,10 +144,6 @@ #endif -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE - /* * Size of malloc() pool */ diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index c08fb2e..0896865 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -107,10 +107,6 @@ "bootz 0x22000000 - 0x21000000" #endif -#define CONFIG_SYS_LONGHELP 1 -#define CONFIG_CMDLINE_EDITING 1 -#define CONFIG_AUTO_COMPLETE - /* * Size of malloc() pool */ diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 9450784..264793b 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -27,9 +27,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) @@ -121,10 +118,6 @@ #define CONFIG_ENV_SIZE 0x4000 #endif -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE - /* * Size of malloc() pool */ diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index a9c4d1a..5f11f42 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -62,9 +62,6 @@ #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING - /* * Environment settings */ @@ -79,7 +76,6 @@ /* * Console configuration */ -#define CONFIG_SYS_LONGHELP /* * Misc utility configuration diff --git a/include/configs/bcm23550_w1d.h b/include/configs/bcm23550_w1d.h index 31bcd51..b9d5585 100644 --- a/include/configs/bcm23550_w1d.h +++ b/include/configs/bcm23550_w1d.h @@ -96,9 +96,6 @@ */ /* version string, parser, etc */ -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP #define CONFIG_MX_CYCLIC diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h index fe135b5..aff1489 100644 --- a/include/configs/bcm28155_ap.h +++ b/include/configs/bcm28155_ap.h @@ -95,9 +95,6 @@ */ /* version string, parser, etc */ -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP #define CONFIG_MX_CYCLIC diff --git a/include/configs/bcm_ep_board.h b/include/configs/bcm_ep_board.h index fd893e6..ed3c427 100644 --- a/include/configs/bcm_ep_board.h +++ b/include/configs/bcm_ep_board.h @@ -53,9 +53,6 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* version string, parser, etc */ -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP #define CONFIG_MX_CYCLIC diff --git a/include/configs/bcm_northstar2.h b/include/configs/bcm_northstar2.h index 3605d86..847b9bd 100644 --- a/include/configs/bcm_northstar2.h +++ b/include/configs/bcm_northstar2.h @@ -45,7 +45,5 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* version string, parser, etc */ -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP #endif /* __BCM_NORTHSTAR2_H */ diff --git a/include/configs/boston.h b/include/configs/boston.h index fdd5ef5..9e84157 100644 --- a/include/configs/boston.h +++ b/include/configs/boston.h @@ -44,7 +44,6 @@ /* * Console */ -#define CONFIG_SYS_LONGHELP /* * Flash diff --git a/include/configs/bur_cfg_common.h b/include/configs/bur_cfg_common.h index f90542c..a832b2b 100644 --- a/include/configs/bur_cfg_common.h +++ b/include/configs/bur_cfg_common.h @@ -27,10 +27,7 @@ #define CONFIG_PREBOOT "run cfgscr; run brdefaultip" /* Network defines */ -#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ #define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10 /* Network console */ @@ -40,9 +37,6 @@ #define CONFIG_ENV_OVERWRITE /* Overwrite ethaddr / serial# */ /* As stated above, the following choices are optional. */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING /* We set the max number of command args high to avoid HUSH bugs. */ #define CONFIG_SYS_MAXARGS 64 diff --git a/include/configs/calimain.h b/include/configs/calimain.h index 4c2f6ba..8ddcd79 100644 --- a/include/configs/calimain.h +++ b/include/configs/calimain.h @@ -158,7 +158,6 @@ */ #ifdef CONFIG_DRIVER_TI_EMAC #define CONFIG_MII -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 @@ -172,9 +171,6 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) #define CONFIG_LOADADDR 0xc0700000 -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/cl-som-am57x.h b/include/configs/cl-som-am57x.h index 4f64672..eaf2754 100644 --- a/include/configs/cl-som-am57x.h +++ b/include/configs/cl-som-am57x.h @@ -86,14 +86,11 @@ #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_GATEWAY #define CONFIG_PHY_ATHEROS #define CONFIG_SYS_RX_ETH_BUFFER 64 #define PHY_ANEG_TIMEOUT 8000 -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 -#define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10 /* Default environment */ diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index d20c731..78024da 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -155,11 +155,8 @@ /* * Miscellaneous configurable options */ -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #define CONFIG_TIMESTAMP #define CONFIG_SYS_AUTOLOAD "no" -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ /* works on */ diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h index 2367f5a..b96d469 100644 --- a/include/configs/cm_t3517.h +++ b/include/configs/cm_t3517.h @@ -160,11 +160,8 @@ /* * Miscellaneous configurable options */ -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #define CONFIG_TIMESTAMP #define CONFIG_SYS_AUTOLOAD "no" -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index a564b86..1b057ef 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -49,7 +49,6 @@ #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_GATEWAY #define CONFIG_PHY_ATHEROS #define CONFIG_SYS_RX_ETH_BUFFER 64 diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 442f8e0..ee870f9 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -109,9 +109,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -167,8 +164,6 @@ from which user programs will be started */ /*---*/ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - /* *----------------------------------------------------------------------------- * End of user parameters to be customized diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index f2d5e61..4da6feb 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -39,7 +39,6 @@ /* Make the HW version stuff available in U-Boot env */ #define CONFIG_VERSION_VARIABLE /* ver environment variable */ -#define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG /* I2C Configs */ @@ -227,8 +226,6 @@ "video=mxcfb1:off fbmem=8M\0 " /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE #undef CONFIG_SYS_CBSIZE #define CONFIG_SYS_CBSIZE 1024 #undef CONFIG_SYS_MAXARGS @@ -241,8 +238,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_CMDLINE_EDITING - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR @@ -271,6 +266,4 @@ #define CONFIG_CMD_TIME -#define CONFIG_SUPPORT_RAW_INITRD - #endif /* __CONFIG_H */ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 04036c8..6ca5724 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -19,7 +19,6 @@ #define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */ -#define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG /* Size of malloc() pool */ @@ -124,7 +123,6 @@ "updlevel=2\0" /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x0c000000) diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index 123e5d7..2623584 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -27,7 +27,6 @@ * Environment settings */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #define CONFIG_SYS_MALLOC_LEN (128 * 1024) #define CONFIG_ARCH_CPU_INIT @@ -78,15 +77,9 @@ #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #endif -#undef CONFIG_SYS_LONGHELP /* Saves 10 KB */ #define CONFIG_SYS_DEVICE_NULLDEV 1 -#undef CONFIG_CMDLINE_EDITING /* Saves 2.5 KB */ -#undef CONFIG_AUTO_COMPLETE /* Saves 2.5 KB */ /* * Clock Configuration diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index c7a34c2..67407f0 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -39,7 +39,6 @@ /* Allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG /* NAND support */ @@ -132,8 +131,6 @@ UBI_BOOTCMD /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#undef CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE @@ -142,7 +139,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 -#define CONFIG_CMDLINE_EDITING /* Physical memory map */ #define CONFIG_NR_DRAM_BANKS 1 diff --git a/include/configs/comtrend_ar5315u.h b/include/configs/comtrend_ar5315u.h index 3fda2d9..b008682 100644 --- a/include/configs/comtrend_ar5315u.h +++ b/include/configs/comtrend_ar5315u.h @@ -11,6 +11,3 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP diff --git a/include/configs/comtrend_ar5387un.h b/include/configs/comtrend_ar5387un.h index 99630c0..790cb24 100644 --- a/include/configs/comtrend_ar5387un.h +++ b/include/configs/comtrend_ar5387un.h @@ -11,6 +11,3 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP diff --git a/include/configs/comtrend_ct5361.h b/include/configs/comtrend_ct5361.h index 94ec498..7923e63 100644 --- a/include/configs/comtrend_ct5361.h +++ b/include/configs/comtrend_ct5361.h @@ -11,9 +11,5 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP - #define CONFIG_SYS_FLASH_CFI 1 #define CONFIG_FLASH_CFI_DRIVER 1 diff --git a/include/configs/comtrend_vr3032u.h b/include/configs/comtrend_vr3032u.h index 6d46041..152faa9 100644 --- a/include/configs/comtrend_vr3032u.h +++ b/include/configs/comtrend_vr3032u.h @@ -11,6 +11,3 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP diff --git a/include/configs/comtrend_wap5813n.h b/include/configs/comtrend_wap5813n.h index 2eafb81..addd75e 100644 --- a/include/configs/comtrend_wap5813n.h +++ b/include/configs/comtrend_wap5813n.h @@ -11,9 +11,5 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP - #define CONFIG_SYS_FLASH_CFI 1 #define CONFIG_FLASH_CFI_DRIVER 1 diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index edc52cb..c6be602 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -312,11 +312,6 @@ /* * Command line configuration. */ -#ifndef CONFIG_TRAILBLAZER -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ -#endif /* CONFIG_TRAILBLAZER */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 8718965..639d5e4 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -593,9 +593,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/corvus.h b/include/configs/corvus.h index cc671f2..2940f18 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -56,9 +56,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* SDRAM */ #define CONFIG_NR_DRAM_BANKS 1 @@ -106,10 +103,6 @@ "nand read 0x70000000 0x200000 0x300000;" \ "bootm 0x70000000" -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE - /* * Size of malloc() pool */ diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h index b045d2b..9a0ab16 100644 --- a/include/configs/cyrus.h +++ b/include/configs/cyrus.h @@ -416,9 +416,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 4fbfc72..e378caa 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -203,7 +203,6 @@ */ #ifdef CONFIG_DRIVER_TI_EMAC #define CONFIG_MII -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 @@ -243,9 +242,6 @@ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h index 1f0c11c..ebd2c23 100644 --- a/include/configs/dbau1x00.h +++ b/include/configs/dbau1x00.h @@ -58,9 +58,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -69,7 +66,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_MALLOC_LEN 128*1024 diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 6b2fafe..c7505b9 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -117,13 +117,9 @@ /* * U-Boot General Configurations */ -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING - /* * Pass open firmware flat tree */ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 5f47c0f..34a25dd 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -78,16 +78,9 @@ #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ /* partition */ -#undef CONFIG_SUPPORT_RAW_INITRD - /* BOOTP/DHCP options */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_NISDOMAIN -#define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_BOOTP_NTPSERVER diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 2054b45..9aa3b23 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -30,16 +30,12 @@ #define CONFIG_SPL_TARGET "u-boot-with-spl.imx" /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG -#define CONFIG_SUPPORT_RAW_INITRD /* bootz raw initrd support */ #define CONFIG_BOUNCE_BUFFER #define CONFIG_BZIP2 diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index ff90b6d..24c45fe 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -96,11 +96,8 @@ #define CONFIG_HSMMC2_8BIT /* CPSW Ethernet */ -#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ #define CONFIG_MII /* Required in net/eth.c */ diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index 530d667..6b5a295 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -101,7 +101,6 @@ REFLASH(dragonboard/u-boot.img, 8)\ #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_SYS_MMC_ENV_DEV 0 /* mmc0 = emmc, mmc1 = sd */ -#define CONFIG_ENV_VARS_UBOOT_CONFIG /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_8M) diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h index e28a956..4bc36b7 100644 --- a/include/configs/dragonboard820c.h +++ b/include/configs/dragonboard820c.h @@ -61,7 +61,6 @@ BOOTENV #define CONFIG_ENV_SIZE 0x4000 -#define CONFIG_ENV_VARS_UBOOT_CONFIG /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_8M) diff --git a/include/configs/ea20.h b/include/configs/ea20.h index a7e104f..44180f3 100644 --- a/include/configs/ea20.h +++ b/include/configs/ea20.h @@ -75,7 +75,6 @@ */ #ifdef CONFIG_DRIVER_TI_EMAC #define CONFIG_MII -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 @@ -102,9 +101,6 @@ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 9f09299..8cfca45 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -48,19 +48,13 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. */ -#define CONFIG_CMDLINE_EDITING #define CONFIG_MCFTMR -#define CONFIG_SYS_LONGHELP 1 - #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/eco5pk.h b/include/configs/eco5pk.h index a75932f..3c4ec17 100644 --- a/include/configs/eco5pk.h +++ b/include/configs/eco5pk.h @@ -27,7 +27,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_ECO5_PK #define CONFIG_BOOTFILE "uImage" -#define CONFIG_AUTO_COMPLETE /* * Set its own mtdparts, different from common diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h index 8ec6b4a..653e55e 100644 --- a/include/configs/ecovec.h +++ b/include/configs/ecovec.h @@ -59,7 +59,6 @@ #define CONFIG_SUPERH_ON_CHIP_R8A66597 /* undef to save memory */ -#define CONFIG_SYS_LONGHELP /* Monitor Command Prompt */ /* Buffer size for Console output */ #define CONFIG_SYS_PBSIZE 256 diff --git a/include/configs/edb93xx.h b/include/configs/edb93xx.h index fcad7c4..b8c4735 100644 --- a/include/configs/edb93xx.h +++ b/include/configs/edb93xx.h @@ -76,7 +76,6 @@ /* Monitor configuration */ -#define CONFIG_SYS_LONGHELP /* Enable "long" help in mon */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ /* Serial port hardware configuration */ diff --git a/include/configs/edison.h b/include/configs/edison.h index 79dd690..dcfd311 100644 --- a/include/configs/edison.h +++ b/include/configs/edison.h @@ -18,14 +18,11 @@ /* DISK Partition support */ /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_MAXARGS 128 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_AUTO_COMPLETE - /* Memory */ #define CONFIG_SYS_LOAD_ADDR 0x100000 #define CONFIG_PHYSMEM diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 2f9e129..05252cd 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -201,10 +201,8 @@ #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Enable command line editing */ -#define CONFIG_CMDLINE_EDITING /* provide extensive help */ -#define CONFIG_SYS_LONGHELP /* additions for new relocation code, must be added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0 diff --git a/include/configs/espt.h b/include/configs/espt.h index 65221fc..54625b0 100644 --- a/include/configs/espt.h +++ b/include/configs/espt.h @@ -22,7 +22,6 @@ #define CONFIG_CONS_SCIF0 1 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index a014bbf..0c57047 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -142,9 +142,6 @@ /* DHCP/BOOTP options */ #ifdef CONFIG_CMD_DHCP #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #define CONFIG_SYS_AUTOLOAD "n" #endif @@ -161,7 +158,5 @@ "bootm 0x22000000" /* Misc. u-boot settings */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING #endif diff --git a/include/configs/flea3.h b/include/configs/flea3.h index ac0e903..0ee2d19 100644 --- a/include/configs/flea3.h +++ b/include/configs/flea3.h @@ -62,9 +62,6 @@ /* * Command definition */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_DNS #define CONFIG_NET_RETRY_COUNT 100 @@ -85,10 +82,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ /* Print Buffer Size */ #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index dc6fe58..42c3292 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -228,8 +228,6 @@ #define CONFIG_ARP_TIMEOUT 200UL /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MEMTEST_START 0x10000000 #define CONFIG_SYS_MEMTEST_END 0x10010000 @@ -237,8 +235,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_CMDLINE_EDITING - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 8679b6b..c82ad93 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -19,8 +19,6 @@ #define CONFIG_REMAKE_ELF -#define CONFIG_SUPPORT_RAW_INITRD - /* Physical Memory Map */ /* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */ @@ -95,12 +93,9 @@ /* Preserve environment on sd card */ #define CONFIG_ENV_SIZE 0x1000 -#define CONFIG_ENV_VARS_UBOOT_CONFIG /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_MAXARGS 64 /* max command args */ #endif /* __HIKEY_H */ diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h index 3331a15..52fa3d6 100644 --- a/include/configs/hrcon.h +++ b/include/configs/hrcon.h @@ -509,13 +509,9 @@ void fpga_control_clear(unsigned int bus, int pin); * Command line configuration. */ -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ - /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index e17b56e..fb4829a 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -70,9 +70,6 @@ /* * Console configuration */ -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP /* * Misc utility configuration diff --git a/include/configs/huawei_hg556a.h b/include/configs/huawei_hg556a.h index 6bd2d76..f994219 100644 --- a/include/configs/huawei_hg556a.h +++ b/include/configs/huawei_hg556a.h @@ -11,9 +11,5 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP - #define CONFIG_SYS_FLASH_CFI 1 #define CONFIG_FLASH_CFI_DRIVER 1 diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index 7e3652e..14eaedc 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -409,11 +409,6 @@ /* * U-Boot environment setup */ -#define CONFIG_CMDLINE_EDITING -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTFILESIZE /* @@ -447,7 +442,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE diff --git a/include/configs/imgtec_xilfpga.h b/include/configs/imgtec_xilfpga.h index 4ae64bb..75bb98c 100644 --- a/include/configs/imgtec_xilfpga.h +++ b/include/configs/imgtec_xilfpga.h @@ -40,7 +40,6 @@ /*---------------------------------------------------------------------- * Commands */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ /*------------------------------------------------------------ * Console Configuration diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 9596f0b..9104121 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -142,8 +142,6 @@ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP #define CONFIG_LOADADDR 0xa0800000 /* loadaddr env var */ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h index b9f5474..c9b79b9 100644 --- a/include/configs/imx31_phycore.h +++ b/include/configs/imx31_phycore.h @@ -83,15 +83,12 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x10000 #define CONFIG_SYS_LOAD_ADDR 0 /* default load address */ -#define CONFIG_CMDLINE_EDITING - /* * Physical Memory Map */ diff --git a/include/configs/integrator-common.h b/include/configs/integrator-common.h index f66d954..0d8a500 100644 --- a/include/configs/integrator-common.h +++ b/include/configs/integrator-common.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_MEMTEST_END 0x10000000 #define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */ #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */ #define CONFIG_CONS_INDEX 0 diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h index ceb9096..4669f39 100644 --- a/include/configs/integratorap.h +++ b/include/configs/integratorap.h @@ -24,9 +24,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h index a6fa458..a7fab88 100644 --- a/include/configs/ipam390.h +++ b/include/configs/ipam390.h @@ -167,7 +167,6 @@ #ifdef CONFIG_DRIVER_TI_EMAC #define CONFIG_DRIVER_TI_EMAC_USE_RMII #define CONFIG_BOOTP_DEFAULT -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 @@ -181,9 +180,6 @@ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/kc1.h b/include/configs/kc1.h index 003e4fc..5002af2 100644 --- a/include/configs/kc1.h +++ b/include/configs/kc1.h @@ -89,10 +89,6 @@ * Console */ -#define CONFIG_AUTO_COMPLETE - -#define CONFIG_SYS_LONGHELP - #define CONFIG_SYS_CBSIZE 512 /* diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index 4d9a133..bb70a61 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -15,7 +15,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #else @@ -23,8 +22,6 @@ #endif #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE #define CONFIG_HUSH_INIT_VAR @@ -47,9 +44,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* UBI Support for all Keymile boards */ #define CONFIG_MTD_PARTITIONS diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h index af882d4..a12ec5d 100644 --- a/include/configs/kzm9g.h +++ b/include/configs/kzm9g.h @@ -39,7 +39,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT (512) /* prompt */ -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_PBSIZE 256 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 3419cbb..1a3252b 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -126,9 +126,6 @@ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index 9761690..1e1fb77 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -112,8 +112,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 -#define CONFIG_CMDLINE_EDITING - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 2140723..35ce97e 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -13,8 +13,6 @@ #include <asm/arch/config.h> #include <asm/arch/stream_id_lsch2.h> -#define CONFIG_SUPPORT_RAW_INITRD - #define CONFIG_DISPLAY_BOARDINFO_LATE #define CONFIG_SYS_TEXT_BASE 0x40100000 @@ -123,8 +121,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MAXARGS 64 /* max command args */ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index ecc2d66..daa5e29 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -202,7 +202,6 @@ #define CONFIG_CMD_MII #define CONFIG_CMDLINE_TAG -#define CONFIG_CMDLINE_EDITING #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_LAYERSCAPE_NS_ACCESS @@ -222,9 +221,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CONFIG_AUTO_COMPLETE #define CONFIG_CMD_GREPENV #define CONFIG_CMD_MEMINFO diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 3f26672..cfb25f9 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -458,7 +458,6 @@ unsigned long get_board_ddr_clk(void); #endif #define CONFIG_CMDLINE_TAG -#define CONFIG_CMDLINE_EDITING #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_LAYERSCAPE_NS_ACCESS @@ -490,8 +489,6 @@ unsigned long get_board_ddr_clk(void); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index ecc3c1d..0a2dd46 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -479,8 +479,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 219db66..5dc73d3 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -37,8 +37,6 @@ /* Link Definitions */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) -#define CONFIG_SUPPORT_RAW_INITRD - #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_VERY_BIG_RAM @@ -332,15 +330,7 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_LONGHELP - -#ifndef SPL_NO_MISC -#ifndef CONFIG_CMDLINE_EDITING -#define CONFIG_CMDLINE_EDITING 1 -#endif -#endif -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MAXARGS 64 /* max command args */ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index a7f78f4..1979740 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -372,8 +372,6 @@ unsigned long get_board_ddr_clk(void); * Miscellaneous configurable options */ #define CONFIG_MISC_INIT_R -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 68b4076..09e2a34 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -35,8 +35,6 @@ /* Link Definitions */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) -#define CONFIG_SUPPORT_RAW_INITRD - #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_VERY_BIG_RAM @@ -289,9 +287,7 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MAXARGS 64 /* max command args */ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 456f61a..8389e70 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -397,8 +397,6 @@ unsigned long get_board_ddr_clk(void); * Miscellaneous configurable options */ #define CONFIG_MISC_INIT_R -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 7120c47..40e6472 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -43,8 +43,6 @@ #endif #endif -#define CONFIG_SUPPORT_RAW_INITRD - #ifdef CONFIG_QSPI_BOOT #define CONFIG_SYS_FSL_QSPI_BASE 0x20000000 #define CONFIG_ENV_OFFSET 0x300000 /* 3MB */ @@ -240,11 +238,6 @@ unsigned long long get_qixis_addr(void); sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ -#define CONFIG_SYS_LONGHELP -#ifndef SPL_NO_ENV -#define CONFIG_CMDLINE_EDITING 1 -#endif -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MAXARGS 64 /* max command args */ #ifdef CONFIG_SPL diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 5674a5d..a1772ae 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -474,7 +474,6 @@ unsigned long get_board_ddr_clk(void); #endif -#undef CONFIG_CMDLINE_EDITING #include <config_distro_defaults.h> #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index a6271f5..9f5a32a 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -462,7 +462,6 @@ #endif #ifndef SPL_NO_ENV -#undef CONFIG_CMDLINE_EDITING #include <config_distro_defaults.h> #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 83b4061..968baa6 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -36,8 +36,6 @@ #define CONFIG_ENV_SECT_SIZE 0x40000 #endif -#define CONFIG_SUPPORT_RAW_INITRD - #define CONFIG_SKIP_LOWLEVEL_INIT #ifndef CONFIG_SPL @@ -215,9 +213,6 @@ unsigned long long get_qixis_addr(void); /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING 1 -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MAXARGS 64 /* max command args */ #define CONFIG_SPL_BSS_START_ADDR 0x80100000 diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 6f3301c..aa37c96 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -331,7 +331,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_MISC_INIT_R -#undef CONFIG_CMDLINE_EDITING #include <config_distro_defaults.h> #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index 0793fcb..624356a 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -46,7 +46,6 @@ #include "mv-common.h" /* loading initramfs images without uimage header */ -#define CONFIG_SUPPORT_RAW_INITRD /* ST M25P40 */ #undef CONFIG_ENV_SPI_MAX_HZ diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h index 70c30f2..21285f8 100644 --- a/include/configs/m53evk.h +++ b/include/configs/m53evk.h @@ -44,13 +44,10 @@ /* * U-Boot general configurations */ -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ -#define CONFIG_AUTO_COMPLETE /* Command auto complete */ -#define CONFIG_CMDLINE_EDITING /* Command history etc */ /* * Serial Driver diff --git a/include/configs/malta.h b/include/configs/malta.h index e15c6bb..17951bf 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -52,9 +52,6 @@ #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING - /* * Serial driver */ @@ -96,6 +93,4 @@ * Commands */ -#define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */ - #endif /* _MALTA_CONFIG_H */ diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 6961471..b31c44f 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -191,13 +191,9 @@ "bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \ "then source 82000000;else run nandboot;fi\0" -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING - /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) @@ -301,7 +297,6 @@ #define CONFIG_DRIVER_TI_EMAC #define CONFIG_DRIVER_TI_EMAC_USE_RMII #define CONFIG_MII -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 diff --git a/include/configs/meesc.h b/include/configs/meesc.h index 1540221..9f7c88a 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -53,9 +53,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * SDRAM: 1 bank, min 32, max 128 MB @@ -118,9 +115,6 @@ #endif #define CONFIG_SYS_CBSIZE 512 -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE /* * Size of malloc() pool diff --git a/include/configs/meson-gxbb-common.h b/include/configs/meson-gxbb-common.h index c2b306a..9216d7b 100644 --- a/include/configs/meson-gxbb-common.h +++ b/include/configs/meson-gxbb-common.h @@ -25,9 +25,6 @@ #define GICD_BASE 0xc4301000 #define GICC_BASE 0xc4302000 -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING - #include <config_distro_defaults.h> #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 41e6790..e5edd5f 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -156,9 +156,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #if defined(CONFIG_CMD_JFFS2) # define CONFIG_MTD_PARTITIONS @@ -180,7 +177,6 @@ #define CONFIG_SYS_CBSIZE 512 /* max number of command args */ #define CONFIG_SYS_MAXARGS 15 -#define CONFIG_SYS_LONGHELP /* default load address */ #define CONFIG_SYS_LOAD_ADDR 0 @@ -204,8 +200,6 @@ "setenv stdin serial\0" #endif -#define CONFIG_CMDLINE_EDITING - /* Enable flat device tree support */ #define CONFIG_LMB 1 diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h index 7441765..f4cbda4 100644 --- a/include/configs/mpc8308_p1m.h +++ b/include/configs/mpc8308_p1m.h @@ -373,20 +373,14 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. */ -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ - /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ diff --git a/include/configs/mpr2.h b/include/configs/mpr2.h index a6e1726..007d840 100644 --- a/include/configs/mpr2.h +++ b/include/configs/mpr2.h @@ -22,7 +22,6 @@ #define CONFIG_DISPLAY_BOARDINFO /* U-Boot internals */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024) #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h index cade328..492687e 100644 --- a/include/configs/ms7720se.h +++ b/include/configs/ms7720se.h @@ -23,7 +23,6 @@ #define MS7720SE_FLASH_BANK_SIZE (8 * 1024 * 1024) #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ /* List of legal baudrate settings for this board */ #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index 3db6c24..e6056ef 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -24,7 +24,6 @@ #define MS7722SE_FLASH_BANK_SIZE (8*1024 * 1024) #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index 1cd7ae0..6bab111 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -27,7 +27,6 @@ #define CONFIG_SYS_SDRAM_BASE (0x8C000000) #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_PBSIZE 256 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 diff --git a/include/configs/mt_ventoux.h b/include/configs/mt_ventoux.h index 11ba3e7..e4b69fe 100644 --- a/include/configs/mt_ventoux.h +++ b/include/configs/mt_ventoux.h @@ -22,7 +22,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_AM3517_MT_VENTOUX #define CONFIG_BOOTFILE "uImage" -#define CONFIG_AUTO_COMPLETE #define CONFIG_HOSTNAME mt_ventoux diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index 1721fef..15f8f1b 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -77,9 +77,6 @@ /* * Other required minimal configurations */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index 86e0d43..4da98ea 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -46,9 +46,6 @@ /* * Other required minimal configurations */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index 8482cc8..31cf151 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -58,12 +58,9 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 /* U-Boot general configuration */ -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP /* Ethernet */ #define CONFIG_FEC_MXC @@ -190,7 +187,5 @@ "else run netboot; fi" /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE #endif /* __CONFIG_H */ diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h index 18ee355..fa8cf27 100644 --- a/include/configs/mx31ads.h +++ b/include/configs/mx31ads.h @@ -94,15 +94,12 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x10000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_CMDLINE_EDITING 1 - /*----------------------------------------------------------------------- * Physical Memory Map */ diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 3259e82..8fd8e84 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -82,7 +82,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ /* memtest works on */ #define CONFIG_SYS_MEMTEST_START 0x80000000 @@ -91,8 +90,6 @@ /* default load address */ #define CONFIG_SYS_LOAD_ADDR 0x81000000 -#define CONFIG_CMDLINE_EDITING - /*----------------------------------------------------------------------- * Physical Memory Map */ diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index 2b6d00b..8eea38a 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -72,9 +72,6 @@ /* * Command definition */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_DNS #define CONFIG_NET_RETRY_COUNT 100 @@ -101,10 +98,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING - -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x10000 diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 3ecb92c..dd55aed 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -169,16 +169,12 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MEMTEST_START 0x90000000 #define CONFIG_SYS_MEMTEST_END 0x90010000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_CMDLINE_EDITING - /*----------------------------------------------------------------------- * Physical Memory Map */ diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h index 84a972f..b4d4e2e 100644 --- a/include/configs/mx53ard.h +++ b/include/configs/mx53ard.h @@ -152,16 +152,12 @@ #define CONFIG_ARP_TIMEOUT 200UL /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MEMTEST_START 0x70000000 #define CONFIG_SYS_MEMTEST_END 0x70010000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_CMDLINE_EDITING - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CSD0_BASE_ADDR diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index ccb1a4a..45e9820 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -55,7 +55,6 @@ #define CONFIG_CONS_INDEX 1 /* Command definition */ -#define CONFIG_SUPPORT_RAW_INITRD #define CONFIG_LOADADDR 0x70010000 /* loadaddr env var */ #define CONFIG_SYS_TEXT_BASE 0x77800000 @@ -138,8 +137,6 @@ #define CONFIG_ARP_TIMEOUT 200UL /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_MEMTEST_START 0x70000000 @@ -147,8 +144,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_CMDLINE_EDITING - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CSD0_BASE_ADDR diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h index 62762824..40894d0 100644 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@ -105,16 +105,12 @@ #define CONFIG_ARP_TIMEOUT 200UL /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MEMTEST_START 0x70000000 #define CONFIG_SYS_MEMTEST_END 0x70010000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_CMDLINE_EDITING - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CSD0_BASE_ADDR diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 33d33ae..dbe1c88 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -67,7 +67,6 @@ #define CONFIG_CONS_INDEX 1 /* Command definition */ -#define CONFIG_SUPPORT_RAW_INITRD #define CONFIG_ETHPRIME "FEC0" @@ -147,8 +146,6 @@ #define CONFIG_ARP_TIMEOUT 200UL /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_MEMTEST_START 0x70000000 @@ -156,8 +153,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_CMDLINE_EDITING - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CSD0_BASE_ADDR diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 57664e5..94c822e 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -40,8 +40,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_NUM 2 -#define CONFIG_SUPPORT_RAW_INITRD /* bootz raw initrd support */ - /* Eth Configs */ #define CONFIG_MII @@ -83,7 +81,6 @@ #define CONFIG_BAUDRATE 115200 /* Command definition */ -#define CONFIG_SUPPORT_RAW_INITRD #define CONFIG_ETHPRIME "FEC0" @@ -175,8 +172,6 @@ #define CONFIG_ARP_TIMEOUT 200UL /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_MAXARGS 48 /* max number of command args */ @@ -187,8 +182,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_CMDLINE_EDITING - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CSD0_BASE_ADDR diff --git a/include/configs/mx53smd.h b/include/configs/mx53smd.h index 54753c7..b6c7913 100644 --- a/include/configs/mx53smd.h +++ b/include/configs/mx53smd.h @@ -97,16 +97,12 @@ #define CONFIG_ARP_TIMEOUT 200UL /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MEMTEST_START 0x70000000 #define CONFIG_SYS_MEMTEST_END 0x70010000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_CMDLINE_EDITING - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CSD0_BASE_ADDR diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index ddc645c..69852be 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -60,12 +60,8 @@ #define CONFIG_CONS_INDEX 1 /* Filesystems and image support */ -#define CONFIG_SUPPORT_RAW_INITRD /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 512 #define CONFIG_SYS_MAXARGS 32 diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 546ee95..9f99f59 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -148,8 +148,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 -#define CONFIG_CMDLINE_EDITING - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 1785040..6b15707 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -36,9 +36,6 @@ #define CONFIG_CONS_INDEX 1 /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 512 #define CONFIG_SYS_MAXARGS 32 diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 6ab8db3..17d3409 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -68,9 +68,6 @@ #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE - #define CONFIG_SYS_CACHELINE_SIZE 64 /* Miscellaneous configurable options */ @@ -79,8 +76,6 @@ #define CONFIG_SYS_MAXARGS 256 -#define CONFIG_CMDLINE_EDITING - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 3a27c15..9acca0b 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -82,13 +82,10 @@ #define CONFIG_SPL_TEXT_BASE 0x00001000 /* U-Boot general configuration */ -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ -#define CONFIG_AUTO_COMPLETE /* Command auto complete */ -#define CONFIG_CMDLINE_EDITING /* Command history etc */ /* Booting Linux */ #define CONFIG_CMDLINE_TAG diff --git a/include/configs/nas220.h b/include/configs/nas220.h index 90be7bd..99cf4d8 100644 --- a/include/configs/nas220.h +++ b/include/configs/nas220.h @@ -41,9 +41,6 @@ /* * Commands configuration */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING /* * mv-common.h should be defined after CMD configs since it used them diff --git a/include/configs/netgear_cg3100d.h b/include/configs/netgear_cg3100d.h index 457a50d..86d983e 100644 --- a/include/configs/netgear_cg3100d.h +++ b/include/configs/netgear_cg3100d.h @@ -9,6 +9,3 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index faeaf2e..2d39438 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -91,9 +91,6 @@ /* commands to include */ -#define CONFIG_CMDLINE_EDITING /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ - /* * TWL4030 */ @@ -310,7 +307,6 @@ int rx51_kp_getc(struct stdio_dev *sdev); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/ diff --git a/include/configs/nsim.h b/include/configs/nsim.h index c4775e5..58d3e5f 100644 --- a/include/configs/nsim.h +++ b/include/configs/nsim.h @@ -34,8 +34,6 @@ /* * Command line configuration */ -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING /* * Environment settings @@ -52,6 +50,5 @@ /* * Console configuration */ -#define CONFIG_SYS_LONGHELP #endif /* _CONFIG_NSIM_H_ */ diff --git a/include/configs/nx25-ae250.h b/include/configs/nx25-ae250.h index b523797..7ed5bc1 100644 --- a/include/configs/nx25-ae250.h +++ b/include/configs/nx25-ae250.h @@ -13,7 +13,6 @@ */ #define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_CMDLINE_EDITING #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_BOOTP_SERVERIP @@ -30,7 +29,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ /* diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 42e722e..7e2c853 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -205,7 +205,6 @@ #define CONFIG_MII #undef CONFIG_DRIVER_TI_EMAC_USE_RMII #define CONFIG_BOOTP_DEFAULT -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 @@ -219,9 +218,6 @@ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/origen.h b/include/configs/origen.h index 69f6930..ce69b0d 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -47,8 +47,6 @@ #define S5P_CHECK_DIDLE 0xBAD00000 #define S5P_CHECK_LPA 0xABAD0000 -#define CONFIG_SUPPORT_RAW_INITRD - /* MMC SPL */ #define COPY_BL2_FNPTR_ADDR 0x02020030 #define CONFIG_SPL_TEXT_BASE 0x02021410 diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index d48e61c..1ee0a13 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -796,8 +796,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index 61800f2..1b6b16f 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -386,8 +386,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/pb1x00.h b/include/configs/pb1x00.h index f6816dd..972c13a 100644 --- a/include/configs/pb1x00.h +++ b/include/configs/pb1x00.h @@ -44,7 +44,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_MALLOC_LEN 128*1024 @@ -133,9 +132,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index fdc95e9..62dd5dc 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -186,9 +186,6 @@ "nand write ${ram_addr} root ${filesize}; fi\0" /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_MEMTEST_START 0x80010000 #define CONFIG_SYS_MEMTEST_END 0x87C00000 diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index 7a959c4..d81c11b 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -52,13 +52,11 @@ /*---------------------------------------------------------------------- * Commands */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ /*------------------------------------------------------------ * Console Configuration */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#define CONFIG_CMDLINE_EDITING 1 /*----------------------------------------------------------------------- * Networking Configuration @@ -73,9 +71,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /*-------------------------------------------------- * USB Configuration diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 0672dea..f99946c 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -123,8 +123,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 -#define CONFIG_CMDLINE_EDITING - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/picosam9g45.h b/include/configs/picosam9g45.h index dc7a67d..0bbc512 100644 --- a/include/configs/picosam9g45.h +++ b/include/configs/picosam9g45.h @@ -61,9 +61,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* Enable the watchdog */ #define CONFIG_AT91SAM9_WATCHDOG @@ -111,10 +108,6 @@ "bootz 0x22000000 - 0x21000000" #endif -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE - /* * Size of malloc() pool */ diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index dec23a7..bb2a086 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -155,9 +155,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE 1 -#define CONFIG_BOOTP_BOOTPATH 1 -#define CONFIG_BOOTP_GATEWAY 1 -#define CONFIG_BOOTP_HOSTNAME 1 /* SDRAM */ #define CONFIG_NR_DRAM_BANKS 1 @@ -269,9 +266,6 @@ #error "Undefined memory device" #endif -#define CONFIG_SYS_LONGHELP 1 -#define CONFIG_CMDLINE_EDITING 1 - /* * Size of malloc() pool */ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 8aab3e1..0049702 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -169,9 +169,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE 1 -#define CONFIG_BOOTP_BOOTPATH 1 -#define CONFIG_BOOTP_GATEWAY 1 -#define CONFIG_BOOTP_HOSTNAME 1 /* SDRAM */ #define CONFIG_NR_DRAM_BANKS 1 @@ -300,9 +297,6 @@ #error "Undefined memory device" #endif -#define CONFIG_SYS_LONGHELP 1 -#define CONFIG_CMDLINE_EDITING 1 - /* * Size of malloc() pool */ diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index e11c67f..0fe8641 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -60,9 +60,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE 1 -#define CONFIG_BOOTP_BOOTPATH 1 -#define CONFIG_BOOTP_GATEWAY 1 -#define CONFIG_BOOTP_HOSTNAME 1 #define CONFIG_JFFS2_CMDLINE 1 #define CONFIG_JFFS2_NAND 1 @@ -119,10 +116,6 @@ #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ #define CONFIG_BOOTCOMMAND "nand read 0x72000000 0x200000 0x200000; bootm" -#define CONFIG_SYS_LONGHELP 1 -#define CONFIG_CMDLINE_EDITING 1 -#define CONFIG_AUTO_COMPLETE - /* * Size of malloc() pool */ diff --git a/include/configs/poplar.h b/include/configs/poplar.h index 859da38..76c70bf 100644 --- a/include/configs/poplar.h +++ b/include/configs/poplar.h @@ -63,11 +63,8 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_OFFSET (0x780 * 512) /* env_mmc_blknum */ #define CONFIG_ENV_SIZE 0x10000 /* env_mmc_nblks bytes */ -#define CONFIG_ENV_VARS_UBOOT_CONFIG /* Monitor Command Prompt */ -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_CBSIZE 512 #define CONFIG_SYS_MAXARGS 64 diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h index 2714404..58895a8 100644 --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h @@ -32,9 +32,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -65,10 +62,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_MALLOC_LEN (256 << 10) diff --git a/include/configs/qemu-mips64.h b/include/configs/qemu-mips64.h index 063e504..382c580 100644 --- a/include/configs/qemu-mips64.h +++ b/include/configs/qemu-mips64.h @@ -32,9 +32,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -65,10 +62,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_MALLOC_LEN (256 << 10) diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 8b78f08..7422839 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -126,9 +126,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h index f9800ec..1208df6 100644 --- a/include/configs/r0p7734.h +++ b/include/configs/r0p7734.h @@ -27,7 +27,6 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII /* undef to save memory */ -#define CONFIG_SYS_LONGHELP /* List of legal baudrate settings for this board */ #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 6ca66b8..87b1e0e 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_SDRAM_SIZE 0x04000000 #define CONFIG_SYS_TEXT_BASE 0x8FE00000 -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_PBSIZE 256 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index 241d067..4fdba69 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -25,7 +25,6 @@ #define CONFIG_SYS_SDRAM_BASE (0x08000000) #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_PBSIZE 256 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index ad436fd..eff4f0b 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -14,7 +14,6 @@ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG -#define CONFIG_CMDLINE_EDITING #undef CONFIG_SHOW_BOOT_PROGRESS @@ -27,7 +26,6 @@ /* console */ -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_PBSIZE 256 #define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 } diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index e9e5fec..b33bc79 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -15,12 +15,10 @@ #define CONFIG_REMAKE_ELF /* boot option */ -#define CONFIG_SUPPORT_RAW_INITRD #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG -#define CONFIG_CMDLINE_EDITING #undef CONFIG_SHOW_BOOT_PROGRESS @@ -34,7 +32,6 @@ /* console */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400 } diff --git a/include/configs/rpi.h b/include/configs/rpi.h index f2d3646..1712846 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -80,12 +80,10 @@ /* Environment */ #define CONFIG_ENV_SIZE SZ_16K -#define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_SYS_LOAD_ADDR 0x1000000 #define CONFIG_PREBOOT "usb start" /* Shell */ -#define CONFIG_CMDLINE_EDITING /* ATAGs support for bootm/bootz */ #define CONFIG_SETUP_MEMORY_TAGS diff --git a/include/configs/rsk7203.h b/include/configs/rsk7203.h index a5aa11c..1165c6b 100644 --- a/include/configs/rsk7203.h +++ b/include/configs/rsk7203.h @@ -23,7 +23,6 @@ #define RSK7203_FLASH_BANK_SIZE (4 * 1024 * 1024) #define CONFIG_SYS_TEXT_BASE 0x0C7C0000 -#define CONFIG_SYS_LONGHELP /* undef to save memory */ /* List of legal baudrate settings for this board */ #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } diff --git a/include/configs/rsk7264.h b/include/configs/rsk7264.h index 2ecc328..8024260 100644 --- a/include/configs/rsk7264.h +++ b/include/configs/rsk7264.h @@ -17,7 +17,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } -#define CONFIG_SYS_LONGHELP 1 /* undef to save memory */ #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ /* Serial */ diff --git a/include/configs/rsk7269.h b/include/configs/rsk7269.h index 88d50ef..39eaa0d 100644 --- a/include/configs/rsk7269.h +++ b/include/configs/rsk7269.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_PBSIZE 256 /* Print Buffer Size */ /* Serial */ diff --git a/include/configs/s32v234evb.h b/include/configs/s32v234evb.h index fd1527c..8ffaee4 100644 --- a/include/configs/s32v234evb.h +++ b/include/configs/s32v234evb.h @@ -158,11 +158,8 @@ #include <config_distro_bootcmd.h> /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_PROMPT "=> " -#undef CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #define CONFIG_CMD_MEMTEST #define CONFIG_SYS_MEMTEST_START (DDR_BASE_ADDR) @@ -179,7 +176,6 @@ #if 0 /* Configure PXE */ -#define CONFIG_BOOTP_PXE #define CONFIG_BOOTP_PXE_CLIENTARCH 0x100 #endif @@ -206,8 +202,5 @@ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #endif diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index c31896d..0d7a8be 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -34,7 +34,6 @@ #define CONFIG_CMDLINE_TAG #define CONFIG_REVISION_TAG #define CONFIG_INITRD_TAG -#define CONFIG_CMDLINE_EDITING /* Size of malloc() pool before and after relocation */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20)) @@ -108,7 +107,6 @@ #define CONFIG_MISC_INIT_R #define CONFIG_ENV_OVERWRITE -#define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_UPDATEB \ @@ -157,7 +155,6 @@ "opts=always_resume=1\0" \ "dfu_alt_info=" CONFIG_DFU_ALT "\0" -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ /* memtest works on */ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index b0bcc56..6a1bc6d 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -73,7 +73,6 @@ #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}" -#define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/sagem_f(a)st1704.h b/include/configs/sagem_f(a)st1704.h index fd1c759..73b2832 100644 --- a/include/configs/sagem_f(a)st1704.h +++ b/include/configs/sagem_f(a)st1704.h @@ -9,6 +9,3 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index cfb3e7a..e023efa 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -33,13 +33,10 @@ #define CONFIG_MALLOC_F_ADDR 0x0010000 #define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */ -#define CONFIG_SYS_LONGHELP /* #undef to save memory */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_DISPLAY_BOARDINFO_LATE /* turn on command-line edit/c/auto */ -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE #define CONFIG_ENV_SIZE 8192 @@ -77,7 +74,6 @@ #define CONFIG_KEEP_SERVERADDR #define CONFIG_UDP_CHECKSUM #define CONFIG_TIMESTAMP -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_BOOTP_SERVERIP diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 331fcbe..6f28c3b 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -272,9 +272,6 @@ #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ - /* I2C */ #define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 400000 @@ -388,9 +385,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -401,7 +395,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index b04df6b..14c5976 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -500,18 +500,12 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #undef CONFIG_WATCHDOG /* watchdog disabled */ /* * Miscellaneous configurable options */ -#define CONFIG_CMDLINE_EDITING /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 87b3cfd..c873486 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -451,9 +451,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ /* * For booting Linux, the board info and command line data diff --git a/include/configs/sfr_nb4_ser.h b/include/configs/sfr_nb4_ser.h index 6bd2d76..f994219 100644 --- a/include/configs/sfr_nb4_ser.h +++ b/include/configs/sfr_nb4_ser.h @@ -11,9 +11,5 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP - #define CONFIG_SYS_FLASH_CFI 1 #define CONFIG_FLASH_CFI_DRIVER 1 diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h index ee57eb2..07f2cdc 100644 --- a/include/configs/sh7752evb.h +++ b/include/configs/sh7752evb.h @@ -15,14 +15,11 @@ #define CONFIG_DISPLAY_BOARDINFO #undef CONFIG_SHOW_BOOT_PROGRESS -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE /* MEMORY */ #define SH7752EVB_SDRAM_BASE (0x40000000) #define SH7752EVB_SDRAM_SIZE (512 * 1024 * 1024) -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_PBSIZE 256 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h index e7f9f61..78646ff 100644 --- a/include/configs/sh7753evb.h +++ b/include/configs/sh7753evb.h @@ -15,14 +15,11 @@ #define CONFIG_DISPLAY_BOARDINFO #undef CONFIG_SHOW_BOOT_PROGRESS -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE /* MEMORY */ #define SH7753EVB_SDRAM_BASE (0x40000000) #define SH7753EVB_SDRAM_SIZE (512 * 1024 * 1024) -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_PBSIZE 256 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index a2b3307..4a0635c 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -23,7 +23,6 @@ #define SH7757LCR_SDRAM_ECC_SETTING 0x0f000000 /* 240MByte */ #define SH7757LCR_SDRAM_DVC_SIZE (16 * 1024 * 1024) -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_PBSIZE 256 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h index de4a587..8b9e8d3 100644 --- a/include/configs/sh7763rdp.h +++ b/include/configs/sh7763rdp.h @@ -22,7 +22,6 @@ #define CONFIG_CONS_SCIF2 1 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index c90cbe1..a51bdd2 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -38,7 +38,6 @@ #define SH7785LCR_USB_BASE (0xb4000000) #endif -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_PBSIZE 256 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } diff --git a/include/configs/shmin.h b/include/configs/shmin.h index 1a69303..a56babc 100644 --- a/include/configs/shmin.h +++ b/include/configs/shmin.h @@ -27,7 +27,6 @@ #define SHMIN_FLASH_BASE_1 (0xA0000000) #define CONFIG_SYS_TEXT_BASE 0x8DFB0000 -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ /* List of legal baudrate settings for this board */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600,14400,19200,38400,57600,115200 } diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 109441f..091ca8e 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -21,7 +21,6 @@ #define CONFIG_ENV_SIZE (0x2000) #define CONFIG_SYS_MALLOC_LEN (16 * 1024 * 1024) -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #ifdef CONFIG_SIEMENS_MACH_TYPE #define CONFIG_MACH_TYPE CONFIG_SIEMENS_MACH_TYPE #endif @@ -32,16 +31,12 @@ /* commands to include */ -#define CONFIG_ENV_VARS_UBOOT_CONFIG #ifndef CONFIG_SPL_BUILD #define CONFIG_ROOTPATH "/opt/eldk" #endif #define CONFIG_ENV_OVERWRITE 1 -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_AUTOLOAD "yes" /* Clock Defines */ @@ -202,11 +197,8 @@ #define CONFIG_DRIVER_TI_CPSW #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10 /* NAND support */ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 49c838b..e6ac877 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -52,9 +52,7 @@ /* setting board specific options */ #define CONFIG_MACH_TYPE MACH_TYPE_SMARTWEB -#define CONFIG_AUTO_COMPLETE #define CONFIG_ENV_OVERWRITE 1 /* Overwrite ethaddr / serial# */ -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_AUTOLOAD "yes" #define CONFIG_RESET_TO_RETRY @@ -114,9 +112,6 @@ /* BOOTP and DHCP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #define CONFIG_NFSBOOTCOMMAND \ "setenv autoload yes; setenv autoboot yes; " \ "setenv bootargs ${basicargs} ${mtdparts} " \ @@ -154,8 +149,6 @@ /* General Boot Parameter */ #define CONFIG_BOOTCOMMAND "run flashboot" #define CONFIG_SYS_CBSIZE 512 -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING /* * RAM Memory address where to put the diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index be0bf4a..c422e27 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -37,7 +37,6 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG #define CONFIG_INITRD_TAG -#define CONFIG_CMDLINE_EDITING /* * Size of malloc() pool @@ -118,7 +117,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ /* memtest works on */ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index d41a3a1..ca63996 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -113,9 +113,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x23000000 #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* Environment settings */ #define CONFIG_ENV_OFFSET (512 << 10) @@ -123,9 +120,6 @@ #define CONFIG_ENV_OVERWRITE /* Console settings */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE /* U-Boot memory settings */ #define CONFIG_SYS_MALLOC_LEN (1 << 20) diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index f0e1a1d..ccb297d 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -80,9 +80,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x23000000 #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* Environment settings */ #define CONFIG_ENV_OFFSET (512 << 10) @@ -110,9 +107,6 @@ "altbootcmd=run boot_mmc ; run boot_usb ; run boot_safe ; run boot_working\0" /* Console settings */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE /* U-Boot memory settings */ #define CONFIG_SYS_MALLOC_LEN (1 << 20) diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 95df5af..4babac6 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -84,10 +84,6 @@ #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#define CONFIG_AUTO_COMPLETE - -#define CONFIG_SYS_LONGHELP - #define CONFIG_SYS_CBSIZE 512 /* diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 826bcf5..2e16b40 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -52,14 +52,11 @@ /* * U-Boot general configurations */ -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ /* Print buffer size */ #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ -#define CONFIG_AUTO_COMPLETE /* Command auto complete */ -#define CONFIG_CMDLINE_EDITING /* Command history etc */ #ifndef CONFIG_SYS_HOSTNAME #define CONFIG_SYS_HOSTNAME CONFIG_SYS_BOARD diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 4c05141..31ad607 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -187,9 +187,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */ - /* * I2C */ @@ -268,16 +265,12 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #undef CONFIG_WATCHDOG /* watchdog disabled */ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h index 16b42ba..d367e5b 100644 --- a/include/configs/spear-common.h +++ b/include/configs/spear-common.h @@ -164,8 +164,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00800000 #define CONFIG_SYS_MEMTEST_END 0x04000000 #define CONFIG_SYS_MALLOC_LEN (1024*1024) -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LOAD_ADDR 0x00800000 #define CONFIG_SYS_FLASH_EMPTY_INFO diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 856a408..ea2d7c1 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -23,8 +23,6 @@ #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_ENV_VARS_UBOOT_CONFIG - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(USB, usb, 0) \ @@ -46,7 +44,6 @@ /* Extra Commands */ #define CONFIG_CMD_ASKENV -#define CONFIG_SYS_LONGHELP #define CONFIG_SETUP_MEMORY_TAGS @@ -74,9 +71,5 @@ #define CONFIG_USB_ETHER_SMSC95XX /* NET Configs */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_BOOTPATH #endif /* __CONFIG_H */ diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h index af9daad..37495b0 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -67,8 +67,5 @@ /* * Command line configuration. */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #endif /* __CONFIG_H */ diff --git a/include/configs/stm32f429-evaluation.h b/include/configs/stm32f429-evaluation.h index ab33d0f..8dbc971 100644 --- a/include/configs/stm32f429-evaluation.h +++ b/include/configs/stm32f429-evaluation.h @@ -58,8 +58,5 @@ /* * Command line configuration. */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #endif /* __CONFIG_H */ diff --git a/include/configs/stm32f469-discovery.h b/include/configs/stm32f469-discovery.h index c290a66..cc4bea3 100644 --- a/include/configs/stm32f469-discovery.h +++ b/include/configs/stm32f469-discovery.h @@ -60,8 +60,5 @@ /* * Command line configuration. */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #endif /* __CONFIG_H */ diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index 3e952c2..db25e8b 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -61,9 +61,6 @@ /* * Command line configuration. */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #define CONFIG_CMD_CACHE #define CONFIG_BOARD_LATE_INIT #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/stm32h743-disco.h b/include/configs/stm32h743-disco.h index 531de70..a4a5d7b 100644 --- a/include/configs/stm32h743-disco.h +++ b/include/configs/stm32h743-disco.h @@ -42,9 +42,6 @@ /* * Command line configuration. */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #define CONFIG_CMD_CACHE #define CONFIG_BOARD_LATE_INIT diff --git a/include/configs/stm32h743-eval.h b/include/configs/stm32h743-eval.h index 531de70..a4a5d7b 100644 --- a/include/configs/stm32h743-eval.h +++ b/include/configs/stm32h743-eval.h @@ -42,9 +42,6 @@ /* * Command line configuration. */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #define CONFIG_CMD_CACHE #define CONFIG_BOARD_LATE_INIT diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index cefadc1..916e60d 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -91,8 +91,6 @@ #define CONFIG_EXTRA_CLOCK #define CONFIG_PRAM 2048 /* 2048 KB */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ /* Print Buffer Size */ diff --git a/include/configs/strider.h b/include/configs/strider.h index 0805114..a930522 100644 --- a/include/configs/strider.h +++ b/include/configs/strider.h @@ -543,13 +543,9 @@ void fpga_control_clear(unsigned int bus, int pin); * Command line configuration. */ -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ - /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index c21fea3..75a11a7 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -51,8 +51,6 @@ #define CONFIG_SYS_MEMTEST_END 1024*1024 /* Misc configuration */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING #define CONFIG_BOOTCOMMAND "go 0x40040000" diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index 7f2f4a3..1aca88e 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -236,9 +236,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index bd57b91..bb7f101 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -80,14 +80,9 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ /* NAND devices */ -#define CONFIG_AUTO_COMPLETE - /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_MAXARGS 32 /* max number of command */ @@ -143,7 +138,6 @@ #define CONFIG_DRIVER_TI_EMAC #define CONFIG_DRIVER_TI_EMAC_USE_RMII #define CONFIG_MII -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index 50433b7..ed6d04e 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -136,11 +136,8 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ /* turn on command-line edit/hist/auto */ -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_ALT_MEMTEST 1 #define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */ diff --git a/include/configs/taurus.h b/include/configs/taurus.h index ce06f7b..dea87cc 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -143,10 +143,6 @@ #define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */ #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE - /* * Size of malloc() pool */ diff --git a/include/configs/tb100.h b/include/configs/tb100.h index a395e67..8216d6e 100644 --- a/include/configs/tb100.h +++ b/include/configs/tb100.h @@ -53,9 +53,6 @@ * Command line configuration */ -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING - /* * Environment settings */ @@ -71,6 +68,5 @@ /* * Console configuration */ -#define CONFIG_SYS_LONGHELP #endif /* _CONFIG_TB100_H_ */ diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 2d98a6f..bfc2831 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -26,7 +26,6 @@ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ /* Environment */ -#define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */ /* @@ -50,7 +49,6 @@ #define CONFIG_ENV_OVERWRITE /* turn on command-line edit/hist/auto */ -#define CONFIG_CMDLINE_EDITING /* * Increasing the size of the IO buffer as default nfsargs size is more diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index 34940ef..036dc7b 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -46,10 +46,6 @@ /* BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_PXE /* Miscellaneous configurable options */ #define CONFIG_SYS_LOAD_ADDR (MEM_BASE) @@ -73,8 +69,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING 1 #define CONFIG_SYS_MAXARGS 64 /* max command args */ #define CONFIG_NO_RELOCATION 1 #define CONFIG_LIB_RAND diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 93d1e5e..477799c 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -20,7 +20,6 @@ #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ #define CONFIG_SYS_MALLOC_LEN (1024 << 10) -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_MACH_TYPE MACH_TYPE_TI8148EVM #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ @@ -29,7 +28,6 @@ /* commands to include */ -#define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x80200000\0" \ @@ -162,11 +160,8 @@ /* Ethernet */ #define CONFIG_DRIVER_TI_CPSW #define CONFIG_MII -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_PHY_ET1011C #define CONFIG_PHY_ET1011C_TX_CLK_FIX diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index b0f84ed..22a78e1 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -103,11 +103,8 @@ #define CONFIG_DRIVER_TI_EMAC #define CONFIG_MII -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10 /* Since SPL did pll and ddr initialization for us, diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index 66cacdf..6c93fd3 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -30,11 +30,8 @@ #ifndef CONFIG_SPL_BUILD /* Network defines. */ -#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_MII /* Required in net/eth.c */ #endif diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index cdbcf91..fbc268e 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -112,13 +112,9 @@ * console baudrate of 115200 and use the default baud rate table. */ #define CONFIG_SYS_MALLOC_LEN SZ_32M -#define CONFIG_ENV_VARS_UBOOT_CONFIG /* Strongly encouraged */ #define CONFIG_ENV_OVERWRITE /* Overwrite ethaddr / serial# */ /* As stated above, the following choices are optional. */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING /* We set the max number of command args high to avoid HUSH bugs. */ #define CONFIG_SYS_MAXARGS 64 @@ -137,8 +133,6 @@ #define CONFIG_MTD_DEVICE /* Required for mtdparts */ #endif -#define CONFIG_SUPPORT_RAW_INITRD - /* * Our platforms make use of SPL to initalize the hardware (primarily * memory) enough for full U-Boot to be loaded. We make use of the general diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index bbed17a..cf022af 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -99,7 +99,6 @@ #define CONFIG_PHY_MARVELL #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 32 diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index ba76dcd..15b4ada 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -41,13 +41,10 @@ * Command */ /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ -#define CONFIG_AUTO_COMPLETE /* Command auto complete */ -#define CONFIG_CMDLINE_EDITING /* Command history etc */ #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* USB, USB storage, USB ethernet */ diff --git a/include/configs/trats.h b/include/configs/trats.h index b97efc2..ca15f5c 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -60,7 +60,6 @@ #define CONFIG_ENV_OVERWRITE -#define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG /* Tizen - partitions definitions */ diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 871accf..782b465 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -54,7 +54,6 @@ #define CONFIG_ENV_OVERWRITE -#define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG /* Tizen - partitions definitions */ diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index ad9b36c..8647634 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -189,9 +189,6 @@ #endif /* CONFIG_FLASHCARD */ /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* enable cmdline history */ -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x00000000) diff --git a/include/configs/ts4800.h b/include/configs/ts4800.h index ebfbb66..057ce5b 100644 --- a/include/configs/ts4800.h +++ b/include/configs/ts4800.h @@ -120,13 +120,9 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_CMDLINE_EDITING - /*----------------------------------------------------------------------- * Physical Memory Map */ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 5ab06f6..7526ace 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -48,9 +48,6 @@ /* serial console configuration */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - -#define CONFIG_CMDLINE_EDITING /* add command line history */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) @@ -94,8 +91,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_BOOTM_LEN (32 << 20) -#define CONFIG_CMDLINE_EDITING /* add command line history */ - #if defined(CONFIG_ARM64) /* ARM Trusted Firmware */ #define BOOT_IMAGES \ diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index cd28c4d..99b9b52 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -40,9 +40,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* SDRAM */ #define CONFIG_NR_DRAM_BANKS 1 @@ -95,10 +92,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_LONGHELP - /* * Size of malloc() pool */ diff --git a/include/configs/vct.h b/include/configs/vct.h index e9dda42..6486ac8 100644 --- a/include/configs/vct.h +++ b/include/configs/vct.h @@ -87,18 +87,12 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_SUBNETMASK /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_TIMESTAMP /* Print image info with timestamp */ -#define CONFIG_CMDLINE_EDITING /* add command line history */ /* * FLASH and environment organization @@ -209,7 +203,6 @@ int vct_gpio_get(int pin); #if defined(CONFIG_VCT_SMALL_IMAGE) #undef CONFIG_SYS_I2C_SOFT #undef CONFIG_SOURCE -#undef CONFIG_SYS_LONGHELP #undef CONFIG_TIMESTAMP #endif /* CONFIG_VCT_SMALL_IMAGE */ diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h index 94a59f3..be18f16 100644 --- a/include/configs/ve8313.h +++ b/include/configs/ve8313.h @@ -304,21 +304,14 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. */ -#define CONFIG_CMDLINE_EDITING 1 -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ - /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 07cc92c..52ea596 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -17,8 +17,6 @@ #define CONFIG_REMAKE_ELF -#define CONFIG_SUPPORT_RAW_INITRD - /* Link Definitions */ #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \ defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM) @@ -120,10 +118,6 @@ /* BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_PXE /* Miscellaneous configurable options */ #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000) @@ -222,8 +216,6 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_MAXARGS 64 /* max command args */ #ifdef CONFIG_TARGET_VEXPRESS64_JUNO diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 94a352f..7f734f3 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -149,9 +149,6 @@ /* BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* Miscellaneous configurable options */ #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x8000) @@ -262,6 +259,5 @@ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_LONGHELP #endif /* VEXPRESS_COMMON_H */ diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index b28e8e4..47ef252 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -178,8 +178,6 @@ "else run netboot; fi" /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#undef CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MEMTEST_START 0x80010000 #define CONFIG_SYS_MEMTEST_END 0x87C00000 diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index 89c61b6..ae038ac 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -207,9 +207,6 @@ #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x4500) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x4600) -#define CONFIG_CMDLINE_EDITING /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ - /* I2C */ #define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 400000 @@ -332,9 +329,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -351,7 +345,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ /* diff --git a/include/configs/wb45n.h b/include/configs/wb45n.h index 8989d55..5194d72 100644 --- a/include/configs/wb45n.h +++ b/include/configs/wb45n.h @@ -33,9 +33,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* SDRAM */ #define CONFIG_NR_DRAM_BANKS 1 @@ -120,9 +117,6 @@ #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE /* * Size of malloc() pool diff --git a/include/configs/wb50n.h b/include/configs/wb50n.h index 4ab81c8..3e0b097 100644 --- a/include/configs/wb50n.h +++ b/include/configs/wb50n.h @@ -40,9 +40,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* SDRAM */ #define CONFIG_NR_DRAM_BANKS 1 @@ -107,9 +104,6 @@ #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_PBSIZE \ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h index 45ba9f1..6750e8c 100644 --- a/include/configs/woodburn_common.h +++ b/include/configs/woodburn_common.h @@ -71,9 +71,6 @@ /* * Command definition */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_DNS #define CONFIG_MXC_GPIO @@ -97,10 +94,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING - -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x10000 diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 430cc30..5ca8c1a 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -84,13 +84,9 @@ /* * U-Boot General Configurations */ -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING - /* * NAND chip timings for FIXME: which one? */ diff --git a/include/configs/x600.h b/include/configs/x600.h index a8313dd..608c942 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -116,9 +116,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00800000 #define CONFIG_SYS_MEMTEST_END 0x04000000 #define CONFIG_SYS_MALLOC_LEN (8 << 20) -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* Use last 2 lwords in internal SRAM for bootcounter */ diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index e8f680f..8d8c689 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -55,9 +55,6 @@ 9600, 19200, 38400, 115200} #define CONFIG_SYS_NS16550_PORT_MAPPED -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE - /*----------------------------------------------------------------------- * Command line configuration. */ @@ -74,7 +71,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_CBSIZE 512 #define CONFIG_SYS_MEMTEST_START 0x00100000 @@ -113,9 +109,6 @@ #define CONFIG_TFTP_TSIZE #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* Default environment */ #define CONFIG_ROOTPATH "/opt/nfsroot" diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index ff07e90..fdbc6ef 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -52,20 +52,9 @@ /* BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_MAY_FAIL -#define CONFIG_BOOTP_DNS -#define CONFIG_BOOTP_PXE -#define CONFIG_BOOTP_SUBNETMASK /* Diff from config_distro_defaults.h */ -#define CONFIG_SUPPORT_RAW_INITRD -#if !defined(CONFIG_SPL_BUILD) -#define CONFIG_ENV_VARS_UBOOT_CONFIG -#endif -#define CONFIG_AUTO_COMPLETE #if defined(CONFIG_MMC_SDHCI_ZYNQ) # define CONFIG_SUPPORT_EMMC_BOOT @@ -124,8 +113,6 @@ /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING #define CONFIG_PANIC_HANG #define CONFIG_SYS_MAXARGS 64 diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index 049a714..4739b82 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -481,9 +481,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */ #define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */ #define CONFIG_PREBOOT /* enable preboot variable */ #define CONFIG_INTEGRITY /* support booting INTEGRITY OS */ diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index 47da089..e523161 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -278,16 +278,11 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */ #define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */ #define CONFIG_PREBOOT /* enable preboot variable */ #define CONFIG_INTEGRITY /* support booting INTEGRITY OS */ diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index b676713..2809a44 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -335,10 +335,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */ #define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */ #define CONFIG_PREBOOT /* enable preboot variable */ #define CONFIG_INTEGRITY /* support booting INTEGRITY OS */ diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 88477b2..d647a5a 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -332,10 +332,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */ #define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */ #define CONFIG_PREBOOT /* enable preboot variable */ #define CONFIG_INTEGRITY /* support booting INTEGRITY OS */ diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 735959b..03cb3c9 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -38,8 +38,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 -#define CONFIG_CMDLINE_EDITING - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 3119f00..52d1e0e 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -124,9 +124,6 @@ #define CONFIG_BOOT_RETRY_TIME 60 /* retry after 60 secs */ -#define CONFIG_AUTO_COMPLETE /* Support tab autocompletion */ -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP #define CONFIG_MX_CYCLIC #define CONFIG_SHOW_BOOT_PROGRESS diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index 71f8be8..b933428 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -79,8 +79,6 @@ unsigned char zipitz2_spi_read(void); #endif #endif -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - #define CONFIG_SYS_DEVICE_NULLDEV 1 /* diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h index f9783a2..4c2f162 100644 --- a/include/configs/zmx25.h +++ b/include/configs/zmx25.h @@ -60,9 +60,6 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -115,9 +112,6 @@ #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM + (512*1024)) #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM + PHYS_SDRAM_SIZE) -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING - #define CONFIG_PREBOOT "" diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 3e30625..8697eab 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -41,9 +41,6 @@ # define CONFIG_PHY_MARVELL # define CONFIG_PHY_REALTEK # define CONFIG_PHY_XILINX -# define CONFIG_BOOTP_BOOTPATH -# define CONFIG_BOOTP_GATEWAY -# define CONFIG_BOOTP_HOSTNAME # define CONFIG_BOOTP_MAY_FAIL #endif @@ -259,9 +256,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_LONGHELP #define CONFIG_CLOCKS #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ diff --git a/include/configs/zynq_cse.h b/include/configs/zynq_cse.h index dd65b52..4211f3b 100644 --- a/include/configs/zynq_cse.h +++ b/include/configs/zynq_cse.h @@ -21,13 +21,9 @@ #undef CONFIG_BOARD_LATE_INIT #undef CONFIG_BOOTCOMMAND #undef CONFIG_ENV_SIZE -#undef CONFIG_CMDLINE_EDITING -#undef CONFIG_AUTO_COMPLETE #undef CONFIG_ZLIB #undef CONFIG_GZIP -#undef CONFIG_SYS_LONGHELP - #undef CONFIG_SYS_CBSIZE #undef CONFIG_BOOTM_VXWORKS #undef CONFIG_BOOTM_LINUX diff --git a/net/Kconfig b/net/Kconfig index 414c549..aac33f2 100644 --- a/net/Kconfig +++ b/net/Kconfig @@ -32,6 +32,30 @@ config NET_TFTP_VARS If unset, timeout and maximum are hard-defined as 1 second and 10 timouts per TFTP transfer. +config BOOTP_BOOTPATH + bool "Enable BOOTP BOOTPATH" + default y + +config BOOTP_DNS + bool "Enable bootp DNS" + default y + +config BOOTP_GATEWAY + bool "Enable BOOTP gateway" + default y + +config BOOTP_HOSTNAME + bool "Enable BOOTP hostname" + default y + +config BOOTP_PXE + bool "Enable BOOTP PXE" + default y + +config BOOTP_SUBNETMASK + bool "Enable BOOTP subnetmask" + default y + config BOOTP_PXE_CLIENTARCH hex default 0x16 if ARM64 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 2e767fc..a3331c4 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -111,7 +111,6 @@ CONFIG_ATMEL_NAND_HWECC CONFIG_ATMEL_NAND_HW_PMECC CONFIG_ATMEL_SPI0 CONFIG_AT_TRANS -CONFIG_AUTO_COMPLETE CONFIG_AUTO_ZRELADDR CONFIG_BACKSIDE_L2_CACHE CONFIG_BARIX_IPAM390 @@ -169,22 +168,16 @@ CONFIG_BOOTM_VXWORKS CONFIG_BOOTP_ CONFIG_BOOTP_BOOTFILE CONFIG_BOOTP_BOOTFILESIZE -CONFIG_BOOTP_BOOTPATH CONFIG_BOOTP_DEFAULT CONFIG_BOOTP_DHCP_REQUEST_DELAY -CONFIG_BOOTP_DNS CONFIG_BOOTP_DNS2 -CONFIG_BOOTP_GATEWAY -CONFIG_BOOTP_HOSTNAME CONFIG_BOOTP_ID_CACHE_SIZE CONFIG_BOOTP_MAY_FAIL CONFIG_BOOTP_NISDOMAIN CONFIG_BOOTP_NTPSERVER -CONFIG_BOOTP_PXE CONFIG_BOOTP_RANDOM_DELAY CONFIG_BOOTP_SEND_HOSTNAME CONFIG_BOOTP_SERVERIP -CONFIG_BOOTP_SUBNETMASK CONFIG_BOOTP_TIMEOFFSET CONFIG_BOOTP_VENDOREX CONFIG_BOOTROM_ERR_REG @@ -250,7 +243,6 @@ CONFIG_CLOCKS CONFIG_CLOCKS_IN_MHZ CONFIG_CLOCK_SYNTHESIZER CONFIG_CM922T_XA10 -CONFIG_CMDLINE_EDITING CONFIG_CMDLINE_PS_SUPPORT CONFIG_CMDLINE_TAG CONFIG_CM_INIT @@ -566,7 +558,6 @@ CONFIG_ENV_TOTAL_SIZE CONFIG_ENV_UBIFS_OPTION CONFIG_ENV_UBI_MTD CONFIG_ENV_UBI_VOLUME_REDUND -CONFIG_ENV_VARS_UBOOT_CONFIG CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG CONFIG_ENV_VERSION CONFIG_EP9301 @@ -2145,7 +2136,6 @@ CONFIG_SUNXI_USB_PHYS CONFIG_SUPERH_ON_CHIP_R8A66597 CONFIG_SUPPORT_EMMC_BOOT CONFIG_SUPPORT_EMMC_RPMB -CONFIG_SUPPORT_RAW_INITRD CONFIG_SUVD3 CONFIG_SXNI855T CONFIG_SYSFLAGS_ADDR @@ -3502,7 +3492,6 @@ CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE CONFIG_SYS_LOADS_BAUD_CHANGE CONFIG_SYS_LOAD_ADDR CONFIG_SYS_LOAD_ADDR2 -CONFIG_SYS_LONGHELP CONFIG_SYS_LOW CONFIG_SYS_LOWBOOT CONFIG_SYS_LOWMEM_BASE -- 2.7.4

2 2

[U-Boot] [PATCH] MAINTAINERS: board: qcom: db410c, db820c: update email.
by Jorge Ramirez-Ortiz 05 Feb '18

05 Feb '18

Update email address. Signed-off-by: Jorge Ramirez-Ortiz <jramirez(a)baylibre.com> --- board/qualcomm/dragonboard410c/MAINTAINERS | 2 +- board/qualcomm/dragonboard820c/MAINTAINERS | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/board/qualcomm/dragonboard410c/MAINTAINERS b/board/qualcomm/dragonboard410c/MAINTAINERS index f9ddc9d..70723ac 100644 --- a/board/qualcomm/dragonboard410c/MAINTAINERS +++ b/board/qualcomm/dragonboard410c/MAINTAINERS @@ -1,5 +1,5 @@ DRAGONBOARD410C BOARD -M: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz(a)linaro.org> +M: Jorge Ramirez-Ortiz <jramirez(a)baylibre.com> S: Maintained F: board/qualcomm/dragonboard410c/ F: include/configs/dragonboard410c.h diff --git a/board/qualcomm/dragonboard820c/MAINTAINERS b/board/qualcomm/dragonboard820c/MAINTAINERS index a157033..56c997e 100644 --- a/board/qualcomm/dragonboard820c/MAINTAINERS +++ b/board/qualcomm/dragonboard820c/MAINTAINERS @@ -1,5 +1,5 @@ DRAGONBOARD820C BOARD -M: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz(a)linaro.org> +M: Jorge Ramirez-Ortiz <jramirez(a)baylibre.com> S: Maintained F: board/qualcomm/dragonboard820c/ F: include/configs/dragonboard820c.h -- 2.7.4

2 1

[U-Boot] [PATCH v2 0/4] Add support for treating compiler warnings as errors
by Daniel Schwierzeck 05 Feb '18

05 Feb '18

To enforce a zero-warnings policy (e.g. in CI builds), all compiler warnings have to be treated as errors. Extend Kbuild and buildman with according options to achieve this. Enable these new options in all Travis CI builds. All builds with compiler warnings will now fail. Only DTC warnings are still being ignored. Example build which failed due to a compiler warning: https://travis-ci.org/danielschwierzeck/u-boot/jobs/333349371#L936 The patch which fixes the warning above: https://patchwork.ozlabs.org/patch/866009/ Changes in v2: - new patch - replace 'W=err' with 'KCFLAGS=-Werror' Daniel Schwierzeck (4): README: add doc for how to supply user specific compiler flags to Kbuild buildman: add option -E for treating compiler warnings as errors travis.yml: fix 'set +e' in build script travis.yml: run buildman with option -E .travis.yml | 5 ++--- README | 5 +++++ tools/buildman/builder.py | 5 ++++- tools/buildman/builderthread.py | 2 ++ tools/buildman/cmdline.py | 2 ++ tools/buildman/control.py | 3 ++- 6 files changed, 17 insertions(+), 5 deletions(-) -- 2.16.1

2 9

[U-Boot] [PATCH] usb: dwc2: make casts of ep->dma_buf consistent
by Tom Rini 05 Feb '18

05 Feb '18

In most places in the code we cast this to an unsigned long, but in one place we cast to an unsigned int. For consistency and to fix a warning on 64bit targets, always cast this to unsigned long. For the long term we should however change the declaration of dma_buf. Cc: Lukasz Majewski <lukma(a)denx.de> Cc: Marek Vasut <marex(a)denx.de> Cc: Philipp Tomsich <philipp.tomsich(a)theobroma-systems.com> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c index b6164afa9245..57dbbd5ebfa1 100644 --- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c +++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c @@ -114,7 +114,7 @@ static int setdma_rx(struct dwc2_ep *ep, struct dwc2_request *req) (unsigned long) ep->dma_buf + ROUND(ep->len, CONFIG_SYS_CACHELINE_SIZE)); - writel((unsigned int) ep->dma_buf, &reg->out_endp[ep_num].doepdma); + writel((unsigned long) ep->dma_buf, &reg->out_endp[ep_num].doepdma); writel(DOEPT_SIZ_PKT_CNT(pktcnt) | DOEPT_SIZ_XFER_SIZE(length), &reg->out_endp[ep_num].doeptsiz); writel(DEPCTL_EPENA|DEPCTL_CNAK|ctrl, &reg->out_endp[ep_num].doepctl); -- 2.7.4

3 3

[U-Boot] [PATCH v2] MAINTAINERS: Update email address for Maxime Ripard
by Maxime Ripard 05 Feb '18

05 Feb '18

Free Electrons is no more and is now known as Bootlin, change my email address accordingly. Signed-off-by: Maxime Ripard <maxime.ripard(a)bootlin.com> --- MAINTAINERS | 2 +- board/sunxi/MAINTAINERS | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 0aecc18a6c6e..be941c1e9967 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -205,7 +205,7 @@ F: arch/arm/include/asm/arch-sti*/ ARM SUNXI M: Jagan Teki <jagan(a)openedev.com> -M: Maxime Ripard <maxime.ripard(a)free-electrons.com> +M: Maxime Ripard <maxime.ripard(a)bootlin.com> S: Maintained T: git git://git.denx.de/u-boot-sunxi.git F: arch/arm/cpu/armv7/sunxi/ diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 362edffc428f..5eb8bbeac941 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -133,7 +133,7 @@ F: configs/Bananapi_M2_Ultra_defconfig F: arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts BANANAPI M2 MAGIC BOARD -M: Maxime Ripard <maxime.ripard(a)free-electrons.com> +M: Maxime Ripard <maxime.ripard(a)bootlin.com> S: Maintained F: configs/Bananapi_m2m_defconfig F: arch/arm/dts/sun8i-r16-bananapi-m2m.dts @@ -144,7 +144,7 @@ S: Maintained F: configs/bananapi_m64_defconfig COLOMBUS BOARD -M: Maxime Ripard <maxime.ripard(a)free-electrons.com> +M: Maxime Ripard <maxime.ripard(a)bootlin.com> S: Maintained F: configs/Colombus_defconfig @@ -380,7 +380,7 @@ F: configs/Sunchip_CX-A99_defconfig W: https://linux-sunxi.org/Sunchip_CX-A99 TBS A711 BOARD -M: Maxime Ripard <maxime.ripard(a)free-electrons.com> +M: Maxime Ripard <maxime.ripard(a)bootlin.com> S: Maintained F: configs/tbs_a711_defconfig -- 2.14.3

2 1

[U-Boot] [PATCH v2 0/6] mtd: nand: mxs_nand: improve ECC support
by Stefan Agner 05 Feb '18

05 Feb '18

From: Stefan Agner <stefan.agner(a)toradex.com> This patchset reworks the drivers ECC calculation to align more with the Linux driver gpmi-nand.c. It aims to implements minimal ECC support as supported by the NAND chip. The first three patches are of preparational nature, I hope that especially the first two can go in soonish to avoid conflicts. -- Stefan Changes in v2: - Extend the patchset with "Convert CONFIG_NAND_MXS to Kconfig" patch - Extend the patchset with "report correct ECC parameters" patch Stefan Agner (6): Convert CONFIG_NAND_MXS to Kconfig mtd: nand: mxs_nand: use self init mtd: nand: mxs_nand: allow to enable BBT support mtd: nand: mxs_nand: use structure for BCH geometry mtd: nand: mxs_nand: report correct ECC parameters mtd: nand: mxs_nand: add minimal ECC support configs/apx4devkit_defconfig | 3 +- configs/aristainetos2_defconfig | 3 +- configs/aristainetos2b_defconfig | 3 +- configs/aristainetos_defconfig | 3 +- configs/cm_fx6_defconfig | 11 +- configs/colibri_imx7_defconfig | 3 +- configs/gwventana_nand_defconfig | 3 +- configs/m28evk_defconfig | 3 +- configs/mx28evk_auart_console_defconfig | 3 +- configs/mx28evk_defconfig | 3 +- configs/mx28evk_nand_defconfig | 3 +- configs/mx28evk_spi_defconfig | 3 +- configs/mx6sabreauto_defconfig | 3 +- configs/mx6sxsabreauto_defconfig | 3 +- configs/pcm058_defconfig | 3 +- configs/pfla02_defconfig | 3 + configs/platinum_picon_defconfig | 3 +- configs/platinum_titanium_defconfig | 3 +- configs/titanium_defconfig | 3 +- drivers/mtd/nand/Kconfig | 9 + drivers/mtd/nand/mxs_nand.c | 282 +++++++++++++++++++------------- include/configs/aristainetos-common.h | 1 - include/configs/cm_fx6.h | 1 - include/configs/colibri_imx7.h | 2 - include/configs/gw_ventana.h | 1 - include/configs/mx6sabreauto.h | 1 - include/configs/mx6sxsabreauto.h | 1 - include/configs/mxs.h | 1 - include/configs/pcm058.h | 1 - include/configs/pfla02.h | 1 - include/configs/platinum.h | 1 - include/configs/titanium.h | 1 - 32 files changed, 219 insertions(+), 149 deletions(-) -- 2.16.1

2 7

[U-Boot] [PATCH 1/1] Broadwell-DE Implementation
by vnktux 05 Feb '18

05 Feb '18

Hi all, This patch contain a working implementation of Broadwell-DE for U-Boot, and support memory down with external SPD binary file. However there is only one issue that I couldn't solve, the booting process takes 1 hour. When the FSP reach "DDRIO Initialization" it take a lot before the memory is initialized and you can reach the U-Boot shell. I would like a review of my implementation since I am out of options. I tried to Enable/Disable MRC Cache and ACPI Resume but the problem is still there. Best regards, Vincenzo Bove Signed-off-by: Vincenzo Bove <vnktux(a)protonmail.com> --- arch/x86/Kconfig | 29 + arch/x86/cpu/Makefile | 1 + arch/x86/cpu/broadwell-de/Kconfig | 70 + arch/x86/cpu/broadwell-de/Makefile | 10 + arch/x86/cpu/broadwell-de/acpi.c | 234 +++ arch/x86/cpu/broadwell-de/broadwell_de.c | 38 + arch/x86/cpu/broadwell-de/cpu.c | 98 + arch/x86/cpu/broadwell-de/fsp_configs.c | 292 +++ arch/x86/dts/Makefile | 1 + arch/x86/dts/poseidon.dts | 210 ++ arch/x86/dts/u-boot.dtsi | 6 + .../asm/arch-broadwell-de/acpi/global_nvs.asl | 15 + .../asm/arch-broadwell-de/acpi/irq_helper.h | 36 + .../asm/arch-broadwell-de/acpi/irqlinks.asl | 454 +++++ .../asm/arch-broadwell-de/acpi/irqroute.asl | 29 + .../include/asm/arch-broadwell-de/acpi/irqroute.h | 31 + .../x86/include/asm/arch-broadwell-de/acpi/lpc.asl | 81 + .../include/asm/arch-broadwell-de/acpi/pcie1.asl | 455 +++++ .../asm/arch-broadwell-de/acpi/platform.asl | 61 + .../asm/arch-broadwell-de/acpi/southcluster.asl | 339 ++++ arch/x86/include/asm/arch-broadwell-de/device.h | 116 ++ .../asm/arch-broadwell-de/fsp/fsp_configs.h | 134 ++ .../include/asm/arch-broadwell-de/fsp/fsp_vpd.h | 116 ++ .../x86/include/asm/arch-broadwell-de/global_nvs.h | 21 + arch/x86/include/asm/arch-broadwell-de/iomap.h | 58 + arch/x86/include/asm/arch-broadwell-de/irq.h | 88 + board/prodrive/Kconfig | 23 + board/prodrive/poseidon/.gitignore | 5 + board/prodrive/poseidon/Kconfig | 45 + board/prodrive/poseidon/MAINTAINERS | 6 + board/prodrive/poseidon/Makefile | 8 + board/prodrive/poseidon/acpi/mainboard.asl | 11 + board/prodrive/poseidon/dsdt.asl | 187 ++ board/prodrive/poseidon/poseidon.c | 18 + configs/poseidon_defconfig | 70 + include/configs/poseidon.h | 29 + include/configs/x86-common.h | 17 +- include/fdtdec.h | 1 + lib/fdtdec.c | 1 + tools/binman/etype/intel_spd.py | 14 + 49 files changed, 10260 insertions(+), 1 deletion(-) create mode 100644 arch/x86/cpu/broadwell-de/Kconfig create mode 100644 arch/x86/cpu/broadwell-de/Makefile create mode 100644 arch/x86/cpu/broadwell-de/acpi.c create mode 100644 arch/x86/cpu/broadwell-de/broadwell_de.c create mode 100644 arch/x86/cpu/broadwell-de/cpu.c create mode 100644 arch/x86/cpu/broadwell-de/fsp_configs.c create mode 100644 arch/x86/dts/poseidon.dts create mode 100644 arch/x86/include/asm/arch-broadwell-de/acpi/global_nvs.asl create mode 100644 arch/x86/include/asm/arch-broadwell-de/acpi/irq_helper.h create mode 100644 arch/x86/include/asm/arch-broadwell-de/acpi/irqlinks.asl create mode 100644 arch/x86/include/asm/arch-broadwell-de/acpi/irqroute.asl create mode 100644 arch/x86/include/asm/arch-broadwell-de/acpi/irqroute.h create mode 100644 arch/x86/include/asm/arch-broadwell-de/acpi/lpc.asl create mode 100644 arch/x86/include/asm/arch-broadwell-de/acpi/pcie1.asl create mode 100644 arch/x86/include/asm/arch-broadwell-de/acpi/platform.asl create mode 100644 arch/x86/include/asm/arch-broadwell-de/acpi/southcluster.asl create mode 100644 arch/x86/include/asm/arch-broadwell-de/device.h create mode 100644 arch/x86/include/asm/arch-broadwell-de/fsp/fsp_configs.h create mode 100644 arch/x86/include/asm/arch-broadwell-de/fsp/fsp_vpd.h create mode 100644 arch/x86/include/asm/arch-broadwell-de/global_nvs.h create mode 100644 arch/x86/include/asm/arch-broadwell-de/iomap.h create mode 100644 arch/x86/include/asm/arch-broadwell-de/irq.h create mode 100644 board/prodrive/Kconfig create mode 100644 board/prodrive/poseidon/.gitignore create mode 100644 board/prodrive/poseidon/Kconfig create mode 100644 board/prodrive/poseidon/MAINTAINERS create mode 100644 board/prodrive/poseidon/Makefile create mode 100644 board/prodrive/poseidon/acpi/mainboard.asl create mode 100644 board/prodrive/poseidon/dsdt.asl create mode 100644 board/prodrive/poseidon/poseidon.c create mode 100644 configs/poseidon_defconfig create mode 100644 include/configs/poseidon.h create mode 100644 tools/binman/etype/intel_spd.py diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 5c23b2c..57fdcd7 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -78,6 +78,9 @@ config VENDOR_GOOGLE config VENDOR_INTEL bool "Intel" +config VENDOR_PRODRIVE + bool "Prodrive" + endchoice # subarchitectures-specific options below @@ -105,11 +108,13 @@ source "board/efi/Kconfig" source "board/emulation/Kconfig" source "board/google/Kconfig" source "board/intel/Kconfig" +source "board/prodrive/Kconfig" # platform-specific options below source "arch/x86/cpu/baytrail/Kconfig" source "arch/x86/cpu/braswell/Kconfig" source "arch/x86/cpu/broadwell/Kconfig" +source "arch/x86/cpu/broadwell-de/Kconfig" source "arch/x86/cpu/coreboot/Kconfig" source "arch/x86/cpu/ivybridge/Kconfig" source "arch/x86/cpu/qemu/Kconfig" @@ -766,6 +771,30 @@ config HIGH_TABLE_SIZE Increse it if the default size does not fit the board's needs. This is most likely due to a large ACPI DSDT table is used. +config FSP_MEMORY_DOWN + bool "Platform has memory down" + help + Select this option if your platform has memory soldered on the motherboard and FSP need SPD file. + +config HAVE_SPD + bool "Add SPD file" + help + Select this option if you have a SPD binary file for your memorydown. + +config SPD_FILE + string "SPD image filename" + depends on HAVE_SPD + default "spd_ch0_dimm0.bin" + help + The filename of the ram SPD binary. + +config SPD_ADDR + hex "SPD image location" + depends on HAVE_SPD + default 0xffcb0000 + help + The location of the SPD binary file. + source "arch/x86/lib/efi/Kconfig" endmenu diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile index 94cdff1..1fb1c40 100644 --- a/arch/x86/cpu/Makefile +++ b/arch/x86/cpu/Makefile @@ -29,6 +29,7 @@ obj-y += intel_common/ obj-$(CONFIG_INTEL_BAYTRAIL) += baytrail/ obj-$(CONFIG_INTEL_BRASWELL) += braswell/ obj-$(CONFIG_INTEL_BROADWELL) += broadwell/ +obj-$(CONFIG_INTEL_BROADWELL_DE) += broadwell-de/ obj-$(CONFIG_SYS_COREBOOT) += coreboot/ obj-$(CONFIG_EFI_APP) += efi/ obj-$(CONFIG_QEMU) += qemu/ diff --git a/arch/x86/cpu/broadwell-de/Kconfig b/arch/x86/cpu/broadwell-de/Kconfig new file mode 100644 index 0000000..a42821d --- /dev/null +++ b/arch/x86/cpu/broadwell-de/Kconfig @@ -0,0 +1,70 @@ +# +# Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +config INTEL_BROADWELL_DE + bool + select HAVE_FSP + select ARCH_MISC_INIT + select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED + imply HAVE_INTEL_ME + imply ENABLE_MRC_CACHE + imply AHCI_PCI + imply ICH_SPI + imply INTEL_ICH6_GPIO + imply SCSI + imply SPI_FLASH + imply SYS_NS16550 + imply USB + imply USB_EHCI_HCD + imply USB_XHCI_HCD + #imply VIDEO_VESA + +if INTEL_BROADWELL_DE + +config FSP_ADDR + hex + default 0xffeb0000 + +config FSP_BROKEN_HOB + bool + default y + +#config DCACHE_RAM_BASE +# default 0xfef00000 + +#config DCACHE_RAM_SIZE +# default 0x4000 + +config CPU_SPECIFIC_OPTIONS + def_bool y + select SMM_TSEG + #select X86_RAMTEST + +config SMM_TSEG_SIZE + hex + default 0x800000 + +config INTERNAL_UART + bool + default y + +config MAX_CPUS + int + default 16 + +config MAX_PIRQ_LINKS + int + default 4 + +config IRQ_SLOT_COUNT + int + default 18 + +config XIP_ROM_SIZE + hex + default 0x10000 + +endif diff --git a/arch/x86/cpu/broadwell-de/Makefile b/arch/x86/cpu/broadwell-de/Makefile new file mode 100644 index 0000000..0fa427e --- /dev/null +++ b/arch/x86/cpu/broadwell-de/Makefile @@ -0,0 +1,10 @@ +# +# Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += cpu.o +obj-y += fsp_configs.o +obj-y += broadwell_de.o +obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o diff --git a/arch/x86/cpu/broadwell-de/acpi.c b/arch/x86/cpu/broadwell-de/acpi.c new file mode 100644 index 0000000..2e00562 --- /dev/null +++ b/arch/x86/cpu/broadwell-de/acpi.c @@ -0,0 +1,234 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <cpu.h> +#include <dm.h> +#include <dm/uclass-internal.h> +#include <asm/acpi_s3.h> +#include <asm/acpi_table.h> +#include <asm/io.h> +#include <asm/tables.h> +#include <asm/arch/global_nvs.h> +#include <asm/arch/iomap.h> + +#define PM1_STS 0x00 +#define PM1_CNT 0x04 +#define GEN_PMCON1 0xA0 +#define WAK_STS (1 << 15) +#define PWR_FLR (1 << 1) +#define SUS_PWR_FLR (1 << 14) + +#define PMC_BASE_ADDRESS 0xfed03000 +#define PMC_BASE_SIZE 0x400 + +void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, + void *dsdt) +{ + struct acpi_table_header *header = &(fadt->header); + u16 pmbase = ACPI_BASE_ADDRESS; + + memset((void *)fadt, 0, sizeof(struct acpi_fadt)); + + /* + * Reference section 5.2.9 Fixed ACPI Description Table (FADT) + * in the ACPI 3.0b specification. + */ + + /* FADT Header Structure */ + acpi_fill_header(header, "FACP"); + header->length = sizeof(struct acpi_fadt); + header->revision = 4; + + /* ACPI Pointers */ + fadt->firmware_ctrl = (u32)facs; + fadt->dsdt = (u32)dsdt; + + fadt->preferred_pm_profile = ACPI_PM_MOBILE; + fadt->sci_int = 9; + + /* System Management */ + fadt->smi_cmd = 0; + fadt->acpi_enable = 0; + fadt->acpi_disable = 0; + + /* Power Control */ + fadt->s4bios_req = 0; + fadt->pstate_cnt = 0; + + /* Control Registers - Base Address */ + fadt->pm1a_evt_blk = pmbase + 0x00; //PM1_STS + fadt->pm1b_evt_blk = 0x0; + fadt->pm1a_cnt_blk = pmbase + 0x04; //PM1_CNT + fadt->pm1b_cnt_blk = 0x0; + fadt->pm2_cnt_blk = pmbase + 0x50; //PM2A_CNT_BLK + fadt->pm_tmr_blk = pmbase + 0x8; //PM1_TMR + fadt->gpe0_blk = pmbase + 0x20; //GPE0_STS + fadt->gpe1_blk = 0; + + /* Control Registers - Length */ + fadt->pm1_evt_len = 4; + fadt->pm1_cnt_len = 2; + fadt->pm2_cnt_len = 1; + fadt->pm_tmr_len = 4; + fadt->gpe0_blk_len = 8; + fadt->gpe1_blk_len = 0; + fadt->gpe1_base = 0; + fadt->cst_cnt = 0; + fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; + fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; + fadt->flush_size = 0; + fadt->flush_stride = 0; + fadt->duty_offset = 1; + fadt->duty_width = 0; + + /* RTC Registers */ + fadt->day_alrm = 0x0d; + fadt->mon_alrm = 0x00; + fadt->century = 0x00; + fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042; + + fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | + ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON | + ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_RESET_REGISTER | + ACPI_FADT_PLATFORM_CLOCK; + + /* Reset Register */ + fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO; + fadt->reset_reg.bit_width = 8; + fadt->reset_reg.bit_offset = 0; + fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; + fadt->reset_reg.addrl = IO_PORT_RESET; + fadt->reset_reg.addrh = 0; + fadt->reset_value = 6; //SYS_RST | RST_CPU | FULL_RST + + /* Extended ACPI Pointers */ + fadt->x_firmware_ctl_l = (u32)facs; + fadt->x_firmware_ctl_h = 0; + fadt->x_dsdt_l = (u32)dsdt; + fadt->x_dsdt_h = 0; + + /* PM1 Status & PM1 Enable */ + fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; + fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8; + fadt->x_pm1a_evt_blk.bit_offset = 0; + fadt->x_pm1a_evt_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; + fadt->x_pm1a_evt_blk.addrl = fadt->pm1a_evt_blk; + fadt->x_pm1a_evt_blk.addrh = 0x0; + + fadt->x_pm1b_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; + fadt->x_pm1b_evt_blk.bit_width = 0; + fadt->x_pm1b_evt_blk.bit_offset = 0; + fadt->x_pm1b_evt_blk.access_size = 0; + fadt->x_pm1b_evt_blk.addrl = fadt->pm1b_evt_blk; + fadt->x_pm1b_evt_blk.addrh = 0x0; + + /* PM1 Control Registers */ + fadt->x_pm1a_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO; + fadt->x_pm1a_cnt_blk.bit_width = 16; + fadt->x_pm1a_cnt_blk.bit_offset = 0; + fadt->x_pm1a_cnt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS; + fadt->x_pm1a_cnt_blk.addrl = fadt->pm1a_cnt_blk; + fadt->x_pm1a_cnt_blk.addrh = 0x0; + + fadt->x_pm1b_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO; + fadt->x_pm1b_cnt_blk.bit_width = 0; + fadt->x_pm1b_cnt_blk.bit_offset = 0; + fadt->x_pm1b_cnt_blk.access_size = 0; + fadt->x_pm1b_cnt_blk.addrl = fadt->pm1b_cnt_blk; + fadt->x_pm1b_cnt_blk.addrh = 0x0; + + /* PM2 Control Registers */ + fadt->x_pm2_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO; + fadt->x_pm2_cnt_blk.bit_width = 8; + fadt->x_pm2_cnt_blk.bit_offset = 0; + fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; + fadt->x_pm2_cnt_blk.addrl = fadt->pm2_cnt_blk; + fadt->x_pm2_cnt_blk.addrh = 0x0; + + /* PM1 Timer Register */ + fadt->x_pm_tmr_blk.space_id = ACPI_ADDRESS_SPACE_IO; + fadt->x_pm_tmr_blk.bit_width = 32; + fadt->x_pm_tmr_blk.bit_offset = 0; + fadt->x_pm_tmr_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; + fadt->x_pm_tmr_blk.addrl = fadt->pm_tmr_blk; + fadt->x_pm_tmr_blk.addrh = 0x0; + + /* General-Purpose Event Registers */ + fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; + fadt->x_gpe0_blk.bit_width = 64; + fadt->x_gpe0_blk.bit_offset = 0; + fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; + fadt->x_gpe0_blk.addrh = 0x0; + + fadt->x_gpe1_blk.space_id = ACPI_ADDRESS_SPACE_IO; + fadt->x_gpe1_blk.bit_width = 0; + fadt->x_gpe1_blk.bit_offset = 0; + fadt->x_gpe1_blk.access_size = 0; + fadt->x_gpe1_blk.addrl = fadt->gpe1_blk; + fadt->x_gpe1_blk.addrh = 0x0; + + header->checksum = table_compute_checksum(fadt, header->length); +} + +void acpi_create_gnvs(struct acpi_global_nvs *gnvs) +{ + struct udevice *dev; + int ret; + + /* at least we have one processor */ + gnvs->pcnt = 1; + /* override the processor count with actual number */ + ret = uclass_find_first_device(UCLASS_CPU, &dev); + if (ret == 0 && dev != NULL) { + ret = cpu_get_count(dev); + if (ret > 0) + gnvs->pcnt = ret; + } + + /* determine whether internal uart is on */ + if (IS_ENABLED(CONFIG_INTERNAL_UART)) + gnvs->iuart_en = 1; + else + gnvs->iuart_en = 0; +} + +#ifdef CONFIG_HAVE_ACPI_RESUME + +enum acpi_sleep_state chipset_prev_sleep_state(void) +{ + u32 pm1_sts; + u32 pm1_cnt; + u32 gen_pmcon1; + enum acpi_sleep_state prev_sleep_state = ACPI_S0; + + /* Read Power State */ + pm1_sts = inw(ACPI_BASE_ADDRESS + PM1_STS); + pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT); + gen_pmcon1 = readl(PMC_BASE_ADDRESS + GEN_PMCON1); + + debug("PM1_STS = 0x%x PM1_CNT = 0x%x GEN_PMCON1 = 0x%x\n", + pm1_sts, pm1_cnt, gen_pmcon1); + + if (pm1_sts & WAK_STS) + prev_sleep_state = acpi_sleep_from_pm1(pm1_cnt); + + if (gen_pmcon1 & (PWR_FLR | SUS_PWR_FLR)) + prev_sleep_state = ACPI_S5; + + return prev_sleep_state; +} + +void chipset_clear_sleep_state(void) +{ + u32 pm1_cnt; + + pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT); + outl(pm1_cnt & ~(SLP_TYP), ACPI_BASE_ADDRESS + PM1_CNT); +} + +#endif diff --git a/arch/x86/cpu/broadwell-de/broadwell_de.c b/arch/x86/cpu/broadwell-de/broadwell_de.c new file mode 100644 index 0000000..54afde7 --- /dev/null +++ b/arch/x86/cpu/broadwell-de/broadwell_de.c @@ -0,0 +1,38 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/mrccache.h> +#include <asm/post.h> + +int arch_cpu_init(void) +{ + post_code(POST_CPU_INIT); + + return x86_cpu_init_f(); +} + +int arch_misc_init(void) +{ +#ifdef CONFIG_ENABLE_MRC_CACHE + /* + * We intend not to check any return value here, as even MRC cache + * is not saved successfully, it is not a severe error that will + * prevent system from continuing to boot. + */ + mrccache_save(); +#endif + + return 0; +} + + + +void reset_cpu(ulong addr) +{ + /* cold reset */ + x86_full_reset(); +} diff --git a/arch/x86/cpu/broadwell-de/cpu.c b/arch/x86/cpu/broadwell-de/cpu.c new file mode 100644 index 0000000..71377fa --- /dev/null +++ b/arch/x86/cpu/broadwell-de/cpu.c @@ -0,0 +1,98 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <cpu.h> +#include <pci.h> +#include <asm/cpu.h> +#include <asm/cpu_x86.h> +#include <asm/cpu_common.h> +#include <asm/intel_regs.h> +#include <asm/io.h> +#include <asm/msr.h> +#include <asm/post.h> +#include <asm/turbo.h> +#include <asm/mrccache.h> +#include <asm/lapic.h> + +#define MSR_CORE_THREAD_COUNT 0x35 + +static void configure_mca(void) +{ + msr_t msr; + const unsigned int mcg_cap_msr = 0x179; + int i; + int num_banks; + + msr = msr_read(mcg_cap_msr); + num_banks = msr.lo & 0xff; + msr.lo = 0; + msr.hi = 0; + /* + * TODO(adurbin): This should only be done on a cold boot. Also, some + * of these banks are core vs package scope. For now every CPU clears + * every bank + */ + for (i = 0; i < num_banks; i++) { + msr_write(MSR_IA32_MC0_STATUS + (i * 4) + 1, msr); + msr_write(MSR_IA32_MC0_STATUS + (i * 4) + 2, msr); + msr_write(MSR_IA32_MC0_STATUS + (i * 4) + 3, msr); + + } + + msr.lo = 0xffffffff; + msr.hi = 0xffffffff; + + for (i = 0; i < num_banks; i++) { + msr_write(MSR_IA32_MC0_STATUS + (i * 4), msr); + } +} + +static int cpu_x86_broadwell_de_probe(struct udevice *dev) +{ + debug("Init Broadwell-DE core\n"); + + /* Clear out pending MCEs */ + configure_mca(); + + return 0; +} + + +static int broadwell_de_get_info(struct udevice *dev, struct cpu_info *info) +{ + //TBD + + return 0; +} + +static int broadwell_de_get_count(struct udevice *dev) +{ + msr_t core_thread_count = msr_read(MSR_CORE_THREAD_COUNT); + return core_thread_count.lo & 0xffff; +} + +static const struct cpu_ops cpu_x86_broadwell_de_ops = { + .get_desc = cpu_x86_get_desc, + .get_info = broadwell_de_get_info, + .get_count = broadwell_de_get_count, + .get_vendor = cpu_x86_get_vendor, +}; + +static const struct udevice_id cpu_x86_broadwell_de_ids[] = { + { .compatible = "intel,broadwell-de-cpu" }, + { } +}; + +U_BOOT_DRIVER(cpu_x86_broadwell_de_drv) = { + .name = "cpu_x86_broadwell_de", + .id = UCLASS_CPU, + .of_match = cpu_x86_broadwell_de_ids, + .bind = cpu_x86_bind, + .probe = cpu_x86_broadwell_de_probe, + .ops = &cpu_x86_broadwell_de_ops, +}; diff --git a/arch/x86/cpu/broadwell-de/fsp_configs.c b/arch/x86/cpu/broadwell-de/fsp_configs.c new file mode 100644 index 0000000..b2ccbdb --- /dev/null +++ b/arch/x86/cpu/broadwell-de/fsp_configs.c @@ -0,0 +1,292 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <fdtdec.h> +#include <asm/fsp/fsp_support.h> + +DECLARE_GLOBAL_DATA_PTR; + +/** + * Override the FSP's configuration data. + * If the device tree does not specify an integer setting, use the default + * provided by Prodrive BroadwellDE.rom + */ +void update_fsp_configs(struct fsp_config_data *config, + struct fspinit_rtbuf *rt_buf) +{ + struct upd_region *fsp_upd = &config->fsp_upd; + const void *blob = gd->fdt_blob; + int node; + + /* Initialize runtime buffer for fsp_init() */ + rt_buf->common.stack_top = config->common.stack_top - 32; + rt_buf->common.boot_mode = config->common.boot_mode; + rt_buf->common.upd_data = &config->fsp_upd; + + node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_BROADWELL_DE_FSP); + if (node < 0) { + debug("%s: Cannot find FSP node\n", __func__); + return; + } + + fsp_upd->memEccSupport = fdtdec_get_int(blob, node, + "fsp,memEccSupport", + MEM_ECC_SUPPORT_AUTO); + + fsp_upd->memDdrMemoryType = fdtdec_get_int(blob, node, + "fsp,memDdrMemoryType", + MEM_DDR_MEMORY_TYPE_UDIMM_AND_RDIMM); + + fsp_upd->memRankMultiplication = fdtdec_get_int(blob, node, + "fsp,memRankMultiplication", + MEM_RANK_MULTIPLICATION_AUTO); + + fsp_upd->memRankMarginTool = fdtdec_get_int(blob, node, + "fsp,memRankMarginTool", + MEM_RANK_MARGIN_TOOL_AUTO); + + fsp_upd->memScrambling = fdtdec_get_int(blob, node, + "fsp,memScrambling", + MEM_SCRAMBLING_AUTO); + + fsp_upd->memRefreshMode = fdtdec_get_int(blob, node, + "fsp,memRefreshMode", + MEM_REFRESH_MODE_ACC_SELF_REFRESH); + + fsp_upd->memMcOdtOverride = fdtdec_get_int(blob, node, + "fsp,memMcOdtOverride", + MEM_MC0DT_OVERRIDE_AUTO); + + fsp_upd->memCAParity = fdtdec_get_int(blob, node, + "fsp,memCAParity", + MEM_CA_PARITY_AUTO); + + fsp_upd->memThermalThrottling = fdtdec_get_int(blob, node, + "fsp,memThermalThrottling", + MEM_THERMAL_THROTTLING_CLOSEDLOOP); + + fsp_upd->memPowerSavingsMode = fdtdec_get_int(blob, node, + "fsp,memPowerSavingsMode", + MEM_POWER_SAVINGS_MODE_AUTO); + + fsp_upd->memElectricalThrottling = fdtdec_get_int(blob, node, + "fsp,memElectricalThrottling", + MEM_ELECTRICAL_THROTTLING_DISABLED); + + fsp_upd->memPagePolicy = fdtdec_get_int(blob, node, + "fsp,memPagePolicy", + MEM_PAGE_POLICY_AUTO); + + fsp_upd->memSocketInterleaveBelow4G = fdtdec_get_int(blob, node, + "fsp,memSocketInterleaveBelow4G", + MEM_SOCKET_INTERLEAVE_BELOW_4G_DISABLED); + + fsp_upd->memChannelInterleave = fdtdec_get_int(blob, node, + "fsp,memChannelInterleave", + MEM_CHANNEL_INTERLEAVE_AUTO); + + fsp_upd->memRankInterleave = fdtdec_get_int(blob, node, + "fsp,memRankInterleave", + MEM_RANK_INTERLEAVE_AUTO); + + #ifdef CONFIG_FSP_MEMORY_DOWN + fsp_upd->memDownEnable = fdtdec_get_bool(blob, node, "fsp,memDownEnable"); + + fsp_upd->memDownCh0Dimm0SpdPtr = fdtdec_get_int(blob, node, + "fsp,memDownCh0Dimm0SpdPtr", + CONFIG_SPD_ADDR); + + fsp_upd->memDownCh0Dimm1SpdPtr = fdtdec_get_int(blob, node, + "fsp,memDownCh0Dimm1SpdPtr", + 0x0); + + fsp_upd->memDownCh1Dimm0SpdPtr = fdtdec_get_int(blob, node, + "fsp,memDownCh1Dimm0SpdPtr", + 0x0); + + fsp_upd->memDownCh1Dimm1SpdPtr = fdtdec_get_int(blob, node, + "fsp,memDownCh1Dimm1SpdPtr", + 0x0); + #endif + + //#ifdef CONFIG_ENABLE_MRC_CACHE + //fsp_upd->memFastBoot = fdtdec_get_int(blob, node, "fsp,mem-fast-boot", MEM_FAST_BOOT_ENABLE); + //#else + //fsp_upd->memFastBoot = fdtdec_get_int(blob, node, "fsp,mem-fast-boot", MEM_FAST_BOOT_DISABLE); + //#endif + fsp_upd->memFastBoot = fdtdec_get_int(blob, node, "fsp,mem-fast-boot", MEM_FAST_BOOT_DISABLE); + + fsp_upd->pam0_hienable = fdtdec_get_int(blob, node, + "fsp,pam0-hienable", + PAM_RW_DRAM_ONLY); + + fsp_upd->pam1_loenable = fdtdec_get_int(blob, node, + "fsp,pam1-loenable", + PAM_RW_DRAM_ONLY); + + fsp_upd->pam1_hienable = fdtdec_get_int(blob, node, + "fsp,pam1-hienable", + PAM_RW_DRAM_ONLY); + + fsp_upd->pam2_loenable = fdtdec_get_int(blob, node, + "fsp,pam2-loenable", + PAM_RW_DRAM_ONLY); + + fsp_upd->pam2_hienable = fdtdec_get_int(blob, node, + "fsp,pam2-hienable", + PAM_RW_DRAM_ONLY); + + fsp_upd->pam3_loenable = fdtdec_get_int(blob, node, + "fsp,pam3-loenable", + PAM_RW_DRAM_ONLY); + + fsp_upd->pam3_hienable = fdtdec_get_int(blob, node, + "fsp,pam3-hienable", + PAM_RW_DRAM_ONLY); + + fsp_upd->pam4_loenable = fdtdec_get_int(blob, node, + "fsp,pam4-loenable", + PAM_RW_DRAM_ONLY); + + fsp_upd->pam4_hienable = fdtdec_get_int(blob, node, + "fsp,pam4-hienable", + PAM_RW_DRAM_ONLY); + + fsp_upd->pam5_loenable = fdtdec_get_int(blob, node, + "fsp,pam5-loenable", + PAM_RW_DRAM_ONLY); + + fsp_upd->pam5_hienable = fdtdec_get_int(blob, node, + "fsp,pam5-hienable", + PAM_RW_DRAM_ONLY); + + fsp_upd->pam6_loenable = fdtdec_get_int(blob, node, + "fsp,pam6-loenable", + PAM_RW_DRAM_ONLY); + + fsp_upd->pam6_hienable = fdtdec_get_int(blob, node, + "fsp,pam6-hienable", + PAM_RW_DRAM_ONLY); + + fsp_upd->memAdr = fdtdec_get_int(blob, node, + "fsp,memAdr", + MEM_ADR_DISABLED); + + fsp_upd->serialPortType = fdtdec_get_int(blob, node, + "fsp,serial-port-type", + SERIAL_PORT_TYPE_IO); + + fsp_upd->serialPortAddress = fdtdec_get_int(blob, node, + "fsp,serial-port-address", + 0x3f8); + + fsp_upd->serialPortConfigure = fdtdec_get_bool(blob, node, "fsp,serial-port-configure"); + + fsp_upd->serialPortBaudRate = fdtdec_get_int(blob, node, + "fsp,serial-port-baudrate", + SERIAL_PORT_BAUDRATE_115200); + + fsp_upd->serialPortControllerInit0 = fdtdec_get_bool(blob, node, "fsp,serial-port-controller-init0"); + + fsp_upd->serialPortControllerInit1 = fdtdec_get_bool(blob, node, "fsp,serial-port-controller-init1"); + + fsp_upd->configIOU1_PciPort3 = fdtdec_get_int(blob, node, + "fsp,config-iou1-pci-port3", + CONFIG_IOU1_PCI_PORT3_X4X4X4X4); + + fsp_upd->configIOU2_PciPort1 = fdtdec_get_int(blob, node, + "fsp,config-iou2-pci-port1", + CONFIG_IOU2_PCI_PORT1_XXX8); + + fsp_upd->pchPciPort1 = fdtdec_get_bool(blob, node, "fsp,pch-pci-port1"); + + fsp_upd->pchPciPort2 = fdtdec_get_bool(blob, node, "fsp,pch-pci-port2"); + + fsp_upd->pchPciPort3 = fdtdec_get_bool(blob, node, "fsp,pch-pci-port3"); + + fsp_upd->pchPciPort4 = fdtdec_get_bool(blob, node, "fsp,pch-pci-port4"); + + fsp_upd->pchPciPort5 = fdtdec_get_bool(blob, node, "fsp,pch-pci-port5"); + + fsp_upd->pchPciPort6 = fdtdec_get_bool(blob, node, "fsp,pch-pci-port6"); + + fsp_upd->pchPciPort7 = fdtdec_get_bool(blob, node, "fsp,pch-pci-port7"); + + fsp_upd->pchPciPort8 = fdtdec_get_bool(blob, node, "fsp,pch-pci-port8"); + + fsp_upd->ehci1Enable = fdtdec_get_bool(blob, node, "fsp,ehci1-enable"); + + fsp_upd->hyperThreading = fdtdec_get_bool(blob, node, "fsp,hyper-threading"); + + fsp_upd->debugOutputLevel = fdtdec_get_int(blob, node, + "fsp,debug-output-level", + DEBUG_OUTPUT_LEVEL_NORMAL); + + fsp_upd->tcoTimerHaltLock = fdtdec_get_bool(blob, node, "fsp,tco-timer-halt-lock"); + + fsp_upd->turboMode = fdtdec_get_bool(blob, node, "fsp,turbo-mode"); + + fsp_upd->bootPerfMode = fdtdec_get_bool(blob, node, "fsp,boot-perf-mode"); + + fsp_upd->pciePort1aAspm = fdtdec_get_int(blob, node, + "fsp,pcie-port1a-aspm", + PCIE_ASPM_DISABLED); + + fsp_upd->pciePort1bAspm = fdtdec_get_int(blob, node, + "fsp,pcie-port1b-aspm", + PCIE_ASPM_DISABLED); + + fsp_upd->pciePort3aAspm = fdtdec_get_int(blob, node, + "fsp,pcie-port3a-aspm", + PCIE_ASPM_DISABLED); + + fsp_upd->pciePort3bAspm = fdtdec_get_int(blob, node, + "fsp,pcie-port3b-aspm", + PCIE_ASPM_DISABLED); + + fsp_upd->pciePort3cAspm = fdtdec_get_int(blob, node, + "fsp,pcie-port3c-aspm", + PCIE_ASPM_DISABLED); + + fsp_upd->pciePort3dAspm = fdtdec_get_int(blob, node, + "fsp,pcie-port3d-aspm", + PCIE_ASPM_DISABLED); + + fsp_upd->pchPciePort1Aspm = fdtdec_get_int(blob, node, + "fsp,pch-pcie-port1-aspm", + PCH_PCI_ASPM_DISABLED); + + fsp_upd->pchPciePort2Aspm = fdtdec_get_int(blob, node, + "fsp,pch-pcie-port2-aspm", + PCH_PCI_ASPM_DISABLED); + + fsp_upd->pchPciePort3Aspm = fdtdec_get_int(blob, node, + "fsp,pch-pcie-port3-aspm", + PCH_PCI_ASPM_DISABLED); + + fsp_upd->pchPciePort4Aspm = fdtdec_get_int(blob, node, + "fsp,pch-pcie-port4-aspm", + PCH_PCI_ASPM_DISABLED); + + fsp_upd->pchPciePort5Aspm = fdtdec_get_int(blob, node, + "fsp,pch-pcie-port5-aspm", + PCH_PCI_ASPM_DISABLED); + + fsp_upd->pchPciePort6Aspm = fdtdec_get_int(blob, node, + "fsp,pch-pcie-port6-aspm", + PCH_PCI_ASPM_DISABLED); + + fsp_upd->pchPciePort7Aspm = fdtdec_get_int(blob, node, + "fsp,pch-pcie-port7-aspm", + PCH_PCI_ASPM_DISABLED); + + fsp_upd->pchPciePort8Aspm = fdtdec_get_int(blob, node, + "fsp,pch-pcie-port8-aspm", + PCH_PCI_ASPM_DISABLED); + + fsp_upd->thermalDeviceEnable = fdtdec_get_bool(blob, node, "fsp,thermal-device-enable"); +} diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile index 6d0c4b6..e59f192 100644 --- a/arch/x86/dts/Makefile +++ b/arch/x86/dts/Makefile @@ -15,6 +15,7 @@ dtb-y += bayleybay.dtb \ efi.dtb \ galileo.dtb \ minnowmax.dtb \ + poseidon.dtb \ qemu-x86_i440fx.dtb \ qemu-x86_q35.dtb \ theadorable-x86-dfi-bt700.dtb \ diff --git a/arch/x86/dts/poseidon.dts b/arch/x86/dts/poseidon.dts new file mode 100644 index 0000000..40894b9 --- /dev/null +++ b/arch/x86/dts/poseidon.dts @@ -0,0 +1,210 @@ +/* + * Copyright (C) 2014, Bin Meng <bmeng.cn(a)gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +#include <asm/arch-broadwell-de/fsp/fsp_configs.h> +#include <dt-bindings/gpio/x86-gpio.h> +#include <dt-bindings/interrupt-router/intel-irq.h> + +/include/ "skeleton.dtsi" +/include/ "serial.dtsi" +/include/ "rtc.dtsi" +/include/ "tsc_timer.dtsi" +/include/ "coreboot_fb.dtsi" + +/ { + model = "Intel Broadwell-DE"; + compatible = "x86", "intel,poseidon", "intel,broadwell-de"; + + chosen { + stdout-path = "/serial"; + }; + + /*cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "cpu-x86"; + reg = <0>; + intel,apic-id = <0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "cpu-x86"; + reg = <1>; + intel,apic-id = <1>; + }; + + cpu@2 { + device_type = "cpu"; + compatible = "cpu-x86"; + reg = <2>; + intel,apic-id = <2>; + }; + + cpu@3 { + device_type = "cpu"; + compatible = "cpu-x86"; + reg = <3>; + intel,apic-id = <3>; + }; + };*/ + + tsc-timer { + clock-frequency = <1000000000>; + }; + + pci { + compatible = "pci-x86"; + #address-cells = <3>; + #size-cells = <2>; + u-boot,dm-pre-reloc; + ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 + 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 + 0x01000000 0x0 0x2000 0x2000 0 0xe000>; + + pch@1f,0 { + reg = <0x0000f800 0 0 0 0>; + compatible = "intel,pch9"; + #address-cells = <1>; + #size-cells = <1>; + + irq-router { + compatible = "intel,irq-router"; + intel,pirq-config = "ibase"; + intel,ibase-offset = <0x50>; + intel,pirq-link = <8 8>; + intel,pirq-mask = <0xdee0>; + intel,pirq-routing = < + /*PCI_BDF(0, 31, 0) LPC Controller does not generate an interrupt */ + PCI_BDF(0, 31, 2) INTB PIRQB /* SATA Controller #1 */ + PCI_BDF(0, 31, 3) INTC PIRQC /* SMBus Controller */ + PCI_BDF(0, 31, 5) INTB PIRQB /* SATA Controller #2 */ + PCI_BDF(0, 31, 6) INTC PIRQC /* Thermal Subsystem */ + PCI_BDF(0, 29, 0) INTA PIRQA /* USB EHCI Controller #1 */ + PCI_BDF(0, 28, 0) INTA PIRQA /* PCI Express Port 1 */ + PCI_BDF(0, 28, 1) INTB PIRQB /* PCI Express Port 2 */ + PCI_BDF(0, 28, 2) INTC PIRQC /* PCI Express Port 3 */ + PCI_BDF(0, 28, 3) INTD PIRQD /* PCI Express Port 4 */ + PCI_BDF(0, 28, 4) INTA PIRQA /* PCI Express Port 5 */ + PCI_BDF(0, 28, 5) INTB PIRQB /* PCI Express Port 6 */ + PCI_BDF(0, 28, 6) INTC PIRQC /* PCI Express Port 7 */ + PCI_BDF(0, 28, 7) INTD PIRQD /* PCI Express Port 8 */ + PCI_BDF(0, 25, 0) INTA PIRQA /* Gigabit Ethernet Controller*/ + PCI_BDF(0, 22, 0) INTA PIRQA /* Intel Management Engine Interface #1 */ + PCI_BDF(0, 22, 1) INTB PIRQB /* Intel Management Engine Interface #2*/ + PCI_BDF(0, 22, 2) INTC PIRQC /* IDE-R*/ + PCI_BDF(0, 22, 3) INTD PIRQD /* KT*/ + PCI_BDF(0, 20, 0) INTA PIRQA /* xHCI Controller */ + >; + }; + + }; + }; + + fsp { + compatible = "intel,broadwell-de-fsp"; + fsp,memEccSupport = <MEM_ECC_SUPPORT_AUTO>; + fsp,memDdrMemoryType = <MEM_DDR_MEMORY_TYPE_UDIMM_AND_RDIMM>; + fsp,memRankMultiplication = <MEM_RANK_MULTIPLICATION_AUTO>; + fsp,memRankMarginTool = <MEM_RANK_MARGIN_TOOL_AUTO>; + fsp,memScrambling = <MEM_SCRAMBLING_AUTO>; + fsp,memRefreshMode = <MEM_REFRESH_MODE_ACC_SELF_REFRESH>; + fsp,memMcOdtOverride = <MEM_MC0DT_OVERRIDE_AUTO>; + fsp,memCAParity = <MEM_CA_PARITY_AUTO>; + fsp,memThermalThrottling = <MEM_THERMAL_THROTTLING_CLOSEDLOOP>; + fsp,memPowerSavingsMode = <MEM_POWER_SAVINGS_MODE_AUTO>; + fsp,memElectricalThrottling = <MEM_ELECTRICAL_THROTTLING_DISABLED>; + fsp,memPagePolicy = <MEM_PAGE_POLICY_AUTO>; + fsp,memSocketInterleaveBelow4G = <MEM_SOCKET_INTERLEAVE_BELOW_4G_DISABLED>; + fsp,memChannelInterleave = <MEM_CHANNEL_INTERLEAVE_AUTO>; + fsp,memRankInterleave = <MEM_RANK_INTERLEAVE_AUTO>; + + #ifdef CONFIG_FSP_MEMORY_DOWN + fsp,memDownEnable; + fsp,memDownCh0Dimm0SpdPtr = <CONFIG_SPD_ADDR>; + fsp,memDownCh0Dimm1SpdPtr = <0x0>; + fsp,memDownCh1Dimm0SpdPtr = <0x0>; + fsp,memDownCh1Dimm1SpdPtr = <0x0>; + #endif + + /*#ifdef CONFIG_ENABLE_MRC_CACHE + fsp,mem-fast-boot = <MEM_FAST_BOOT_ENABLE>; + #else + fsp,mem-fast-boot = <MEM_FAST_BOOT_DISABLE>; + #endif*/ + fsp,mem-fast-boot = <MEM_FAST_BOOT_DISABLE>; + + fsp,pam0-hienable = <PAM_RW_DRAM_ONLY>; + fsp,pam1-loenable = <PAM_RW_DRAM_ONLY>; + fsp,pam1-hienable = <PAM_RW_DRAM_ONLY>; + fsp,pam2-loenable = <PAM_RW_DRAM_ONLY>; + fsp,pam2-hienable = <PAM_RW_DRAM_ONLY>; + fsp,pam3-loenable = <PAM_RW_DRAM_ONLY>; + fsp,pam3-hienable = <PAM_RW_DRAM_ONLY>; + fsp,pam4-loenable = <PAM_RW_DRAM_ONLY>; + fsp,pam4-hienable = <PAM_RW_DRAM_ONLY>; + fsp,pam5-loenable = <PAM_RW_DRAM_ONLY>; + fsp,pam5-hienable = <PAM_RW_DRAM_ONLY>; + fsp,pam6-loenable = <PAM_RW_DRAM_ONLY>; + fsp,pam6-hienable = <PAM_RW_DRAM_ONLY>; + fsp,memAdr = <MEM_ADR_DISABLED>; + fsp,serial-port-type = <SERIAL_PORT_TYPE_IO>; + fsp,serial-port-address = <0x3f8>; + fsp,serial-port-configure; + fsp,serial-port-baudrate = <SERIAL_PORT_BAUDRATE_115200>; + fsp,serial-port-controller-init0; + fsp,serial-port-controller-init1; + fsp,config-iou1-pci-port3 = <CONFIG_IOU1_PCI_PORT3_X4X4X4X4>; + fsp,config-iou2-pci-port1 = <CONFIG_IOU2_PCI_PORT1_XXX8>; + fsp,pch-pci-port1; + fsp,pch-pci-port2; + fsp,pch-pci-port3; + fsp,pch-pci-port4; + fsp,pch-pci-port5; + fsp,pch-pci-port6; + fsp,pch-pci-port7; + fsp,pch-pci-port8; + fsp,ehci1-enable; + fsp,hyper-threading; + fsp,debug-output-level = <DEBUG_OUTPUT_LEVEL_NORMAL>; + fsp,tco-timer-halt-lock; + fsp,turbo-mode; + fsp,boot-perf-mode; + fsp,pcie-port1a-aspm = <PCIE_ASPM_DISABLED>; + fsp,pcie-port1b-aspm = <PCIE_ASPM_DISABLED>; + fsp,pcie-port3a-aspm = <PCIE_ASPM_DISABLED>; + fsp,pcie-port3b-aspm = <PCIE_ASPM_DISABLED>; + fsp,pcie-port3c-aspm = <PCIE_ASPM_DISABLED>; + fsp,pcie-port3d-aspm = <PCIE_ASPM_DISABLED>; + fsp,pch-pcie-port1-aspm = <PCH_PCI_ASPM_DISABLED>; + fsp,pch-pcie-port2-aspm = <PCH_PCI_ASPM_DISABLED>; + fsp,pch-pcie-port3-aspm = <PCH_PCI_ASPM_DISABLED>; + fsp,pch-pcie-port4-aspm = <PCH_PCI_ASPM_DISABLED>; + fsp,pch-pcie-port5-aspm = <PCH_PCI_ASPM_DISABLED>; + fsp,pch-pcie-port6-aspm = <PCH_PCI_ASPM_DISABLED>; + fsp,pch-pcie-port7-aspm = <PCH_PCI_ASPM_DISABLED>; + fsp,pch-pcie-port8-aspm = <PCH_PCI_ASPM_DISABLED>; + fsp,thermal-device-enable; + }; + + microcode { + update@0 { +#include "microcode/broadwell_de_microcode/m1050663_0700000e.dtsi" + }; + update@1 { +#include "microcode/broadwell_de_microcode/m1050662_00000011.dtsi" + }; + update@2 { +#include "microcode/broadwell_de_microcode/mff50661_f1000008.dtsi" + }; + }; + +}; diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi index 7e37d4f..486abe3 100644 --- a/arch/x86/dts/u-boot.dtsi +++ b/arch/x86/dts/u-boot.dtsi @@ -67,6 +67,12 @@ pos = <CONFIG_VGA_BIOS_ADDR>; }; #endif +#ifdef CONFIG_HAVE_SPD + intel-spd { + filename = CONFIG_SPD_FILE; + pos = <CONFIG_SPD_ADDR>; + }; +#endif #ifdef CONFIG_HAVE_VBT intel-vbt { filename = CONFIG_VBT_FILE; diff --git a/arch/x86/include/asm/arch-broadwell-de/acpi/global_nvs.asl b/arch/x86/include/asm/arch-broadwell-de/acpi/global_nvs.asl new file mode 100644 index 0000000..a28d4df --- /dev/null +++ b/arch/x86/include/asm/arch-broadwell-de/acpi/global_nvs.asl @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2016 Bin Meng <bmeng.cn(a)gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/acpi/global_nvs.h> + +OperationRegion(GNVS, SystemMemory, ACPI_GNVS_ADDR, ACPI_GNVS_SIZE) +Field(GNVS, ByteAcc, NoLock, Preserve) +{ + Offset (0x00), + PCNT, 8, /* processor count */ + IURE, 8, /* internal UART enabled */ +} diff --git a/arch/x86/include/asm/arch-broadwell-de/acpi/irq_helper.h b/arch/x86/include/asm/arch-broadwell-de/acpi/irq_helper.h new file mode 100644 index 0000000..5bdddd7 --- /dev/null +++ b/arch/x86/include/asm/arch-broadwell-de/acpi/irq_helper.h @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#undef PCI_DEV_PIRQ_ROUTES +#undef ACPI_DEV_IRQ +#undef PCI_DEV_PIRQ_ROUTE +#undef PIRQ_PIC_ROUTES +#undef PIRQ_PIC +#undef IRQROUTE_H + +#if defined(PIC_MODE) + +#define ACPI_DEV_IRQ(dev_, pin_, pin_name_) \ + { Package() { ## dev_ ## ffff, pin_, \_SB.PCI0.LPCB.LNK ## pin_name_, 0 } } + +#else /* defined(PIC_MODE) */ + +#define ACPI_DEV_IRQ(dev_, pin_, pin_name_) \ + { Package() { ## dev_ ## ffff, pin_, 0, PIRQ ## pin_name_ ## _APIC_IRQ } } + +#endif + +#define PCI_DEV_PIRQ_ROUTE(dev_, a_, b_, c_, d_) \ + { ACPI_DEV_IRQ(dev_, 0, a_), \ + ACPI_DEV_IRQ(dev_, 1, b_), \ + ACPI_DEV_IRQ(dev_, 2, c_), \ + ACPI_DEV_IRQ(dev_, 3, d_) } + +/* Empty PIRQ_PIC definition. */ +#define PIRQ_PIC(pirq_, pic_irq_) + +///* Include the mainboard irq route definition */ +#include "irqroute.h" diff --git a/arch/x86/include/asm/arch-broadwell-de/acpi/irqlinks.asl b/arch/x86/include/asm/arch-broadwell-de/acpi/irqlinks.asl new file mode 100644 index 0000000..3694298 --- /dev/null +++ b/arch/x86/include/asm/arch-broadwell-de/acpi/irqlinks.asl @@ -0,0 +1,454 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +OperationRegion (PRR0, PCI_Config, 0x00, 0x100) +Field (PRR0, AnyAcc, NoLock, Preserve) { + Offset(0x60), + PIRA, 8, + PIRB, 8, + PIRC, 8, + PIRD, 8, + Offset(0x68), + PIRE, 8, + PIRF, 8, + PIRG, 8, + PIRH, 8 +} + +Device (LNKA) { // PCI IRQ link A + Name (_HID,EISAID("PNP0C0F")) + //Name(_UID, 1) + Method (_STA,0,NotSerialized) { + If(And(PIRA, 0x80)) { + Return (0x9) + } Else { + Return (0xB) + } // Don't display + } + + Method (_DIS,0,NotSerialized) { + Or (PIRA, 0x80, PIRA) + } + + Method (_CRS,0,Serialized) { + Name (BUF0, ResourceTemplate() {IRQ(Level,ActiveLow,Shared){0}}) + // + // Define references to buffer elements + // + CreateWordField (BUF0, 0x01, IRQW) // IRQ low + // + // Write current settings into IRQ descriptor + // + If (And(PIRA, 0x80)) { + Store (Zero, Local0) + } Else { + Store (One,Local0) + } + // + // Shift 1 by value in register 70, Save in buffer + // + ShiftLeft (Local0,And (PIRA,0x0F),IRQW) // Save in buffer + Return (BUF0) // Return Buf0 + } // End of _CRS method + + Name (_PRS, ResourceTemplate() + {IRQ(Level,ActiveLow,Shared){3,4,5,6,7,9,10,11,12,14,15}}) + + Method (_SRS,1,NotSerialized) { + CreateWordField (ARG0, 0x01, IRQW) // IRQ low + + FindSetRightBit(IRQW,Local0) // Set IRQ + If (LNotEqual (IRQW,Zero)){ + And (Local0, 0x7F,Local0) + Decrement (Local0) + } Else { + Or (Local0, 0x80,Local0) + } + Store (Local0, PIRA) + } // End of _SRS Method +} + +Device(LNKB) { // PCI IRQ link B + Name (_HID,EISAID("PNP0C0F")) + //Name(_UID, 2) + Method (_STA,0,NotSerialized) { + If (And (PIRB, 0x80)) { + Return (0x9) + } Else { + Return (0xB) + } // Don't display + } + + Method (_DIS,0,NotSerialized) { + Or (PIRB, 0x80,PIRB) + } + + Method (_CRS,0,Serialized) { + Name(BUF0, ResourceTemplate() + {IRQ(Level,ActiveLow,Shared){0}}) + // + // Define references to buffer elements + // + CreateWordField (BUF0, 0x01, IRQW) // IRQ low + // + // Write current settings into IRQ descriptor + // + If (And (PIRB, 0x80)) { + Store (Zero, Local0) + } Else { + Store (One,Local0) + } + // + // Shift 1 by value in register 70, Save in buffer + // + ShiftLeft (Local0,And (PIRB,0x0F),IRQW) // Save in buffer + Return (BUF0) // Return Buf0 + } // End of _CRS method + + Name (_PRS, + ResourceTemplate() + {IRQ(Level,ActiveLow,Shared){3,4,5,6,7,9,10,11,12,14,15}}) + + Method (_SRS,1,NotSerialized) { + CreateWordField (ARG0, 0x01, IRQW) // IRQ low + + FindSetRightBit(IRQW,Local0) // Set IRQ + If (LNotEqual(IRQW,Zero)) { + And (Local0, 0x7F, Local0) + Decrement (Local0) + } Else { + Or (Local0, 0x80, Local0) + } + Store (Local0, PIRB) + } // End of _SRS Method +} + +Device(LNKC) { // PCI IRQ link C + Name(_HID, EISAID("PNP0C0F")) + //Name(_UID, 3) + + Method (_STA,0,NotSerialized) { + If (And (PIRC, 0x80)) { + Return (0x9) + } Else { + Return (0xB) + } // Don't display + } + + Method (_DIS, 0, NotSerialized) { + Or (PIRC, 0x80, PIRC) + } + + Method (_CRS, 0, Serialized) { + Name (BUF0, ResourceTemplate() + {IRQ(Level,ActiveLow,Shared){0}}) + // + // Define references to buffer elements + // + CreateWordField (BUF0, 0x01, IRQW) // IRQ low + // + // Write current settings into IRQ descriptor + // + If (And (PIRC, 0x80)) { + Store (Zero, Local0) + } Else { + Store (One,Local0) + } + // + // Shift 1 by value in register 70, Save in buffer + // + ShiftLeft (Local0,And (PIRC,0x0F),IRQW) + Return (BUF0) + } // End of _CRS method + + Name (_PRS, ResourceTemplate() + {IRQ(Level,ActiveLow,Shared){3,4,5,6,7,9,10,11,12,14,15}}) + + Method (_SRS,1,NotSerialized) { + CreateWordField (ARG0, 0x01, IRQW) // IRQ low + FindSetRightBit(IRQW,Local0) // Set IRQ + If (LNotEqual (IRQW,Zero)) { + And (Local0, 0x7F, Local0) + Decrement (Local0) + } Else { + Or (Local0, 0x80,Local0) + } + Store (Local0, PIRC) + } // End of _SRS Method +} + +Device (LNKD) { // PCI IRQ link D + Name (_HID,EISAID ("PNP0C0F")) + + //Name(_UID, 4) + + Method (_STA, 0, NotSerialized) { + If (And (PIRD, 0x80)) { + Return (0x9) + } Else { + Return (0xB) + } // Don't display + } + + Method (_DIS, 0, NotSerialized) { + Or(PIRD, 0x80,PIRD) + } + + Method (_CRS,0,Serialized) { + Name (BUF0, ResourceTemplate() + {IRQ(Level,ActiveLow,Shared){0}}) + // + // Define references to buffer elements + // + CreateWordField (BUF0, 0x01, IRQW) // IRQ low + // + // Write current settings into IRQ descriptor + // + If (And (PIRD, 0x80)) { + Store (Zero, Local0) + } Else { + Store (One,Local0) + } + // + // Shift 1 by value in register 70, Save in buffer + // + ShiftLeft (Local0, And (PIRD,0x0F), IRQW) + Return (BUF0) // Return Buf0 + } // End of _CRS method + + Name (_PRS, ResourceTemplate() + {IRQ(Level,ActiveLow,Shared){3,4,5,6,7,9,10,11,12,14,15}}) + + Method (_SRS,1,NotSerialized) { + CreateWordField (ARG0, 0x01, IRQW) // IRQ low + FindSetRightBit (IRQW, Local0)// Set IRQ + If (LNotEqual (IRQW, Zero)) { + And (Local0, 0x7F, Local0) + Decrement (Local0) + } Else { + Or (Local0, 0x80, Local0) + } + Store(Local0, PIRD) + } // End of _SRS Method +} + +Device(LNKE) { // PCI IRQ link E + Name(_HID,EISAID("PNP0C0F")) + + //Name(_UID, 5) + + Method (_STA,0,NotSerialized) { + If (And (PIRE, 0x80)) { + Return(0x9) + } Else { + Return(0xB) + } // Don't display + } + + Method (_DIS,0,NotSerialized) { + Or (PIRE, 0x80, PIRE) + } + + Method (_CRS, 0, Serialized) { + Name (BUF0, ResourceTemplate() + {IRQ(Level,ActiveLow,Shared){0}}) + // + // Define references to buffer elements + // + CreateWordField (BUF0, 0x01, IRQW) // IRQ low + // + // Write current settings into IRQ descriptor + // + If (And (PIRE, 0x80)) { + Store (Zero, Local0) + } Else { + Store (One, Local0) + } + // + // Shift 1 by value in register 70, Save in buffer + // + ShiftLeft (Local0, And (PIRE,0x0F), IRQW) + Return (BUF0) // Return Buf0 + } // End of _CRS method + + Name(_PRS, ResourceTemplate() + {IRQ(Level,ActiveLow,Shared){3,4,5,6,7,9,10,11,12,14,15}}) + + Method (_SRS,1,NotSerialized) { + CreateWordField (ARG0, 0x01, IRQW) // IRQ low + FindSetRightBit (IRQW, Local0) // Set IRQ + If (LNotEqual (IRQW, Zero)) { + And (Local0, 0x7F, Local0) + Decrement (Local0) + } Else { + Or (Local0, 0x80, Local0) + } + Store (Local0, PIRE) + } // End of _SRS Method +} + +Device(LNKF) { // PCI IRQ link F + Name (_HID,EISAID("PNP0C0F")) + + //Name(_UID, 6) + + Method (_STA,0,NotSerialized) { + If (And (PIRF, 0x80)) { + Return (0x9) + } Else { + Return (0xB) + } // Don't display + } + + Method (_DIS,0,NotSerialized) { + Or (PIRB, 0x80, PIRF) + } + + Method (_CRS,0,Serialized) { + Name(BUF0, ResourceTemplate() + {IRQ(Level,ActiveLow,Shared){0}}) + // + // Define references to buffer elements + // + CreateWordField (BUF0, 0x01, IRQW) // IRQ low + // + // Write current settings into IRQ descriptor + // + If (And (PIRF, 0x80)) { + Store (Zero, Local0) + } Else { + Store (One, Local0) + } + // + // Shift 1 by value in register 70, Save in buffer + // + ShiftLeft (Local0, And (PIRF, 0x0F),IRQW) + Return (BUF0) + } // End of _CRS method + + Name(_PRS, ResourceTemplate() + {IRQ(Level,ActiveLow,Shared){3,4,5,6,7,9,10,11,12,14,15}}) + + Method (_SRS,1,NotSerialized) { + CreateWordField (ARG0, 0x01, IRQW) // IRQ low + FindSetRightBit (IRQW,Local0) // Set IRQ + If (LNotEqual (IRQW,Zero)) { + And (Local0, 0x7F,Local0) + Decrement (Local0) + } Else { + Or (Local0, 0x80, Local0) + } + Store (Local0, PIRF) + } // End of _SRS Method +} + +Device(LNKG) { // PCI IRQ link G + Name(_HID,EISAID("PNP0C0F")) + //Name(_UID, 7) + Method(_STA,0,NotSerialized) { + If (And (PIRG, 0x80)) { + Return (0x9) + } Else { + Return (0xB) + } // Don't display + } + + Method (_DIS, 0, NotSerialized) { + Or(PIRG, 0x80,PIRG) + } + + Method (_CRS,0,Serialized){ + Name(BUF0,ResourceTemplate() + {IRQ(Level,ActiveLow,Shared){0}}) + // + // Define references to buffer elements + // + CreateWordField (BUF0, 0x01, IRQW) // IRQ low + // + // Write current settings into IRQ descriptor + // + If (And(PIRG, 0x80)) { + Store(Zero, Local0) + } Else { + Store(One,Local0) + } + // + // Shift 1 by value in register 70, Save in buffer + // + ShiftLeft (Local0,And(PIRG,0x0F),IRQW) + Return (BUF0) + } // End of _CRS method + + Name (_PRS, ResourceTemplate() + {IRQ(Level,ActiveLow,Shared){3,4,5,6,7,9,10,11,12,14,15}}) + + Method (_SRS,1,NotSerialized) { + CreateWordField (ARG0, 0x01, IRQW) // IRQ low + FindSetRightBit(IRQW,Local0) // Set IRQ + If (LNotEqual (IRQW,Zero)) { + And (Local0, 0x7F,Local0) + Decrement (Local0) + } Else { + Or (Local0, 0x80,Local0) + } + Store (Local0, PIRG) + } // End of _SRS Method +} + +Device(LNKH) { // PCI IRQ link H + Name (_HID,EISAID("PNP0C0F")) + + //Name(_UID, 8) + + Method (_STA,0,NotSerialized) { + If (And(PIRH, 0x80)) { + Return(0x9) + } Else { + Return(0xB) + } // Don't display + } + + Method (_DIS,0,NotSerialized) { + Or(PIRH, 0x80,PIRH) + } + + Method (_CRS,0,Serialized) { + Name(BUF0, ResourceTemplate() + {IRQ(Level,ActiveLow,Shared){0}}) + // + // Define references to buffer elements + // + CreateWordField (BUF0, 0x01, IRQW) // IRQ low + // + // Write current settings into IRQ descriptor + // + If (And (PIRH, 0x80)) { + Store (Zero, Local0) + } Else { + Store (One,Local0) + } + // + // Shift 1 by value in register 70, Save in buffer + // + ShiftLeft (Local0,And(PIRH,0x0F),IRQW) + Return (BUF0) + } // End of _CRS method + + Name(_PRS, ResourceTemplate() + {IRQ(Level,ActiveLow,Shared){3,4,5,6,7,9,10,11,12,14,15}}) + + Method (_SRS,1,NotSerialized) { + CreateWordField (ARG0, 0x01, IRQW) // IRQ low + FindSetRightBit (IRQW,Local0)// Set IRQ + If (LNotEqual (IRQW,Zero)) { + And (Local0, 0x7F,Local0) + Decrement (Local0) + } Else { + Or (Local0, 0x80,Local0) + } + Store (Local0, PIRH) + } +} diff --git a/arch/x86/include/asm/arch-broadwell-de/acpi/irqroute.asl b/arch/x86/include/asm/arch-broadwell-de/acpi/irqroute.asl new file mode 100644 index 0000000..39c7a19 --- /dev/null +++ b/arch/x86/include/asm/arch-broadwell-de/acpi/irqroute.asl @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* PCI Interrupt Routing */ +Method(_PRT) +{ + /* + * PICM comes from _PIC, which returns the following: + * 0 - PIC mode + * 1 - APIC mode + * 2 - SAPIC mode + */ + If (PICM) { + Return (Package() { + #undef PIC_MODE + #include "irq_helper.h" + PCI_DEV_PIRQ_ROUTES + }) + } Else { + Return (Package() { + #define PIC_MODE + #include "irq_helper.h" + PCI_DEV_PIRQ_ROUTES + }) + } +} diff --git a/arch/x86/include/asm/arch-broadwell-de/acpi/irqroute.h b/arch/x86/include/asm/arch-broadwell-de/acpi/irqroute.h new file mode 100644 index 0000000..27701db --- /dev/null +++ b/arch/x86/include/asm/arch-broadwell-de/acpi/irqroute.h @@ -0,0 +1,31 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/arch/device.h> + +#define PCI_DEV_PIRQ_ROUTES \ + PCI_DEV_PIRQ_ROUTE(XHCI_DEV, A, B, C, D), \ + PCI_DEV_PIRQ_ROUTE(ME_DEV, A, B, C, D), \ + PCI_DEV_PIRQ_ROUTE(GBE_DEV, A, B, C, D), \ + PCI_DEV_PIRQ_ROUTE(HDA_DEV, A, B, C, D), \ + PCI_DEV_PIRQ_ROUTE(PCIE_DEV, A, B, C, D), \ + PCI_DEV_PIRQ_ROUTE(EHCI1_DEV, A, B, C, D), \ + PCI_DEV_PIRQ_ROUTE(SATA_DEV, A, B, C, D) + +/* +* Route each PIRQ[A-H] to a PIC IRQ[0-15] +* Reserved: 0, 1, 2, 8, 13 +* ACPI/SCI: 9 +*/ +#define PIRQ_PIC_ROUTES \ + PIRQ_PIC(A, 5), \ + PIRQ_PIC(B, 6), \ + PIRQ_PIC(C, 7), \ + PIRQ_PIC(D, 10), \ + PIRQ_PIC(E, 11), \ + PIRQ_PIC(F, 12), \ + PIRQ_PIC(G, 14), \ + PIRQ_PIC(H, 15) diff --git a/arch/x86/include/asm/arch-broadwell-de/acpi/lpc.asl b/arch/x86/include/asm/arch-broadwell-de/acpi/lpc.asl new file mode 100644 index 0000000..c1a9e2f --- /dev/null +++ b/arch/x86/include/asm/arch-broadwell-de/acpi/lpc.asl @@ -0,0 +1,81 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* Intel LPC Bus Device - 0:1f.0 */ + +Device (LPC0) +{ + Name(_ADR, 0x001f0000) + + #include "irqlinks.asl" + + Device (FWH) // Firmware Hub + { + Name (_HID, EISAID("INT0800")) + Name (_CRS, ResourceTemplate() + { + Memory32Fixed(ReadOnly, 0xff000000, 0x01000000) + }) + } + + Device (HPET) + { + Name (_HID, EISAID("PNP0103")) + Name (_CID, 0x010CD041) + + Method (_STA, 0) // Device Status + { + Return (0xf) // Enable and show device + } + + Name(_CRS, ResourceTemplate() + { + Memory32Fixed(ReadOnly, 0xfed00000, 0x400) + }) + } + + Device(LDRC) // LPC device: Resource consumption + { + Name (_HID, EISAID("PNP0C02")) + Name (_UID, 2) + + Name (RBUF, ResourceTemplate() + { + IO (Decode16, 0x61, 0x61, 0x1, 0x01) // NMI Status + IO (Decode16, 0x63, 0x63, 0x1, 0x01) // CPU Reserved + IO (Decode16, 0x65, 0x65, 0x1, 0x01) // CPU Reserved + IO (Decode16, 0x67, 0x67, 0x1, 0x01) // CPU Reserved + IO (Decode16, 0x80, 0x80, 0x1, 0x01) // Port 80 Post + IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved + IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI + }) + + Method (_CRS, 0, NotSerialized) + { + Return (RBUF) + } + } + + Device (RTC) // Real Time Clock + { + Name (_HID, EISAID("PNP0B00")) + Name (_CRS, ResourceTemplate() + { + IO (Decode16, 0x70, 0x70, 1, 8) + }) + } + + Device (TIMR) // Intel 8254 timer + { + Name(_HID, EISAID("PNP0100")) + Name(_CRS, ResourceTemplate() + { + IO (Decode16, 0x40, 0x40, 0x01, 0x04) + IO (Decode16, 0x50, 0x50, 0x10, 0x04) + IRQNoFlags() {0} + }) + } +} diff --git a/arch/x86/include/asm/arch-broadwell-de/acpi/pcie1.asl b/arch/x86/include/asm/arch-broadwell-de/acpi/pcie1.asl new file mode 100644 index 0000000..4c0cd37 --- /dev/null +++ b/arch/x86/include/asm/arch-broadwell-de/acpi/pcie1.asl @@ -0,0 +1,455 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +Name (PR01, Package() { + // [SL01]: PCI Express Slot 1 on 1A on PCI0 + Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, +}) + +Name (AR01, Package() { + // [SL01]: PCI Express Slot 1 on 1A on PCI0 + Package() { 0x0000FFFF, 0, 0, 16 }, + Package() { 0x0000FFFF, 1, 0, 17 }, + Package() { 0x0000FFFF, 2, 0, 18 }, + Package() { 0x0000FFFF, 3, 0, 19 }, +}) + +Name (AH01, Package() { + // [SL01]: PCI Express Slot 1 on 1A on PCI0 + Package() { 0x0000FFFF, 0, 0, 26 }, + Package() { 0x0000FFFF, 1, 0, 28 }, + Package() { 0x0000FFFF, 2, 0, 29 }, + Package() { 0x0000FFFF, 3, 0, 30 }, +}) + +Name (PR02, Package() { + // [SL02]: PCI Express Slot 2 on 1B on PCI0 + Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, +}) + +Name (AR02, Package() { + // [SL02]: PCI Express Slot 2 on 1B on PCI0 + Package() { 0x0000FFFF, 0, 0, 16 }, + Package() { 0x0000FFFF, 1, 0, 17 }, + Package() { 0x0000FFFF, 2, 0, 18 }, + Package() { 0x0000FFFF, 3, 0, 19 }, +}) + +Name (AH02, Package() { + // [SL02]: PCI Express Slot 2 on 1B on PCI0 + Package() { 0x0000FFFF, 0, 0, 27 }, + Package() { 0x0000FFFF, 1, 0, 30 }, + Package() { 0x0000FFFF, 2, 0, 28 }, + Package() { 0x0000FFFF, 3, 0, 29 }, +}) + +Name (PR03, Package() { + // [CB0I]: CB3DMA on IOSF + Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + // [CB0J]: CB3DMA on IOSF + Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + // [CB0K]: CB3DMA on IOSF + Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + // [CB0L]: CB3DMA on IOSF + Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, +}) + +Name (AR03, Package() { + // [CB0I]: CB3DMA on IOSF + Package() { 0x0000FFFF, 0, 0, 16 }, + // [CB0J]: CB3DMA on IOSF + Package() { 0x0000FFFF, 1, 0, 17 }, + // [CB0K]: CB3DMA on IOSF + Package() { 0x0000FFFF, 2, 0, 18 }, + // [CB0L]: CB3DMA on IOSF + Package() { 0x0000FFFF, 3, 0, 19 }, +}) + +Name (AH03, Package() { + // [CB0I]: CB3DMA on IOSF + Package() { 0x0000FFFF, 0, 0, 32 }, + // [CB0J]: CB3DMA on IOSF + Package() { 0x0000FFFF, 1, 0, 36 }, + // [CB0K]: CB3DMA on IOSF + Package() { 0x0000FFFF, 2, 0, 37 }, + // [CB0L]: CB3DMA on IOSF + Package() { 0x0000FFFF, 3, 0, 38 }, +}) + +Name (PR04, Package() { + // [SL04]: PCI Express Slot 4 on 2B on PCI0 + Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, +}) + +Name (AR04, Package() { + // [SL04]: PCI Express Slot 4 on 2B on PCI0 + Package() { 0x0000FFFF, 0, 0, 16 }, + Package() { 0x0000FFFF, 1, 0, 17 }, + Package() { 0x0000FFFF, 2, 0, 18 }, + Package() { 0x0000FFFF, 3, 0, 19 }, +}) + +Name (AH04, Package() { + // [SL04]: PCI Express Slot 4 on 2B on PCI0 + Package() { 0x0000FFFF, 0, 0, 33 }, + Package() { 0x0000FFFF, 1, 0, 37 }, + Package() { 0x0000FFFF, 2, 0, 38 }, + Package() { 0x0000FFFF, 3, 0, 36 }, +}) + +Name (PR05, Package() { + // [SL05]: PCI Express Slot 5 on 2C on PCI0 + Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, +}) + +Name (AR05, Package() { + // [SL05]: PCI Express Slot 5 on 2C on PCI0 + Package() { 0x0000FFFF, 0, 0, 16 }, + Package() { 0x0000FFFF, 1, 0, 17 }, + Package() { 0x0000FFFF, 2, 0, 18 }, + Package() { 0x0000FFFF, 3, 0, 19 }, +}) + +Name (AH05, Package() { + // [SL05]: PCI Express Slot 5 on 2C on PCI0 + Package() { 0x0000FFFF, 0, 0, 34 }, + Package() { 0x0000FFFF, 1, 0, 37 }, + Package() { 0x0000FFFF, 2, 0, 36 }, + Package() { 0x0000FFFF, 3, 0, 38 }, +}) + +Name (PR06, Package() { + // [SL06]: PCI Express Slot 6 on 2D on PCI0 + Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, +}) + +Name (AR06, Package() { + // [SL06]: PCI Express Slot 6 on 2D on PCI0 + Package() { 0x0000FFFF, 0, 0, 16 }, + Package() { 0x0000FFFF, 1, 0, 17 }, + Package() { 0x0000FFFF, 2, 0, 18 }, + Package() { 0x0000FFFF, 3, 0, 19 }, +}) + +Name (AH06, Package() { + // [SL06]: PCI Express Slot 6 on 2D on PCI0 + Package() { 0x0000FFFF, 0, 0, 35 }, + Package() { 0x0000FFFF, 1, 0, 36 }, + Package() { 0x0000FFFF, 2, 0, 38 }, + Package() { 0x0000FFFF, 3, 0, 37 }, +}) + +Name (PR07, Package() { + // [SL07]: PCI Express Slot 7 on 3A on PCI0 + Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, +}) + +Name (AR07, Package() { + // [SL07]: PCI Express Slot 7 on 3A on PCI0 + Package() { 0x0000FFFF, 0, 0, 16 }, + Package() { 0x0000FFFF, 1, 0, 17 }, + Package() { 0x0000FFFF, 2, 0, 18 }, + Package() { 0x0000FFFF, 3, 0, 19 }, +}) + +Name (AH07, Package() { + // [SL07]: PCI Express Slot 7 on 3A on PCI0 + Package() { 0x0000FFFF, 0, 0, 40 }, + Package() { 0x0000FFFF, 1, 0, 44 }, + Package() { 0x0000FFFF, 2, 0, 45 }, + Package() { 0x0000FFFF, 3, 0, 46 }, +}) + +Name (PR08, Package() { + // [SL08]: PCI Express Slot 8 on 3B on PCI0 + Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, +}) + +Name (AR08, Package() { + // [SL08]: PCI Express Slot 8 on 3B on PCI0 + Package() { 0x0000FFFF, 0, 0, 16 }, + Package() { 0x0000FFFF, 1, 0, 17 }, + Package() { 0x0000FFFF, 2, 0, 18 }, + Package() { 0x0000FFFF, 3, 0, 19 }, +}) + +Name (AH08, Package() { + // [SL08]: PCI Express Slot 8 on 3B on PCI0 + Package() { 0x0000FFFF, 0, 0, 41 }, + Package() { 0x0000FFFF, 1, 0, 45 }, + Package() { 0x0000FFFF, 2, 0, 46 }, + Package() { 0x0000FFFF, 3, 0, 44 }, +}) + +Name (PR09, Package() { + // [SL09]: PCI Express Slot 9 on 3C on PCI0 + Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, +}) + +Name (AR09, Package() { + // [SL09]: PCI Express Slot 9 on 3C on PCI0 + Package() { 0x0000FFFF, 0, 0, 16 }, + Package() { 0x0000FFFF, 1, 0, 17 }, + Package() { 0x0000FFFF, 2, 0, 18 }, + Package() { 0x0000FFFF, 3, 0, 19 }, +}) + +Name (AH09, Package() { + // [SL09]: PCI Express Slot 9 on 3C on PCI0 + Package() { 0x0000FFFF, 0, 0, 42 }, + Package() { 0x0000FFFF, 1, 0, 45 }, + Package() { 0x0000FFFF, 2, 0, 44 }, + Package() { 0x0000FFFF, 3, 0, 46 }, +}) + +Name (PR0A, Package() { + // [SL0A]: PCI Express Slot 10 on 3D on PCI0 + Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, +}) + +Name (AR0A, Package() { + // [SL0A]: PCI Express Slot 10 on 3D on PCI0 + Package() { 0x0000FFFF, 0, 0, 16 }, + Package() { 0x0000FFFF, 1, 0, 17 }, + Package() { 0x0000FFFF, 2, 0, 18 }, + Package() { 0x0000FFFF, 3, 0, 19 }, +}) + +Name (AH0A, Package() { + // [SL0A]: PCI Express Slot 10 on 3D on PCI0 + Package() { 0x0000FFFF, 0, 0, 43 }, + Package() { 0x0000FFFF, 1, 0, 44 }, + Package() { 0x0000FFFF, 2, 0, 46 }, + Package() { 0x0000FFFF, 3, 0, 45 }, +}) + + + // PCI Express Port 1A on PCI0 +Device (BR1A) { + Name (_ADR, 0x00010000) + Method (_PRW, 0) { + Return (Package (0x02) {0x09, 0x04}) + } + Method (_PRT, 0) { + If (LEqual(PICM, Zero)) { + Return (PR01) + } + If (LEqual(APC1, One)) { + Return (AH01) + } + Return (AR01) + } + +} + +// PCI Express Port 1B on PCI0 +Device (BR1B) { + Name (_ADR, 0x00010001) + Method (_PRW, 0) { + Return (Package (0x02) {0x09, 0x04}) + } + Method (_PRT, 0) { + If (LEqual(PICM, Zero)) { + Return (PR02) + } + If (LEqual(APC1, One)) { + Return (AH02) + } + Return (AR02) + } + +} + +// PCI Express Port 2A on PCI0 +Device (BR2A) { + Name (_ADR, 0x00020000) + Method (_PRW, 0) { + Return (Package (0x02) {0x09, 0x04}) + } + Method (_PRT, 0) { + If (LEqual(PICM, Zero)) { + Return (PR03) + } + If (LEqual(APC1, One)) { + Return (AH03) + } + Return (AR03) + } + + + // CB3DMA on IOSF + Device (CB0I) { + Name (_ADR, 0x00000000) + } + + // CB3DMA on IOSF + Device (CB0J) { + Name (_ADR, 0x00000001) + } + + // CB3DMA on IOSF + Device (CB0K) { + Name (_ADR, 0x00000002) + } + + // CB3DMA on IOSF + Device (CB0L) { + Name (_ADR, 0x00000003) + } +} + +// PCI Express Port 2B on PCI0 +Device (BR2B) { + Name (_ADR, 0x00020001) + Method (_PRW, 0) { + Return (Package (0x02) {0x09, 0x04}) + } + Method (_PRT, 0) { + If (LEqual(PICM, Zero)) { + Return (PR04) + } + If (LEqual(APC1, One)) { + Return (AH04) + } + Return (AR04) + } + +} + +// PCI Express Port 2C on PCI0 +Device (BR2C) { + Name (_ADR, 0x00020002) + Method (_PRW, 0) { + Return (Package (0x02) {0x09, 0x04}) + } + Method (_PRT, 0) { + If (LEqual(PICM, Zero)) { + Return (PR05) + } + If (LEqual(APC1, One)) { + Return (AH05) + } + Return (AR05) + } + +} + +// PCI Express Port 2D on PCI0 +Device (BR2D) { + Name (_ADR, 0x00020003) + Method (_PRW, 0) { + Return (Package (0x02) {0x09, 0x04}) + } + Method (_PRT, 0) { + If (LEqual(PICM, Zero)) { + Return (PR06) + } + If (LEqual(APC1, One)) { + Return (AH06) + } + Return (AR06) + } + +} + +// PCI Express Port 3A on PCI0 +Device (BR3A) { + Name (_ADR, 0x00030000) + Method (_PRW, 0) { + Return (Package (0x02) {0x09, 0x04}) + } + Method (_PRT, 0) { + If (LEqual(PICM, Zero)) { + Return (PR07) + } + If (LEqual(APC1, One)) { + Return (AH07) + } + Return (AR07) + } + +} + +// PCI Express Port 3B on PCI0 +Device (BR3B) { + Name (_ADR, 0x00030001) + Method (_PRW, 0) { + Return (Package (0x02) {0x09, 0x04}) + } + Method (_PRT, 0) { + If (LEqual(PICM, Zero)) { + Return (PR08) + } + If (LEqual(APC1, One)) { + Return (AH08) + } + Return (AR08) + } + +} + +// PCI Express Port 3C on PCI0 +Device (BR3C) { + Name (_ADR, 0x00030002) + Method (_PRW, 0) { + Return (Package (0x02) {0x09, 0x04}) + } + Method (_PRT, 0) { + If (LEqual(PICM, Zero)) { + Return (PR09) + } + If (LEqual(APC1, One)) { + Return (AH09) + } + Return (AR09) + } + +} + +// PCI Express Port 3D on PCI0 +Device (BR3D) { + Name (_ADR, 0x00030003) + Method (_PRW, 0) { + Return (Package (0x02) {0x09, 0x04}) + } + Method (_PRT, 0) { + If (LEqual(PICM, Zero)) { + Return (PR0A) + } + If (LEqual(APC1, One)) { + Return (AH0A) + } + Return (AR0A) + } + +} diff --git a/arch/x86/include/asm/arch-broadwell-de/acpi/platform.asl b/arch/x86/include/asm/arch-broadwell-de/acpi/platform.asl new file mode 100644 index 0000000..cefe4f7 --- /dev/null +++ b/arch/x86/include/asm/arch-broadwell-de/acpi/platform.asl @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2016, Bin Meng <bmeng.cn(a)gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/acpi/statdef.asl> +#include <asm/arch/iomap.h> +#include <asm/arch/irq.h> + + +/* The APM port can be used for generating software SMIs */ + +OperationRegion (APMP, SystemIO, 0xb2, 2) +Field (APMP, ByteAcc, NoLock, Preserve) +{ + APMC, 8, // APM command + APMS, 8 // APM status +} + +/* Port 80 POST */ + +OperationRegion (POST, SystemIO, 0x80, 1) +Field (POST, ByteAcc, Lock, Preserve) +{ + DBG0, 8 +} + +Name(\APC1, Zero) // IIO IOAPIC + +Name(\PICM, Zero) // IOAPIC/8259 + +Method(_PIC, 1) +{ + Store(Arg0, PICM) +} + +/* The _PTS method (Prepare To Sleep) is called before the OS is + * entering a sleep state. The sleep state number is passed in Arg0 + */ + +Method(_PTS,1) +{ +} + +/* The _WAK method is called on system wakeup */ + +Method(_WAK,1) +{ + Return(Package(){0,0}) +} + +/* ACPI global NVS */ +//#include "irqlinks.asl" + +Scope (\_SB) +{ + #include "southcluster.asl" + + #include "pcie1.asl" +} diff --git a/arch/x86/include/asm/arch-broadwell-de/acpi/southcluster.asl b/arch/x86/include/asm/arch-broadwell-de/acpi/southcluster.asl new file mode 100644 index 0000000..d2b0ba9 --- /dev/null +++ b/arch/x86/include/asm/arch-broadwell-de/acpi/southcluster.asl @@ -0,0 +1,339 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/arch/iomap.h> +#include <asm/arch/irq.h> + +Name(_HID,EISAID("PNP0A08")) // PCIe +Name(_CID,EISAID("PNP0A03")) // PCI + +Name(_ADR, 0) +Name(_BBN, 0) + +Name (MCRS, ResourceTemplate() { + // Bus Numbers + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, 0x0000, 0x00fe, 0x0000, 0xff,,, PB00) + + // IO Region 0 + DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8,,, PI00) + + // PCI Config Space + Io (Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008) + + // IO Region 1 + DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, 0x0d00, 0xefff, 0x0000, 0xE300,,, PI01) + + // VGA memory (0xa0000-0xbffff) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x000a0000, 0x000bffff, 0x00000000, + 0x00020000,,, ASEG) + + // OPROM reserved (0xc0000-0xc3fff) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x000c0000, 0x000c3fff, 0x00000000, + 0x00004000,,, OPR0) + + // OPROM reserved (0xc4000-0xc7fff) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x000c4000, 0x000c7fff, 0x00000000, + 0x00004000,,, OPR1) + + // OPROM reserved (0xc8000-0xcbfff) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x000c8000, 0x000cbfff, 0x00000000, + 0x00004000,,, OPR2) + + // OPROM reserved (0xcc000-0xcffff) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x000cc000, 0x000cffff, 0x00000000, + 0x00004000,,, OPR3) + + // OPROM reserved (0xd0000-0xd3fff) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x000d0000, 0x000d3fff, 0x00000000, + 0x00004000,,, OPR4) + + // OPROM reserved (0xd4000-0xd7fff) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x000d4000, 0x000d7fff, 0x00000000, + 0x00004000,,, OPR5) + + // OPROM reserved (0xd8000-0xdbfff) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x000d8000, 0x000dbfff, 0x00000000, + 0x00004000,,, OPR6) + + // OPROM reserved (0xdc000-0xdffff) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x000dc000, 0x000dffff, 0x00000000, + 0x00004000,,, OPR7) + + // BIOS Extension (0xe0000-0xe3fff) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x000e0000, 0x000e3fff, 0x00000000, + 0x00004000,,, ESG0) + + // BIOS Extension (0xe4000-0xe7fff) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x000e4000, 0x000e7fff, 0x00000000, + 0x00004000,,, ESG1) + + // BIOS Extension (0xe8000-0xebfff) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x000e8000, 0x000ebfff, 0x00000000, + 0x00004000,,, ESG2) + + // BIOS Extension (0xec000-0xeffff) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x000ec000, 0x000effff, 0x00000000, + 0x00004000,,, ESG3) + + // System BIOS (0xf0000-0xfffff) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x000f0000, 0x000fffff, 0x00000000, + 0x00010000,,, FSEG) + + // PCI Memory Region (Top of memory-0xfeafffff) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x90000000, 0xFEAFFFFF, 0x00000000, + 0x6EB00000,,, PMEM) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0xfec00000, 0xfecfffff, 0x00000000, + 0x00100000,,, APIC) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0xfed00000, 0xfedfffff, 0x00000000, + 0x00100000,,, PCHR) + + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000380000000000, // Range Minimum + 0x0000383FFFFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000004000000000, // Length + ,,, AddressRangeMemory, TypeStatic) +}) + +Method (_CRS, 0, Serialized) { + Return (MCRS) +} + +/* Device Resource Consumption */ +Device (PDRC) { + Name (_HID, EISAID("PNP0C02")) + Name (_UID, 1) + + Name (PDRS, ResourceTemplate() { + Memory32Fixed(ReadWrite, ABORT_BASE_ADDRESS, ABORT_BASE_SIZE) + Memory32Fixed(ReadWrite, PSEG_BASE_ADDRESS, PSEG_BASE_SIZE) + Memory32Fixed(ReadWrite, IOXAPIC1_BASE_ADDRESS, IOXAPIC1_BASE_SIZE) + Memory32Fixed(ReadWrite, IOXAPIC2_BASE_ADDRESS, IOXAPIC2_BASE_SIZE) + Memory32Fixed(ReadWrite, PCH_BASE_ADDRESS, PCH_BASE_SIZE) + Memory32Fixed(ReadWrite, LXAPIC_BASE_ADDRESS, LXAPIC_BASE_SIZE) + Memory32Fixed(ReadWrite, FIRMWARE_BASE_ADDRESS, FIRMWARE_BASE_SIZE) + }) + + // Current Resource Settings + Method (_CRS, 0, Serialized) + { + Return(PDRS) + } +} + +Method (_OSC, 4) { + /* Check for proper GUID */ + If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) + { + /* Let OS control everything */ + Return (Arg3) + } + Else + { + /* Unrecognized UUID */ + CreateDWordField (Arg3, 0, CDW1) + Or (CDW1, 4, CDW1) + Return (Arg3) + } +} + +Name (PR00, Package() { + // [DMI0]: Legacy PCI Express Port 0 on PCI0 + Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + // [BR1A]: PCI Express Port 1A on PCI0 + // [BR1B]: PCI Express Port 1B on PCI0 + Package() { 0x0001FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + // [BR2A]: PCI Express Port 2A on PCI0 + // [BR2B]: PCI Express Port 2B on PCI0 + // [BR2C]: PCI Express Port 2C on PCI0 + // [BR2D]: PCI Express Port 2D on PCI0 + Package() { 0x0002FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + // [BR3A]: PCI Express Port 3A on PCI0 + // [BR3B]: PCI Express Port 3B on PCI0 + // [BR3C]: PCI Express Port 3C on PCI0 + // [BR3D]: PCI Express Port 3D on PCI0 + Package() { 0x0003FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + // [CB0A]: CB3DMA on PCI0 + // [CB0E]: CB3DMA on PCI0 + Package() { 0x0004FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + // [CB0B]: CB3DMA on PCI0 + // [CB0F]: CB3DMA on PCI0 + Package() { 0x0004FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + // [CB0C]: CB3DMA on PCI0 + // [CB0G]: CB3DMA on PCI0 + Package() { 0x0004FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + // [CB0D]: CB3DMA on PCI0 + // [CB0H]: CB3DMA on PCI0 + Package() { 0x0004FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, + // [IIM0]: IIOMISC on PCI0 + Package() { 0x0005FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x0005FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x0005FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x0005FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, + // [IID0]: IIODFX0 on PCI0 + Package() { 0x0006FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x0006FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x0006FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x0006FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, + // [XHCI]: xHCI controller 1 on PCH + Package() { 0x0014FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, + // [HECI]: ME HECI on PCH + // [IDER]: ME IDE redirect on PCH + Package() { 0x0016FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + // [HEC2]: ME HECI2 on PCH + // [MEKT]: MEKT on PCH + Package() { 0x0016FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + // [GBEM]: GbE Controller VPRO + Package() { 0x0019FFFF, 0, \_SB.PCI0.LPC0.LNKE, 0 }, + // [EHC2]: EHCI controller #2 on PCH + Package() { 0x001AFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + // [ALZA]: High definition Audio Controller + Package() { 0x001BFFFF, 0, \_SB.PCI0.LPC0.LNKG, 0 }, + // [RP01]: Pci Express Port 1 on PCH + // [RP05]: Pci Express Port 5 on PCH + Package() { 0x001CFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + // [RP02]: Pci Express Port 2 on PCH + // [RP06]: Pci Express Port 6 on PCH + Package() { 0x001CFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + // [RP03]: Pci Express Port 3 on PCH + // [RP07]: Pci Express Port 7 on PCH + Package() { 0x001CFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + // [RP04]: Pci Express Port 4 on PCH + // [RP08]: Pci Express Port 8 on ICH + Package() { 0x001CFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, + // [EHC1]: EHCI controller #1 on PCH + Package() { 0x001DFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + // [SAT1]: SATA controller 1 on PCH + // [SAT2]: SATA Host controller 2 on PCH + Package() { 0x001FFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + // [SMBS]: SMBus controller on PCH + // [TERM]: Thermal Subsystem on ICH + Package() { 0x001FFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, +}) + +Name (AR00, Package() { + // [DMI0]: Legacy PCI Express Port 0 on PCI0 + Package() { 0x0000FFFF, 0, 0, 47 }, + // [BR1A]: PCI Express Port 1A on PCI0 + // [BR1B]: PCI Express Port 1B on PCI0 + Package() { 0x0001FFFF, 0, 0, 47 }, + // [BR2A]: PCI Express Port 2A on PCI0 + // [BR2B]: PCI Express Port 2B on PCI0 + // [BR2C]: PCI Express Port 2C on PCI0 + // [BR2D]: PCI Express Port 2D on PCI0 + Package() { 0x0002FFFF, 0, 0, 47 }, + // [BR3A]: PCI Express Port 3A on PCI0 + // [BR3B]: PCI Express Port 3B on PCI0 + // [BR3C]: PCI Express Port 3C on PCI0 + // [BR3D]: PCI Express Port 3D on PCI0 + Package() { 0x0003FFFF, 0, 0, 47 }, + // [CB0A]: CB3DMA on PCI0 + // [CB0E]: CB3DMA on PCI0 + Package() { 0x0004FFFF, 0, 0, 31 }, + // [CB0B]: CB3DMA on PCI0 + // [CB0F]: CB3DMA on PCI0 + Package() { 0x0004FFFF, 1, 0, 39 }, + // [CB0C]: CB3DMA on PCI0 + // [CB0G]: CB3DMA on PCI0 + Package() { 0x0004FFFF, 2, 0, 31 }, + // [CB0D]: CB3DMA on PCI0 + // [CB0H]: CB3DMA on PCI0 + Package() { 0x0004FFFF, 3, 0, 39 }, + // [IIM0]: IIOMISC on PCI0 + Package() { 0x0005FFFF, 0, 0, 16 }, + Package() { 0x0005FFFF, 1, 0, 17 }, + Package() { 0x0005FFFF, 2, 0, 18 }, + Package() { 0x0005FFFF, 3, 0, 19 }, + // [IID0]: IIODFX0 on PCI0 + Package() { 0x0006FFFF, 0, 0, 16 }, + Package() { 0x0006FFFF, 1, 0, 17 }, + Package() { 0x0006FFFF, 2, 0, 18 }, + Package() { 0x0006FFFF, 3, 0, 19 }, + // [XHCI]: xHCI controller 1 on PCH + Package() { 0x0014FFFF, 3, 0, 19 }, + // [HECI]: ME HECI on PCH + // [IDER]: ME IDE redirect on PCH + Package() { 0x0016FFFF, 0, 0, 16 }, + // [HEC2]: ME HECI2 on PCH + // [MEKT]: MEKT on PCH + Package() { 0x0016FFFF, 1, 0, 17 }, + // [GBEM]: GbE Controller VPRO + Package() { 0x0019FFFF, 0, 0, 20 }, + // [EHC2]: EHCI controller #2 on PCH + Package() { 0x001AFFFF, 2, 0, 18 }, + // [ALZA]: High definition Audio Controller + Package() { 0x001BFFFF, 0, 0, 22 }, + // [RP01]: Pci Express Port 1 on PCH + // [RP05]: Pci Express Port 5 on PCH + Package() { 0x001CFFFF, 0, 0, 16 }, + // [RP02]: Pci Express Port 2 on PCH + // [RP06]: Pci Express Port 6 on PCH + Package() { 0x001CFFFF, 1, 0, 17 }, + // [RP03]: Pci Express Port 3 on PCH + // [RP07]: Pci Express Port 7 on PCH + Package() { 0x001CFFFF, 2, 0, 18 }, + // [RP04]: Pci Express Port 4 on PCH + // [RP08]: Pci Express Port 8 on ICH + Package() { 0x001CFFFF, 3, 0, 19 }, + // [EHC1]: EHCI controller #1 on PCH + Package() { 0x001DFFFF, 2, 0, 18 }, + // [SAT1]: SATA controller 1 on PCH + // [SAT2]: SATA Host controller 2 on PCH + Package() { 0x001FFFFF, 0, 0, 16 }, + // [SMBS]: SMBus controller on PCH + // [TERM]: Thermal Subsystem on ICH + Package() { 0x001FFFFF, 2, 0, 18 }, +}) + +// Socket 0 Root bridge +Method (_PRT, 0) { + If (LEqual(PICM, Zero)) { + Return (PR00) + } + Return (AR00) // If you disable the IOxAPIC in IIO, you should return AR00 +} + +#include "lpc.asl" diff --git a/arch/x86/include/asm/arch-broadwell-de/device.h b/arch/x86/include/asm/arch-broadwell-de/device.h new file mode 100644 index 0000000..be6df7c --- /dev/null +++ b/arch/x86/include/asm/arch-broadwell-de/device.h @@ -0,0 +1,116 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _BROADWELL_DE_DEVICE_H_ +#define _BROADWELL_DE_DEVICE_H_ + +#define BUS0 0 + +#define SOC_DEV 0 +#define SOC_FUNC 0 +#define SOC_DEVID 0x2F00 +#define SOC_DEVID_ES2 0x6F00 +#define SOC_DEV_FUNC PCI_DEVFN(SOC_DEV, SOC_FUNC) + +#define VTD_DEV 5 +#define VTD_FUNC 0 +#define VTD_DEVID 0x6f28 +#define VTD_DEV_FUNC PCI_DEVFN(VTD_DEV, VTD_FUNC) + +#define LPC_DEV 31 +#define LPC_FUNC 0 +#define LPC_DEVID 0x8C42 +#define LPC_DEVID_ES2 0x8C54 +#define LPC_DEV_FUNC PCI_DEVFN(LPC_DEV, LPC_FUNC) + +#define SATA_DEV 31 +#define SATA_FUNC 2 +#define AHCI_DEVID 0x8C02 +#define SATA_DEV_FUNC PCI_DEVFN(SATA_DEV, SATA_FUNC) + +#define SMBUS_DEV 31 +#define SMBUS_FUNC 3 +#define SMBUS_DEVID 0x8C22 +#define SMBUS_DEV_FUNC PCI_DEVFN(SMBUS_DEV, SMBUS_FUNC) + +#define SATA2_DEV 31 +#define SATA2_FUNC 5 +#define SATA2_DEV_FUNC PCI_DEVFN(SATA2_DEV, SATA2_FUNC) + +#define EHCI1_DEV 29 +#define EHCI1_FUNC 0 +#define EHCI1_DEVID 0x8C26 +#define EHCI1_DEV_FUNC PCI_DEVFN(EHCI_DEV1, EHCI_FUNC1) + +#define EHCI2_DEV 26 +#define EHCI2_FUNC 0 +#define EHCI2_DEVID 0x8C2D +#define EHCI2_DEV_FUNC PCI_DEVFN(EHCI_DEV2, EHCI_FUNC2) + +#define XHCI_DEV 20 +#define XHCI_FUNC 0 +#define XHCI_DEVID 0x8C31 +#define XHCI_FUS_REG 0xE0 +#define XHCI_FUNC_DISABLE (1 << 0) +#define XHCI_USB2PR_REG 0xD0 +#define XHCI_DEV_FUNC PCI_DEVFN(XHCI_DEV, XHCI_FUNC) + +#define GBE_DEV 25 +#define GBE_FUNC 0 +#define GBE_DEVID 0x8C33 +#define GBE_DEV_FUNC PCI_DEVFN(GBE_DEV, GBE_FUNC) + +#define ME_DEV 22 +#define ME_FUNC 0 +#define ME_DEVID 0x8C3A +#define ME_DEV_FUNC PCI_DEVFN(ME_DEV, ME_FUNC) + +#define HDA_DEV 27 +#define HDA_FUNC 0 +#define HDA_DEVID 0x8C20 +#define HDA_DEV_FUNC PCI_DEVFN(HDA_DEV, HDA_FUNC) + +#define PCIE_DEV 28 +#define PCIE_PORT1_DEV PCIE_DEV +#define PCIE_PORT1_FUNC 0 +#define PCIE_PORT1_DEVID 0x8C10 +#define PCIE_PORT2_DEV PCIE_DEV +#define PCIE_PORT2_FUNC 1 +#define PCIE_PORT2_DEVID 0x8C12 +#define PCIE_PORT3_DEV PCIE_DEV +#define PCIE_PORT3_FUNC 2 +#define PCIE_PORT3_DEVID 0x8C14 +#define PCIE_PORT4_DEV PCIE_DEV +#define PCIE_PORT4_FUNC 3 +#define PCIE_PORT4_DEVID 0x8C16 +#define PCIE_PORT5_DEV PCIE_DEV +#define PCIE_PORT5_FUNC 4 +#define PCIE_PORT5_DEVID 0x8C18 +#define PCIE_PORT6_DEV PCIE_DEV +#define PCIE_PORT6_FUNC 5 +#define PCIE_PORT6_DEVID 0x8C1A +#define PCIE_PORT7_DEV PCIE_DEV +#define PCIE_PORT7_FUNC 6 +#define PCIE_PORT7_DEVID 0x8C1C +#define PCIE_PORT8_DEV PCIE_DEV +#define PCIE_PORT8_FUNC 7 +#define PCIE_PORT8_DEVID 0x8C1E +#define PCIE_PORT1_DEV_FUNC PCI_DEVFN(PCIE_DEV, PCIE_PORT1_FUNC) +#define PCIE_PORT2_DEV_FUNC PCI_DEVFN(PCIE_DEV, PCIE_PORT2_FUNC) +#define PCIE_PORT3_DEV_FUNC PCI_DEVFN(PCIE_DEV, PCIE_PORT3_FUNC) +#define PCIE_PORT4_DEV_FUNC PCI_DEVFN(PCIE_DEV, PCIE_PORT4_FUNC) +#define PCIE_PORT5_DEV_FUNC PCI_DEVFN(PCIE_DEV, PCIE_PORT5_FUNC) +#define PCIE_PORT6_DEV_FUNC PCI_DEVFN(PCIE_DEV, PCIE_PORT6_FUNC) +#define PCIE_PORT7_DEV_FUNC PCI_DEVFN(PCIE_DEV, PCIE_PORT7_FUNC) +#define PCIE_PORT8_DEV_FUNC PCI_DEVFN(PCIE_DEV, PCIE_PORT8_FUNC) + +/* The SMM device is located on bus 0xff (QPI) */ +#define QPI_BUS 0xff +#define SMM_DEV 0x10 +#define SMM_FUNC 0x06 +#define SMM_DEV_FUNC PCI_DEVFN(SMM_DEV, SMM_FUNC) + +#endif /* _BROADWELL_DE_DEVICE_H_ */ diff --git a/arch/x86/include/asm/arch-broadwell-de/fsp/fsp_configs.h b/arch/x86/include/asm/arch-broadwell-de/fsp/fsp_configs.h new file mode 100644 index 0000000..139f8b5 --- /dev/null +++ b/arch/x86/include/asm/arch-broadwell-de/fsp/fsp_configs.h @@ -0,0 +1,134 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __FSP_CONFIGS_H__ +#define __FSP_CONFIGS_H__ + +#ifndef __ASSEMBLY__ +struct fsp_config_data { + struct fsp_cfg_common common; + struct upd_region fsp_upd; +}; + +struct fspinit_rtbuf { + struct common_buf common; /* FSP common runtime data structure */ +}; +#endif + +/* FSP user configuration settings */ + +#define PAM_RW_DMI_ONLY 0 +#define PAM_R_DRAM_W_DMI 1 +#define PAM_R_DMI_W_DRAM 2 +#define PAM_RW_DRAM_ONLY 3 + +#define PCH_PCI_ASPM_DISABLED 0 +#define PCH_PCI_ASPM_L0S 1 +#define PCH_PCI_ASPM_L1_ONLY 2 +#define PCH_PCI_ASPM_L0SL1 3 +#define PCH_PCI_ASPM_AUTO 4 + +#define PCIE_ASPM_DISABLED 0 +#define PCIE_ASPM_L1ONLY 2 +#define PCIE_ASPM_AUTO 7 + +#define MEM_CHANNEL_INTERLEAVE_AUTO 0 +#define MEM_CHANNEL_INTERLEAVE_1WAY 1 +#define MEM_CHANNEL_INTERLEAVE_2WAY 2 +#define MEM_CHANNEL_INTERLEAVE_3WAY 3 +#define MEM_CHANNEL_INTERLEAVE_4WAY 4 + +#define MEM_SCRAMBLING_DISABLED 0 +#define MEM_SCRAMBLING_ENABLED 1 +#define MEM_SCRAMBLING_AUTO 2 + +#define MEM_ECC_SUPPORT_DISABLED 0 +#define MEM_ECC_SUPPORT_ENABLED 1 +#define MEM_ECC_SUPPORT_AUTO 2 + +#define MEM_CA_PARITY_DISABLED 0 +#define MEM_CA_PARITY_ENABLED 1 +#define MEM_CA_PARITY_AUTO 2 + +#define MEM_POWER_SAVINGS_MODE_DISABLED 0 +#define MEM_POWER_SAVINGS_MODE_SLOW 1 +#define MEM_POWER_SAVINGS_MODE_FAST 2 +#define MEM_POWER_SAVINGS_MODE_APD 3 +#define MEM_POWER_SAVINGS_MODE_USER 4 +#define MEM_POWER_SAVINGS_MODE_AUTO 5 + +#define MEM_RANK_MARGIN_TOOL_DISABLED 0 +#define MEM_RANK_MARGIN_TOOL_ENABLED 1 +#define MEM_RANK_MARGIN_TOOL_AUTO 2 + +#define MEM_RANK_MULTIPLICATION_AUTO 0 +#define MEM_RANK_MULTIPLICATION_ENABLED 1 + +#define MEM_THERMAL_THROTTLING_DISABLED 0 +#define MEM_THERMAL_THROTTLING_OPENLOOP 1 +#define MEM_THERMAL_THROTTLING_CLOSEDLOOP 2 + +#define MEM_ELECTRICAL_THROTTLING_DISABLED 0 +#define MEM_ELECTRICAL_THROTTLING_ENABLED 1 +#define MEM_ELECTRICAL_THROTTLING_AUTO 2 + +#define MEM_DDR_MEMORY_TYPE_RDIMM_ONLY 0 +#define MEM_DDR_MEMORY_TYPE_UDIMM_ONLY 1 +#define MEM_DDR_MEMORY_TYPE_UDIMM_AND_RDIMM 2 + +#define MEM_MC0DT_OVERRIDE_50OHM 0 +#define MEM_MC0DT_OVERRIDE_100OHM 1 +#define MEM_MC0DT_OVERRIDE_AUTO 2 + +#define MEM_ADR_DISABLED 0 +#define MEM_ADR_ENABLED 1 +#define MEM_ADR_ENABLED_NVDIMM 2 + +#define MEM_RANK_INTERLEAVE_AUTO 0 +#define MEM_RANK_INTERLEAVE_1WAY 1 +#define MEM_RANK_INTERLEAVE_2WAY 2 +#define MEM_RANK_INTERLEAVE_4WAY 4 +#define MEM_RANK_INTERLEAVE_8WAY 8 + +#define MEM_PAGE_POLICY_OPEN 0 +#define MEM_PAGE_POLICY_CLOSED 1 +#define MEM_PAGE_POLICY_ADAPTIVE 2 +#define MEM_PAGE_POLICY_AUTO 3 + +#define MEM_REFRESH_MODE_ACC_SELF_REFRESH 0 +#define MEM_REFRESH_MODE_2X_REFRESH 1 + +#define MEM_SOCKET_INTERLEAVE_BELOW_4G_DISABLED 0 +#define MEM_SOCKET_INTERLEAVE_BELOW_4G_ENABLED 1 + +#define CONFIG_IOU1_PCI_PORT3_X4X4X4X4 0 +#define CONFIG_IOU1_PCI_PORT3_X4X4XXX8 1 +#define CONFIG_IOU1_PCI_PORT3_XXX8X4X4 2 +#define CONFIG_IOU1_PCI_PORT3_XXX8XXX8 3 +#define CONFIG_IOU1_PCI_PORT3_XXXXXX16 4 + +#define CONFIG_IOU2_PCI_PORT1_X4X4 0 +#define CONFIG_IOU2_PCI_PORT1_XXX8 1 + +#define SERIAL_PORT_BAUDRATE_9600 8 +#define SERIAL_PORT_BAUDRATE_19200 9 +#define SERIAL_PORT_BAUDRATE_38400 10 +#define SERIAL_PORT_BAUDRATE_57600 11 +#define SERIAL_PORT_BAUDRATE_115200 12 + +#define SERIAL_PORT_TYPE_NONE 0 +#define SERIAL_PORT_TYPE_IO 1 +#define SERIAL_PORT_TYPE_MMIO 2 + +#define DEBUG_OUTPUT_LEVEL_DISABLED 0 +#define DEBUG_OUTPUT_LEVEL_MINIMUM 1 +#define DEBUG_OUTPUT_LEVEL_NORMAL 2 +#define DEBUG_OUTPUT_LEVEL_MAXIMUM 3 + +#define MEM_FAST_BOOT_DISABLE 0 +#define MEM_FAST_BOOT_ENABLE 1 + +#endif /* __FSP_CONFIGS_H__ */ diff --git a/arch/x86/include/asm/arch-broadwell-de/fsp/fsp_vpd.h b/arch/x86/include/asm/arch-broadwell-de/fsp/fsp_vpd.h new file mode 100644 index 0000000..048c528 --- /dev/null +++ b/arch/x86/include/asm/arch-broadwell-de/fsp/fsp_vpd.h @@ -0,0 +1,116 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __FSP_VPD_H +#define __FSP_VPD_H + +struct __packed upd_region { + uint64_t signature; /**Offset 0x0000 **/ + uint64_t reserved; /**Offset 0x0008 **/ + uint8_t unusedUpdSpace0[16]; /**Offset 0x0010 **/ + uint8_t serialPortType; /**Offset 0x0020 **/ + uint32_t serialPortAddress; /**Offset 0x0021 **/ + uint8_t serialPortConfigure; /**Offset 0x0025 **/ + uint8_t serialPortBaudRate; /**Offset 0x0026 **/ + uint8_t serialPortControllerInit0; /**Offset 0x0027 **/ + uint8_t serialPortControllerInit1; /**Offset 0x0028 **/ + uint8_t configIOU1_PciPort3; /**Offset 0x0029 **/ + uint8_t configIOU2_PciPort1; /**Offset 0x002A **/ + uint8_t powerStateAfterG3; /**Offset 0x002B **/ + uint8_t pchPciPort1; /**Offset 0x002C **/ + uint8_t pchPciPort2; /**Offset 0x002D **/ + uint8_t pchPciPort3; /**Offset 0x002E **/ + uint8_t pchPciPort4; /**Offset 0x002F **/ + uint8_t pchPciPort5; /**Offset 0x0030 **/ + uint8_t pchPciPort6; /**Offset 0x0031 **/ + uint8_t pchPciPort7; /**Offset 0x0032 **/ + uint8_t pchPciPort8; /**Offset 0x0033 **/ + uint8_t hotPlug_PchPciPort1; /**Offset 0x0034 **/ + uint8_t hotPlug_PchPciPort2; /**Offset 0x0035 **/ + uint8_t hotPlug_PchPciPort3; /**Offset 0x0036 **/ + uint8_t hotPlug_PchPciPort4; /**Offset 0x0037 **/ + uint8_t hotPlug_PchPciPort5; /**Offset 0x0038 **/ + uint8_t hotPlug_PchPciPort6; /**Offset 0x0039 **/ + uint8_t hotPlug_PchPciPort7; /**Offset 0x003A **/ + uint8_t hotPlug_PchPciPort8; /**Offset 0x003B **/ + uint8_t ehci1Enable; /**Offset 0x003C **/ + uint8_t ehci2Enable; /**Offset 0x003D **/ + uint8_t hyperThreading; /**Offset 0x003E **/ + uint8_t debugOutputLevel; /**Offset 0x003F **/ + uint8_t tcoTimerHaltLock; /**Offset 0x0040 **/ + uint8_t turboMode; /**Offset 0x0041 **/ + uint8_t bootPerfMode; /**Offset 0x0042 **/ + uint8_t pciePort1aAspm; /**Offset 0x0043 **/ + uint8_t pciePort1bAspm; /**Offset 0x0044 **/ + uint8_t pciePort3aAspm; /**Offset 0x0045 **/ + uint8_t pciePort3bAspm; /**Offset 0x0046 **/ + uint8_t pciePort3cAspm; /**Offset 0x0047 **/ + uint8_t pciePort3dAspm; /**Offset 0x0048 **/ + uint8_t pchPciePort1Aspm; /**Offset 0x0049 **/ + uint8_t pchPciePort2Aspm; /**Offset 0x004A **/ + uint8_t pchPciePort3Aspm; /**Offset 0x004B **/ + uint8_t pchPciePort4Aspm; /**Offset 0x004C **/ + uint8_t pchPciePort5Aspm; /**Offset 0x004D **/ + uint8_t pchPciePort6Aspm; /**Offset 0x004E **/ + uint8_t pchPciePort7Aspm; /**Offset 0x004F **/ + uint8_t pchPciePort8Aspm; /**Offset 0x0050 **/ + uint8_t dFXEnable; /**Offset 0x0051 **/ + uint8_t thermalDeviceEnable; /**Offset 0x0052 **/ + uint8_t unusedUpdSpace1[88]; /**Offset 0x0053 **/ + uint8_t memEccSupport; /**Offset 0x00AB **/ + uint8_t memDdrMemoryType; /**Offset 0x00AC **/ + uint8_t memRankMultiplication; /**Offset 0x00AD **/ + uint8_t memRankMarginTool; /**Offset 0x00AE **/ + uint8_t memScrambling; /**Offset 0x00AF **/ + uint8_t memRefreshMode; /**Offset 0x00B0 **/ + uint8_t memMcOdtOverride; /**Offset 0x00B1 **/ + uint8_t memCAParity; /**Offset 0x00B2 **/ + uint8_t memThermalThrottling; /**Offset 0x00B3 **/ + uint8_t memPowerSavingsMode; /**Offset 0x00B4 **/ + uint8_t memElectricalThrottling; /**Offset 0x00B5 **/ + uint8_t memPagePolicy; /**Offset 0x00B6 **/ + uint8_t memSocketInterleaveBelow4G; /**Offset 0x00B7 **/ + uint8_t memChannelInterleave; /**Offset 0x00B8 **/ + uint8_t memRankInterleave; /**Offset 0x00B9 **/ + uint8_t memDownEnable; /**Offset 0x00BA **/ + uint32_t memDownCh0Dimm0SpdPtr; /**Offset 0x00BB **/ + uint32_t memDownCh0Dimm1SpdPtr; /**Offset 0x00BF **/ + uint32_t memDownCh1Dimm0SpdPtr; /**Offset 0x00C3 **/ + uint32_t memDownCh1Dimm1SpdPtr; /**Offset 0x00C7 **/ + uint8_t memFastBoot; /**Offset 0x00CB **/ + uint8_t pam0_hienable; /**Offset 0x00CC **/ + uint8_t pam1_loenable; /**Offset 0x00CD **/ + uint8_t pam1_hienable; /**Offset 0x00CE **/ + uint8_t pam2_loenable; /**Offset 0x00CF **/ + uint8_t pam2_hienable; /**Offset 0x00D0 **/ + uint8_t pam3_loenable; /**Offset 0x00D1 **/ + uint8_t pam3_hienable; /**Offset 0x00D2 **/ + uint8_t pam4_loenable; /**Offset 0x00D3 **/ + uint8_t pam4_hienable; /**Offset 0x00D4 **/ + uint8_t pam5_loenable; /**Offset 0x00D5 **/ + uint8_t pam5_hienable; /**Offset 0x00D6 **/ + uint8_t pam6_loenable; /**Offset 0x00D7 **/ + uint8_t pam6_hienable; /**Offset 0x00D8 **/ + uint8_t memAdr; /**Offset 0x00D9 **/ + uint8_t memAdrResumePath; /**Offset 0x00DA **/ + uint8_t memBlockScTrafficOnAdr; /**Offset 0x00DB **/ + uint16_t memPlatformReleaseAdrClampsPort;/**Offset 0x00DC **/ + uint32_t memPlatformReleaseAdrClampsAnd; /**Offset 0x00DE **/ + uint32_t memPlatformReleaseAdrClampsOr; /**Offset 0x00E2 **/ + uint8_t unusedUpdSpace2[24]; /**Offset 0x00E6 **/ + uint16_t terminator; /**Offset 0x00FE **/ +}; + +#define VPD_IMAGE_ID 0x5F45442D5844425F /* '_BDX-DE_' */ + +struct __packed vpd_region { + uint64_t sign; /* Offset 0x0000 */ + uint32_t img_rev; /* Offset 0x0008 */ + uint32_t upd_offset; /* Offset 0x000c */ + uint8_t unused[16]; /* Offset 0x0010 */ + uint32_t fsp_res_memlen; /* Offset 0x0020 */ +}; +#endif diff --git a/arch/x86/include/asm/arch-broadwell-de/global_nvs.h b/arch/x86/include/asm/arch-broadwell-de/global_nvs.h new file mode 100644 index 0000000..5097cc1 --- /dev/null +++ b/arch/x86/include/asm/arch-broadwell-de/global_nvs.h @@ -0,0 +1,21 @@ +/* + * Copyright (C) 2016, Bin Meng <bmeng.cn(a)gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _BROADWELL_DE_GLOBAL_NVS_H_ +#define _BROADWELL_DE_GLOBAL_NVS_H_ + +struct __packed acpi_global_nvs { + u8 pcnt; /* processor count */ + u8 iuart_en; /* internal UART enabled */ + + /* + * Add padding so sizeof(struct acpi_global_nvs) == 0x100. + * This must match the size defined in the global_nvs.asl. + */ + u8 rsvd[254]; +}; + +#endif /* _BROADWELL_DE_GLOBAL_NVS_H_ */ diff --git a/arch/x86/include/asm/arch-broadwell-de/iomap.h b/arch/x86/include/asm/arch-broadwell-de/iomap.h new file mode 100644 index 0000000..80f2b9d --- /dev/null +++ b/arch/x86/include/asm/arch-broadwell-de/iomap.h @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _BROADWELL_DE_IOMAP_H_ +#define _BROADWELL_DE_IOMAP_H_ + +/* Memory Mapped IO bases */ + +/* PCI Configuration Space */ +#define MCFG_BASE_ADDRESS CONFIG_PCIE_ECAM_BASE //CONFIG_MMCONF_BASE_ADDRESS in Coreboot +#define MCFG_BASE_SIZE 0x10000000 + +/* Transactions in this range will abort */ +#define ABORT_BASE_ADDRESS 0xfeb00000 +#define ABORT_BASE_SIZE 0x00010000 + +/* PSEG */ +#define PSEG_BASE_ADDRESS 0xfeb80000 +#define PSEG_BASE_SIZE 0x00080000 + +/* IOxAPIC */ +#define IOXAPIC1_BASE_ADDRESS 0xfec00000 +#define IOXAPIC1_BASE_SIZE 0x00100000 +#define IOXAPIC2_BASE_ADDRESS 0xfec01000 +#define IOXAPIC2_BASE_SIZE 0x00100000 + +/* PCH (HPET/LT/TPM/Others) */ +#define PCH_BASE_ADDRESS 0xfed00000 +#define PCH_BASE_SIZE 0x00100000 + +/* Local XAPIC */ +#define LXAPIC_BASE_ADDRESS 0xfee00000 +#define LXAPIC_BASE_SIZE 0x00100000 + +/* High Performance Event Timer */ +#define HPET_BASE_ADDRESS 0xfed00000 +#define HPET_BASE_SIZE 0x400 + +/* Firmware */ +#define FIRMWARE_BASE_ADDRESS 0xff000000 +#define FIRMWARE_BASE_SIZE 0x01000000 + +/* + * IO Port bases. + */ + +/* ACPI Base Address */ +#define ACPI_BASE_ADDRESS 0x400 +#define ACPI_BASE_SIZE 0x80 + +/* GPIO Base Address */ +#define GPIO_BASE_ADDRESS 0x500 +#define GPIO_BASE_SIZE 0x80 + +#endif /* _BROADWELL_DE_IOMAP_H_ */ diff --git a/arch/x86/include/asm/arch-broadwell-de/irq.h b/arch/x86/include/asm/arch-broadwell-de/irq.h new file mode 100644 index 0000000..ac6f689 --- /dev/null +++ b/arch/x86/include/asm/arch-broadwell-de/irq.h @@ -0,0 +1,88 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _BROADWELL_DE_IRQ_H_ +#define _BROADWELL_DE_IRQ_H_ + +#define PIRQA_APIC_IRQ 16 +#define PIRQB_APIC_IRQ 17 +#define PIRQC_APIC_IRQ 18 +#define PIRQD_APIC_IRQ 19 +#define PIRQE_APIC_IRQ 20 +#define PIRQF_APIC_IRQ 21 +#define PIRQG_APIC_IRQ 22 +#define PIRQH_APIC_IRQ 23 + +/* PIC IRQ settings. */ +#define PIRQ_PIC_IRQ3 0x3 +#define PIRQ_PIC_IRQ4 0x4 +#define PIRQ_PIC_IRQ5 0x5 +#define PIRQ_PIC_IRQ6 0x6 +#define PIRQ_PIC_IRQ7 0x7 +#define PIRQ_PIC_IRQ9 0x9 +#define PIRQ_PIC_IRQ10 0xa +#define PIRQ_PIC_IRQ11 0xb +#define PIRQ_PIC_IRQ12 0xc +#define PIRQ_PIC_IRQ14 0xe +#define PIRQ_PIC_IRQ15 0xf +#define PIRQ_PIC_IRQDISABLE 0x80 +#define PIRQ_PIC_UNKNOWN_UNUSED 0xff + +/* Overloaded term, but these values determine the per device route. */ +#define PIRQA 0 +#define PIRQB 1 +#define PIRQC 2 +#define PIRQD 3 +#define PIRQE 4 +#define PIRQF 5 +#define PIRQG 6 +#define PIRQH 7 + +#define ACPI_CNTL_OFFSET 0x44 +#define SCIS_MASK 0x07 +#define SCIS_IRQ9 0x00 +#define SCIS_IRQ10 0x01 +#define SCIS_IRQ11 0x02 +#define SCIS_IRQ20 0x04 +#define SCIS_IRQ21 0x05 +#define SCIS_IRQ22 0x06 +#define SCIS_IRQ23 0x07 + +/* In each mainboard directory there should exist a header file irqroute.h that + * defines the PCI_DEV_PIRQ_ROUTES and PIRQ_PIC_ROUTES macros which + * consist of PCI_DEV_PIRQ_ROUTE and PIRQ_PIC entries. */ + +#if !defined(__ASSEMBLER__) && !defined(__ACPI__) +#include <stdint.h> + +#define NUM_OF_PCI_DEVS 32 +#define NUM_PIRQS 8 + +struct broadwell_de_irq_route { + /* Per device configuration. */ + uint16_t pcidev[NUM_OF_PCI_DEVS]; + /* Route path for each internal PIRQx in PIC mode. */ + uint8_t pic[NUM_PIRQS]; +}; + +extern const struct broadwell_de_irq_route global_broadwell_de_irq_route; + +#define DEFINE_IRQ_ROUTES \ + const struct broadwell_de_irq_route global_broadwell_de_irq_route = { \ + .pcidev = { PCI_DEV_PIRQ_ROUTES, }, \ + .pic = { PIRQ_PIC_ROUTES, }, \ + } + +#define PCI_DEV_PIRQ_ROUTE(dev_, a_, b_, c_, d_) \ + [dev_] = ((PIRQ ## d_) << 12) | ((PIRQ ## c_) << 8) | \ + ((PIRQ ## b_) << 4) | ((PIRQ ## a_) << 0) + +#define PIRQ_PIC(pirq_, pic_irq_) \ + [PIRQ ## pirq_] = PIRQ_PIC_IRQ ## pic_irq_ + +#endif /* !defined(__ASSEMBLER__) && !defined(__ACPI__) */ + +#endif /* _BROADWELL_DE_IRQ_H_ */ diff --git a/board/prodrive/Kconfig b/board/prodrive/Kconfig new file mode 100644 index 0000000..4828b65 --- /dev/null +++ b/board/prodrive/Kconfig @@ -0,0 +1,23 @@ +# +# Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +if VENDOR_PRODRIVE + +choice + prompt "Mainboard model" + optional + +config TARGET_POSEIDON + bool "Poseidon" + help + This target is for Prodrive Poseidon. + Embedded board hosting x86 Broadwell-DE Xeon processor. + +endchoice + +source "board/prodrive/poseidon/Kconfig" + +endif diff --git a/board/prodrive/poseidon/.gitignore b/board/prodrive/poseidon/.gitignore new file mode 100644 index 0000000..c782010 --- /dev/null +++ b/board/prodrive/poseidon/.gitignore @@ -0,0 +1,5 @@ +dsdt.aml +dsdt.asl.tmp +dsdt.c + +!*.bin \ No newline at end of file diff --git a/board/prodrive/poseidon/Kconfig b/board/prodrive/poseidon/Kconfig new file mode 100644 index 0000000..4fa9fef --- /dev/null +++ b/board/prodrive/poseidon/Kconfig @@ -0,0 +1,45 @@ +# +# Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> +# +# SPDX-License-Identifier: GPL-2.0+ + +if TARGET_POSEIDON + +config SYS_BOARD + default "poseidon" + +config SYS_VENDOR + default "prodrive" + +config SYS_SOC + default "broadwell-de" + +config SYS_CONFIG_NAME + default "poseidon" + +config SYS_TEXT_BASE + default 0xffdb0000 + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select X86_RESET_VECTOR + select INTEL_BROADWELL_DE + select BOARD_ROMSIZE_KB_16384 + select SPI_FLASH_MACRONIX + +config PCIE_ECAM_BASE + default 0x80000000 + +config SYS_CAR_ADDR + hex + default 0xfef00000 + +config SYS_CAR_SIZE + hex + default 0x40000 + +config SYS_PROMPT + string + default "Poseidon => " + +endif diff --git a/board/prodrive/poseidon/MAINTAINERS b/board/prodrive/poseidon/MAINTAINERS new file mode 100644 index 0000000..c21f2e6 --- /dev/null +++ b/board/prodrive/poseidon/MAINTAINERS @@ -0,0 +1,6 @@ +Prodrive Poseidon x86 Broadwell-DE +M: Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> +S: Maintained +F: board/prodrive/poseidon +F: include/configs/poseidon.h +F: configs/poseidon_defconfig diff --git a/board/prodrive/poseidon/Makefile b/board/prodrive/poseidon/Makefile new file mode 100644 index 0000000..83fd499 --- /dev/null +++ b/board/prodrive/poseidon/Makefile @@ -0,0 +1,8 @@ +# +# Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += poseidon.o start.o +obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o diff --git a/board/prodrive/poseidon/acpi/mainboard.asl b/board/prodrive/poseidon/acpi/mainboard.asl new file mode 100644 index 0000000..4cc8ad3 --- /dev/null +++ b/board/prodrive/poseidon/acpi/mainboard.asl @@ -0,0 +1,11 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* Power Button */ +Device (PWRB) +{ + Name(_HID, EISAID("PNP0C0C")) +} diff --git a/board/prodrive/poseidon/dsdt.asl b/board/prodrive/poseidon/dsdt.asl new file mode 100644 index 0000000..951f320 --- /dev/null +++ b/board/prodrive/poseidon/dsdt.asl @@ -0,0 +1,187 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x20110725) +{ + /* platform specific */ + #include <asm/arch/acpi/platform.asl> + + Name(_S0, Package() { 0x00, 0x00, 0x00, 0x00 }) + Name(_S5, Package() { 0x07, 0x00, 0x00, 0x00 }) + + Scope (\_SB) + { + Device (PCI0) + { + #include <asm/arch/acpi/southcluster.asl> + #include <asm/arch/acpi/pcie1.asl> + } + + Name (PRUN, Package() { + Package() { 0x0008FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x0008FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x0008FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x0008FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, + + Package() { 0x0009FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x0009FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x0009FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x0009FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, + + Package() { 0x000AFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x000AFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x000AFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x000AFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, + + Package() { 0x000BFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x000BFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x000BFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x000BFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, + + Package() { 0x000CFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x000CFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x000CFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x000CFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, + + Package() { 0x000DFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x000DFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x000DFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x000DFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, + + Package() { 0x000EFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x000EFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x000EFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x000EFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, + + Package() { 0x000FFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x000FFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x000FFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x000FFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, + + Package() { 0x0010FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x0010FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x0010FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x0010FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, + + Package() { 0x0011FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x0011FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x0011FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x0011FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, + + Package() { 0x0012FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x0012FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x0012FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x0012FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, + + Package() { 0x0013FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 }, + Package() { 0x0013FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 }, + Package() { 0x0013FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 }, + Package() { 0x0013FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 }, + }) + + Name (ARUN, Package() { + Package() { 0x0008FFFF, 0, 0, 16 }, + Package() { 0x0008FFFF, 1, 0, 17 }, + Package() { 0x0008FFFF, 2, 0, 18 }, + Package() { 0x0008FFFF, 3, 0, 19 }, + + Package() { 0x0009FFFF, 0, 0, 16 }, + Package() { 0x0009FFFF, 1, 0, 17 }, + Package() { 0x0009FFFF, 2, 0, 18 }, + Package() { 0x0009FFFF, 3, 0, 19 }, + + Package() { 0x000AFFFF, 0, 0, 16 }, + Package() { 0x000AFFFF, 1, 0, 17 }, + Package() { 0x000AFFFF, 2, 0, 18 }, + Package() { 0x000AFFFF, 3, 0, 19 }, + + Package() { 0x000BFFFF, 0, 0, 16 }, + Package() { 0x000BFFFF, 1, 0, 17 }, + Package() { 0x000BFFFF, 2, 0, 18 }, + Package() { 0x000BFFFF, 3, 0, 19 }, + + Package() { 0x000CFFFF, 0, 0, 16 }, + Package() { 0x000CFFFF, 1, 0, 17 }, + Package() { 0x000CFFFF, 2, 0, 18 }, + Package() { 0x000CFFFF, 3, 0, 19 }, + + Package() { 0x000DFFFF, 0, 0, 16 }, + Package() { 0x000DFFFF, 1, 0, 17 }, + Package() { 0x000DFFFF, 2, 0, 18 }, + Package() { 0x000DFFFF, 3, 0, 19 }, + + Package() { 0x000EFFFF, 0, 0, 16 }, + Package() { 0x000EFFFF, 1, 0, 17 }, + Package() { 0x000EFFFF, 2, 0, 18 }, + Package() { 0x000EFFFF, 3, 0, 19 }, + + Package() { 0x000FFFFF, 0, 0, 16 }, + Package() { 0x000FFFFF, 1, 0, 17 }, + Package() { 0x000FFFFF, 2, 0, 18 }, + Package() { 0x000FFFFF, 3, 0, 19 }, + + Package() { 0x0010FFFF, 0, 0, 16 }, + Package() { 0x0010FFFF, 1, 0, 17 }, + Package() { 0x0010FFFF, 2, 0, 18 }, + Package() { 0x0010FFFF, 3, 0, 19 }, + + Package() { 0x0011FFFF, 0, 0, 16 }, + Package() { 0x0011FFFF, 1, 0, 17 }, + Package() { 0x0011FFFF, 2, 0, 18 }, + Package() { 0x0011FFFF, 3, 0, 19 }, + + Package() { 0x0012FFFF, 0, 0, 16 }, + Package() { 0x0012FFFF, 1, 0, 17 }, + Package() { 0x0012FFFF, 2, 0, 18 }, + Package() { 0x0012FFFF, 3, 0, 19 }, + + Package() { 0x0013FFFF, 0, 0, 16 }, + Package() { 0x0013FFFF, 1, 0, 17 }, + Package() { 0x0013FFFF, 2, 0, 18 }, + Package() { 0x0013FFFF, 3, 0, 19 }, + }) + + Device (UNC0) + { + Name (_HID, EisaId ("PNP0A03")) + Name (_UID, 0x3F) + Method (_BBN, 0, NotSerialized) + { + Return (0xff) + } + + Name (_ADR, 0x00) + Method (_STA, 0, NotSerialized) + { + Return (0xf) + } + + Name (_CRS, ResourceTemplate () + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x00FF, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0001, // Length + ,, ) + }) + + Method (_PRT, 0, NotSerialized) + { + If (LEqual (PICM, Zero)) + { + Return (PRUN) + } + + Return (ARUN) + } + } + } + + /* board specific */ + #include "acpi/mainboard.asl" +} diff --git a/configs/poseidon_defconfig b/configs/poseidon_defconfig new file mode 100644 index 0000000..accf0a1 --- /dev/null +++ b/configs/poseidon_defconfig @@ -0,0 +1,70 @@ +CONFIG_X86=y +CONFIG_SYS_CONFIG_NAME="poseidon" +CONFIG_VENDOR_PRODRIVE=y +CONFIG_DEFAULT_DEVICE_TREE="poseidon" +CONFIG_TARGET_POSEIDON=y +CONFIG_FSP_MEMORY_DOWN=y +CONFIG_HAVE_SPD=y +CONFIG_INTERNAL_UART=y +CONFIG_SMP=y +#CONFIG_HAVE_VGA_BIOS=y +#CONFIG_VGA_BIOS_ADDR=0xfffd0001 +#CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +#CONFIG_FRAMEBUFFER_VESA_MODE_11A=y +CONFIG_GENERATE_PIRQ_TABLE=y +#CONFIG_GENERATE_MP_TABLE=y +CONFIG_GENERATE_ACPI_TABLE=y +CONFIG_HAVE_ACPI_RESUME=y +CONFIG_SEABIOS=y +CONFIG_FIT=y +CONFIG_BOOTSTAGE=y +CONFIG_BOOTSTAGE_REPORT=y +#CONFIG_USE_BOOTARGS=y +#CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_CPU=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_PART=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_PING=y +CONFIG_CMD_TIME=y +CONFIG_CMD_BOOTSTAGE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_CPU=y +CONFIG_USB_STORAGE=y +CONFIG_USB_KEYBOARD=y +CONFIG_CONSOLE_SCROLL_LINES=5 +#CONFIG_CMD_IMLS=n +CONFIG_SYS_NS16550=y +#CONFIG_CMD_TPM=y +#CONFIG_CMD_TPM_TEST=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_DM_ETH=y +CONFIG_E1000=y +CONFIG_DM_PCI=y +#CONFIG_DM_RTC=y +CONFIG_TIMER=y +#CONFIG_TPM_TIS_LPC=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_UHCI_HCD=y +#CONFIG_DM_VIDEO=y +CONFIG_USE_PRIVATE_LIBGCC=y +#CONFIG_TPM=y +CONFIG_OF_CONTROL=y +CONFIG_I8259_PIC=y +CONFIG_I8254_TIMER=y diff --git a/include/configs/poseidon.h b/include/configs/poseidon.h new file mode 100644 index 0000000..739ca8e --- /dev/null +++ b/include/configs/poseidon.h @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2017, Vincenzo Bove <vincenzo.bove(a)prodrive-technologies.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/x86-common.h> + +#define CONFIG_SYS_MONITOR_LEN (1 << 20) + +#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd\0" \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#define CONFIG_USB_ETHER_ASIX88179 + +#define CONFIG_SCSI_AHCI +#define CONFIG_SCSI_DEV_LIST \ + {PCI_VENDOR_ID_INTEL, 0x8c02} + +#undef CONFIG_ENV_IS_IN_SPI_FLASH + +#define DEBUG + +#endif /* __CONFIG_H */ diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 994214e..e415f36 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -19,16 +19,20 @@ #define CONFIG_PHYSMEM #define CONFIG_DISPLAY_BOARDINFO_LATE #define CONFIG_LAST_STAGE_INIT -#define CONFIG_NR_DRAM_BANKS 8 +#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_LMB +#define CONFIG_LZO #undef CONFIG_ZLIB #undef CONFIG_GZIP #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* SATA AHCI storage */ + +#define CONFIG_SCSI_AHCI #ifdef CONFIG_SCSI_AHCI +#define CONFIG_LIBATA #define CONFIG_LBA48 #define CONFIG_SYS_64BIT_LBA @@ -58,6 +62,8 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_AUTO_COMPLETE +#define CONFIG_SUPPORT_VFAT + /*----------------------------------------------------------------------- * Command line configuration. */ @@ -74,11 +80,19 @@ */ #define CONFIG_SYS_LONGHELP #define CONFIG_SYS_CBSIZE 512 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + \ + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_MEMTEST_START 0x00100000 #define CONFIG_SYS_MEMTEST_END 0x01000000 #define CONFIG_SYS_LOAD_ADDR 0x20000000 +/* Fat write configuration */ +#define CONFIG_FAT_WRITE + /*----------------------------------------------------------------------- * CPU Features */ @@ -98,6 +112,7 @@ /*----------------------------------------------------------------------- * Environment configuration */ +#define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SIZE 0x01000 /*----------------------------------------------------------------------- diff --git a/include/fdtdec.h b/include/fdtdec.h index 4afb9ac..ea8bff4 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -150,6 +150,7 @@ enum fdt_compat_id { COMPAT_INTEL_BAYTRAIL_FSP, /* Intel Bay Trail FSP */ COMPAT_INTEL_BAYTRAIL_FSP_MDP, /* Intel FSP memory-down params */ COMPAT_INTEL_IVYBRIDGE_FSP, /* Intel Ivy Bridge FSP */ + COMPAT_INTEL_BROADWELL_DE_FSP, /* Intel Broadwell-DE FSP */ COMPAT_SUNXI_NAND, /* SUNXI NAND controller */ COMPAT_ALTERA_SOCFPGA_CLK, /* SoCFPGA Clock initialization */ COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE, /* SoCFPGA pinctrl-single */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c index df9d9ae..e1a2f17 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -62,6 +62,7 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"), COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"), COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"), + COMPAT(INTEL_BROADWELL_DE_FSP, "intel,broadwell-de-fsp"), COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"), COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"), COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"), diff --git a/tools/binman/etype/intel_spd.py b/tools/binman/etype/intel_spd.py new file mode 100644 index 0000000..028c98f --- /dev/null +++ b/tools/binman/etype/intel_spd.py @@ -0,0 +1,14 @@ +# Copyright (c) 2016 Google, Inc +# Written by Simon Glass <sjg(a)chromium.org> +# +# SPDX-License-Identifier: GPL-2.0+ +# +# Entry-type module for Intel Management Engine binary blob +# + +from entry import Entry +from blob import Entry_blob + +class Entry_intel_spd(Entry_blob): + def __init__(self, image, etype, node): + Entry_blob.__init__(self, image, etype, node) \ No newline at end of file -- 2.9.2.windows.1

3 3