December 2018 - U-Boot

[U-Boot] [PULL] MIPS updates for v2019.01
by Daniel Schwierzeck 23 Dec '18

23 Dec '18

Hi Tom, though it's a little big for rc2, it's beside some bugfixes almost only new code which is isolated to drivers and MIPS. The patches were on the list for several weeks/months but the review process took a bit longer. Please consider pulling, thanks. https://travis-ci.org/danielschwierzeck/u-boot/builds/470042933 The following changes since commit 1f2e948d6d53f77a2ddb2dde3531b0d5bc2815ad: Prepare v2019.01-rc2 (2018-12-17 20:25:24 -0500) are available in the Git repository at: git://git.denx.de/u-boot-mips.git tags/mips-updates-for-2019.11 for you to fetch changes up to 25c7de2255128743fcbe436b6f3b17a70d0cdd82: mips: jz47xx: Add Creator CI20 platform (2018-12-19 15:23:02 +0100) ---------------------------------------------------------------- - mips: fix some DTC warnings - bmips: bcm6348: add DMA driver - bmips: bcm5348: add ethernet driver - bmips: bcm6368: add ethernet driver - mips: mt76xx: fix DMA problems, disable CONFIG_OF_EMBED - mips: mscc: add support for Microsemi Ocelot and Luton SoCs - mips: mscc: add support for Ocelot and Luton evaluation boards - mips: jz47xx: add basic support for Ingenic JZ4780 SoC - mips: jz47xx: add support for Imgtec Creator CI20 board ---------------------------------------------------------------- Daniel Schwierzeck (3): mips: ath79: fix DTC warnings mips: xilfpga: fix DTC warnings MIPS: remove local_irq_[save|restore] from CP0 macros Gregory CLEMENT (9): DW SPI: Allow to overload the management of the external CS pinctrl: mscc: Add gpio and pinctrl driver for MSCC MIPS SoCs (VcoreIII based) gpio: mscc-bitbang-spi: Add a simple gpio driver for bitbgang spi MIPS: move create_tlb() in an proper header: mipsregs.h MIPS: Allow to prefetch and lock instructions into cache MSCC: add support for Ocelot SoCs MSCC: add support for Luton SoCs MSCC: add board support for the Ocelots based evaluation boards MSCC: add board support for the Luton based evaluation board Paul Burton (5): misc: Add JZ47xx efuse driver mmc: Add JZ47xx SD/MMC controller driver mips: Add SPL header mips: jz47xx: Add JZ4780 SoC support mips: jz47xx: Add Creator CI20 platform Stefan Roese (2): mips: mt76xx: Flush d-cache in arch_misc_init() to solve d-cache issues mips: mt76xx: linkit/gardena: Don't use CONFIG_OF_EMBED Álvaro Fernández Rojas (28): dma: add bcm6348-iudma support bmips: bcm6338: add bcm6348-iudma support bmips: bcm6348: add bcm6348-iudma support bmips: bcm6358: add bcm6348-iudma support bmips: bcm6368: add bcm6348-iudma support bmips: bcm6328: add bcm6348-iudma support bmips: bcm6362: add bcm6348-iudma support bmips: bcm63268: add bcm6348-iudma support bmips: bcm6318: add bcm6348-iudma support net: add support for bcm6348-enet bmips: bcm6338: add support for bcm6348-enet bmips: enable f@st1704 enet support bmips: bcm6348: add support for bcm6348-enet bmips: enable ct-5361 enet support bmips: bcm6358: add support for bcm6348-enet bmips: enable hg556a enet support bmips: enable nb4-ser enet support net: add support for bcm6368-enet bmips: bcm6368: add support for bcm6368-enet bmips: enable wap-5813n enet support bmips: bcm6328: add support for bcm6368-enet bmips: enable ar-5387un enet support bmips: bcm6362: add support for bcm6368-enet bmips: enable dgnd3700v2 enet support bmips: bcm63268: add support for bcm6368-enet bmips: enable vr-3032u enet support bmips: bcm6318: add support for bcm6368-enet bmips: enable ar-5315u enet support MAINTAINERS | 18 + arch/mips/Kconfig | 15 +- arch/mips/Makefile | 2 + arch/mips/cpu/cpu.c | 10 - arch/mips/dts/Makefile | 1 + arch/mips/dts/ar933x.dtsi | 3 - arch/mips/dts/brcm,bcm6318.dtsi | 38 + arch/mips/dts/brcm,bcm63268.dtsi | 38 + arch/mips/dts/brcm,bcm6328.dtsi | 30 + arch/mips/dts/brcm,bcm6338.dtsi | 29 + arch/mips/dts/brcm,bcm6348.dtsi | 42 ++ arch/mips/dts/brcm,bcm6358.dtsi | 46 ++ arch/mips/dts/brcm,bcm6362.dtsi | 32 + arch/mips/dts/brcm,bcm6368.dtsi | 32 + arch/mips/dts/ci20.dts | 122 +++ arch/mips/dts/comtrend,ar-5315u.dts | 32 + arch/mips/dts/comtrend,ar-5387un.dts | 32 + arch/mips/dts/comtrend,ct-5361.dts | 12 + arch/mips/dts/comtrend,vr-3032u.dts | 32 + arch/mips/dts/comtrend,wap-5813n.dts | 14 + arch/mips/dts/huawei,hg556a.dts | 12 + arch/mips/dts/jz4780.dtsi | 164 +++++ arch/mips/dts/luton_pcb091.dts | 36 + arch/mips/dts/mscc,luton.dtsi | 87 +++ arch/mips/dts/mscc,ocelot.dtsi | 152 ++++ arch/mips/dts/mscc,ocelot_pcb.dtsi | 42 ++ arch/mips/dts/netgear,dgnd3700v2.dts | 14 + arch/mips/dts/nexys4ddr.dts | 1 - arch/mips/dts/ocelot_pcb120.dts | 12 + arch/mips/dts/ocelot_pcb123.dts | 12 + arch/mips/dts/qca953x.dtsi | 3 - arch/mips/dts/sagem,f(a)st1704.dts | 12 + arch/mips/dts/sfr,nb4-ser.dts | 24 + arch/mips/include/asm/cacheops.h | 19 + arch/mips/include/asm/mipsregs.h | 18 +- arch/mips/include/asm/spl.h | 33 + arch/mips/mach-jz47xx/Kconfig | 26 + arch/mips/mach-jz47xx/Makefile | 5 + arch/mips/mach-jz47xx/include/mach/jz4780.h | 103 +++ arch/mips/mach-jz47xx/include/mach/jz4780_dram.h | 456 ++++++++++++ arch/mips/mach-jz47xx/include/mach/jz4780_gpio.h | 12 + arch/mips/mach-jz47xx/jz4780/Makefile | 3 + arch/mips/mach-jz47xx/jz4780/TODO | 4 + arch/mips/mach-jz47xx/jz4780/gpio.c | 39 + arch/mips/mach-jz47xx/jz4780/jz4780.c | 83 +++ arch/mips/mach-jz47xx/jz4780/pll.c | 530 ++++++++++++++ arch/mips/mach-jz47xx/jz4780/reset.c | 53 ++ arch/mips/mach-jz47xx/jz4780/sdram.c | 270 +++++++ arch/mips/mach-jz47xx/jz4780/timer.c | 239 ++++++ arch/mips/mach-jz47xx/jz4780/u-boot-spl.lds | 50 ++ arch/mips/mach-jz47xx/start.S | 98 +++ arch/mips/mach-mscc/Kconfig | 86 +++ arch/mips/mach-mscc/Makefile | 6 + arch/mips/mach-mscc/cpu.c | 102 +++ arch/mips/mach-mscc/dram.c | 73 ++ arch/mips/mach-mscc/include/ioremap.h | 49 ++ arch/mips/mach-mscc/include/mach/common.h | 28 + arch/mips/mach-mscc/include/mach/ddr.h | 814 +++++++++++++++++++++ arch/mips/mach-mscc/include/mach/luton/luton.h | 24 + .../include/mach/luton/luton_devcpu_gcb.h | 14 + .../mach-mscc/include/mach/luton/luton_icpu_cfg.h | 245 +++++++ arch/mips/mach-mscc/include/mach/ocelot/ocelot.h | 24 + .../include/mach/ocelot/ocelot_devcpu_gcb.h | 21 + .../include/mach/ocelot/ocelot_icpu_cfg.h | 274 +++++++ arch/mips/mach-mscc/include/mach/tlb.h | 55 ++ arch/mips/mach-mscc/lowlevel_init.S | 30 + arch/mips/mach-mscc/lowlevel_init_luton.S | 62 ++ arch/mips/mach-mscc/reset.c | 30 + arch/mips/mach-mt7620/cpu.c | 14 +- board/imgtec/ci20/Kconfig | 15 + board/imgtec/ci20/MAINTAINERS | 6 + board/imgtec/ci20/Makefile | 3 + board/imgtec/ci20/README | 10 + board/imgtec/ci20/ci20.c | 362 +++++++++ board/mscc/luton/Kconfig | 14 + board/mscc/luton/Makefile | 3 + board/mscc/luton/luton.c | 28 + board/mscc/ocelot/Kconfig | 14 + board/mscc/ocelot/Makefile | 4 + board/mscc/ocelot/ocelot.c | 58 ++ configs/ci20_mmc_defconfig | 48 ++ configs/comtrend_ar5315u_ram_defconfig | 7 +- configs/comtrend_ar5387un_ram_defconfig | 7 +- configs/comtrend_ct5361_ram_defconfig | 8 +- configs/comtrend_vr3032u_ram_defconfig | 7 +- configs/comtrend_wap5813n_ram_defconfig | 8 +- configs/gardena-smart-gateway-mt7688-ram_defconfig | 1 - configs/gardena-smart-gateway-mt7688_defconfig | 1 - configs/huawei_hg556a_ram_defconfig | 8 +- configs/linkit-smart-7688-ram_defconfig | 1 - configs/linkit-smart-7688_defconfig | 1 - configs/mscc_luton_defconfig | 64 ++ configs/mscc_ocelot_defconfig | 67 ++ configs/mscc_ocelot_pcb120_defconfig | 60 ++ configs/netgear_dgnd3700v2_ram_defconfig | 8 +- configs/sagem_f@st1704_ram_defconfig | 8 +- configs/sfr_nb4-ser_ram_defconfig | 8 +- drivers/dma/Kconfig | 9 + drivers/dma/Makefile | 1 + drivers/dma/bcm6348-iudma.c | 642 ++++++++++++++++ drivers/gpio/Kconfig | 7 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-mscc-bitbang-spi.c | 122 +++ drivers/misc/Kconfig | 6 + drivers/misc/Makefile | 1 + drivers/misc/jz4780_efuse.c | 103 +++ drivers/mmc/Kconfig | 6 + drivers/mmc/Makefile | 1 + drivers/mmc/jz_mmc.c | 488 ++++++++++++ drivers/net/Kconfig | 18 + drivers/net/Makefile | 2 + drivers/net/bcm6348-eth.c | 537 ++++++++++++++ drivers/net/bcm6368-eth.c | 625 ++++++++++++++++ drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/mscc/Kconfig | 22 + drivers/pinctrl/mscc/Makefile | 5 + drivers/pinctrl/mscc/mscc-common.c | 236 ++++++ drivers/pinctrl/mscc/mscc-common.h | 51 ++ drivers/pinctrl/mscc/pinctrl-luton.c | 172 +++++ drivers/pinctrl/mscc/pinctrl-ocelot.c | 188 +++++ drivers/spi/designware_spi.c | 8 +- include/configs/bmips_common.h | 6 +- include/configs/ci20.h | 72 ++ include/configs/vcoreiii.h | 82 +++ include/dt-bindings/clock/bcm6318-clock.h | 11 + include/dt-bindings/clock/jz4780-cgu.h | 89 +++ include/dt-bindings/dma/bcm6318-dma.h | 14 + include/dt-bindings/dma/bcm63268-dma.h | 14 + include/dt-bindings/dma/bcm6328-dma.h | 14 + include/dt-bindings/dma/bcm6338-dma.h | 14 + include/dt-bindings/dma/bcm6348-dma.h | 16 + include/dt-bindings/dma/bcm6358-dma.h | 16 + include/dt-bindings/dma/bcm6362-dma.h | 14 + include/dt-bindings/dma/bcm6368-dma.h | 14 + 135 files changed, 9560 insertions(+), 41 deletions(-) create mode 100644 arch/mips/dts/ci20.dts create mode 100644 arch/mips/dts/jz4780.dtsi create mode 100644 arch/mips/dts/luton_pcb091.dts create mode 100644 arch/mips/dts/mscc,luton.dtsi create mode 100644 arch/mips/dts/mscc,ocelot.dtsi create mode 100644 arch/mips/dts/mscc,ocelot_pcb.dtsi create mode 100644 arch/mips/dts/ocelot_pcb120.dts create mode 100644 arch/mips/dts/ocelot_pcb123.dts create mode 100644 arch/mips/include/asm/spl.h create mode 100644 arch/mips/mach-jz47xx/Kconfig create mode 100644 arch/mips/mach-jz47xx/Makefile create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780.h create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780_dram.h create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780_gpio.h create mode 100644 arch/mips/mach-jz47xx/jz4780/Makefile create mode 100644 arch/mips/mach-jz47xx/jz4780/TODO create mode 100644 arch/mips/mach-jz47xx/jz4780/gpio.c create mode 100644 arch/mips/mach-jz47xx/jz4780/jz4780.c create mode 100644 arch/mips/mach-jz47xx/jz4780/pll.c create mode 100644 arch/mips/mach-jz47xx/jz4780/reset.c create mode 100644 arch/mips/mach-jz47xx/jz4780/sdram.c create mode 100644 arch/mips/mach-jz47xx/jz4780/timer.c create mode 100644 arch/mips/mach-jz47xx/jz4780/u-boot-spl.lds create mode 100644 arch/mips/mach-jz47xx/start.S create mode 100644 arch/mips/mach-mscc/Kconfig create mode 100644 arch/mips/mach-mscc/Makefile create mode 100644 arch/mips/mach-mscc/cpu.c create mode 100644 arch/mips/mach-mscc/dram.c create mode 100644 arch/mips/mach-mscc/include/ioremap.h create mode 100644 arch/mips/mach-mscc/include/mach/common.h create mode 100644 arch/mips/mach-mscc/include/mach/ddr.h create mode 100644 arch/mips/mach-mscc/include/mach/luton/luton.h create mode 100644 arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h create mode 100644 arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h create mode 100644 arch/mips/mach-mscc/include/mach/ocelot/ocelot.h create mode 100644 arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h create mode 100644 arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h create mode 100644 arch/mips/mach-mscc/include/mach/tlb.h create mode 100644 arch/mips/mach-mscc/lowlevel_init.S create mode 100644 arch/mips/mach-mscc/lowlevel_init_luton.S create mode 100644 arch/mips/mach-mscc/reset.c create mode 100644 board/imgtec/ci20/Kconfig create mode 100644 board/imgtec/ci20/MAINTAINERS create mode 100644 board/imgtec/ci20/Makefile create mode 100644 board/imgtec/ci20/README create mode 100644 board/imgtec/ci20/ci20.c create mode 100644 board/mscc/luton/Kconfig create mode 100644 board/mscc/luton/Makefile create mode 100644 board/mscc/luton/luton.c create mode 100644 board/mscc/ocelot/Kconfig create mode 100644 board/mscc/ocelot/Makefile create mode 100644 board/mscc/ocelot/ocelot.c create mode 100644 configs/ci20_mmc_defconfig create mode 100644 configs/mscc_luton_defconfig create mode 100644 configs/mscc_ocelot_defconfig create mode 100644 configs/mscc_ocelot_pcb120_defconfig create mode 100644 drivers/dma/bcm6348-iudma.c create mode 100644 drivers/gpio/gpio-mscc-bitbang-spi.c create mode 100644 drivers/misc/jz4780_efuse.c create mode 100644 drivers/mmc/jz_mmc.c create mode 100644 drivers/net/bcm6348-eth.c create mode 100644 drivers/net/bcm6368-eth.c create mode 100644 drivers/pinctrl/mscc/Kconfig create mode 100644 drivers/pinctrl/mscc/Makefile create mode 100644 drivers/pinctrl/mscc/mscc-common.c create mode 100644 drivers/pinctrl/mscc/mscc-common.h create mode 100644 drivers/pinctrl/mscc/pinctrl-luton.c create mode 100644 drivers/pinctrl/mscc/pinctrl-ocelot.c create mode 100644 include/configs/ci20.h create mode 100644 include/configs/vcoreiii.h create mode 100644 include/dt-bindings/clock/jz4780-cgu.h create mode 100644 include/dt-bindings/dma/bcm6318-dma.h create mode 100644 include/dt-bindings/dma/bcm63268-dma.h create mode 100644 include/dt-bindings/dma/bcm6328-dma.h create mode 100644 include/dt-bindings/dma/bcm6338-dma.h create mode 100644 include/dt-bindings/dma/bcm6348-dma.h create mode 100644 include/dt-bindings/dma/bcm6358-dma.h create mode 100644 include/dt-bindings/dma/bcm6362-dma.h create mode 100644 include/dt-bindings/dma/bcm6368-dma.h

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[U-Boot] Uboot send pull request
by uboot＠andestech.com 23 Dec '18

23 Dec '18

Hi Tom, Please pull some riscv update: 1. Add DM drivers to support RISC-V CPU and timer, plus some bug fixes. 2. Support SiFive UART 3. Rename ax25-ae350 defconfig https://travis-ci.org/rickchen36/u-boot-riscv/builds/469364551 Thanks Rick The following changes since commit 1f2e948d6d53f77a2ddb2dde3531b0d5bc2815ad: Prepare v2019.01-rc2 (2018-12-17 20:25:24 -0500) are available in the Git repository at: git://git.denx.de/u-boot-riscv.git for you to fetch changes up to 368ff57805b03bebf99e97e703ce07aec721bc71: doc: README.ae350: Sync for ax25-ae350 rename (2018-12-18 13:26:02 +0800) ---------------------------------------------------------------- Anup Patel (4): riscv: Introduce a Kconfig option for machine mode riscv: Implement riscv_get_time() API using rdtime instruction drivers: serial: Add SiFive UART driver riscv: qemu: Imply SIFIVE_SERIAL for emulation Bin Meng (22): dm: cpu: Add timebase frequency to the platdata riscv: qemu: Create a simple-bus driver for the soc node cpu: Add a RISC-V CPU driver timer: Add generic driver for RISC-V privileged architecture defined timer riscv: ax25: Hide the ax25-specific Kconfig option riscv: Add a SYSCON driver for SiFive's Core Local Interruptor riscv: qemu: Add platform-specific Kconfig options riscv: Enlarge the default SYS_MALLOC_F_LEN riscv: Probe cpus during boot riscv: Remove non-DM version of print_cpuinfo() riscv: Add CSR numbers riscv: Add exception codes for xcause register riscv: Update supports_extension() to use desc from cpu driver riscv: Add indirect stringification to csr_xxx ops riscv: Do some basic architecture level cpu initialization riscv: Move trap handler codes to mtrap.S riscv: Fix context restore before returning from trap handler riscv: Return to previous privilege level after trap handling riscv: Adjust the _exit_trap() position to come before handle_trap() riscv: Save boot hart id to the global data riscv: bootm: Change to use boot_hart from global data riscv: Remove ae350.dts Lukas Auer (1): riscv: add Kconfig entries for the code model Rick Chen (2): riscv: configs: Rename ax25-ae350 defconfig doc: README.ae350: Sync for ax25-ae350 rename arch/riscv/Kconfig | 60 +++++++++++++++++++++-- arch/riscv/Makefile | 9 +++- arch/riscv/cpu/Makefile | 2 +- arch/riscv/cpu/ax25/Kconfig | 17 +++++-- arch/riscv/cpu/ax25/cache.c | 12 ++--- arch/riscv/cpu/cpu.c | 98 ++++++++++++++++++++++++++------------ arch/riscv/cpu/mtrap.S | 103 ++++++++++++++++++++++++++++++++++++++++ arch/riscv/cpu/qemu/Kconfig | 12 +++++ arch/riscv/cpu/qemu/cpu.c | 14 ++++++ arch/riscv/cpu/start.S | 93 ++---------------------------------- arch/riscv/dts/ae350.dts | 229 ---------------------------------------------------------------------------------------- arch/riscv/include/asm/csr.h | 16 ++++--- arch/riscv/include/asm/encoding.h | 236 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/riscv/include/asm/global_data.h | 4 ++ arch/riscv/include/asm/syscon.h | 19 ++++++++ arch/riscv/lib/Makefile | 2 + arch/riscv/lib/asm-offsets.c | 19 ++++++++ arch/riscv/lib/bootm.c | 2 +- arch/riscv/lib/interrupts.c | 62 ++++++++++++------------ arch/riscv/lib/rdtime.c | 38 +++++++++++++++ arch/riscv/lib/sifive_clint.c | 84 +++++++++++++++++++++++++++++++++ board/AndesTech/ax25-ae350/Kconfig | 4 ++ board/AndesTech/ax25-ae350/MAINTAINERS | 5 +- board/emulation/qemu-riscv/Kconfig | 2 + configs/{a25-ae350_32_defconfig => ae350_rv32_defconfig} | 0 configs/{ax25-ae350_64_defconfig => ae350_rv64_defconfig} | 0 doc/README.ae350 | 2 +- drivers/cpu/Kconfig | 6 +++ drivers/cpu/Makefile | 1 + drivers/cpu/riscv_cpu.c | 116 +++++++++++++++++++++++++++++++++++++++++++++ drivers/serial/Kconfig | 13 +++++ drivers/serial/Makefile | 1 + drivers/serial/serial_sifive.c | 215 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/timer/Kconfig | 7 +++ drivers/timer/Makefile | 1 + drivers/timer/riscv_timer.c | 56 ++++++++++++++++++++++ include/cpu.h | 3 ++ 37 files changed, 1154 insertions(+), 409 deletions(-) create mode 100644 arch/riscv/cpu/mtrap.S create mode 100644 arch/riscv/cpu/qemu/Kconfig delete mode 100644 arch/riscv/dts/ae350.dts create mode 100644 arch/riscv/include/asm/syscon.h create mode 100644 arch/riscv/lib/asm-offsets.c create mode 100644 arch/riscv/lib/rdtime.c create mode 100644 arch/riscv/lib/sifive_clint.c rename configs/{a25-ae350_32_defconfig => ae350_rv32_defconfig} (100%) rename configs/{ax25-ae350_64_defconfig => ae350_rv64_defconfig} (100%) create mode 100644 drivers/cpu/riscv_cpu.c create mode 100644 drivers/serial/serial_sifive.c create mode 100644 drivers/timer/riscv_timer.c

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[U-Boot] [PATCH] fs: cbfs: remove wrong header validation
by Christian Gmeiner 23 Dec '18

23 Dec '18

Coreboot does not contain such a check: https://github.com/coreboot/coreboot/blob/eeb4e20b2f6d786c92fe3efb30817e903… Before this change cbfsinit failed with 'Bad CBFS file'. After this change all cbfs commands are working as expected. Signed-off-by: Christian Gmeiner <christian.gmeiner(a)gmail.com> --- fs/cbfs/cbfs.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c index 0dce639b49..2a581f0c18 100644 --- a/fs/cbfs/cbfs.c +++ b/fs/cbfs/cbfs.c @@ -96,11 +96,7 @@ static int file_cbfs_next_file(u8 *start, u32 size, u32 align, } swap_file_header(&header, fileHeader); - if (header.offset < sizeof(struct cbfs_fileheader) || - header.offset > header.len) { - file_cbfs_result = CBFS_BAD_FILE; - return -1; - } + newNode->next = NULL; newNode->type = header.type; newNode->data = start + header.offset; -- 2.17.1

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[U-Boot] [PATCH v2] efi_loader: Make RTS relocation more robust
by Alexander Graf 23 Dec '18

23 Dec '18

While changing the RTS alignment to 64KB in commit 7a82c3051c8f ("efi_loader: Align runtime section to 64kb") the relocation code started to break. The reason for that is that we didn't actually look at the real relocation data. We merely took the RUNTIME_CODE section as a hint and started to relocate based on self calculated data from that point on. That calculation was now out of sync though. To ensure we're not running into such a situation again, this patch makes the runtime relocation code a bit more robust. We can just trust the phys/virt hints from the payload. We also should check that we really only have a single section, as the code doesn't handle multiple code relocations yet. Fixes: 7a82c3051c8f ("efi_loader: Align runtime section to 64kb") Reported-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> Reported-by: Loic Devulder <ldevulder(a)suse.de> Signed-off-by: Alexander Graf <agraf(a)suse.de> --- v1 -> v2: - Add more verbose comment explaining why we have the sanity check. --- lib/efi_loader/efi_runtime.c | 34 +++++++++++++++++++++++++++++++--- 1 file changed, 31 insertions(+), 3 deletions(-) diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c index 95844efdb0..fff93f0960 100644 --- a/lib/efi_loader/efi_runtime.c +++ b/lib/efi_loader/efi_runtime.c @@ -436,14 +436,42 @@ static efi_status_t EFIAPI efi_set_virtual_address_map( uint32_t descriptor_version, struct efi_mem_desc *virtmap) { - ulong runtime_start = (ulong)&__efi_runtime_start & - ~(ulong)EFI_PAGE_MASK; int n = memory_map_size / descriptor_size; int i; + int rt_code_sections = 0; EFI_ENTRY("%lx %lx %x %p", memory_map_size, descriptor_size, descriptor_version, virtmap); + /* + * TODO: + * Further down we are cheating. While really we should implement + * SetVirtualAddressMap() events and ConvertPointer() to allow + * dynamically loaded drivers to expose runtime services, we don't + * today. + * + * So let's ensure we see exactly one single runtime section, as + * that is the built-in one. If we see more (or less), someone must + * have tried adding or removing to that which we don't support yet. + * In that case, let's better fail rather than expose broken runtime + * services. + */ + for (i = 0; i < n; i++) { + struct efi_mem_desc *map = (void*)virtmap + + (descriptor_size * i); + + if (map->type == EFI_RUNTIME_SERVICES_CODE) + rt_code_sections++; + } + + if (rt_code_sections != 1) { + /* + * We expose exactly one single runtime code section, so + * something is definitely going wrong. + */ + return EFI_EXIT(EFI_INVALID_PARAMETER); + } + /* Rebind mmio pointers */ for (i = 0; i < n; i++) { struct efi_mem_desc *map = (void*)virtmap + @@ -483,7 +511,7 @@ static efi_status_t EFIAPI efi_set_virtual_address_map( map = (void*)virtmap + (descriptor_size * i); if (map->type == EFI_RUNTIME_SERVICES_CODE) { ulong new_offset = map->virtual_start - - (runtime_start - gd->relocaddr); + map->physical_start + gd->relocaddr; efi_runtime_relocate(new_offset, map); /* Once we're virtual, we can no longer handle -- 2.12.3

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[U-Boot] [PATCH 1/1] efi_loader: efi_add_runtime_mmio()
by Heinrich Schuchardt 23 Dec '18

23 Dec '18

The first parameter of efi_add_runtime_mmio() is a pointer to a pointer. This should be reflected in the documentation. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- v3 only change a comment --- lib/efi_loader/efi_runtime.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c index a9e94f78c30..1ce39f0156a 100644 --- a/lib/efi_loader/efi_runtime.c +++ b/lib/efi_loader/efi_runtime.c @@ -518,7 +518,8 @@ static efi_status_t EFIAPI efi_set_virtual_address_map( * This function adds a memory-mapped IO region to the memory map to make it * available at runtime. * - * @mmio_ptr: address of the memory-mapped IO region + * @mmio_ptr: pointer to a pointer to the start of the memory-mapped + * IO region * @len: size of the memory-mapped IO region * Returns: status code */ -- 2.19.2

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[U-Boot] [PATCH v2 1/1] efi_loader: efi_add_runtime_mmio()
by Heinrich Schuchardt 23 Dec '18

23 Dec '18

The first parameter of efi_add_runtime_mmio() is a pointer to a pointer. This should be reflected both in the signature and in the documentation. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- v2 Correct the commit message and title. This patch changes efi_add_runtime_mmio(). --- include/efi_loader.h | 2 +- lib/efi_loader/efi_runtime.c | 5 +++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/include/efi_loader.h b/include/efi_loader.h index 53f08161ab..0581c0940d 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -483,7 +483,7 @@ void __efi_runtime efi_update_table_header_crc32(struct efi_table_hdr *table); /* Call this with mmio_ptr as the _pointer_ to a pointer to an MMIO region * to make it available at runtime */ -efi_status_t efi_add_runtime_mmio(void *mmio_ptr, u64 len); +efi_status_t efi_add_runtime_mmio(void **mmio_ptr, u64 len); /* Boards may provide the functions below to implement RTS functionality */ diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c index 95844efdb0..377a4fe602 100644 --- a/lib/efi_loader/efi_runtime.c +++ b/lib/efi_loader/efi_runtime.c @@ -502,11 +502,12 @@ static efi_status_t EFIAPI efi_set_virtual_address_map( * This function adds a memory-mapped IO region to the memory map to make it * available at runtime. * - * @mmio_ptr: address of the memory-mapped IO region + * @mmio_ptr: pointer to a pointer to the start of the memory-mapped + * IO region * @len: size of the memory-mapped IO region * Returns: status code */ -efi_status_t efi_add_runtime_mmio(void *mmio_ptr, u64 len) +efi_status_t efi_add_runtime_mmio(void **mmio_ptr, u64 len) { struct efi_runtime_mmio_list *newmmio; u64 pages = (len + EFI_PAGE_MASK) >> EFI_PAGE_SHIFT; -- 2.19.2

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[U-Boot] [PATCH 1/1] distro_bootcmd: add NVME support
by Heinrich Schuchardt 23 Dec '18

23 Dec '18

Some boards support NVME drives. We should be able to use them as boot devices. NVME access requires running 'nvme scan'. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- include/config_distro_bootcmd.h | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h index 555efb7433..fa0e017b56 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -178,6 +178,31 @@ BOOT_TARGET_DEVICES_references_SATA_without_CONFIG_SATA #endif +#ifdef CONFIG_NVME +#define BOOTENV_RUN_NVME_INIT "run nvme_init; " +#define BOOTENV_SET_NVME_NEED_INIT "setenv nvme_need_init; " +#define BOOTENV_SHARED_NVME \ + "nvme_init=" \ + "if ${nvme_need_init}; then " \ + "setenv nvme_need_init false; " \ + "nvme scan; " \ + "fi\0" \ + \ + "nvme_boot=" \ + BOOTENV_RUN_NVME_INIT \ + BOOTENV_SHARED_BLKDEV_BODY(nvme) +#define BOOTENV_DEV_NVME BOOTENV_DEV_BLKDEV +#define BOOTENV_DEV_NAME_NVME BOOTENV_DEV_NAME_BLKDEV +#else +#define BOOTENV_RUN_NVME_INIT +#define BOOTENV_SET_NVME_NEED_INIT +#define BOOTENV_SHARED_NVME +#define BOOTENV_DEV_NVME \ + BOOT_TARGET_DEVICES_references_NVME_without_CONFIG_NVME +#define BOOTENV_DEV_NAME_NVME \ + BOOT_TARGET_DEVICES_references_NVME_without_CONFIG_NVME +#endif + #ifdef CONFIG_SCSI #define BOOTENV_RUN_SCSI_INIT "run scsi_init; " #define BOOTENV_SET_SCSI_NEED_INIT "setenv scsi_need_init; " @@ -359,6 +384,7 @@ BOOTENV_SHARED_USB \ BOOTENV_SHARED_SATA \ BOOTENV_SHARED_SCSI \ + BOOTENV_SHARED_NVME \ BOOTENV_SHARED_IDE \ BOOTENV_SHARED_UBIFS \ BOOTENV_SHARED_EFI \ @@ -423,6 +449,7 @@ BOOT_TARGET_DEVICES(BOOTENV_DEV) \ \ "distro_bootcmd=" BOOTENV_SET_SCSI_NEED_INIT \ + BOOTENV_SET_NVME_NEED_INIT \ "for target in ${boot_targets}; do " \ "run bootcmd_${target}; " \ "done\0" -- 2.19.2

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[U-Boot] SPL debug messages (All of them!) - how?
by Nikolai Zhubr 23 Dec '18

23 Dec '18

Hi people, I'm struggling trying to figure how to totally enable all of those nice debug() statements so as to debug a problem in SPL. The CONFIG_LOGLEVEL is set to 7, have also tried to all KCFLAGS=-DDEBUG but apparently it has all no effect for SPL. So I'm asking for advice (and I'd definitely like to not selectively prepend "#define DEBUG" all over the place) Background: I'm trying to perform direct nand install on an A20 olinuxino board. That is, dismissing messy boot0 and boot1 in nand. Currently, I've succeeded to get a good greeting from u-boot SPL, declaring that it is going to proceed to boot from nand, but then all stops forever: U-Boot SPL 2019.01-rc2 (Dec 22 2018 - 22:15:16 +0300) CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 DRAM: 1024 MiB Trying to boot from NAND I'd like to try to find the reason for this and certainly having all those debug messages could help somewhat. Thank you! Regards, Nikolai

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[U-Boot] [PATCH 1/1, for rc3] efi_selftest: block device: avoid read after free
by Heinrich Schuchardt 22 Dec '18

22 Dec '18

Reading the position in a file after closing the same results in a read after free. Correct the sequence in the test. Reported-by: Marek Vasut <marek.vasut(a)gmail.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- lib/efi_selftest/efi_selftest_block_device.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/lib/efi_selftest/efi_selftest_block_device.c b/lib/efi_selftest/efi_selftest_block_device.c index d4e4fac1c74..f038da9f190 100644 --- a/lib/efi_selftest/efi_selftest_block_device.c +++ b/lib/efi_selftest/efi_selftest_block_device.c @@ -445,11 +445,6 @@ static int execute(void) efi_st_error("Failed to write file\n"); return EFI_ST_FAILURE; } - ret = file->close(file); - if (ret != EFI_SUCCESS) { - efi_st_error("Failed to close file\n"); - return EFI_ST_FAILURE; - } ret = file->getpos(file, &pos); if (ret != EFI_SUCCESS) { efi_st_error("GetPosition failed\n"); @@ -460,6 +455,11 @@ static int execute(void) (unsigned int)pos); return EFI_ST_FAILURE; } + ret = file->close(file); + if (ret != EFI_SUCCESS) { + efi_st_error("Failed to close file\n"); + return EFI_ST_FAILURE; + } /* Verify file */ boottime->set_mem(buf, sizeof(buf), 0); -- 2.19.2

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[U-Boot] [PATCH 1/1] cmd: add exception command
by Heinrich Schuchardt 21 Dec '18

21 Dec '18

The 'exception' command allows to test exception handling. This implementation supports ARM, x86, RISC-V and the following exceptions: * 'breakpoint' - prefetch abort exception (ARM 32bit only) * 'unaligned' - data abort exception (ARM only) * 'undefined' - undefined instruction exception Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- Currently RISC-V 64bit gets into an endless loop when hitting the undefined instruction. So it makes sense to have a testing capability. --- cmd/Kconfig | 6 ++ cmd/Makefile | 1 + cmd/exception.c | 161 ++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 168 insertions(+) create mode 100644 cmd/exception.c diff --git a/cmd/Kconfig b/cmd/Kconfig index e2973b3c51..9d2b8199b8 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -1388,6 +1388,12 @@ config CMD_DISPLAY displayed on a simple board-specific display. Implement display_putc() to use it. +config CMD_EXCEPTION + bool "exception - raise exception" + depends on ARM || RISCV || X86 + help + Enable the 'exception' command which allows to raise an exception. + config CMD_LED bool "led" default y if LED diff --git a/cmd/Makefile b/cmd/Makefile index 0534ddc679..cd67a79170 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -46,6 +46,7 @@ endif obj-$(CONFIG_CMD_DISPLAY) += display.o obj-$(CONFIG_CMD_DTIMG) += dtimg.o obj-$(CONFIG_CMD_ECHO) += echo.o +obj-$(CONFIG_CMD_EXCEPTION) += exception.o obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o obj-$(CONFIG_CMD_EEPROM) += eeprom.o obj-$(CONFIG_EFI_STUB) += efi.o diff --git a/cmd/exception.c b/cmd/exception.c new file mode 100644 index 0000000000..fb6a15573e --- /dev/null +++ b/cmd/exception.c @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * The 'exception' command can be used for testing exception handling. + * + * Copyright (c) 2018, Heinrich Schuchardt <xypron.glpk(a)gmx.de> + */ +#include <common.h> +#include <command.h> + +enum exception { + UNDEFINED_INSTRUCTION = 1, + DATA_ABORT, + BREAKPOINT, +}; + +struct exception_str { + enum exception id; + char *text; + void (*func)(void); +}; + +#if defined(CONFIG_ARM) +static void data_abort(void) +{ +#if defined(CONFIG_ARM64) + /* + * The LDR instruction requires the data source to be eight byte + * aligned. + */ + asm volatile ( + "MOV x1, sp\n" + "ADD x1, x1, 1\n" + "LDR x3, [x1]\n"); +#else + /* + * The LDRD instruction requires the data source to be four byte aligned + * even if strict alignment fault checking is disabled in the system + * control register. + */ + asm volatile ( + "MOV r5, sp\n" + "ADD r5, #1\n" + "LDRD r6, r7, [r5]\n"); +#endif +} + +#if !defined(CONFIG_ARM64) +static void breakpoint(void) +{ + asm volatile ("BKPT #123\n"); +} +#endif +#endif + +static void undefined_instruction(void) +{ +#if defined(CONFIG_ARM) + /* + * 0xe7f...f. is undefined in ARM mode + * 0xde.. is undefined in Thumb mode + */ + asm volatile (".word 0xe7f7defb\n"); +#elif defined(CONFIG_RISCV) + asm volatile (".word 0xffffffff\n"); +#elif defined(CONFIG_X86) + asm volatile (".word 0xffff\n"); +#endif +} + +struct exception_str exceptions[] = { +#if defined(CONFIG_ARM) +#if !defined(CONFIG_ARM64) + { BREAKPOINT, "breakpoint", breakpoint }, +#endif + { DATA_ABORT, "unaligned", data_abort }, +#endif + { UNDEFINED_INSTRUCTION, "undefined", undefined_instruction }, + { 0, NULL, NULL }, +}; + +static int do_exception(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + struct exception_str *ex; + enum exception id = 0; + + if (argc != 2) + return CMD_RET_USAGE; + + for (ex = exceptions; ex->func ; ++ex) { + if (!strcmp(argv[1], ex->text)) { + id = ex->id; + break; + } + } + switch (id) { +#if defined(CONFIG_ARM) +#if !defined(CONFIG_ARM64) + case BREAKPOINT: + breakpoint(); + break; +#endif + case DATA_ABORT: + data_abort(); + break; +#endif + case UNDEFINED_INSTRUCTION: + undefined_instruction(); + break; + default: + return CMD_RET_USAGE; + } + + return CMD_RET_FAILURE; +} + +static int exception_complete(int argc, char * const argv[], char last_char, + int maxv, char *cmdv[]) +{ + int len = 0; + struct exception_str *ex; + int i = 0; + + switch (argc) { + case 1: + break; + case 2: + len = strlen(argv[1]); + break; + default: + return 0; + } + for (ex = exceptions; ex->func ; ++ex) { + if (i >= maxv - 1) + return i; + if (!strncmp(argv[1], ex->text, len)) + cmdv[i++] = ex->text; + } + cmdv[i] = NULL; + return i; +} + +#ifdef CONFIG_SYS_LONGHELP +static char exception_help_text[] = + "<ex>\n" + " The following exceptions are available:\n" +#if defined(CONFIG_ARM) +#if !defined(CONFIG_ARM64) + " breakpoint - prefetch abort\n" +#endif + " unaligned - data abort\n" +#endif +#endif + " undefined - undefined instruction\n" + ; + +U_BOOT_CMD_COMPLETE( + exception, 2, 0, do_exception, + "Forces an exception to occur", + exception_help_text, exception_complete +); -- 2.19.1

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