October 2018 - U-Boot

[U-Boot] xzwrite
by Dell Green 03 Oct '18

03 Oct '18

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[U-Boot] [PATCH] i2c: Add support for the Arm's Versatile Express I2C controller.
by Liviu Dudau 03 Oct '18

03 Oct '18

The Arm Versatile Express I2C controller is a simple register-based controller that uses a register to control the state of the SCL and SDA lines. Add support for it. Signed-off-by: Liviu Dudau <liviu.dudau(a)foss.arm.com> --- drivers/i2c/Kconfig | 7 + drivers/i2c/Makefile | 1 + drivers/i2c/i2c-versatile.c | 270 ++++++++++++++++++++++++++++++++++++ 3 files changed, 278 insertions(+) create mode 100644 drivers/i2c/i2c-versatile.c diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index ae3b501555..1ef22e6bcd 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -416,6 +416,13 @@ config SYS_I2C_UNIPHIER_F Support for UniPhier FIFO-builtin I2C controller driver. This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs. +config SYS_I2C_VERSATILE + bool "Arm Ltd Versatile I2C bus driver" + depends on DM_I2C && (TARGET_VEXPRESS_CA15_TC2 || TARGET_VEXPRESS64_JUNO) + help + Add support for the Arm Ltd Versatile Express I2C driver. The I2C host + controller is present in the development boards manufactured by Arm Ltd. + config SYS_I2C_MVTWSI bool "Marvell I2C driver" depends on DM_I2C diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index f2cbe78c53..d3637bcd8d 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -36,6 +36,7 @@ obj-$(CONFIG_SYS_I2C_STM32F7) += stm32f7_i2c.o obj-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o obj-$(CONFIG_SYS_I2C_UNIPHIER) += i2c-uniphier.o obj-$(CONFIG_SYS_I2C_UNIPHIER_F) += i2c-uniphier-f.o +obj-$(CONFIG_SYS_I2C_VERSATILE) += i2c-versatile.o obj-$(CONFIG_SYS_I2C_ZYNQ) += zynq_i2c.o obj-$(CONFIG_TEGRA186_BPMP_I2C) += tegra186_bpmp_i2c.o diff --git a/drivers/i2c/i2c-versatile.c b/drivers/i2c/i2c-versatile.c new file mode 100644 index 0000000000..5faa5c93e2 --- /dev/null +++ b/drivers/i2c/i2c-versatile.c @@ -0,1 +1,270 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2018 Arm Ltd. + * Author: Liviu Dudau <liviu.dudau(a)foss.arm.com> + * + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <i2c.h> +#include <asm/io.h> +#include <clk.h> +#include <linux/io.h> + +#define I2C_CONTROL_REG 0x00 +#define I2C_SET_REG 0x00 +#define I2C_CLEAR_REG 0x04 + +#define SCL BIT(0) +#define SDA BIT(1) + +struct versatile_i2c_priv { + phys_addr_t base; + u32 delay; +}; + +static inline void versatile_sda_set(struct versatile_i2c_priv *priv, u8 state) +{ + writel(SDA, priv->base + (state ? I2C_SET_REG : I2C_CLEAR_REG)); + udelay(priv->delay); +} + +static inline int versatile_sda_get(struct versatile_i2c_priv *priv) +{ + int v = !!(readl(priv->base + I2C_CONTROL_REG) & SDA); + udelay(priv->delay); + return v; +} + +static inline void versatile_scl_set(struct versatile_i2c_priv *priv, u8 state) +{ + writel(SCL, priv->base + (state ? I2C_SET_REG : I2C_CLEAR_REG)); + udelay(priv->delay); +} + +static inline int versatile_scl_get(struct versatile_i2c_priv *priv) +{ + int v = !!(readl(priv->base + I2C_CONTROL_REG) & SCL); + udelay(priv->delay); + return v; +} + +/* start: SDA goes from high to low while SCL is high */ +static void versatile_i2c_start(struct versatile_i2c_priv *priv) +{ + udelay(priv->delay); + versatile_sda_set(priv, 1); + versatile_scl_set(priv, 1); + versatile_sda_set(priv, 0); +} + +/* stop: SDA goes from low to high while SCL is high */ +static void versatile_i2c_stop(struct versatile_i2c_priv *priv) +{ + versatile_scl_set(priv, 0); + versatile_sda_set(priv, 0); + versatile_scl_set(priv, 1); + versatile_sda_set(priv, 1); +} + +/* read a bit from the SDA line (data or ACK/NACK) */ +static u8 versatile_i2c_read_bit(struct versatile_i2c_priv *priv) +{ + versatile_scl_set(priv, 0); + versatile_sda_set(priv, 1); + versatile_scl_set(priv, 1); + udelay(priv->delay); + return (u8)versatile_sda_get(priv); +} + +/* write a bit on the SDA line */ +static void versatile_i2c_write_bit(struct versatile_i2c_priv *priv, u8 bit) +{ + versatile_scl_set(priv, 0); + versatile_sda_set(priv, bit); + versatile_scl_set(priv, 1); + udelay(priv->delay); +} + +/* send a reset sequence of 9 clocks with SDA high */ +static void versatile_i2c_reset_bus(struct versatile_i2c_priv *priv) +{ + int i; + + for (i = 0; i < 9; i++) + versatile_i2c_write_bit(priv, 1); + + versatile_i2c_stop(priv); +} + +/* write byte without start/stop sequence */ +static int versatile_i2c_write_byte(struct versatile_i2c_priv *priv, u8 byte) +{ + u8 nak, i; + + for (i = 0; i < 8; i++) { + versatile_i2c_write_bit(priv, byte & 0x80); + byte <<= 1; + } + + /* read ACK */ + nak = versatile_i2c_read_bit(priv); + versatile_scl_set(priv, 0); + + return nak; /* not a nack is an ack */ +} + +static int versatile_i2c_read_byte(struct versatile_i2c_priv *priv, u8 *byte, u8 ack) +{ + u8 i; + + *byte = 0; + for (i = 0; i < 8; i++) { + *byte <<= 1; + *byte |= versatile_i2c_read_bit(priv); + } + /* write the nack */ + versatile_i2c_write_bit(priv, ack); + + return 0; +} + +static int versatile_i2c_send_slave_addr(struct versatile_i2c_priv *priv, + struct i2c_msg *msg) +{ + u8 addr; + int ret; + + if (msg->flags & I2C_M_TEN) { + /* 10-bit address, send extended address code first */ + addr = 0xf0 | ((msg->addr >> 7) & 0x06); + ret = versatile_i2c_write_byte(priv, addr); + if (ret) { + versatile_i2c_stop(priv); + return -EIO; + } + + /* remaining bits */ + ret = versatile_i2c_write_byte(priv, msg->addr & 0xff); + if (ret) { + versatile_i2c_stop(priv); + return -EIO; + } + /* reads need to resend the addr */ + if (msg->flags & I2C_M_RD) { + versatile_i2c_start(priv); + addr |= 1; + ret = versatile_i2c_write_byte(priv, addr); + if (ret) { + versatile_i2c_stop(priv); + return -EIO; + } + } + } else { + /* normal 7-bit address */ + addr = msg->addr << 1; + if (msg->flags & I2C_M_RD) + addr |= 1; + ret = versatile_i2c_write_byte(priv, addr); + if (ret) { + versatile_i2c_stop(priv); + return -EIO; + } + } + + return 0; +} + +static int versatile_i2c_message_xfer(struct versatile_i2c_priv *priv, + struct i2c_msg *msg) +{ + int i, ret; + + versatile_i2c_start(priv); + if (versatile_i2c_send_slave_addr(priv, msg)) + return -EIO; + + for (i = 0; i < msg->len; i++) { + if (msg->flags & I2C_M_RD) { + u8 ack = (msg->len - i - 1) == 0 ? 1 : 0; + ret = versatile_i2c_read_byte(priv, &msg->buf[i], ack); + } else { + ret = versatile_i2c_write_byte(priv, msg->buf[i]); + } + + if (ret) + break; + } + + versatile_i2c_stop(priv); + + return ret; +} + +static int versatile_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) +{ + struct versatile_i2c_priv *priv = dev_get_priv(bus); + int ret; + + for ( ; nmsgs > 0; nmsgs--, msg++) { + ret = versatile_i2c_message_xfer(priv, msg); + if (ret) + return -EREMOTEIO; + } + + return 0; +} + +static int versatile_i2c_chip_probe(struct udevice *bus, uint chip, uint chip_flags) +{ + /* probe the presence of a slave by writing a 0-size message */ + struct i2c_msg msg = { .addr = chip, .flags = chip_flags, .len = 0, .buf = NULL }; + struct versatile_i2c_priv *priv = dev_get_priv(bus); + + return versatile_i2c_message_xfer(priv, &msg); +} + +static int versatile_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) +{ + struct versatile_i2c_priv *priv = dev_get_priv(bus); + + priv->delay = 1000000 / (speed << 2); + + versatile_i2c_reset_bus(priv); + + return 0; +} + +static int versatile_i2c_probe(struct udevice *dev) +{ + struct versatile_i2c_priv *priv = dev_get_priv(dev); + + priv->base = (phys_addr_t)dev_read_addr(dev); + priv->delay = 25; /* 25us * 4 = 100kHz */ + /* U-Boot still doesn't assign automatically sequence numbers to devices */ + dev->req_seq = 1; + + return 0; +} + +static const struct dm_i2c_ops versatile_i2c_ops = { + .xfer = versatile_i2c_xfer, + .probe_chip = versatile_i2c_chip_probe, + .set_bus_speed = versatile_i2c_set_bus_speed, +}; + +static const struct udevice_id versatile_i2c_of_match[] = { + { .compatible = "arm,versatile-i2c" }, + { } +}; + +U_BOOT_DRIVER(versatile_i2c) = { + .name = "i2c-bus-versatile", + .id = UCLASS_I2C, + .of_match = versatile_i2c_of_match, + .probe = versatile_i2c_probe, + .priv_auto_alloc_size = sizeof(struct versatile_i2c_priv), + .ops = &versatile_i2c_ops, +}; -- 2.18.0

2 5

[U-Boot] [PATCH 00/53] TF-A Boot support for NXP Chassis 2 platforms
by Rajesh Bhagat 03 Oct '18

03 Oct '18

Includes changes in u-boot framework to support TF-A for NXP Chassis 2 platforms. A new defconfig is added namely ls*_ram_defconfig which will be used for all boot sources when TF-A is used. Tested on LS1043A, LS1046A and LS1012A platforms. Pankit Garg (12): armv8: ls1046aqds: define environment address for QSPI boot. armv8: fsl-layerscape: bootcmd identification for TFABOOT. armv8: ls1012a: define BOOTCOMMAND for TFABOOT armv8: sec_firmware: return job ring status as true in TFABOOT armv8: layerscape: add SMC calls for DDR size and bank info. armv8: fsl-layerscape: change tlb base from OCRAM to DDR in EL < 3 armv8: ls1012afrwy: correct environment offset drivers: ifc: add support for for TFABOOT armv8: ls1046aqds: make IFC params common and dynamic armv8: ls1043ardb: make IFC params common and dynamic armv8: fsl-layerscape: add support of MC framework for TFA. armv8: skip setenv if gd->env_addr is not default env. Rajesh Bhagat (31): env: allow flash and nand env driver to compile together env: sf: define API to override sf environment address env: nand: remove unnecessary env_ptr definition armv8: layerscape: add TFABOOT config option armv8: fsl-layerscape: identify boot source from PORSR register armv8: ls1046ardb: Add TFABOOT defconfig armv8: ls1046aqds: Add TFABOOT defconfig armv8: ls1046a: make environment address and size common armv8: ls1043ardb: Add TFABOOT defconfig armv8: ls1043aqds: Add TFABOOT defconfig armv8: ls1043a: make environment address and size common armv8: ls1043aqds: define environment address for QSPI boot net: fm: add TFABOOT support drivers: qe: add TFABOOT support armv8: ls1046a: make FMAN address common armv8: ls1043a: make FMAN and QE address common armv8: ls1046a: define BOOTCOMMAND for TFABOOT armv8: ls1043a: define BOOTCOMMAND for TFABOOT armv8: ls1012ardb: Add TFABOOT defconfig armv8: ls1012aqds: Add TFABOOT defconfig armv8: ls1012a: update environment address for TFABOOT armv8: layerscape: remove EL3 specific erratas for TFABOOT armv8: layerscape: secure boot support for environment selection armv8: layerscape: skip OCRAM init for TFABOOT armv8: ls1012ardb: Make U-Boot EL2 safe armv8: ls1012aqds: Make U-Boot EL2 safe armv8: sec_firmware: change el2_to_aarch32 SMC ID driver/ifc: replace __ilog2 with LOG2 macro armv8: ls1043aqds: make IFC params common and dynamic armv8: ls1043aqds: add i2c QIXIS support for TFABOOT armv8: ls1046aqds: add i2c QIXIS support for TFABOOT Vinitha V Pillai (7): armv8: ls1043ardb: Add TFABOOT defconfig for secure boot armv8: ls1043aqds: Add TFABOOT defconfig for secure boot armv8: ls1046ardb: Add TFABOOT defconfig for secure boot armv8: ls1046aqds: Add TFABOOT defconfig for secure boot armv8: ls1012ardb: Add TFABOOT defconfig for secure boot armv8: ls1012aqds: Add TFABOOT defconfig for secure boot armv8: ls1012a: fix ls1012aqds secure boot compilation York Sun (3): move data structure out of cpu.h armv8: layerscape: Enable routing SError exception armv8: fsl-layerscape: Update parsing boot source arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 31 +- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 613 +++++++++++++++++- arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 12 +- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 129 ++++ arch/arm/cpu/armv8/sec_firmware.c | 4 + arch/arm/cpu/armv8/sec_firmware_asm.S | 2 +- .../arm/include/asm/arch-fsl-layerscape/cpu.h | 300 --------- .../asm/arch-fsl-layerscape/immap_lsch2.h | 20 + .../asm/arch-fsl-layerscape/immap_lsch3.h | 49 ++ .../arm/include/asm/arch-fsl-layerscape/soc.h | 22 + board/freescale/ls1012aqds/Kconfig | 10 + board/freescale/ls1012aqds/ls1012aqds.c | 23 +- board/freescale/ls1012ardb/Kconfig | 4 + board/freescale/ls1012ardb/ls1012ardb.c | 16 +- board/freescale/ls1043aqds/ddr.c | 11 + board/freescale/ls1043aqds/ls1043aqds.c | 149 ++++- board/freescale/ls1043ardb/ddr.c | 14 + board/freescale/ls1043ardb/ls1043ardb.c | 110 ++++ board/freescale/ls1046aqds/ddr.c | 11 + board/freescale/ls1046aqds/ls1046aqds.c | 150 ++++- board/freescale/ls1046ardb/ddr.c | 12 + configs/ls1012aqds_ram_SECURE_BOOT_defconfig | 65 ++ configs/ls1012aqds_ram_defconfig | 62 ++ configs/ls1012ardb_ram_SECURE_BOOT_defconfig | 63 ++ configs/ls1012ardb_ram_defconfig | 56 ++ configs/ls1043aqds_ram_SECURE_BOOT_defconfig | 58 ++ configs/ls1043aqds_ram_defconfig | 54 ++ configs/ls1043ardb_ram_SECURE_BOOT_defconfig | 51 ++ configs/ls1043ardb_ram_defconfig | 49 ++ configs/ls1046aqds_ram_SECURE_BOOT_defconfig | 58 ++ configs/ls1046aqds_ram_defconfig | 57 ++ configs/ls1046ardb_ram_SECURE_BOOT_defconfig | 52 ++ configs/ls1046ardb_ram_defconfig | 49 ++ drivers/misc/fsl_ifc.c | 488 ++++++++++---- drivers/net/fm/fm.c | 104 +++ drivers/qe/qe.c | 81 +++ env/flash.c | 4 +- env/nand.c | 6 +- env/sf.c | 9 +- include/configs/B4860QDS.h | 2 +- include/configs/T102xQDS.h | 2 +- include/configs/T1040QDS.h | 2 +- include/configs/T208xQDS.h | 2 +- include/configs/T4240QDS.h | 2 +- include/configs/T4240RDB.h | 2 +- include/configs/ls1012a2g5rdb.h | 6 + include/configs/ls1012a_common.h | 16 +- include/configs/ls1012afrdm.h | 5 + include/configs/ls1012afrwy.h | 6 + include/configs/ls1012aqds.h | 1 + include/configs/ls1012ardb.h | 6 + include/configs/ls1043a_common.h | 27 +- include/configs/ls1043aqds.h | 50 +- include/configs/ls1043ardb.h | 29 + include/configs/ls1046a_common.h | 12 + include/configs/ls1046aqds.h | 59 +- include/configs/ls1046ardb.h | 15 + include/environment.h | 1 - include/fsl_ifc.h | 27 +- 59 files changed, 2847 insertions(+), 483 deletions(-) create mode 100644 configs/ls1012aqds_ram_SECURE_BOOT_defconfig create mode 100644 configs/ls1012aqds_ram_defconfig create mode 100644 configs/ls1012ardb_ram_SECURE_BOOT_defconfig create mode 100644 configs/ls1012ardb_ram_defconfig create mode 100644 configs/ls1043aqds_ram_SECURE_BOOT_defconfig create mode 100644 configs/ls1043aqds_ram_defconfig create mode 100644 configs/ls1043ardb_ram_SECURE_BOOT_defconfig create mode 100644 configs/ls1043ardb_ram_defconfig create mode 100644 configs/ls1046aqds_ram_SECURE_BOOT_defconfig create mode 100644 configs/ls1046aqds_ram_defconfig create mode 100644 configs/ls1046ardb_ram_SECURE_BOOT_defconfig create mode 100644 configs/ls1046ardb_ram_defconfig -- 2.17.1

1 30

[U-Boot] xzwrite
by Dell Green 03 Oct '18

03 Oct '18

PNG IHDRØ©Ð,I IDATxì{|ÕÝÿß3»Ýl.®U *UñÖØ jœ¡À¶Pª-`[[«öç±¶¶?ÐöÁªÈ«j¥`œ( E,åAE°"( \ ä²ìeæüþÉìf7$öŒÛÝ3sÎ\²ù~Ï÷|$D"t*jO7@"H$¯"R`%D"é€ÀJ$DÒHH$€+H$I V"H$.@ ¬D"H$]XD"Hº)°D"tR`%D"é€ÀJ$DÒHH$€+H$I V"H$.@ ¬D"H$]XD"Hº)°D"tR`%D"é€ÀJ$DÒHH$€+H$I V"H$.@ ¬D"H$]XD"HºgO7@"H$ÎÂãv>p }ÒRðxÜ}öÙôëÛw§CeÈ!ôéª( (šªÙS ]Gô°N(ŠüðaA¡0ÍM:D}C#>¿êêü~ŠÇmî:qD"H:þýûsöYg2lè`F8þ}Ó8ç³ñºèß¯®$ápÈP9ÅR]Óð ã?Æ?E.UÅøª#tEu¢ª aM§¡Ñß ºæU5TÕçóÏËšš8JeUXD"ônúöíËsÏ!sÄpFfËs3pF_ú÷MCÓ40dL¢(!¬Å°La ÝXgnGÀÚßD`X XÂ B(V]ºnŽ.P¡0õ >)°D"é]€¥¥rþšQœ 1Ù#É<÷lúõëŠ-ÐÑuÃ²Ôu M£iñ9¬E>Ût!Ð5BS`EÄjµ€ÐTDã?(((ªªª(ªª8TÕXÈzC.Ð+H$çì³Îäo\Äe\ÄÈÌá8]7ú6 4ÄT×ÂÃ!Â¡ño8LXÓÐ5 MÓ+U×mªqãXÖ ó[Øf[mÄ]Ü"Â-å-5úpMÁu88.N'§S9I$€gu^W_9+ÇsÏ9Ó)xºnf8$ «Ôrc(¡b¹vÍJt9ÐÆbžEPZŒÄ¶#ngŠE\Å×³¹¿ªªR`%DÒ}Ï8k'\ÃÕó²2PUÕJM Á¡P8ÒÏªG°uÚÄÏÜ `ô±FÕªXšQÖÔMgm;ýVq¬@(Û1úaük6A×s+H$.%55Ük®fÂ5WráóHMI@èp8D(ØL h&}§ÑÁGþPašÝœKä³ù°þ5ÝŸ¶í6¡Žº[-¡.ß²_kq<±vEH$I1jÔHŸ}].®¹ÁÏ°Öká0Á`3æ&CÂášþQhqóÆFùFVE#d&×šD}jNcMâýle¶£-€ÀJ$€QUKŸqÓ&ßÊ]ÓéºŠ 4ûinj¢9 Ö¢ÄÓÚµ¯.c]ôKLí[bvØi%QuÅÕxNV)a?° ¯Ñ)°D"ùÒ$%%qýÄ\îÌ»Q#Ï!¢ÃA&ý> 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Re: [U-Boot] [PATCH v3 00/17] riscv: Add QEMU virt board support
by Rick Chen 03 Oct '18

03 Oct '18

> > > Hi Rick, > > > > > > On Wed, Sep 26, 2018 at 9:50 PM Bin Meng <bmeng.cn(a)gmail.com> wrote: > > > > > > > > This series adds QEMU RISC-V 'virt' board target support, with the > > > > hope of helping people easily test U-Boot on RISC-V. > > > > > > > > Some existing RISC-V codes have been changed to make it easily to > > > > support new targets. Some spotted coding style issues are fixed. > > > > > > > > This series is available at u-boot-x86/riscv-working for testing. > > > > > > > > Changes in v3: > > > > - net patch to print the relocation address in cmd 'bdinfo' > > > > - new patch to imply DM support for some common drivers > > > > - reword the reset message a little, and call hang() in the end > > > > > > > > Changes in v2: > > > > - Change Linux kernel entry parameters' type to support 32/64 bit > > > > - new patch to remove CSR read/write defines in encoding.h > > > > - new patch to pass mhartid CSR value to kernel > > > > - new patch to move do_reset() to a common place > > > > > > > > > > Any comments for v3? > > > > Ping? Hi Bin Sorry! I was busy last week. Yes. The V3 patch-sets looks fine. But the merge window is closed. I miss it. I will sync u-boot-riscv.git to u-boot.git and merge the v3 patch-sets to u-boot-riscv.git this week. I am not sure if I can send pull request to Tom about those merges after the merge window was closed? Or I shall wait for next time merge window opening ? Rick

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[U-Boot] [PATCH 1/2] mmc: tmio: Pass full address to tmio_sd_addr_is_dmaable()
by Marek Vasut 03 Oct '18

03 Oct '18

Pass the entire source data pointer to tmio_sd_addr_is_dmaable() to avoid losing top 32 bits on 64bit systems. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- drivers/mmc/tmio-common.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c index b311b80be8..6b21941991 100644 --- a/drivers/mmc/tmio-common.c +++ b/drivers/mmc/tmio-common.c @@ -372,8 +372,10 @@ static int tmio_sd_dma_xfer(struct udevice *dev, struct mmc_data *data) } /* check if the address is DMA'able */ -static bool tmio_sd_addr_is_dmaable(unsigned long addr) +static bool tmio_sd_addr_is_dmaable(const char *src) { + uintptr_t addr = (uintptr_t)src; + if (!IS_ALIGNED(addr, TMIO_SD_DMA_MINALIGN)) return false; @@ -486,7 +488,7 @@ int tmio_sd_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, if (data) { /* use DMA if the HW supports it and the buffer is aligned */ if (priv->caps & TMIO_SD_CAP_DMA_INTERNAL && - tmio_sd_addr_is_dmaable((long)data->src)) + tmio_sd_addr_is_dmaable(data->src)) ret = tmio_sd_dma_xfer(dev, data); else ret = tmio_sd_pio_xfer(dev, data); -- 2.18.0

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[U-Boot] Pull request: u-boot-spi/master
by Jagan Teki 03 Oct '18

03 Oct '18

Hi Tom, This is the PR for SPI-NAND changes along with few spi changes. Yes, we missed one day for MW but Miquel did his best since from few releases. request you to accept the delay and pull this PR. thanks, Jagan. The following changes since commit 9dc8d155d4e88563f572ee79aab758eb4272f3fd: Merge git://git.denx.de/u-boot-imx (2018-09-19 20:35:27 -0400) are available in the Git repository at: git://git.denx.de/u-boot-spi.git master for you to fetch changes up to b3bec2525604d6b42bb9e7fd719c84b022447db3: spi: sh_qspi: Add DM support to SH QSPI driver (2018-10-02 22:14:59 +0530) ---------------------------------------------------------------- Ashish Kumar (1): driver/spi: fsl_qspi: Remove non-DM stuff Boris Brezillon (7): mtd: Fallback to ->_read/write_oob() when ->_read/write() is missing mtd: Add sanity checks in mtd_write/read_oob() mtd: nand: Add core infrastructure to deal with NAND devices mtd: nand: Pass mode information to nand_page_io_req spi: Extend the core to ease integration of SPI memory controllers mtd: spinand: Add initial support for the MX35LF1GE4AB chip dt-bindings: Add bindings for SPI NAND devices Brian Norris (1): mtd: add get/set of_node/flash_node helpers Ezequiel Garcia (1): mtd: Uninline mtd_write_oob and move it to mtdcore.c Frieder Schrempf (1): mtd: spinand: Add initial support for Winbond W25M02GV Ley Foon Tan (1): spi: designware_spi: Add reset ctrl to driver Marek Vasut (1): spi: sh_qspi: Add DM support to SH QSPI driver Miquel Raynal (22): mtd: Fallback to ->_read/write() when ->_read/write_oob() is missing mtd: move definitions to enlarge their range mtd: move all flash categories inside MTD submenu mtd: move NAND files into a raw/ subdirectory mtd: rename nand into rawnand in Kconfig prompt mtd: spinand: Add initial support for the MX35LF2GE4AB chip mtd: declare MTD_PARTITIONS symbol in Kconfig mtd: mtdpart: balance debug messages cmd: ubi: delete useless and misleading definitions cmd: mtdparts: add fallthrough in switch statement lib: strto: parse all lowercase metric prefixes in ustrtoul[l] lib: strto: fix metric suffix parsing in strtoul[l] cmd: mtdparts: accept spi-nand devices cmd: mtdparts: remove mandatory 'mtdparts=' prefix dm: drop unused helper in MTD header mtd: uclass: add probe function mtd: mtdpart: add a generic mtdparts-like parser mtd: uboot: search for an equivalent MTD name with the mtdids mtd: mtdpart: implement proper partition handling cmd: mtd: add 'mtd' command cmd: ubi: clean the partition handling cmd: mtdparts: describe as legacy Peter Pan (2): mtd: nand: Add core infrastructure to support SPI NANDs mtd: spinand: Add initial support for Micron MT29F2G01ABAGD MAINTAINERS | 6 +- Makefile | 2 +- README | 6 +- arch/arm/mach-uniphier/board_late_init.c | 2 +- cmd/Kconfig | 18 +- cmd/Makefile | 1 + cmd/mtd.c | 473 ++++++++++ cmd/mtdparts.c | 33 +- cmd/ubi.c | 101 +- common/spl/Kconfig | 2 +- common/spl/spl_spi.c | 2 +- doc/README.SPL | 4 +- doc/README.arm-relocation | 2 +- doc/README.nand | 6 +- doc/README.zynq | 2 +- doc/device-tree-bindings/mtd/spi-nand.txt | 5 + drivers/Makefile | 2 +- drivers/mtd/Kconfig | 7 +- drivers/mtd/Makefile | 4 +- drivers/mtd/mtd-uclass.c | 16 + drivers/mtd/mtd_uboot.c | 224 ++++- drivers/mtd/mtdcore.c | 108 ++- drivers/mtd/mtdcore.h | 6 - drivers/mtd/mtdpart.c | 627 ++++++++----- drivers/mtd/nand/Kconfig | 299 +----- drivers/mtd/nand/Makefile | 78 +- drivers/mtd/nand/bbt.c | 132 +++ drivers/mtd/nand/core.c | 243 +++++ drivers/mtd/nand/raw/Kconfig | 297 ++++++ drivers/mtd/nand/raw/Makefile | 77 ++ drivers/mtd/nand/{ => raw}/am335x_spl_bch.c | 0 drivers/mtd/nand/{ => raw}/arasan_nfc.c | 0 drivers/mtd/nand/{ => raw}/atmel_nand.c | 0 drivers/mtd/nand/{ => raw}/atmel_nand_ecc.h | 0 drivers/mtd/nand/{ => raw}/davinci_nand.c | 2 +- drivers/mtd/nand/{ => raw}/denali.c | 0 drivers/mtd/nand/{ => raw}/denali.h | 0 drivers/mtd/nand/{ => raw}/denali_dt.c | 0 drivers/mtd/nand/{ => raw}/denali_spl.c | 0 drivers/mtd/nand/{ => raw}/fsl_elbc_nand.c | 0 drivers/mtd/nand/{ => raw}/fsl_elbc_spl.c | 0 drivers/mtd/nand/{ => raw}/fsl_ifc_nand.c | 0 drivers/mtd/nand/{ => raw}/fsl_ifc_spl.c | 0 drivers/mtd/nand/{ => raw}/fsl_upm.c | 0 drivers/mtd/nand/{ => raw}/fsmc_nand.c | 0 drivers/mtd/nand/{ => raw}/kb9202_nand.c | 0 drivers/mtd/nand/{ => raw}/kirkwood_nand.c | 0 drivers/mtd/nand/{ => raw}/kmeter1_nand.c | 0 drivers/mtd/nand/{ => raw}/lpc32xx_nand_mlc.c | 0 drivers/mtd/nand/{ => raw}/lpc32xx_nand_slc.c | 0 drivers/mtd/nand/{ => raw}/mxc_nand.c | 0 drivers/mtd/nand/{ => raw}/mxc_nand.h | 0 drivers/mtd/nand/{ => raw}/mxc_nand_spl.c | 0 drivers/mtd/nand/{ => raw}/mxs_nand.c | 0 drivers/mtd/nand/{ => raw}/mxs_nand.h | 0 drivers/mtd/nand/{ => raw}/mxs_nand_dt.c | 0 drivers/mtd/nand/{ => raw}/mxs_nand_spl.c | 0 drivers/mtd/nand/{ => raw}/nand.c | 0 drivers/mtd/nand/{ => raw}/nand_base.c | 56 -- drivers/mtd/nand/{ => raw}/nand_bbt.c | 0 drivers/mtd/nand/{ => raw}/nand_bch.c | 0 drivers/mtd/nand/{ => raw}/nand_ecc.c | 2 +- drivers/mtd/nand/{ => raw}/nand_ids.c | 0 drivers/mtd/nand/{ => raw}/nand_plat.c | 0 drivers/mtd/nand/{ => raw}/nand_spl_load.c | 0 drivers/mtd/nand/{ => raw}/nand_spl_loaders.c | 0 drivers/mtd/nand/{ => raw}/nand_spl_simple.c | 0 drivers/mtd/nand/{ => raw}/nand_timings.c | 0 drivers/mtd/nand/{ => raw}/nand_util.c | 2 +- drivers/mtd/nand/{ => raw}/omap_elm.c | 0 drivers/mtd/nand/{ => raw}/omap_gpmc.c | 0 drivers/mtd/nand/{ => raw}/pxa3xx_nand.c | 2 +- drivers/mtd/nand/{ => raw}/pxa3xx_nand.h | 0 drivers/mtd/nand/{ => raw}/sunxi_nand.c | 0 drivers/mtd/nand/{ => raw}/sunxi_nand_spl.c | 0 drivers/mtd/nand/{ => raw}/tegra_nand.c | 0 drivers/mtd/nand/{ => raw}/tegra_nand.h | 0 drivers/mtd/nand/{ => raw}/vf610_nfc.c | 0 drivers/mtd/nand/{ => raw}/zynq_nand.c | 0 drivers/mtd/nand/spi/Kconfig | 7 + drivers/mtd/nand/spi/Makefile | 4 + drivers/mtd/nand/spi/core.c | 1254 +++++++++++++++++++++++++ drivers/mtd/nand/spi/macronix.c | 146 +++ drivers/mtd/nand/spi/micron.c | 135 +++ drivers/mtd/nand/spi/winbond.c | 143 +++ drivers/mtd/onenand/onenand_base.c | 2 - drivers/spi/Kconfig | 7 + drivers/spi/Makefile | 1 + drivers/spi/designware_spi.c | 43 + drivers/spi/fsl_qspi.c | 138 --- drivers/spi/sh_qspi.c | 215 +++-- drivers/spi/spi-mem.c | 501 ++++++++++ include/configs/MPC8313ERDB.h | 2 +- include/jffs2/load_kernel.h | 7 +- include/linux/mtd/mtd.h | 83 +- include/linux/mtd/nand.h | 734 +++++++++++++++ include/linux/mtd/partitions.h | 22 +- include/linux/mtd/spinand.h | 432 +++++++++ include/mtd.h | 12 +- include/spi-mem.h | 258 +++++ include/spi.h | 11 + lib/strto.c | 36 +- 102 files changed, 5997 insertions(+), 1045 deletions(-) create mode 100644 cmd/mtd.c create mode 100644 doc/device-tree-bindings/mtd/spi-nand.txt create mode 100644 drivers/mtd/nand/bbt.c create mode 100644 drivers/mtd/nand/core.c create mode 100644 drivers/mtd/nand/raw/Kconfig create mode 100644 drivers/mtd/nand/raw/Makefile rename drivers/mtd/nand/{ => raw}/am335x_spl_bch.c (100%) rename drivers/mtd/nand/{ => raw}/arasan_nfc.c (100%) rename drivers/mtd/nand/{ => raw}/atmel_nand.c (100%) rename drivers/mtd/nand/{ => raw}/atmel_nand_ecc.h (100%) rename drivers/mtd/nand/{ => raw}/davinci_nand.c (99%) rename drivers/mtd/nand/{ => raw}/denali.c (100%) rename drivers/mtd/nand/{ => raw}/denali.h (100%) rename drivers/mtd/nand/{ => raw}/denali_dt.c (100%) rename drivers/mtd/nand/{ => raw}/denali_spl.c (100%) rename drivers/mtd/nand/{ => raw}/fsl_elbc_nand.c (100%) rename drivers/mtd/nand/{ => raw}/fsl_elbc_spl.c (100%) rename drivers/mtd/nand/{ => raw}/fsl_ifc_nand.c (100%) rename drivers/mtd/nand/{ => raw}/fsl_ifc_spl.c (100%) rename drivers/mtd/nand/{ => raw}/fsl_upm.c (100%) rename drivers/mtd/nand/{ => raw}/fsmc_nand.c (100%) rename drivers/mtd/nand/{ => raw}/kb9202_nand.c (100%) rename drivers/mtd/nand/{ => raw}/kirkwood_nand.c (100%) rename drivers/mtd/nand/{ => raw}/kmeter1_nand.c (100%) rename drivers/mtd/nand/{ => raw}/lpc32xx_nand_mlc.c (100%) rename drivers/mtd/nand/{ => raw}/lpc32xx_nand_slc.c (100%) rename drivers/mtd/nand/{ => raw}/mxc_nand.c (100%) rename drivers/mtd/nand/{ => raw}/mxc_nand.h (100%) rename drivers/mtd/nand/{ => raw}/mxc_nand_spl.c (100%) rename drivers/mtd/nand/{ => raw}/mxs_nand.c (100%) rename drivers/mtd/nand/{ => raw}/mxs_nand.h (100%) rename drivers/mtd/nand/{ => raw}/mxs_nand_dt.c (100%) rename drivers/mtd/nand/{ => raw}/mxs_nand_spl.c (100%) rename drivers/mtd/nand/{ => raw}/nand.c (100%) rename drivers/mtd/nand/{ => raw}/nand_base.c (98%) rename drivers/mtd/nand/{ => raw}/nand_bbt.c (100%) rename drivers/mtd/nand/{ => raw}/nand_bch.c (100%) rename drivers/mtd/nand/{ => raw}/nand_ecc.c (99%) rename drivers/mtd/nand/{ => raw}/nand_ids.c (100%) rename drivers/mtd/nand/{ => raw}/nand_plat.c (100%) rename drivers/mtd/nand/{ => raw}/nand_spl_load.c (100%) rename drivers/mtd/nand/{ => raw}/nand_spl_loaders.c (100%) rename drivers/mtd/nand/{ => raw}/nand_spl_simple.c (100%) rename drivers/mtd/nand/{ => raw}/nand_timings.c (100%) rename drivers/mtd/nand/{ => raw}/nand_util.c (99%) rename drivers/mtd/nand/{ => raw}/omap_elm.c (100%) rename drivers/mtd/nand/{ => raw}/omap_gpmc.c (100%) rename drivers/mtd/nand/{ => raw}/pxa3xx_nand.c (99%) rename drivers/mtd/nand/{ => raw}/pxa3xx_nand.h (100%) rename drivers/mtd/nand/{ => raw}/sunxi_nand.c (100%) rename drivers/mtd/nand/{ => raw}/sunxi_nand_spl.c (100%) rename drivers/mtd/nand/{ => raw}/tegra_nand.c (100%) rename drivers/mtd/nand/{ => raw}/tegra_nand.h (100%) rename drivers/mtd/nand/{ => raw}/vf610_nfc.c (100%) rename drivers/mtd/nand/{ => raw}/zynq_nand.c (100%) create mode 100644 drivers/mtd/nand/spi/Kconfig create mode 100644 drivers/mtd/nand/spi/Makefile create mode 100644 drivers/mtd/nand/spi/core.c create mode 100644 drivers/mtd/nand/spi/macronix.c create mode 100644 drivers/mtd/nand/spi/micron.c create mode 100644 drivers/mtd/nand/spi/winbond.c create mode 100644 drivers/spi/spi-mem.c create mode 100644 include/linux/mtd/nand.h create mode 100644 include/linux/mtd/spinand.h create mode 100644 include/spi-mem.h

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[U-Boot] [PATCH] arm64: gic: Do gicv3 secure initialization based on EL level
by Michal Simek 03 Oct '18

03 Oct '18

Do gic cpu initialization based on EL level which u-boot enters. U-Boot can't access EL3 regs when runs in EL2/EL1, etc. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/arm/lib/gic_64.S | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/arch/arm/lib/gic_64.S b/arch/arm/lib/gic_64.S index 745c7858da79..155212a419be 100644 --- a/arch/arm/lib/gic_64.S +++ b/arch/arm/lib/gic_64.S @@ -107,6 +107,8 @@ ENTRY(gic_init_secure_percpu) mov w11, #0x1 /* Enable SGI 0 */ str w11, [x10, GICR_ISENABLERn] + switch_el x10, 3f, 2f, 1f +3: /* Initialize Cpu Interface */ mrs x10, ICC_SRE_EL3 orr x10, x10, #0xf /* SRE & Disable IRQ/FIQ Bypass & */ @@ -114,19 +116,19 @@ ENTRY(gic_init_secure_percpu) msr ICC_SRE_EL3, x10 isb - mrs x10, ICC_SRE_EL2 - orr x10, x10, #0xf /* SRE & Disable IRQ/FIQ Bypass & */ - /* Allow EL1 access to ICC_SRE_EL1 */ - msr ICC_SRE_EL2, x10 - isb - mov x10, #0x3 /* EnableGrp1NS | EnableGrp1S */ msr ICC_IGRPEN1_EL3, x10 isb msr ICC_CTLR_EL3, xzr isb - +2: + mrs x10, ICC_SRE_EL2 + orr x10, x10, #0xf /* SRE & Disable IRQ/FIQ Bypass & */ + /* Allow EL1 access to ICC_SRE_EL1 */ + msr ICC_SRE_EL2, x10 + isb +1: msr ICC_CTLR_EL1, xzr /* NonSecure ICC_CTLR_EL1 */ isb -- 1.9.1

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Re: [U-Boot] [PATCH 1/1] riscv: allow native compilation
by Rick Chen 03 Oct '18

03 Oct '18

> If environment variable CROSS_COMPILE is not set, this indicates native > compilation. In this case we should not set an arbitrary value which is not > applicable for 64bit anyway. > OK ! Thanks for your correction. B.R Rick > Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> > --- > arch/riscv/config.mk | 4 ---- > 1 file changed, 4 deletions(-) > > diff --git a/arch/riscv/config.mk b/arch/riscv/config.mk index > 219e66683d..f7a2ffbbc6 100644 > --- a/arch/riscv/config.mk > +++ b/arch/riscv/config.mk > @@ -10,10 +10,6 @@ > # Rick Chen, Andes Technology Corporation <rick(a)andestech.com> # > > -ifeq ($(CROSS_COMPILE),) > -CROSS_COMPILE := riscv32-unknown-linux-gnu- -endif > - > 32bit-emul := elf32lriscv > 64bit-emul := elf64lriscv >

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[U-Boot] [PATCH] ARM: rmobile: Mark 4-64GiB as DRAM on Gen3
by Marek Vasut 02 Oct '18

02 Oct '18

Mark area 0x1_0000_0000 - 0x10_0000_0000 as DRAM on Gen3 as the chip is capable of addressing that and U-Boot can make use of it. This patch prevents exception when accessing those areas. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- arch/arm/mach-rmobile/memmap-gen3.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-rmobile/memmap-gen3.c b/arch/arm/mach-rmobile/memmap-gen3.c index 57a2f88fc4..92c8f2e80d 100644 --- a/arch/arm/mach-rmobile/memmap-gen3.c +++ b/arch/arm/mach-rmobile/memmap-gen3.c @@ -29,6 +29,12 @@ static struct mm_region gen3_mem_map[] = { .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + .virt = 0x100000000UL, + .phys = 0x100000000UL, + .size = 0xf00000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE }, { /* List terminator */ 0, -- 2.18.0

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