October 2018 - U-Boot

[U-Boot] [PATCH v2 00/33] TF-A Boot support for NXP Chassis 2 platforms
by Rajesh Bhagat 07 Oct '18

07 Oct '18

Includes changes in u-boot framework to support TF-A for NXP Chassis 2 platforms. A new defconfig is added namely ls*_ram_defconfig which will be used for all boot sources when TF-A is used. Tested on LS1043A, LS1046A and LS1012A platforms. Changes in v2: - Patch subject and description changes - Removed extra CONFIG_TFABOOT flag usage - Merged board specific TFA boot support patches - Checked compilation using buildman tool for each commit Pankit Garg (5): armv8: fsl-layerscape: change tlb base from OCRAM to DDR in EL < 3 drivers: ifc: dynamic chipselect mapping support armv8: fsl-layerscape: bootcmd identification for TFABOOT armv8: fsl-layerscape: add support of MC framework for TFA armv8: sec_firmware: return job ring status as true in TFABOOT Rajesh Bhagat (18): env: allow flash and nand env driver to compile together env: sf: define API to override sf environment address env: nand: remove unnecessary env_ptr definition driver/ifc: replace __ilog2 with LOG2 macro armv8: fsl-layerscape: identify boot source from PORSR register armv8: layerscape: remove EL3 specific erratas for TFABOOT armv8: layerscape: secure boot support for environment selection armv8: layerscape: add SMC calls for DDR size and bank info armv8: layerscape: skip OCRAM init for TFABOOT armv8: sec_firmware: change el2_to_aarch32 SMC ID net: fm: add TFABOOT support drivers: qe: add TFABOOT support armv8: ls1046ardb: Add TFABOOT support armv8: ls1046aqds: Add TFABOOT support armv8: ls1043ardb: Add TFABOOT support armv8: ls1043aqds: Add TFABOOT support armv8: ls1012ardb: Add TFABOOT support armv8: ls1012aqds: Add TFABOOT support Vinitha V Pillai (7): armv8: ls1046ardb: Add TFABOOT defconfig for secure boot armv8: ls1046aqds: Add TFABOOT defconfig for secure boot armv8: ls1043ardb: Add TFABOOT defconfig for secure boot armv8: ls1043aqds: Add TFABOOT defconfig for secure boot armv8: ls1012ardb: Add TFABOOT defconfig for secure boot armv8: ls1012aqds: Add TFABOOT defconfig for secure boot armv8: ls1012a: fix ls1012aqds secure boot compilation York Sun (3): move data structure out of cpu.h armv8: layerscape: Enable routing SError exception armv8: fsl-layerscape: Update parsing boot source arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 31 +- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 613 +++++++++++++++++- arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 12 +- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 128 ++++ arch/arm/cpu/armv8/sec_firmware.c | 4 + arch/arm/cpu/armv8/sec_firmware_asm.S | 2 +- .../arm/include/asm/arch-fsl-layerscape/cpu.h | 300 --------- .../asm/arch-fsl-layerscape/immap_lsch2.h | 20 + .../asm/arch-fsl-layerscape/immap_lsch3.h | 49 ++ .../arm/include/asm/arch-fsl-layerscape/soc.h | 22 + board/freescale/ls1012aqds/Kconfig | 10 + board/freescale/ls1012aqds/ls1012aqds.c | 23 +- board/freescale/ls1012ardb/Kconfig | 4 + board/freescale/ls1012ardb/ls1012ardb.c | 16 +- board/freescale/ls1043aqds/ddr.c | 11 + board/freescale/ls1043aqds/ls1043aqds.c | 147 ++++- board/freescale/ls1043ardb/ddr.c | 14 + board/freescale/ls1043ardb/ls1043ardb.c | 110 ++++ board/freescale/ls1046aqds/ddr.c | 11 + board/freescale/ls1046aqds/ls1046aqds.c | 148 ++++- board/freescale/ls1046ardb/ddr.c | 12 + configs/ls1012aqds_tfa_SECURE_BOOT_defconfig | 65 ++ configs/ls1012aqds_tfa_defconfig | 62 ++ configs/ls1012ardb_tfa_SECURE_BOOT_defconfig | 63 ++ configs/ls1012ardb_tfa_defconfig | 56 ++ configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 58 ++ configs/ls1043aqds_tfa_defconfig | 54 ++ configs/ls1043ardb_tfa_SECURE_BOOT_defconfig | 51 ++ configs/ls1043ardb_tfa_defconfig | 49 ++ configs/ls1046aqds_tfa_SECURE_BOOT_defconfig | 58 ++ configs/ls1046aqds_tfa_defconfig | 57 ++ configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 52 ++ configs/ls1046ardb_tfa_defconfig | 49 ++ drivers/misc/fsl_ifc.c | 488 ++++++++++---- drivers/net/fm/fm.c | 102 ++- drivers/qe/qe.c | 81 +++ env/flash.c | 4 +- env/nand.c | 6 +- env/sf.c | 9 +- include/configs/B4860QDS.h | 2 +- include/configs/T102xQDS.h | 2 +- include/configs/T1040QDS.h | 2 +- include/configs/T208xQDS.h | 2 +- include/configs/T4240QDS.h | 2 +- include/configs/T4240RDB.h | 2 +- include/configs/ls1012a_common.h | 16 +- include/configs/ls1012aqds.h | 1 + include/configs/ls1012ardb.h | 6 + include/configs/ls1043a_common.h | 27 +- include/configs/ls1043aqds.h | 50 +- include/configs/ls1043ardb.h | 29 + include/configs/ls1046a_common.h | 12 + include/configs/ls1046aqds.h | 59 +- include/configs/ls1046ardb.h | 15 + include/environment.h | 1 - include/fsl_ifc.h | 27 +- 56 files changed, 2819 insertions(+), 487 deletions(-) create mode 100644 configs/ls1012aqds_tfa_SECURE_BOOT_defconfig create mode 100644 configs/ls1012aqds_tfa_defconfig create mode 100644 configs/ls1012ardb_tfa_SECURE_BOOT_defconfig create mode 100644 configs/ls1012ardb_tfa_defconfig create mode 100644 configs/ls1043aqds_tfa_SECURE_BOOT_defconfig create mode 100644 configs/ls1043aqds_tfa_defconfig create mode 100644 configs/ls1043ardb_tfa_SECURE_BOOT_defconfig create mode 100644 configs/ls1043ardb_tfa_defconfig create mode 100644 configs/ls1046aqds_tfa_SECURE_BOOT_defconfig create mode 100644 configs/ls1046aqds_tfa_defconfig create mode 100644 configs/ls1046ardb_tfa_SECURE_BOOT_defconfig create mode 100644 configs/ls1046ardb_tfa_defconfig -- 2.17.1

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[U-Boot] [PATCH 1/1] efi_loader: correct signature of GetPosition, SetPosition
by Heinrich Schuchardt 07 Oct '18

07 Oct '18

The UEFI spec requires that file positions are passed as u64 in GetPosition() and SetPosition(). Check if the file handle points to a directory in GetPosition(). Provide a unit test for GetPosition() and SetPosition(). Fix Coverity warning CID 184079 (CONSTANT_EXPRESSION_RESULT). Add comments. Fixes: b6dd57773719 ("efi_loader: use correct types in EFI_FILE_PROTOCOL") Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- include/efi_api.h | 4 +- lib/efi_loader/efi_file.c | 39 ++++++++++++++++---- lib/efi_selftest/efi_selftest_block_device.c | 30 ++++++++++++++- 3 files changed, 61 insertions(+), 12 deletions(-) diff --git a/include/efi_api.h b/include/efi_api.h index e6566bb358..3194db3517 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -1175,9 +1175,9 @@ struct efi_file_handle { efi_status_t (EFIAPI *write)(struct efi_file_handle *file, efi_uintn_t *buffer_size, void *buffer); efi_status_t (EFIAPI *getpos)(struct efi_file_handle *file, - efi_uintn_t *pos); + u64 *pos); efi_status_t (EFIAPI *setpos)(struct efi_file_handle *file, - efi_uintn_t pos); + u64 pos); efi_status_t (EFIAPI *getinfo)(struct efi_file_handle *file, const efi_guid_t *info_type, efi_uintn_t *buffer_size, void *buffer); diff --git a/lib/efi_loader/efi_file.c b/lib/efi_loader/efi_file.c index f3226a8dc0..beb4fba917 100644 --- a/lib/efi_loader/efi_file.c +++ b/lib/efi_loader/efi_file.c @@ -443,28 +443,51 @@ error: return EFI_EXIT(ret); } +/** + * efi_file_getpos() - get current position in file + * + * This function implements the GetPosition service of the EFI file protocol. + * See the UEFI spec for details. + * + * @file: file handle + * @pos: pointer to file position + * Return: status code + */ static efi_status_t EFIAPI efi_file_getpos(struct efi_file_handle *file, - efi_uintn_t *pos) + u64 *pos) { + efi_status_t ret = EFI_SUCCESS; struct file_handle *fh = to_fh(file); EFI_ENTRY("%p, %p", file, pos); - if (fh->offset <= SIZE_MAX) { - *pos = fh->offset; - return EFI_EXIT(EFI_SUCCESS); - } else { - return EFI_EXIT(EFI_DEVICE_ERROR); + if (fh->isdir) { + ret = EFI_UNSUPPORTED; + goto out; } + + *pos = fh->offset; +out: + return EFI_EXIT(ret); } +/** + * efi_file_setpos() - set current position in file + * + * This function implements the SetPosition service of the EFI file protocol. + * See the UEFI spec for details. + * + * @file: file handle + * @pos: new file position + * Return: status code + */ static efi_status_t EFIAPI efi_file_setpos(struct efi_file_handle *file, - efi_uintn_t pos) + u64 pos) { struct file_handle *fh = to_fh(file); efi_status_t ret = EFI_SUCCESS; - EFI_ENTRY("%p, %zu", file, pos); + EFI_ENTRY("%p, %llu", file, pos); if (fh->isdir) { if (pos != 0) { diff --git a/lib/efi_selftest/efi_selftest_block_device.c b/lib/efi_selftest/efi_selftest_block_device.c index 1cd13042e9..d4e4fac1c7 100644 --- a/lib/efi_selftest/efi_selftest_block_device.c +++ b/lib/efi_selftest/efi_selftest_block_device.c @@ -308,6 +308,7 @@ static int execute(void) } system_info; efi_uintn_t buf_size; char buf[16] __aligned(ARCH_DMA_MINALIGN); + u64 pos; /* Connect controller to virtual disk */ ret = boottime->connect_controller(disk_handle, NULL, NULL, 1); @@ -392,21 +393,36 @@ static int execute(void) efi_st_error("Failed to open file\n"); return EFI_ST_FAILURE; } + ret = file->setpos(file, 1); + if (ret != EFI_SUCCESS) { + efi_st_error("SetPosition failed\n"); + return EFI_ST_FAILURE; + } buf_size = sizeof(buf) - 1; ret = file->read(file, &buf_size, buf); if (ret != EFI_SUCCESS) { efi_st_error("Failed to read file\n"); return EFI_ST_FAILURE; } - if (buf_size != 13) { + if (buf_size != 12) { efi_st_error("Wrong number of bytes read: %u\n", (unsigned int)buf_size); return EFI_ST_FAILURE; } - if (efi_st_memcmp(buf, "Hello world!", 12)) { + if (efi_st_memcmp(buf, "ello world!", 11)) { efi_st_error("Unexpected file content\n"); return EFI_ST_FAILURE; } + ret = file->getpos(file, &pos); + if (ret != EFI_SUCCESS) { + efi_st_error("GetPosition failed\n"); + return EFI_ST_FAILURE; + } + if (pos != 13) { + efi_st_error("GetPosition returned %u, expected 13\n", + (unsigned int)pos); + return EFI_ST_FAILURE; + } ret = file->close(file); if (ret != EFI_SUCCESS) { efi_st_error("Failed to close file\n"); @@ -434,6 +450,16 @@ static int execute(void) efi_st_error("Failed to close file\n"); return EFI_ST_FAILURE; } + ret = file->getpos(file, &pos); + if (ret != EFI_SUCCESS) { + efi_st_error("GetPosition failed\n"); + return EFI_ST_FAILURE; + } + if (pos != 7) { + efi_st_error("GetPosition returned %u, expected 7\n", + (unsigned int)pos); + return EFI_ST_FAILURE; + } /* Verify file */ boottime->set_mem(buf, sizeof(buf), 0); -- 2.19.0

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[U-Boot] [PATCH 0/4] x86: Fix up some bootstage problems
by Simon Glass 07 Oct '18

07 Oct '18

There is a subtle problem with bootstage on x86. This series aims to fix it so that it can be re-enabled on x86. Simon Glass (4): Enable CONFIG_TIMER_EARLY with bootstage chromebook_samus: Increase pre-relocation memory binman: Add support for Intel reference code Revert "x86: galileo: Fix boot failure" configs/chromebook_samus_defconfig | 2 +- configs/galileo_defconfig | 3 +++ drivers/timer/Kconfig | 3 +++ tools/binman/etype/intel_refcode.py | 27 +++++++++++++++++++++++++++ 4 files changed, 34 insertions(+), 1 deletion(-) create mode 100644 tools/binman/etype/intel_refcode.py -- 2.19.0.rc1.350.ge57e33dbd1-goog

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[U-Boot] [PATCH] spl: spi: Do not hardcode fixed size for header
by Michal Simek 07 Oct '18

07 Oct '18

Find out size directly from header structure. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- common/spl/spl_spi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c index e10cf0124fb7..5180c001a9b8 100644 --- a/common/spl/spl_spi.c +++ b/common/spl/spl_spi.c @@ -28,7 +28,7 @@ static int spi_load_image_os(struct spl_image_info *spl_image, int err; /* Read for a header, parse or error out. */ - spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, 0x40, + spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, sizeof(*header), (void *)header); if (image_get_magic(header) != IH_MAGIC) @@ -88,7 +88,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, return -ENODEV; } - header = spl_get_load_buffer(-sizeof(*header), 0x40); + header = spl_get_load_buffer(-sizeof(*header), sizeof(*header)); #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) payload_offs = fdtdec_get_config_int(gd->fdt_blob, @@ -101,7 +101,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, #endif { /* Load u-boot, mkimage header is 64 bytes. */ - err = spi_flash_read(flash, payload_offs, 0x40, + err = spi_flash_read(flash, payload_offs, sizeof(*header), (void *)header); if (err) { debug("%s: Failed to read from SPI flash (err=%d)\n", -- 1.9.1

2 1

[U-Boot] [PATCH] spl: ram: Fix u_boot_pos calculation
by Michal Simek 07 Oct '18

07 Oct '18

The patch: "spl: Weed out CONFIG_SYS_TEXT_BASE usage" (sha1: 04ce5427bd3914cab8be78513275a20ab878520a) introduced bug where assigning to u_boot_pos variable wasn't done which end up in situation where SPL wasn't able to find out image on the selected address. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- Lines are unfortunatelly longer then 80 char limits but there is no nice way how to fix it. --- common/spl/spl_ram.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c index 619b39a53748..5fcc3b1504bb 100644 --- a/common/spl/spl_ram.c +++ b/common/spl/spl_ram.c @@ -63,9 +63,8 @@ static int spl_ram_load_image(struct spl_image_info *spl_image, * No binman support or no information. For now, fix it * to the address pointed to by U-Boot. */ - header = spl_get_load_buffer(-sizeof(*header), - sizeof(*header)); - + u_boot_pos = (ulong)spl_get_load_buffer(-sizeof(*header), + sizeof(*header)); } header = (struct image_header *)map_sysmem(u_boot_pos, 0); -- 1.9.1

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[U-Boot] [PATCH 1/1] fs: fat: fix set_cluster()
by Heinrich Schuchardt 07 Oct '18

07 Oct '18

Avoid CoverityScan warning SIGN_EXTENSION CID 184096 by changing the type of parameter size of set_cluster(). Avoid leaking stack content when writing an incomplete last sector. Reported-by: Tom Rini <trini(a)konsulko.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- fs/fat/fat_write.c | 27 +++++++++++++++++---------- 1 file changed, 17 insertions(+), 10 deletions(-) diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c index fc211e74bc..5e3aec2d90 100644 --- a/fs/fat/fat_write.c +++ b/fs/fat/fat_write.c @@ -387,16 +387,22 @@ static __u32 determine_fatent(fsdata *mydata, __u32 entry) return next_entry; } -/* - * Write at most 'size' bytes from 'buffer' into the specified cluster. - * Return 0 on success, -1 otherwise. +/** + * set_cluster() - write data to cluster + * + * Write 'size' bytes from 'buffer' into the specified cluster. + * + * @mydata: data to be written + * @clustnum: cluster to be written to + * @buffer: data to be written + * @size: bytes to be written (but not more than the size of a cluster) + * Return: 0 on success, -1 otherwise */ static int -set_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer, - unsigned long size) +set_cluster(fsdata *mydata, u32 clustnum, u8 *buffer, u32 size) { - __u32 idx = 0; - __u32 startsect; + u32 idx = 0; + u32 startsect; int ret; if (clustnum > 0) @@ -438,7 +444,8 @@ set_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer, if (size) { ALLOC_CACHE_ALIGN_BUFFER(__u8, tmpbuf, mydata->sect_size); - + /* Do not leak content of stack */ + memset(tmpbuf, 0, mydata->sect_size); memcpy(tmpbuf, buffer, size); ret = disk_write(startsect, 1, tmpbuf); if (ret != 1) { @@ -872,7 +879,7 @@ set_clusters: /* set remaining bytes */ actsize = filesize; - if (set_cluster(mydata, curclust, buffer, (int)actsize) != 0) { + if (set_cluster(mydata, curclust, buffer, (u32)actsize) != 0) { debug("error: writing cluster\n"); return -1; } @@ -889,7 +896,7 @@ set_clusters: return 0; getit: - if (set_cluster(mydata, curclust, buffer, (int)actsize) != 0) { + if (set_cluster(mydata, curclust, buffer, (u32)actsize) != 0) { debug("error: writing cluster\n"); return -1; } -- 2.19.0

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[U-Boot] [PATCH] mach-stm32: Set MPU SDRAM size to 512MB for STM32F7/H7
by Patrice Chotard 07 Oct '18

07 Oct '18

This allows to boot all STM32F7 and STM32H7 boards independently of the amount of embedded SDRAM. Signed-off-by: Patrice Chotard <patrice.chotard(a)st.com> Reviewed-by: Vikas Manocha <vikas.manocha(a)st.com> --- arch/arm/mach-stm32/soc.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-stm32/soc.c b/arch/arm/mach-stm32/soc.c index 2b528545306f..738305caed18 100644 --- a/arch/arm/mach-stm32/soc.c +++ b/arch/arm/mach-stm32/soc.c @@ -21,14 +21,9 @@ int arch_cpu_init(void) O_I_WB_RD_WR_ALLOC, REGION_16MB }, #endif -#if defined(CONFIG_STM32F7) +#if defined(CONFIG_STM32F7) || defined(CONFIG_STM32H7) { 0xC0000000, REGION_0, XN_DIS, PRIV_RW_USR_RW, - O_I_WB_RD_WR_ALLOC, REGION_16MB }, -#endif - -#if defined(CONFIG_STM32H7) - { 0xD0000000, REGION_0, XN_DIS, PRIV_RW_USR_RW, - O_I_WB_RD_WR_ALLOC, REGION_32MB }, + O_I_WB_RD_WR_ALLOC, REGION_512MB }, #endif }; -- 1.9.1

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[U-Boot] [PATCH 1/1] fs: fat: memory leak in fat_unlink()
by Heinrich Schuchardt 07 Oct '18

07 Oct '18

Do not leak filename_copy in case of error. Catch out of memory when calling strdup. This addresses Coverity Scan CID 184086. Reported-by: Tom Rini <trini(a)konsulko.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- fs/fat/fat_write.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c index 4286a0a847..b1ed0e6734 100644 --- a/fs/fat/fat_write.c +++ b/fs/fat/fat_write.c @@ -1263,6 +1263,11 @@ int fat_unlink(const char *filename) char *filename_copy, *dirname, *basename; filename_copy = strdup(filename); + if (!filename_copy) { + printf("Error: allocating memory\n"); + ret = -ENOMEM; + goto exit; + } split_filename(filename_copy, &dirname, &basename); if (!strcmp(dirname, "/") && !strcmp(basename, "")) { @@ -1274,7 +1279,8 @@ int fat_unlink(const char *filename) itr = malloc_cache_aligned(sizeof(fat_itr)); if (!itr) { printf("Error: allocating memory\n"); - return -ENOMEM; + ret = -ENOMEM; + goto exit; } ret = fat_itr_root(itr, &fsdata); -- 2.19.0

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[U-Boot] [PATCH 1/5] ARM: DTS: LogicPD-SOM-LV & Torpedo: Resync DTS with Kernel
by Adam Ford 07 Oct '18

07 Oct '18

The device tree entries are from linux-omap's for-next branch destined to me put into 4.20 (or whatever the version is after 4.19) Signed-off-by: Adam Ford <aford173(a)gmail.com> diff --git a/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts b/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts index 2428373952..2aca9111c6 100644 --- a/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts +++ b/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts @@ -15,3 +15,18 @@ model = "LogicPD Zoom DM3730 SOM-LV Development Kit"; compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3630", "ti,omap3"; }; + +&omap3_pmx_core2 { + pinctrl-names = "default"; + pinctrl-0 = <&hsusb2_2_pins>; + hsusb2_2_pins: pinmux_hsusb2_2_pins { + pinctrl-single,pins = < + OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ + OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ + OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ + OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ + OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ + OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ + >; + }; +}; diff --git a/arch/arm/dts/logicpd-som-lv.dtsi b/arch/arm/dts/logicpd-som-lv.dtsi index 3bb28c03ca..03485509c8 100644 --- a/arch/arm/dts/logicpd-som-lv.dtsi +++ b/arch/arm/dts/logicpd-som-lv.dtsi @@ -129,7 +129,7 @@ }; &mmc3 { - interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>; + interrupts-extended = <&intc 94>; pinctrl-0 = <&mmc3_pins &wl127x_gpio>; pinctrl-names = "default"; vmmc-supply = <&wl12xx_vmmc>; @@ -142,7 +142,7 @@ compatible = "ti,wl1273"; reg = <2>; interrupt-parent = <&gpio1>; - interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; /* gpio 2 */ + interrupts = <2 IRQ_TYPE_EDGE_RISING>; /* gpio 2 */ ref-clock-frequency = <26000000>; }; }; @@ -232,6 +232,20 @@ >; }; + i2c2_pins: pinmux_i2c2_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */ + OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */ + >; + }; + + i2c3_pins: pinmux_i2c3_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */ + OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */ + >; + }; + tsc2004_pins: pinmux_tsc2004_pins { pinctrl-single,pins = < OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4) /* mcbsp4_dr.gpio_153 */ @@ -253,33 +267,6 @@ OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */ >; }; - i2c2_pins: pinmux_i2c2_pins { - pinctrl-single,pins = < - OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */ - OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */ - >; - }; - i2c3_pins: pinmux_i2c3_pins { - pinctrl-single,pins = < - OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */ - OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */ - >; - }; -}; - -&omap3_pmx_core2 { - pinctrl-names = "default"; - pinctrl-0 = <&hsusb2_2_pins>; - hsusb2_2_pins: pinmux_hsusb2_2_pins { - pinctrl-single,pins = < - OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ - OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ - OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ - OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ - OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ - OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ - >; - }; }; &uart2 { diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts b/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts index 234afd6d60..9d5d53fbe9 100644 --- a/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts +++ b/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts @@ -48,7 +48,7 @@ compatible = "ti,wl1283"; reg = <2>; interrupt-parent = <&gpio5>; - interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */ + interrupts = <24 IRQ_TYPE_EDGE_RISING>; /* gpio 152 */ ref-clock-frequency = <26000000>; tcxo-clock-frequency = <26000000>; }; -- 2.17.1

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[U-Boot] [PATCH] misc: Add support for the Arm Versatile Express config bus
by Liviu Dudau 07 Oct '18

07 Oct '18

Add support for the Arm Versatile Express config bus that is being used for exposing various subsystems via a generic configuration bus. This driver adds support for generating transactions on this configuration bus and can be used by other drivers to abstract the communication with the actual function providers. Signed-off-by: Liviu Dudau <liviu.dudau(a)foss.arm.com> --- drivers/misc/Kconfig | 8 +++ drivers/misc/Makefile | 1 + drivers/misc/vexpress_config.c | 127 +++++++++++++++++++++++++++++++++ 3 files changed, 136 insertions(+) create mode 100644 drivers/misc/vexpress_config.c diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index c2b7cc15db..468a5682e3 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -41,6 +41,14 @@ config ROCKCHIP_EFUSE extended (by porting the read function from the Linux kernel sources) to support other recent Rockchip devices. +config VEXPRESS_CONFIG + bool "Enable support for Arm Versatile Express config bus" + depends on MISC + help + If you say Y here, you will get support for accessing the + configuration bus on the Arm Versatile Express boards via + a sysreg driver. + config CMD_CROS_EC bool "Enable crosec command" depends on CROS_EC diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 32ef4a53c7..6d3418efc7 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -55,3 +55,4 @@ obj-$(CONFIG_STM32MP_FUSE) += stm32mp_fuse.o obj-$(CONFIG_SYS_DPAA_QBMAN) += fsl_portals.o obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o +obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress_config.o diff --git a/drivers/misc/vexpress_config.c b/drivers/misc/vexpress_config.c new file mode 100644 index 0000000000..2cd433d01e --- /dev/null +++ b/drivers/misc/vexpress_config.c @@ -0,1 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Arm Ltd + * Author: Liviu Dudau <liviu.dudau(a)foss.arm.com> + * + */ +#define DEBUG +#include <common.h> +#include <dm.h> +#include <dm/read.h> +#include <asm/io.h> +#include <linux/delay.h> +#include <misc.h> + +#define SYS_CFGDATA 0xa0 + +#define SYS_CFGCTRL 0xa4 +#define SYS_CFGCTRL_START BIT(31) +#define SYS_CFGCTRL_WRITE BIT(30) + +#define SYS_CFGSTAT 0xa8 +#define SYS_CFGSTAT_ERR BIT(1) +#define SYS_CFGSTAT_COMPLETE BIT(0) + +struct vexpress_config_sysreg { + phys_addr_t addr; + u32 site; +}; + +static int vexpress_config_exec(struct vexpress_config_sysreg *syscfg, + bool write, void *buf, int size) +{ + u32 cmd, status, tries = 100; + + cmd = (*(u32 *)buf) | SYS_CFGCTRL_START | (syscfg->site << 16); + + if (!write) { + /* write a canary in the data register for reads */ + writel(0xdeadbeef, syscfg->addr + SYS_CFGDATA); + } else { + cmd |= SYS_CFGCTRL_WRITE; + writel(((u32 *)buf)[1], syscfg->addr + SYS_CFGDATA); + } + writel(0, syscfg->addr + SYS_CFGSTAT); + writel(cmd, syscfg->addr + SYS_CFGCTRL); + + /* completion of command takes ages, go to sleep (150us) */ + do { + udelay(150); + status = readl(syscfg->addr + SYS_CFGSTAT); + if (status & SYS_CFGSTAT_ERR) + return -EFAULT; + } while (--tries && !(status & SYS_CFGSTAT_COMPLETE)); + + if (!tries) + return -ETIMEDOUT; + + if (!write) + (*(u32 *)buf) = readl(syscfg->addr + SYS_CFGDATA); + + return 0; +} + +static int vexpress_config_read(struct udevice *dev, int offset, void *buf, int size) +{ + struct vexpress_config_sysreg *priv = dev_get_uclass_priv(dev); + + if (size != sizeof(u32)) + return -EINVAL; + + return vexpress_config_exec(priv, false, buf, size); +} + +static int vexpress_config_write(struct udevice *dev, int offset, const void *buf, int size) +{ + struct vexpress_config_sysreg *priv = dev_get_uclass_priv(dev); + + if (size != sizeof(u32) * 2) + return -EINVAL; + + return vexpress_config_exec(priv, true, (void *)buf, size); +} + +static struct misc_ops vexpress_config_ops = { + .read = vexpress_config_read, + .write = vexpress_config_write, +}; + +static int vexpress_config_probe(struct udevice *dev) +{ + struct ofnode_phandle_args args; + struct vexpress_config_sysreg *priv; + const char *prop; + int err, prop_size; + + err = dev_read_phandle_with_args(dev, "arm,vexpress,config-bridge", + NULL, 0, 0, &args); + if (err) + return err; + + prop = ofnode_get_property(args.node, "compatible", &prop_size); + if (!prop || (strncmp(prop, "arm,vexpress-sysreg", 19) != 0)) + return -ENOENT; + + priv = calloc(1, sizeof(*priv)); + if (!priv) + return -ENOMEM; + + dev->uclass_priv = priv; + priv->addr = ofnode_get_addr(args.node); + + return dev_read_u32(dev, "arm,vexpress,site", &priv->site); +} + +static const struct udevice_id vexpress_config_ids[] = { + { .compatible = "arm,vexpress,config-bus" }, + { } +}; + +U_BOOT_DRIVER(vexpress_config_drv) = { + .name = "vexpress_config_bus", + .id = UCLASS_MISC, + .of_match = vexpress_config_ids, + .bind = dm_scan_fdt_dev, + .probe = vexpress_config_probe, + .ops = &vexpress_config_ops, +}; -- 2.18.0

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