September 2017 - U-Boot

[U-Boot] [PATCH 00/10] mips: bmips: add SPI support
by Álvaro Fernández Rojas 26 Jan '18

26 Jan '18

BCM63xx SPI controller is a bit tricky since it doesn't allow keeping CS active between transfers, so I had to modify the spi_flash driver in order to allow limiting reads. Álvaro Fernández Rojas (10): drivers: spi: allow limiting reads drivers: spi: add config to consider command bytes when writting to flash dm: spi: add BCM63xx SPI driver mips: bmips: add bcm63xx-spi driver support for BCM6338 mips: bmips: add bcm63xx-spi driver support for BCM6348 mips: bmips: add bcm63xx-spi driver support for BCM6358 mips: bmips: add bcm63xx-spi driver support for BCM3380 mips: bmips: add bcm63xx-spi driver support for BCM63268 mips: bmips: enable the SPI flash on the Sagem F@ST1704 mips: bmips: enable the SPI flash on the Netgear CG3100D arch/mips/dts/brcm,bcm3380.dtsi | 13 ++ arch/mips/dts/brcm,bcm63268.dtsi | 13 ++ arch/mips/dts/brcm,bcm6338.dtsi | 13 ++ arch/mips/dts/brcm,bcm6348.dtsi | 13 ++ arch/mips/dts/brcm,bcm6358.dtsi | 13 ++ arch/mips/dts/netgear,cg3100d.dts | 13 ++ arch/mips/dts/sagem,f(a)st1704.dts | 13 ++ configs/netgear_cg3100d_ram_defconfig | 8 + configs/sagem_f@st1704_ram_defconfig | 8 + drivers/mtd/spi/spi_flash.c | 5 +- drivers/spi/Kconfig | 26 +++ drivers/spi/Makefile | 1 + drivers/spi/bcm63xx_spi.c | 404 ++++++++++++++++++++++++++++++++++ include/spi.h | 11 +- 14 files changed, 552 insertions(+), 2 deletions(-) create mode 100644 drivers/spi/bcm63xx_spi.c -- 2.1.4

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[U-Boot] STM32F746 Discovery - No serial output?
by Francois Dugast 23 Jan '18

23 Jan '18

Hi, I am trying to run the master on a STM32F746 Discovery board [1] by using stm32f746-disco_defconfig. It was built with gcc-arm-none-eabi-5_4-2016q3 [2] and flashed with OpenOCD [3]. A USB-serial adapter is connected to USART6_RX and USART6_TX (pins D0 and D1 of the Arduino connector) and configured for 115200 8N1. No output coming out through the serial interface. It is unlikely to be a hardware issue as output is coming out normally this way when using the U-Boot repository from Emcraft. I do not know what I am doing wrong, can you help me out? Cheers, Francois [1] http://www.st.com/en/evaluation-tools/32f746gdiscovery.html [2] https://launchpad.net/gcc-arm-embedded [3] http://openocd.org [4] https://github.com/EmcraftSystems/u-boot

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[U-Boot] [PATCH] travis-ci: Add qemu-x86_64 target
by Tom Rini 23 Jan '18

23 Jan '18

Add qemu-x86_64 to the list of targets we use for test.py runs. Signed-off-by: Tom Rini <trini(a)konsulko.com> --- .travis.yml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/.travis.yml b/.travis.yml index 48b7b101f1c6..dab55f34e51d 100644 --- a/.travis.yml +++ b/.travis.yml @@ -311,6 +311,13 @@ matrix: TOOLCHAIN="x86_64" BUILD_ROM="yes" - env: + - TEST_PY_BD="qemu-x86_64" + TEST_PY_TEST_SPEC="not sleep" + QEMU_TARGET="x86_64-softmmu" + BUILDMAN="^qemu-x86_64$" + TOOLCHAIN="x86_64" + BUILD_ROM="yes" + - env: - TEST_PY_BD="zynq_zc702" TEST_PY_TEST_SPEC="not sleep" QEMU_TARGET="arm-softmmu" -- 1.9.1

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[U-Boot] [PATCH] net: Remove nfs.h include from bootp.c
by Joe Hershberger 22 Jan '18

22 Jan '18

Nothing from this header is used there, so remove it. Signed-off-by: Joe Hershberger <joe.hershberger(a)ni.com> --- net/bootp.c | 1 - 1 file changed, 1 deletion(-) diff --git a/net/bootp.c b/net/bootp.c index 73370a1..59bb209 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -14,7 +14,6 @@ #include <net.h> #include <net/tftp.h> #include "bootp.h" -#include "nfs.h" #ifdef CONFIG_LED_STATUS #include <status_led.h> #endif -- 1.7.11.5

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[U-Boot] [PATCH] net: Fix buffer overrun error in netconsole
by Joe Hershberger 22 Jan '18

22 Jan '18

Need to not access the byte after the input_buffer. Reported-by: Coverity (CID: 144423) Signed-off-by: Joe Hershberger <joe.hershberger(a)ni.com> --- drivers/net/netconsole.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c index e9dbedf..028fca9 100644 --- a/drivers/net/netconsole.c +++ b/drivers/net/netconsole.c @@ -153,14 +153,17 @@ int nc_input_packet(uchar *pkt, struct in_addr src_ip, unsigned dest_port, len = sizeof(input_buffer) - input_size; end = input_offset + input_size; - if (end > sizeof(input_buffer)) + if (end >= sizeof(input_buffer)) end -= sizeof(input_buffer); chunk = len; - if (end + len > sizeof(input_buffer)) { + /* Check if packet will wrap in input_buffer */ + if (end + len >= sizeof(input_buffer)) { chunk = sizeof(input_buffer) - end; + /* Copy the second part of the pkt to start of input_buffer */ memcpy(input_buffer, pkt + chunk, len - chunk); } + /* Copy first (or only) part of pkt after end of current valid input*/ memcpy(input_buffer + end, pkt, chunk); input_size += len; -- 1.7.11.5

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[U-Boot] [PATCH] net: macb: Add support for Xilinx Zynq SoC
by Wilson Lee 22 Jan '18

22 Jan '18

Although Xilinx Zynq SoC was using MACB similar hardware. However, U-boot MACB driver was not supporting Xilinx Zynq SoC. This patch is to add support for the Xilinx Zynq SoC to the existing MACB network driver. This patch is to add Zynq GEM DMA Config, provide callback function for different linkspeed for case of using Xilinx Zynq Programmable Logic as GMII to RGMII convertor. This patch convert the return value to use error codes. Signed-off-by: Wilson Lee <wilson.lee(a)ni.com> Cc: Chen Yee Chew <chen.yee.chew(a)ni.com> Cc: Keng Soon Cheah <keng.soon.cheah(a)ni.com> Cc: Joe Hershberger <joe.hershberger(a)ni.com> Cc: Wenyou Yang <wenyou.yang(a)atmel.com> --- drivers/net/Kconfig | 7 +++++ drivers/net/macb.c | 91 ++++++++++++++++++++++++++++++++++++++++++++++------- drivers/net/macb.h | 1 + 3 files changed, 87 insertions(+), 12 deletions(-) diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 5ceea44..6c54f93 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -177,6 +177,13 @@ config MACB GEM (Gigabit Ethernet MAC) found in some ARM SoC devices. Say Y to include support for the MACB/GEM chip. +config MACB_ZYNQ + bool "Cadence MACB/GEM Ethernet Interface for Xilinx Zynq" + depends on MACB + help + The Cadence MACB ethernet interface was used on Zynq platform. + Say Y to enable support for the MACB/GEM in Zynq chip. + config PCH_GBE bool "Intel Platform Controller Hub EG20T GMAC driver" depends on DM_ETH && DM_PCI diff --git a/drivers/net/macb.c b/drivers/net/macb.c index f9373db..e62aefc 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -52,6 +52,22 @@ DECLARE_GLOBAL_DATA_PTR; #define MACB_TX_TIMEOUT 1000 #define MACB_AUTONEG_TIMEOUT 5000000 +#ifdef CONFIG_MACB_ZYNQ +/* INCR4 AHB bursts */ +#define MACB_ZYNQ_GEM_DMACR_BLENGTH 0x00000004 +/* Use full configured addressable space (8 Kb) */ +#define MACB_ZYNQ_GEM_DMACR_RXSIZE 0x00000300 +/* Use full configured addressable space (4 Kb) */ +#define MACB_ZYNQ_GEM_DMACR_TXSIZE 0x00000400 +/* Set RXBUF with use of 128 byte */ +#define MACB_ZYNQ_GEM_DMACR_RXBUF 0x00020000 +#define MACB_ZYNQ_GEM_DMACR_INIT \ + (MACB_ZYNQ_GEM_DMACR_BLENGTH | \ + MACB_ZYNQ_GEM_DMACR_RXSIZE | \ + MACB_ZYNQ_GEM_DMACR_TXSIZE | \ + MACB_ZYNQ_GEM_DMACR_RXBUF) +#endif + struct macb_dma_desc { u32 addr; u32 ctrl; @@ -461,13 +477,25 @@ static int macb_phy_find(struct macb_device *macb, const char *name) phy_id = macb_mdio_read(macb, MII_PHYSID1); if (phy_id != 0xffff) { printf("%s: PHY present at %d\n", name, i); - return 1; + return 0; } } /* PHY isn't up to snuff */ printf("%s: PHY not found\n", name); + return -ENODEV; +} + +/** + * macb_linkspd_cb - Linkspeed change callback function + * @regs: Base Register of MACB devices + * @speed: Linkspeed + * Returns 0 when operation success and negative errno number + * when operation failed. + */ +int __weak macb_linkspd_cb(void *regs, unsigned int speed) +{ return 0; } @@ -483,18 +511,20 @@ static int macb_phy_init(struct macb_device *macb, const char *name) u32 ncfgr; u16 phy_id, status, adv, lpa; int media, speed, duplex; + int ret; int i; arch_get_mdio_control(name); /* Auto-detect phy_addr */ - if (!macb_phy_find(macb, name)) - return 0; + ret = macb_phy_find(macb, name); + if (ret) + return ret; /* Check if the PHY is up to snuff... */ phy_id = macb_mdio_read(macb, MII_PHYSID1); if (phy_id == 0xffff) { printf("%s: No PHY present\n", name); - return 0; + return -ENODEV; } #ifdef CONFIG_PHYLIB @@ -530,7 +560,7 @@ static int macb_phy_init(struct macb_device *macb, const char *name) if (!(status & BMSR_LSTATUS)) { printf("%s: link down (status: 0x%04x)\n", name, status); - return 0; + return -ENETDOWN; } /* First check for GMAC and that it is GiB capable */ @@ -554,7 +584,11 @@ static int macb_phy_init(struct macb_device *macb, const char *name) macb_writel(macb, NCFGR, ncfgr); - return 1; + ret = macb_linkspd_cb(macb->regs, _1000BASET); + if (ret) + return ret; + + return 0; } } @@ -573,13 +607,21 @@ static int macb_phy_init(struct macb_device *macb, const char *name) ncfgr = macb_readl(macb, NCFGR); ncfgr &= ~(MACB_BIT(SPD) | MACB_BIT(FD) | GEM_BIT(GBE)); - if (speed) + if (speed) { ncfgr |= MACB_BIT(SPD); + ret = macb_linkspd_cb(macb->regs, _100BASET); + } else { + ret = macb_linkspd_cb(macb->regs, _10BASET); + } + + if (ret) + return ret; + if (duplex) ncfgr |= MACB_BIT(FD); macb_writel(macb, NCFGR, ncfgr); - return 1; + return 0; } static int gmac_init_multi_queues(struct macb_device *macb) @@ -616,6 +658,7 @@ static int _macb_init(struct macb_device *macb, const char *name) struct macb_device *macb = dev_get_priv(dev); #endif unsigned long paddr; + int ret; int i; /* @@ -649,6 +692,10 @@ static int _macb_init(struct macb_device *macb, const char *name) macb->tx_tail = 0; macb->next_rx_tail = 0; +#ifdef CONFIG_MACB_ZYNQ + macb_writel(macb, DMACFG, MACB_ZYNQ_GEM_DMACR_INIT); +#endif + macb_writel(macb, RBQP, macb->rx_ring_dma); macb_writel(macb, TBQP, macb->tx_ring_dma); @@ -709,11 +756,12 @@ static int _macb_init(struct macb_device *macb, const char *name) } #ifdef CONFIG_DM_ETH - if (!macb_phy_init(dev, name)) + ret = macb_phy_init(dev, name); #else - if (!macb_phy_init(macb, name)) + ret = macb_phy_init(macb, name); #endif - return -1; + if (ret) + return ret; /* Enable TX and RX */ macb_writel(macb, NCR, MACB_BIT(TE) | MACB_BIT(RE)); @@ -1013,9 +1061,15 @@ static int macb_enable_clk(struct udevice *dev) if (ret) return -EINVAL; + /* + * Zynq clock driver didn't support for enable or disable + * clock. Hence, clk_enable() didn't apply for Zynq + */ +#ifndef CONFIG_MACB_ZYNQ ret = clk_enable(&clk); if (ret) return ret; +#endif clk_rate = clk_get_rate(&clk); if (!clk_rate) @@ -1083,12 +1137,24 @@ static int macb_eth_remove(struct udevice *dev) return 0; } +/** + * macb_late_eth_ofdata_to_platdata + * @dev: udevice struct + * Returns 0 when operation success and negative errno number + * when operation failed. + */ +int __weak macb_late_eth_ofdata_to_platdata(struct udevice *dev) +{ + return 0; +} + static int macb_eth_ofdata_to_platdata(struct udevice *dev) { struct eth_pdata *pdata = dev_get_platdata(dev); pdata->iobase = devfdt_get_addr(dev); - return 0; + + return macb_late_eth_ofdata_to_platdata(dev); } static const struct udevice_id macb_eth_ids[] = { @@ -1097,6 +1163,7 @@ static const struct udevice_id macb_eth_ids[] = { { .compatible = "atmel,sama5d2-gem" }, { .compatible = "atmel,sama5d3-gem" }, { .compatible = "atmel,sama5d4-gem" }, + { .compatible = "cdns,zynq-gem" }, { } }; diff --git a/drivers/net/macb.h b/drivers/net/macb.h index 5bb48f4..c39554d 100644 --- a/drivers/net/macb.h +++ b/drivers/net/macb.h @@ -11,6 +11,7 @@ #define MACB_NCFGR 0x0004 #define MACB_NSR 0x0008 #define GEM_UR 0x000c +#define MACB_DMACFG 0x0010 #define MACB_TSR 0x0014 #define MACB_RBQP 0x0018 #define MACB_TBQP 0x001c -- 2.7.4

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[U-Boot] [PATCH v4 0/6] Support for the Turris Omnia router
by Marek Behún 22 Jan '18

22 Jan '18

This is the fourth version of patches for adding support for the Turris Omnia board, a router developed by the CZ.NIC. Modifications from last version: - Since the new driver model API does not expose the watchdog_reset function, only wdt_reset, the watchdog did not get restarted and the device rebooted every 2 minutes in U-Boot. These patches solve this problem. - The SPI flash could not be accessed. I did not notice this since during my testing I always uploaded the SPL image via serial line. This is now also solved. The first patch modifies Marvell's DDR3 training code to be more general, so that board topology map can force 2t timing. The second patch adds support for the hardware watchdog which can be found on Omnia. I have modified the driver to use the new driver model API. The third patch adds the device tree for Turris Omnia taken from Linux kernel and also armada-385-turris-omnia-u-boot.dtsi file with some additions for U-Boot. The fourth patch adds support for the I2C multiplexer found on Turris Omnia. The fifth patch adds support for the ATSHA204A CryptoAuthentication chip, on which the Turris Omnia stores serial number and device MAC address. The sixth patch adds the proper support for the board. I have modified config to use distro defaults as requested by Andreas Faerber and also removed unnecessary comments. Marek Behun

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[U-Boot] [PATCH 0/4] mips: bmips: add HSSPI support
by Álvaro Fernández Rojas 22 Jan '18

22 Jan '18

BCM63xx HSSPI controller has the same issue as BCM63xx SPI controller: it doesn't allow keeping CS active between transfers. However, this controller allows changing CS polarities, which is used in the linux upstream driver to manage CS as desired. Álvaro Fernández Rojas (4): dm: spi: add BCM63xx HSSPI driver mips: bmips: add bcm63xx-hsspi driver support for BCM6328 mips: bmips: add bcm63xx-hsspi driver support for BCM63268 mips: bmips: enable the SPI flash on the Comtrend AR-5387un arch/mips/dts/brcm,bcm63268.dtsi | 21 ++ arch/mips/dts/brcm,bcm6328.dtsi | 24 ++ arch/mips/dts/comtrend,ar-5387un.dts | 12 + configs/comtrend_ar5387un_ram_defconfig | 8 + drivers/spi/Kconfig | 8 + drivers/spi/Makefile | 1 + drivers/spi/bcm63xx_hsspi.c | 392 ++++++++++++++++++++++++++++++++ 7 files changed, 466 insertions(+) create mode 100644 drivers/spi/bcm63xx_hsspi.c -- 2.1.4

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[U-Boot] [PATCH v2 0/5] mmc: omap_hsmmc: Add support for ADMA
by Jean-Jacques Hiblot 19 Jan '18

19 Jan '18

This series enables the ADMA present in some OMAP SOCs. On a DRA7 the performances when reading from the eMMC go from 18MB/s to 43MB/s. Also while were at it, fix some incorrect bit operations This series applies on top of the series that enables HS200 and UHS mode "mmc: Add support for HS200 and UHS modes" but should be easy to use on top of u-boot/master (just remove special handling of the tuning). This is the first series of 3 which wille enable HS200 and UHS on the omap5 platforms (dra7 and am57). Cheers, Jean-Jacques changes since v1: * added a timeout to terminate the DMA transfer if it takes too long * changed omap_hsmmc_adma_desc() and omap_hsmmc_prepare_adma_table(() to not return any value (void) * removed wrong comment about cache handling Jean-Jacques Hiblot (2): Revert "omap_hsmmc: update struct hsmmc to accommodate omap3 from DT" omap: Update the base address of the MMC controllers Kishon Vijay Abraham I (3): mmc: omap_hsmmc: Add support for DMA (ADMA2) mmc: omap_hsmmc: Enable Auto command (CMD12) enable mmc: omap_hsmmc: Fix incorrect bit operations for disabling a bit arch/arm/include/asm/arch-am33xx/mmc_host_def.h | 4 +- arch/arm/include/asm/arch-omap4/mmc_host_def.h | 6 +- arch/arm/include/asm/arch-omap5/mmc_host_def.h | 6 +- arch/arm/include/asm/omap_mmc.h | 19 +- arch/arm/mach-keystone/include/mach/mmc_host_def.h | 4 +- drivers/mmc/omap_hsmmc.c | 251 +++++++++++++++++---- 6 files changed, 238 insertions(+), 52 deletions(-) -- 1.9.1

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[U-Boot] [PATCH 00/23] mmc: omap5: Add support for UHS and HS200 modes
by Jean-Jacques Hiblot 19 Jan '18

19 Jan '18

This series adds the missing bit to enable the UHS, HS200 and DDR52 modes on the omap5 platforms (DRA7 and AM57). It relies on the following series: * [PATCH v2 00/26] mmc: Add support for HS200 and UHS modes * [PATCH v2 0/5] mmc: omap_hsmmc: Add support for ADMA * [PATCH v3 0/2] power: Add a driver to handle the PBIAS cell of the TI SOCs Enabling support for high speed modes on omap5 requires implementing: * io signal voltage selection * tuning support * pin configuration (IO delays) The few last patches enable the high mode for all omap5 platforms except some for which we need to disable either the UHS or the HS200 because the volatge regulators on board would not allow using those modes. This is not a SOC limitation. With this in place we observe significant improvements in the performances: on a DRA72 evm: eMMC HS200: 124 MB/s eMMC DDR52: 78 MB/s sd SDR104: 71 MB/s sd SDR50: 44 MB/s For the record, the original performances were: SD High speed: 18 MB/s MMC High speed: 18 MB/s This series has been tested on: * DRA71-evm * DRA72-evm * DRA7x-evm * DRA76-evm * AM57x-evm * Beaglebone Black * AM335x evm * AM437x SK Jean-Jacques Jean-Jacques Hiblot (8): mmc: omap_hsmmc: Reduce the max timeout for reset controller fsm mmc: omap_hsmmc: allow the simple HS modes to use the default pinctrl mmc: omap_hsmmc: update mmc->clock with the actual bus speed mmc: omap_hsmmc: implement send_init_stream callback mmc: omap_hsmmc: add signal voltage selection support ARM: dts: dra7: Add supported MMC/SD modes in MMC dt nodes dts: am57xx-beagle-x15: disable UHS and HS200 support dts: am57xx-idk: disable HS200 support Kishon Vijay Abraham I (15): mmc: omap_hsmmc: cleanup clock configuration mmc: omap_hsmmc: cleanup omap_hsmmc_set_ios mmc: omap_hsmmc: add support to set default io voltage mmc: omap_hsmmc: set MMC mode in the UHSMS bit field mmc: omap_hsmmc: Enable DDR mode support mmc: omap_hsmmc: Add tuning support mmc: omap_hsmmc: Workaround for errata id i802 mmc: omap_hsmmc: use mmc_of_parse to populate mmc_config ARM: OMAP5/DRA7: Enable iodelay recalibration to be done from uboot mmc: omap_hsmmc: Add support to set IODELAY values mmc: omap_hsmmc: Add support to get pinctrl values and max frequency for different hw revisions mmc: omap_hsmmc: allow mmc clock to be gated ARM: OMAP5: set mmc clock frequency to 192MHz ARM: dts: DRA7: use new dra7-specific compatible string ARM: DRA7x/AM57x: Add MMC/SD fixups for rev1.0 and rev 1.1 arch/arm/dts/am57xx-beagle-x15.dts | 6 + arch/arm/dts/am57xx-idk-common.dtsi | 2 + arch/arm/dts/dra7.dtsi | 22 +- arch/arm/include/asm/arch-omap5/clock.h | 2 +- arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h | 3 + arch/arm/include/asm/arch-omap5/sys_proto.h | 7 + arch/arm/include/asm/omap_mmc.h | 59 +- arch/arm/mach-omap2/omap5/dra7xx_iodelay.c | 30 + arch/arm/mach-omap2/omap5/hw_data.c | 10 +- board/ti/am57xx/board.c | 30 + board/ti/dra7xx/evm.c | 29 + drivers/mmc/omap_hsmmc.c | 940 +++++++++++++++++++++-- include/configs/am57xx_evm.h | 2 - include/configs/dra7xx_evm.h | 2 - 14 files changed, 1071 insertions(+), 73 deletions(-) -- 1.9.1

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