July 2017 - U-Boot

[U-Boot] [PATCH] board: pm9263: Update to support DT and DM
by Wenyou Yang 07 Aug '17

07 Aug '17

Update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang(a)microchip.com> --- arch/arm/dts/Makefile | 2 ++ board/ronetix/pm9263/Makefile | 2 +- board/ronetix/pm9263/pm9263.c | 22 +++------------------- configs/pm9263_defconfig | 17 +++++++++++++++++ include/configs/pm9263.h | 32 +++++++------------------------- 5 files changed, 30 insertions(+), 45 deletions(-) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index cff325e6c0..c7cc35ca3e 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -379,6 +379,8 @@ dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \ dtb-$(CONFIG_TARGET_AT91SAM9261EK) += at91sam9261ek.dtb +dtb-$(CONFIG_TARGET_PM9263) += at91sam9263ek.dtb + dtb-$(CONFIG_TARGET_AT91SAM9263EK) += at91sam9263ek.dtb dtb-$(CONFIG_TARGET_AT91SAM9RLEK) += at91sam9rlek.dtb diff --git a/board/ronetix/pm9263/Makefile b/board/ronetix/pm9263/Makefile index 43ea599c4f..53e621dc80 100644 --- a/board/ronetix/pm9263/Makefile +++ b/board/ronetix/pm9263/Makefile @@ -11,5 +11,5 @@ # obj-y += pm9263.o -obj-y += led.o +obj-$(CONFIG_AT91_LED) += led.o obj-$(CONFIG_HAS_DATAFLASH) += partition.o diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c index 0c23bb6c65..8d20084240 100644 --- a/board/ronetix/pm9263/pm9263.c +++ b/board/ronetix/pm9263/pm9263.c @@ -20,7 +20,6 @@ #include <asm/arch/gpio.h> #include <lcd.h> #include <atmel_lcdc.h> -#include <dataflash.h> #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) #include <net.h> #endif @@ -277,7 +276,7 @@ extern flash_info_t flash_info[]; void lcd_show_board_info(void) { - ulong dram_size, nand_size, flash_size, dataflash_size; + ulong dram_size, nand_size, flash_size; int i; char temp[32]; @@ -300,17 +299,11 @@ void lcd_show_board_info(void) for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) flash_size += flash_info[i].size; - dataflash_size = 0; - for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) - dataflash_size += (unsigned int) dataflash_info[i].Device.pages_number * - dataflash_info[i].Device.pages_size; - lcd_printf ("%ld MB SDRAM, %ld MB NAND\n%ld MB NOR Flash\n" - "4 MB PSRAM, %ld MB DataFlash\n", + "4 MB PSRAM\n", dram_size >> 20, nand_size >> 20, - flash_size >> 20, - dataflash_size >> 20); + flash_size >> 20); } #endif /* CONFIG_LCD_INFO */ @@ -318,12 +311,6 @@ void lcd_show_board_info(void) int board_early_init_f(void) { - at91_periph_clk_enable(ATMEL_ID_PIOA); - at91_periph_clk_enable(ATMEL_ID_PIOB); - at91_periph_clk_enable(ATMEL_ID_PIOCDE); - - at91_seriald_hw_init(); - return 0; } @@ -338,9 +325,6 @@ int board_init(void) #ifdef CONFIG_CMD_NAND pm9263_nand_hw_init(); #endif -#ifdef CONFIG_HAS_DATAFLASH - at91_spi0_hw_init(1 << 0); -#endif #ifdef CONFIG_MACB pm9263_macb_hw_init(); #endif diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index 7cf2722740..981cdf2000 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -1,6 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_PM9263=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set @@ -11,6 +13,7 @@ CONFIG_SYS_PROMPT="u-boot-pm9263> " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set # CONFIG_CMD_LOADS is not set +CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SETEXPR is not set @@ -18,8 +21,22 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_JFFS2=y +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_DATAFLASH=y +CONFIG_DM_SERIAL=y +CONFIG_ATMEL_USART=y +CONFIG_DM_SPI=y +CONFIG_ATMEL_SPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_LCD=y diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 41d5722490..0d33c7aaf2 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -154,11 +154,6 @@ /* * Hardware drivers */ -#define CONFIG_AT91_GPIO 1 -#define CONFIG_ATMEL_USART 1 -#define CONFIG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS - /* LCD */ #define LCD_BPP LCD_COLOR8 #define CONFIG_LCD_LOGO 1 @@ -170,12 +165,6 @@ #define CONFIG_LCD_IN_PSRAM 1 -/* LED */ -#define CONFIG_AT91_LED -#define CONFIG_RED_LED GPIO_PIN_PB(7) /* this is the power led */ -#define CONFIG_GREEN_LED GPIO_PIN_PB(8) /* this is the user1 led */ - - /* * BOOTP options */ @@ -194,15 +183,6 @@ #define PHYS_SDRAM 0x20000000 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ -/* DataFlash */ -#define CONFIG_ATMEL_DATAFLASH_SPI -#define CONFIG_HAS_DATAFLASH 1 -#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 -#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ -#define AT91_SPI_CLK 15000000 -#define DATAFLASH_TCSS (0x1a << 16) -#define DATAFLASH_TCHS (0x1 << 24) - /* NOR flash, if populated */ #define CONFIG_SYS_FLASH_CFI 1 #define CONFIG_FLASH_CFI_DRIVER 1 @@ -268,12 +248,14 @@ #ifdef CONFIG_SYS_USE_DATAFLASH /* bootstrap + u-boot + env + linux in dataflash on CS0 */ -#define CONFIG_ENV_IS_IN_DATAFLASH -#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) +#define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_OFFSET 0x4200 -#define CONFIG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) #define CONFIG_ENV_SIZE 0x4200 -#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" +#define CONFIG_ENV_SECT_SIZE 0x210 +#define CONFIG_ENV_SPI_MAX_HZ 15000000 +#define CONFIG_BOOTCOMMAND "sf probe 0; " \ + "sf read 0x22000000 0x84000 0x294000; " \ + "bootm 0x22000000" #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ "root=/dev/mtdblock0 " \ "mtdparts=atmel_nand:-(root) "\ @@ -364,7 +346,7 @@ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000) #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - \ GENERATED_GBL_DATA_SIZE) #endif -- 2.13.0

3 2

[U-Boot] [PATCH 0/3] board: atmel: Use SPI-flash-based AT45xxx DataFlash
by Wenyou Yang 07 Aug '17

07 Aug '17

In order to remove drivers/spi/atmel_dataflash_spi.c, use the SPI-flash-based AT45xxx DataFlash driver which support driver model and device tree. Wenyou Yang (3): board: at91sam9263ek: Use SPI-flash-based AT45xxx DataFlash board: at91sam9rlek: Use SPI-flash-based AT45xxx DataFlash board: at91sam9260ek: Use SPI-flash-based AT45xxx DataFlash arch/arm/dts/at91sam9260.dtsi | 1 + arch/arm/dts/at91sam9260ek.dts | 2 +- arch/arm/dts/at91sam9263.dtsi | 1 + arch/arm/dts/at91sam9263ek.dts | 2 +- arch/arm/dts/at91sam9g20ek_common.dtsi | 2 +- arch/arm/dts/at91sam9rl.dtsi | 1 + board/atmel/at91sam9260ek/at91sam9260ek.c | 4 --- board/atmel/at91sam9263ek/at91sam9263ek.c | 4 --- board/atmel/at91sam9rlek/at91sam9rlek.c | 3 -- configs/at91sam9260ek_dataflash_cs0_defconfig | 7 ++++ configs/at91sam9260ek_dataflash_cs1_defconfig | 7 ++++ configs/at91sam9260ek_nandflash_defconfig | 7 ++++ configs/at91sam9263ek_dataflash_cs0_defconfig | 7 ++++ configs/at91sam9263ek_dataflash_defconfig | 7 ++++ configs/at91sam9263ek_nandflash_defconfig | 7 ++++ configs/at91sam9263ek_norflash_boot_defconfig | 7 ++++ configs/at91sam9263ek_norflash_defconfig | 7 ++++ configs/at91sam9g20ek_2mmc_defconfig | 7 ++++ configs/at91sam9g20ek_2mmc_nandflash_defconfig | 7 ++++ configs/at91sam9g20ek_dataflash_cs0_defconfig | 7 ++++ configs/at91sam9g20ek_dataflash_cs1_defconfig | 7 ++++ configs/at91sam9g20ek_nandflash_defconfig | 7 ++++ configs/at91sam9rlek_dataflash_defconfig | 7 ++++ configs/at91sam9rlek_mmc_defconfig | 7 ++++ configs/at91sam9rlek_nandflash_defconfig | 7 ++++ configs/at91sam9xeek_dataflash_cs0_defconfig | 7 ++++ configs/at91sam9xeek_dataflash_cs1_defconfig | 7 ++++ configs/at91sam9xeek_nandflash_defconfig | 7 ++++ include/configs/at91sam9260ek.h | 44 ++++++++------------------ include/configs/at91sam9263ek.h | 21 ++++-------- include/configs/at91sam9rlek.h | 21 ++++-------- 31 files changed, 167 insertions(+), 72 deletions(-) -- 2.13.0

3 9

[U-Boot] [PATCH] board: at91sam9261ek: Update to support DT and DM
by Wenyou Yang 07 Aug '17

07 Aug '17

Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: Wenyou Yang <wenyou.yang(a)microchip.com> --- arch/arm/dts/Makefile | 2 + arch/arm/dts/at91sam9261.dtsi | 151 ++++++++++-------- arch/arm/dts/at91sam9261ek.dts | 211 ++++++++++++++++++++++++++ arch/arm/mach-at91/Kconfig | 1 + board/atmel/at91sam9261ek/Makefile | 2 +- board/atmel/at91sam9261ek/at91sam9261ek.c | 22 ++- configs/at91sam9261ek_dataflash_cs0_defconfig | 26 +++- configs/at91sam9261ek_dataflash_cs3_defconfig | 26 +++- configs/at91sam9261ek_nandflash_defconfig | 26 +++- configs/at91sam9g10ek_dataflash_cs0_defconfig | 26 +++- configs/at91sam9g10ek_dataflash_cs3_defconfig | 26 +++- configs/at91sam9g10ek_nandflash_defconfig | 26 +++- include/configs/at91sam9261ek.h | 50 ++---- 13 files changed, 481 insertions(+), 114 deletions(-) create mode 100644 arch/arm/dts/at91sam9261ek.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 132fa69fe5..cff325e6c0 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -377,6 +377,8 @@ dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \ keystone-k2g-generic.dtb \ keystone-k2g-ice.dtb +dtb-$(CONFIG_TARGET_AT91SAM9261EK) += at91sam9261ek.dtb + dtb-$(CONFIG_TARGET_AT91SAM9263EK) += at91sam9263ek.dtb dtb-$(CONFIG_TARGET_AT91SAM9RLEK) += at91sam9rlek.dtb diff --git a/arch/arm/dts/at91sam9261.dtsi b/arch/arm/dts/at91sam9261.dtsi index 5e09de4eb9..69c2d6e416 100644 --- a/arch/arm/dts/at91sam9261.dtsi +++ b/arch/arm/dts/at91sam9261.dtsi @@ -30,6 +30,7 @@ ssc0 = &ssc0; ssc1 = &ssc1; ssc2 = &ssc2; + spi0 = &spi0; }; cpus { @@ -70,6 +71,7 @@ #address-cells = <1>; #size-cells = <1>; ranges; + u-boot,dm-pre-reloc; usb0: ohci@00500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; @@ -112,6 +114,7 @@ #address-cells = <1>; #size-cells = <1>; ranges; + u-boot,dm-pre-reloc; tcb0: timer@fffa0000 { compatible = "atmel,at91rm9200-tcb"; @@ -286,20 +289,61 @@ status = "disabled"; }; + pioA: gpio@fffff400 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff400 0x200>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&pioA_clk>; + u-boot,dm-pre-reloc; + }; + + pioB: gpio@fffff600 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff600 0x200>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&pioB_clk>; + u-boot,dm-pre-reloc; + }; + + pioC: gpio@fffff800 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff800 0x200>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&pioC_clk>; + u-boot,dm-pre-reloc; + }; + pinctrl@fffff400 { #address-cells = <1>; #size-cells = <1>; compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; ranges = <0xfffff400 0xfffff400 0x600>; - + reg = <0xfffff400 0x200 /* pioA */ + 0xfffff600 0x200 /* pioB */ + 0xfffff800 0x200 /* pioC */ + >; atmel,mux-mask = /* A B */ <0xffffffff 0xfffffff7>, /* pioA */ <0xffffffff 0xfffffff4>, /* pioB */ <0xffffffff 0xffffff07>; /* pioC */ + u-boot,dm-pre-reloc; /* shared pinctrl settings */ dbgu { + u-boot,dm-pre-reloc; pinctrl_dbgu: dbgu-0 { atmel,pins = <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>, @@ -532,39 +576,6 @@ <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; }; - - pioA: gpio@fffff400 { - compatible = "atmel,at91rm9200-gpio"; - reg = <0xfffff400 0x200>; - interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioA_clk>; - }; - - pioB: gpio@fffff600 { - compatible = "atmel,at91rm9200-gpio"; - reg = <0xfffff600 0x200>; - interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioB_clk>; - }; - - pioC: gpio@fffff800 { - compatible = "atmel,at91rm9200-gpio"; - reg = <0xfffff800 0x200>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <2>; - clocks = <&pioC_clk>; - }; }; pmc: pmc@fffffc00 { @@ -575,6 +586,7 @@ #address-cells = <1>; #size-cells = <0>; #interrupt-cells = <1>; + u-boot,dm-pre-reloc; main_osc: main_osc { compatible = "atmel,at91rm9200-clk-main-osc"; @@ -589,7 +601,7 @@ clocks = <&main_osc>; }; - plla: pllack { + plla: pllack@0 { compatible = "atmel,at91rm9200-clk-pll"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_LOCKA>; @@ -601,7 +613,7 @@ <190000000 240000000 2 1>; }; - pllb: pllbck { + pllb: pllbck@1 { compatible = "atmel,at91rm9200-clk-pll"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_LOCKB>; @@ -619,6 +631,7 @@ clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; atmel,clk-output-range = <0 94000000>; atmel,clk-divisors = <1 2 4 0>; + u-boot,dm-pre-reloc; }; usb: usbck { @@ -635,25 +648,25 @@ interrupt-parent = <&pmc>; clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; - prog0: prog0 { + prog0: progi@0 { #clock-cells = <0>; reg = <0>; interrupts = <AT91_PMC_PCKRDY(0)>; }; - prog1: prog1 { + prog1: prog@1 { #clock-cells = <0>; reg = <1>; interrupts = <AT91_PMC_PCKRDY(1)>; }; - prog2: prog2 { + prog2: prog@2 { #clock-cells = <0>; reg = <2>; interrupts = <AT91_PMC_PCKRDY(2)>; }; - prog3: prog3 { + prog3: prog@3 { #clock-cells = <0>; reg = <3>; interrupts = <AT91_PMC_PCKRDY(3)>; @@ -665,49 +678,49 @@ #address-cells = <1>; #size-cells = <0>; - uhpck: uhpck { + uhpck: uhpck@6 { #clock-cells = <0>; reg = <6>; clocks = <&usb>; }; - udpck: udpck { + udpck: udpck@7 { #clock-cells = <0>; reg = <7>; clocks = <&usb>; }; - pck0: pck0 { + pck0: pck@8 { #clock-cells = <0>; reg = <8>; clocks = <&prog0>; }; - pck1: pck1 { + pck1: pck@9 { #clock-cells = <0>; reg = <9>; clocks = <&prog1>; }; - pck2: pck2 { + pck2: pck@10 { #clock-cells = <0>; reg = <10>; clocks = <&prog2>; }; - pck3: pck3 { + pck3: pck@11 { #clock-cells = <0>; reg = <11>; clocks = <&prog3>; }; - hclk0: hclk0 { + hclk0: hclk@16 { #clock-cells = <0>; reg = <16>; clocks = <&mck>; }; - hclk1: hclk1 { + hclk1: hclk@17 { #clock-cells = <0>; reg = <17>; clocks = <&mck>; @@ -719,98 +732,102 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&mck>; + u-boot,dm-pre-reloc; - pioA_clk: pioA_clk { + pioA_clk: pioA_clk@2 { #clock-cells = <0>; reg = <2>; + u-boot,dm-pre-reloc; }; - pioB_clk: pioB_clk { + pioB_clk: pioB_clk@3 { #clock-cells = <0>; reg = <3>; + u-boot,dm-pre-reloc; }; - pioC_clk: pioC_clk { + pioC_clk: pioC_clk@4 { #clock-cells = <0>; reg = <4>; + u-boot,dm-pre-reloc; }; - usart0_clk: usart0_clk { + usart0_clk: usart0_clk@6 { #clock-cells = <0>; reg = <6>; }; - usart1_clk: usart1_clk { + usart1_clk: usart1_clk@7 { #clock-cells = <0>; reg = <7>; }; - usart2_clk: usart2_clk { + usart2_clk: usart2_clk@8 { #clock-cells = <0>; reg = <8>; }; - mci0_clk: mci0_clk { + mci0_clk: mci0_clk@9 { #clock-cells = <0>; reg = <9>; }; - udc_clk: udc_clk { + udc_clk: udc_clk@10 { #clock-cells = <0>; reg = <10>; }; - twi0_clk: twi0_clk { + twi0_clk: twi0_clk@11 { reg = <11>; #clock-cells = <0>; }; - spi0_clk: spi0_clk { + spi0_clk: spi0_clk@12 { #clock-cells = <0>; reg = <12>; }; - spi1_clk: spi1_clk { + spi1_clk: spi1_clk@13 { #clock-cells = <0>; reg = <13>; }; - ssc0_clk: ssc0_clk { + ssc0_clk: ssc0_clk@14 { #clock-cells = <0>; reg = <14>; }; - ssc1_clk: ssc1_clk { + ssc1_clk: ssc1_clk@15 { #clock-cells = <0>; reg = <15>; }; - ssc2_clk: ssc2_clk { + ssc2_clk: ssc2_clk@16 { #clock-cells = <0>; reg = <16>; }; - tc0_clk: tc0_clk { + tc0_clk: tc0_clk@17 { #clock-cells = <0>; reg = <17>; }; - tc1_clk: tc1_clk { + tc1_clk: tc1_clk@18 { #clock-cells = <0>; reg = <18>; }; - tc2_clk: tc2_clk { + tc2_clk: tc2_clk@19 { #clock-cells = <0>; reg = <19>; }; - ohci_clk: ohci_clk { + ohci_clk: ohci_clk@20 { #clock-cells = <0>; reg = <20>; }; - lcd_clk: lcd_clk { + lcd_clk: lcd_clk@21 { #clock-cells = <0>; reg = <21>; }; diff --git a/arch/arm/dts/at91sam9261ek.dts b/arch/arm/dts/at91sam9261ek.dts new file mode 100644 index 0000000000..55bd51f07f --- /dev/null +++ b/arch/arm/dts/at91sam9261ek.dts @@ -0,0 +1,211 @@ +/* + * at91sam9261ek.dts - Device Tree file for Atmel at91sam9261 reference board + * + * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot(a)traphandler.com> + * + * Licensed under GPLv2 only. + */ +/dts-v1/; +#include "at91sam9261.dtsi" + +/ { + model = "Atmel at91sam9261ek"; + compatible = "atmel,at91sam9261ek", "atmel,at91sam9261", "atmel,at91sam9"; + + chosen { + bootargs = "rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs rw"; + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0x20000000 0x4000000>; + }; + + clocks { + slow_xtal { + clock-frequency = <32768>; + }; + + main_xtal { + clock-frequency = <18432000>; + }; + }; + + ahb { + usb0: ohci@00500000 { + status = "okay"; + }; + + fb0: fb@0x00600000 { + display = <&display0>; + atmel,power-control-gpio = <&pioA 12 GPIO_ACTIVE_LOW>; + status = "okay"; + + display0: display { + bits-per-pixel = <16>; + atmel,lcdcon-backlight; + atmel,dmacon = <0x1>; + atmel,lcdcon2 = <0x80008002>; + atmel,guard-time = <1>; + atmel,lcd-wiring-mode = "BRG"; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <4965000>; + hactive = <240>; + vactive = <320>; + hback-porch = <1>; + hfront-porch = <33>; + vback-porch = <1>; + vfront-porch = <0>; + hsync-len = <5>; + vsync-len = <1>; + hsync-active = <1>; + vsync-active = <1>; + }; + }; + }; + }; + + nand0: nand@40000000 { + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + status = "okay"; + + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x40000>; + }; + + bootloader@40000 { + label = "bootloader"; + reg = <0x40000 0x80000>; + }; + + bootloaderenv@c0000 { + label = "bootloader env"; + reg = <0xc0000 0xc0000>; + }; + + dtb@180000 { + label = "device tree"; + reg = <0x180000 0x80000>; + }; + + kernel@200000 { + label = "kernel"; + reg = <0x200000 0x600000>; + }; + + rootfs@800000 { + label = "rootfs"; + reg = <0x800000 0x0f800000>; + }; + }; + + apb { + usb1: gadget@fffa4000 { + atmel,vbus-gpio = <&pioB 29 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + spi0: spi@fffc8000 { + cs-gpios = <&pioA 3 0>, <0>, <&pioA 28 0>, <0>; + status = "okay"; + + mtd_dataflash@0 { + compatible = "atmel,at45", "atmel,dataflash"; + reg = <0>; + spi-max-frequency = <15000000>; + }; + + tsc2046@0 { + reg = <2>; + compatible = "ti,ads7843"; + interrupts-extended = <&pioC 2 IRQ_TYPE_EDGE_BOTH>; + spi-max-frequency = <3000000>; + pendown-gpio = <&pioC 2 GPIO_ACTIVE_HIGH>; + + ti,x-min = /bits/ 16 <150>; + ti,x-max = /bits/ 16 <3830>; + ti,y-min = /bits/ 16 <190>; + ti,y-max = /bits/ 16 <3830>; + ti,vref-delay-usecs = /bits/ 16 <450>; + ti,x-plate-ohms = /bits/ 16 <450>; + ti,y-plate-ohms = /bits/ 16 <250>; + ti,pressure-max = /bits/ 16 <15000>; + ti,debounce-rep = /bits/ 16 <0>; + ti,debounce-tol = /bits/ 16 <65535>; + ti,debounce-max = /bits/ 16 <1>; + + wakeup-source; + }; + }; + + dbgu: serial@fffff200 { + status = "okay"; + }; + + watchdog@fffffd40 { + status = "okay"; + }; + + }; + }; + + leds { + compatible = "gpio-leds"; + + ds8 { + label = "ds8"; + gpios = <&pioA 13 GPIO_ACTIVE_LOW>; + linux,default-trigger = "none"; + }; + + ds7 { + label = "ds7"; + gpios = <&pioA 14 GPIO_ACTIVE_LOW>; + linux,default-trigger = "nand-disk"; + }; + + ds1 { + label = "ds1"; + gpios = <&pioA 23 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + + button_0 { + label = "button_0"; + gpios = <&pioA 27 GPIO_ACTIVE_LOW>; + linux,code = <256>; + wakeup-source; + }; + + button_1 { + label = "button_1"; + gpios = <&pioA 26 GPIO_ACTIVE_LOW>; + linux,code = <257>; + wakeup-source; + }; + + button_2 { + label = "button_2"; + gpios = <&pioA 25 GPIO_ACTIVE_LOW>; + linux,code = <258>; + wakeup-source; + }; + + button_3 { + label = "button_3"; + gpios = <&pioA 24 GPIO_ACTIVE_LOW>; + linux,code = <259>; + wakeup-source; + }; + }; +}; diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 033c1efd2b..23ddc6296d 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -36,6 +36,7 @@ config TARGET_GURNARD config TARGET_AT91SAM9261EK bool "Atmel at91sam9261 reference board" select CPU_ARM926EJS + select BOARD_EARLY_INIT_F config TARGET_PM9261 bool "Ronetix pm9261 board" diff --git a/board/atmel/at91sam9261ek/Makefile b/board/atmel/at91sam9261ek/Makefile index c547fed42a..d7ba1533d8 100644 --- a/board/atmel/at91sam9261ek/Makefile +++ b/board/atmel/at91sam9261ek/Makefile @@ -10,5 +10,5 @@ # obj-y += at91sam9261ek.o -obj-y += led.o +obj-$(CONFIG_AT91_LED) += led.o obj-$(CONFIG_HAS_DATAFLASH) += partition.o diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c index 1ba606349d..c11bb2cd10 100644 --- a/board/atmel/at91sam9261ek/at91sam9261ek.c +++ b/board/atmel/at91sam9261ek/at91sam9261ek.c @@ -7,6 +7,7 @@ */ #include <common.h> +#include <debug_uart.h> #include <asm/io.h> #include <asm/arch/at91sam9261.h> #include <asm/arch/at91sam9261_matrix.h> @@ -221,6 +222,23 @@ void lcd_show_board_info(void) #endif /* CONFIG_LCD_INFO */ #endif +#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{ + at91_seriald_hw_init(); +} +#endif + +#ifdef CONFIG_BOARD_EARLY_INIT_F +int board_early_init_f(void) +{ +#ifdef CONFIG_DEBUG_UART + debug_uart_init(); +#endif + return 0; +} +#endif + int board_init(void) { #ifdef CONFIG_AT91SAM9G10EK @@ -233,13 +251,9 @@ int board_init(void) /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - at91_seriald_hw_init(); #ifdef CONFIG_CMD_NAND at91sam9261ek_nand_hw_init(); #endif -#ifdef CONFIG_HAS_DATAFLASH - at91_spi0_hw_init(1 << 0); -#endif #ifdef CONFIG_DRIVER_DM9000 at91sam9261ek_dm9000_hw_init(); #endif diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index 15adf43c42..62d9ca298b 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -1,6 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" +CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set @@ -11,6 +14,7 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set # CONFIG_CMD_LOADS is not set +CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SOURCE is not set @@ -18,8 +22,28 @@ CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y # CONFIG_MMC is not set +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_DATAFLASH=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91=y +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_ATMEL=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ATMEL_USART=y +CONFIG_DM_SPI=y +CONFIG_ATMEL_SPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_LCD=y -CONFIG_OF_LIBFDT=y diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index 05113b9805..52a9630a03 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -1,6 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" +CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS3" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set @@ -11,6 +14,7 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set # CONFIG_CMD_LOADS is not set +CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SOURCE is not set @@ -18,8 +22,28 @@ CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y # CONFIG_MMC is not set +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_DATAFLASH=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91=y +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_ATMEL=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ATMEL_USART=y +CONFIG_DM_SPI=y +CONFIG_ATMEL_SPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_LCD=y -CONFIG_OF_LIBFDT=y diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index 16f5defa43..9843ca1b84 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -1,6 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" +CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set @@ -11,6 +14,7 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set # CONFIG_CMD_LOADS is not set +CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SOURCE is not set @@ -18,8 +22,28 @@ CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y # CONFIG_MMC is not set +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_DATAFLASH=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91=y +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_ATMEL=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ATMEL_USART=y +CONFIG_DM_SPI=y +CONFIG_ATMEL_SPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_LCD=y -CONFIG_OF_LIBFDT=y diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index 70e526a5cf..989399155a 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -1,6 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" +CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set @@ -11,6 +14,7 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set # CONFIG_CMD_LOADS is not set +CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SOURCE is not set @@ -18,8 +22,28 @@ CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y # CONFIG_MMC is not set +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_DATAFLASH=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91=y +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_ATMEL=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ATMEL_USART=y +CONFIG_DM_SPI=y +CONFIG_ATMEL_SPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_LCD=y -CONFIG_OF_LIBFDT=y diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index 8da1bfe5cd..0466516ede 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -1,6 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" +CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS3" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set @@ -11,6 +14,7 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set # CONFIG_CMD_LOADS is not set +CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SOURCE is not set @@ -18,8 +22,28 @@ CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y # CONFIG_MMC is not set +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_DATAFLASH=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91=y +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_ATMEL=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ATMEL_USART=y +CONFIG_DM_SPI=y +CONFIG_ATMEL_SPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_LCD=y -CONFIG_OF_LIBFDT=y diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index 46217efb39..89bb612dce 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -1,6 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_AT91SAM9261EK=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" +CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set @@ -11,6 +14,7 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set # CONFIG_CMD_LOADS is not set +CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SOURCE is not set @@ -18,8 +22,28 @@ CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y # CONFIG_MMC is not set +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_DATAFLASH=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91=y +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_ATMEL=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ATMEL_USART=y +CONFIG_DM_SPI=y +CONFIG_ATMEL_SPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_LCD=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 505f945bd3..5546ade8d9 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -36,15 +36,6 @@ * Hardware drivers */ -/* gpio */ -#define CONFIG_AT91_GPIO -#define CONFIG_AT91_GPIO_PULLUP 1 - -/* serial console */ -#define CONFIG_ATMEL_USART -#define CONFIG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS - /* LCD */ #define LCD_BPP LCD_COLOR8 #define CONFIG_LCD_LOGO @@ -56,13 +47,6 @@ #define CONFIG_ATMEL_LCD_BGR555 #endif -/* LED */ -#define CONFIG_AT91_LED -#define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */ -#define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */ -#define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */ - - /* * BOOTP options */ @@ -81,17 +65,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 #define CONFIG_SYS_INIT_SP_ADDR \ - (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE) - -/* DataFlash */ -#define CONFIG_ATMEL_DATAFLASH_SPI -#define CONFIG_HAS_DATAFLASH -#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 -#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ -#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */ -#define AT91_SPI_CLK 15000000 -#define DATAFLASH_TCSS (0x1a << 16) -#define DATAFLASH_TCHS (0x1 << 24) + (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE) /* NAND flash */ #ifdef CONFIG_CMD_NAND @@ -139,12 +113,14 @@ #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ -#define CONFIG_ENV_IS_IN_DATAFLASH -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) +#define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_OFFSET 0x4200 -#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) #define CONFIG_ENV_SIZE 0x4200 -#define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm" +#define CONFIG_ENV_SECT_SIZE 0x210 +#define CONFIG_ENV_SPI_MAX_HZ 15000000 +#define CONFIG_BOOTCOMMAND "sf probe 0; " \ + "sf read 0x22000000 0x84000 0x294000; " \ + "bootm 0x22000000" #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ "root=/dev/mtdblock0 " \ "mtdparts=atmel_nand:-(root) " \ @@ -153,12 +129,14 @@ #elif CONFIG_SYS_USE_DATAFLASH_CS3 /* bootstrap + u-boot + env + linux in dataflash on CS3 */ -#define CONFIG_ENV_IS_IN_DATAFLASH -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400) +#define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_OFFSET 0x4200 -#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET) #define CONFIG_ENV_SIZE 0x4200 -#define CONFIG_BOOTCOMMAND "cp.b 0xD0084000 0x22000000 0x210000; bootm" +#define CONFIG_ENV_SECT_SIZE 0x210 +#define CONFIG_ENV_SPI_MAX_HZ 15000000 +#define CONFIG_BOOTCOMMAND "sf probe 0:3; " \ + "sf read 0x22000000 0x84000 0x294000; " \ + "bootm 0x22000000" #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ "root=/dev/mtdblock0 " \ "mtdparts=atmel_nand:-(root) " \ @@ -168,7 +146,7 @@ /* bootstrap + u-boot + env + linux in nandflash */ #define CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_OFFSET 0xc0000 +#define CONFIG_ENV_OFFSET 0x120000 #define CONFIG_ENV_OFFSET_REDUND 0x100000 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" -- 2.13.0

3 2

[U-Boot] [PATCH] sunxi: Fix CONFIG_SUNXI_GMAC references
by Dave Prue 07 Aug '17

07 Aug '17

GMAC Initialization for sun7i targets has been broken since v2017.05-rc3 due to the renaming of CONFIG_SUNXI_GMAC to CONFIG_SUN7I_GMAC in Kconfig without propogating the name change throughout the code. Signed-off-by: Dave Prue <dave(a)prue.com> --- arch/arm/include/asm/arch-sunxi/sys_proto.h | 2 +- board/sunxi/Makefile | 2 +- include/configs/sunxi-common.h | 2 +- scripts/build-whitelist.sh | 2 +- scripts/config_whitelist.txt | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/include/asm/arch-sunxi/sys_proto.h b/arch/arm/include/asm/arch-sunxi/sys_proto.h index a373319..096510b 100644 --- a/arch/arm/include/asm/arch-sunxi/sys_proto.h +++ b/arch/arm/include/asm/arch-sunxi/sys_proto.h @@ -24,7 +24,7 @@ void sdelay(unsigned long); void return_to_fel(uint32_t lr, uint32_t sp); /* Board / SoC level designware gmac init */ -#if !defined CONFIG_SPL_BUILD && defined CONFIG_SUNXI_GMAC +#if !defined CONFIG_SPL_BUILD && defined CONFIG_SUN7I_GMAC void eth_init_board(void); #else static inline void eth_init_board(void) {} diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile index 43766e0..34a2786 100644 --- a/board/sunxi/Makefile +++ b/board/sunxi/Makefile @@ -9,7 +9,7 @@ # SPDX-License-Identifier: GPL-2.0+ # obj-y += board.o -obj-$(CONFIG_SUNXI_GMAC) += gmac.o +obj-$(CONFIG_SUN7I_GMAC) += gmac.o obj-$(CONFIG_SUNXI_AHCI) += ahci.o obj-$(CONFIG_MACH_SUN4I) += dram_sun4i_auto.o obj-$(CONFIG_MACH_SUN5I) += dram_sun5i_auto.o diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 9b514ff..93e0281 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -300,7 +300,7 @@ extern int soft_i2c_gpio_scl; #define CONFIG_PHYLIB #endif -#ifdef CONFIG_SUNXI_GMAC +#ifdef CONFIG_SUN7I_GMAC #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ #define CONFIG_PHY_ADDR 1 #define CONFIG_MII /* MII PHY management */ diff --git a/scripts/build-whitelist.sh b/scripts/build-whitelist.sh index f169eaa..8e0496b 100755 --- a/scripts/build-whitelist.sh +++ b/scripts/build-whitelist.sh @@ -16,7 +16,7 @@ export LC_ALL=C LC_COLLATE=C # SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8) # # We want this to produce: -# CONFIG_SUNXI_GMAC +# CONFIG_SUN7I_GMAC # CONFIG_AHCI # CONFIG_SATAPWR # diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index c8cf428..8c13e4d 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -2696,7 +2696,7 @@ CONFIG_STV0991_HZ_CLOCK CONFIG_ST_SMI CONFIG_SUNXI_AHCI CONFIG_SUNXI_EMAC -CONFIG_SUNXI_GMAC +CONFIG_SUN7I_GMAC CONFIG_SUNXI_GPIO CONFIG_SUNXI_MAX_FB_SIZE CONFIG_SUNXI_USB_PHYS -- 1.8.3.1

6 6

[U-Boot] Sinovoip Bananapi M1+ defconfig
by krichy＠nmdps.net 07 Aug '17

07 Aug '17

From aa8cd8708d71ef302e78474af6713477263bdd6f Mon Sep 17 00:00:00 2001 From: Richard Kojedzinszky <krichy(a)nmdps.net> Date: Fri, 18 Nov 2016 19:25:50 +0100 Subject: [PATCH 2/2] sun20i: added config for Sinovoip Bananapi M1 plus According to linux-sunxi.org, the m1 plus is very similar to Lemaker's Banana Pro, so the config is the very same for this board. Signed-off-by: Richard Kojedzinszky <krichy(a)nmdps.net> Tested-by: Richard Kojedzinszky <krichy(a)nmdps.net> --- configs/Sinovoip_BPI_M1_plus_defconfig | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 configs/Sinovoip_BPI_M1_plus_defconfig diff --git a/configs/Sinovoip_BPI_M1_plus_defconfig b/configs/Sinovoip_BPI_M1_plus_defconfig new file mode 100644 index 0000000000..9833ef3923 --- /dev/null +++ b/configs/Sinovoip_BPI_M1_plus_defconfig @@ -0,0 +1,26 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN7I=y +CONFIG_DRAM_CLK=432 +CONFIG_MACPWR="PH23" +CONFIG_USB1_VBUS_PIN="PH0" +CONFIG_USB2_VBUS_PIN="PH1" +CONFIG_VIDEO_COMPOSITE=y +CONFIG_GMAC_TX_DELAY=3 +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi-m1-plus" +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_NETCONSOLE=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_RGMII=y +CONFIG_SUN7I_GMAC=y +CONFIG_AXP_ALDO4_VOLT=2500 +CONFIG_USB_EHCI_HCD=y -- 2.11.0

2 1

[U-Boot] [PATCH 0/5] Add intermediate driver(cff driver) between flash & FPGA
by tien.fong.chee＠intel.com 07 Aug '17

07 Aug '17

From: Tien Fong Chee <tien.fong.chee(a)intel.com> This patchset adding intermediate driver called cff driver to support all the FPGA program operations between FPGA manager and flash. Tien Fong Chee (5): arm: socfpga: Add checking function on searching boot device arm: socfpga: Add checking function on FPGA setting in FDT configs: socfpga: Add config for RBF loading from FAT fs arm: socfpga: Add intermediate driver between flash and FPGA manager arm: socfpga: Enable cff driver build arch/arm/mach-socfpga/Kconfig | 7 + arch/arm/mach-socfpga/Makefile | 1 + arch/arm/mach-socfpga/cff.c | 581 +++++++++++++++++++++++++++++ arch/arm/mach-socfpga/include/mach/cff.h | 40 ++ arch/arm/mach-socfpga/include/mach/misc.h | 20 + arch/arm/mach-socfpga/misc_arria10.c | 42 ++ include/configs/socfpga_arria10_socdk.h | 6 + 7 files changed, 697 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-socfpga/cff.c create mode 100644 arch/arm/mach-socfpga/include/mach/cff.h -- 1.7.7.4

3 19

[U-Boot] [PATCHv4 0/2] ARM: sunxi: Add support for OLinuXino Lime2 eMMC
by Olliver Schinagl 07 Aug '17

07 Aug '17

This patch series adds support for the Olimex OLinuXino Lime2 eMMC. This assembly variant uses eMMC flash instead of NAND (or no flash) on the other Lime2's. Additionally, we sync the dts with upstream as we now use this dts from the new defconfig. Changes since v3: * Added my signed-off-by to Emanuel's upstream kernel pach Changes since v2: * Converted these two patches into a patch-series Changes since v1: * Rebased with master Emmanuel Vadot (1): ARM: dts: sunxi: Change node name for pwrseq pin on Olinuxino-lime2-emmc Olliver Schinagl (1): sun7i: Add support for Olimex A20-OLinuXino-LIME2-eMMC arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts | 2 +- board/sunxi/MAINTAINERS | 5 ++++ configs/A20-OLinuXino-Lime2-eMMC_defconfig | 36 +++++++++++++++++++++++++ 3 files changed, 42 insertions(+), 1 deletion(-) create mode 100644 configs/A20-OLinuXino-Lime2-eMMC_defconfig -- 2.11.0

3 6

[U-Boot] [PATCH v2 0/3] power: Add a driver to handle the PBIAS cell of the TI SOCs
by Jean-Jacques Hiblot 07 Aug '17

07 Aug '17

In the TI SOCs a PBIAS cell exists to provide a bias voltage to the MMC1 IO cells. Without this bias voltage these I/O cells can not function properly. This bias voltage is either 1.8v or 3.0v. The first patch adds 2 functions to the DM core: to count strings in a stringlist and get a string from a stringlist based on its position in the list. The second patch implements the support for this PBIAS cell as a regulator driver. The last patch is here to allow the binding of the driver. In the DTS of the dra7x and am57x platforms, the pbias entry is a child of a syscon. changes since v1: - add new functions to get strings from a stringlist in DM core - use the dev_read_*() API to access the DT - automatically select the PBIAS driver if DM_REGULATOR, DM_MMC and MMC_OMAP_HS are set. - removed the patch touching the DRA7 and AM57 config files. Jean-Jacques Hiblot (3): dm: core: Add functions to get strings and the string count from a stringlist regulator: pbias: Add PBIAS regulator for proper voltage switching on MMC1 dm: syscon: scan sub-nodes of the syscon node drivers/core/read.c | 11 ++ drivers/core/syscon-uclass.c | 1 + drivers/mmc/Kconfig | 1 + drivers/power/regulator/Kconfig | 10 + drivers/power/regulator/Makefile | 1 + drivers/power/regulator/pbias_regulator.c | 302 ++++++++++++++++++++++++++++++ include/dm/read.h | 36 ++++ 7 files changed, 362 insertions(+) create mode 100644 drivers/power/regulator/pbias_regulator.c -- 1.9.1

2 9

[U-Boot] [PATCH 0/4] Fix compile failure encountered on u-boot-usb tree (2017-07-20)
by patrice.chotard＠st.com 06 Aug '17

06 Aug '17

From: Patrice Chotard <patrice.chotard(a)st.com> This series fixes : _ compilation issue reported by Ran Wang on u-boot-usb branch _ add last minute fixes for both generic-ehci and generic_ohci drivers which avoid to init a generic PHY if not found, reported by Patrick Delaunay This series need an additionnal patch from Jean-Jacques Hiblot : [PATCH v2] phy: add a NO-OP phy driver Patrice Chotard (4): dm: phy: add missing #ifdef CONFIG_PHY dm: usb: host: xhci-dwc3: add missing #ifdef CONFIG_DM_USB usb: host: ehci-generic: initialize PHY only when found usb: host: ohci-generic: initialize PHY only when found drivers/usb/host/ehci-generic.c | 11 ++++++----- drivers/usb/host/ohci-generic.c | 11 ++++++----- drivers/usb/host/xhci-dwc3.c | 2 ++ include/generic-phy.h | 42 +++++++++++++++++++++++++++++++++++++++++ 4 files changed, 56 insertions(+), 10 deletions(-) -- 1.9.1

5 16

[U-Boot] [PATCH] m68k: add board stmark2, mcf5441x based
by Angelo Dureghello 06 Aug '17

06 Aug '17

Signed-off-by: Angelo Dureghello <angelo(a)sysam.it> --- arch/m68k/Kconfig | 5 + board/sysam/stmark2/Kconfig | 15 +++ board/sysam/stmark2/MAINTAINERS | 6 ++ board/sysam/stmark2/Makefile | 8 ++ board/sysam/stmark2/sbf_dram_init.S | 119 +++++++++++++++++++++ board/sysam/stmark2/stmark2.c | 47 +++++++++ configs/stmark2_defconfig | 26 +++++ include/configs/stmark2.h | 202 ++++++++++++++++++++++++++++++++++++ scripts/config_whitelist.txt | 1 + 9 files changed, 429 insertions(+) create mode 100644 board/sysam/stmark2/Kconfig create mode 100644 board/sysam/stmark2/MAINTAINERS create mode 100644 board/sysam/stmark2/Makefile create mode 100644 board/sysam/stmark2/sbf_dram_init.S create mode 100644 board/sysam/stmark2/stmark2.c create mode 100644 configs/stmark2_defconfig create mode 100644 include/configs/stmark2.h diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 26509b73c6..42fb91539a 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -200,6 +200,10 @@ config TARGET_AMCORE bool "Support AMCORE" select M5307 +config TARGET_STMARK2 + bool "Support stmark2" + select M54418 + endchoice source "board/BuS/eb_cpu5282/Kconfig" @@ -223,5 +227,6 @@ source "board/freescale/m54455evb/Kconfig" source "board/freescale/m547xevb/Kconfig" source "board/freescale/m548xevb/Kconfig" source "board/sysam/amcore/Kconfig" +source "board/sysam/stmark2/Kconfig" endmenu diff --git a/board/sysam/stmark2/Kconfig b/board/sysam/stmark2/Kconfig new file mode 100644 index 0000000000..87ab7ab7b5 --- /dev/null +++ b/board/sysam/stmark2/Kconfig @@ -0,0 +1,15 @@ +if TARGET_STMARK2 + +config SYS_CPU + default "mcf5445x" + +config SYS_BOARD + default "stmark2" + +config SYS_VENDOR + default "sysam" + +config SYS_CONFIG_NAME + default "stmark2" + +endif diff --git a/board/sysam/stmark2/MAINTAINERS b/board/sysam/stmark2/MAINTAINERS new file mode 100644 index 0000000000..b87f432bb3 --- /dev/null +++ b/board/sysam/stmark2/MAINTAINERS @@ -0,0 +1,6 @@ +STMARK2 BOARD +M: Angelo Dureghello <angelo(a)sysam.it> +S: Maintained +F: board/sysam/stmark2/ +F: include/configs/stmark2.h +F: configs/stmark2_defconfig diff --git a/board/sysam/stmark2/Makefile b/board/sysam/stmark2/Makefile new file mode 100644 index 0000000000..064a57ea05 --- /dev/null +++ b/board/sysam/stmark2/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2014 Angelo Dureghello <angelo(a)sysam.it> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y = stmark2.o +extra-y += sbf_dram_init.o diff --git a/board/sysam/stmark2/sbf_dram_init.S b/board/sysam/stmark2/sbf_dram_init.S new file mode 100644 index 0000000000..52abda5c3c --- /dev/null +++ b/board/sysam/stmark2/sbf_dram_init.S @@ -0,0 +1,119 @@ +/* + * Board-specific early ddr/sdram init. + * + * (C) Copyright 2017 Angelo Dureghello <angelo(a)sysam.it> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +.equ PPMCR0, 0xfc04002d +.equ MSCR_SDRAMC, 0xec094060 +.equ MISCCR2, 0xec09001a +.equ DDR_RCR, 0xfc0b8180 +.equ DDR_PADCR, 0xfc0b81ac +.equ DDR_CR00, 0xfc0b8000 +.equ DDR_CR06, 0xfc0b8018 +.equ DDR_CR09, 0xfc0b8024 +.equ DDR_CR40, 0xfc0b80a0 +.equ DDR_CR45, 0xfc0b80b4 +.equ DDR_CR56, 0xfc0b80e0 + +.global sbf_dram_init +.text + +sbf_dram_init: + /* CD46 = DDR on */ + move.l #PPMCR0, %a1 + move.b #46, (%a1) + + /* stmark 2, max drive strength */ + move.l #MSCR_SDRAMC, %a1 + move.b #1, (%a1) + + /* + * use cpu clock, seems more realiable + * + * DDR2 clock is serviced from DDR controller as input clock / 2 + * so, if clock comes from + * vco, i.e. 480(vco) / 2, so ddr clock is 240 Mhz (measured) + * cpu, i.e. 250(cpu) / 2, so ddr clock is 125 Mhz (measured) + * + * . + * / \ DDR2 can't be clocked lower than 125Mhz + * / ! \ DDR2 init must pass further i/dcache enable test + * /_____\ + * WARNING + */ + + /* cpu / 2 = 125 Mhz for 480 Mhz pll */ + move.l #MISCCR2, %a1 + move.w #0xa01d, (%a1) + + /* DDR force sw reset settings */ + move.l #DDR_RCR, %a1 + move.l #0x00000000, (%a1) + move.l #0x40000000, (%a1) + + /* + * PAD_ODT_CS: for us seems both 1(75 ohm) and 2(150ohm) are good, + * 500/700 mV are ok + */ + move.l #DDR_PADCR, %a1 + move.l #0x01030203, (%a1) /* as freescale tower */ + + move.l #DDR_CR00, %a1 + move.l #0x01010101, (%a1)+ /* 0x00 */ + move.l #0x00000101, (%a1)+ /* 0x04 */ + move.l #0x01010100, (%a1)+ /* 0x08 */ + move.l #0x01010000, (%a1)+ /* 0x0C */ + move.l #0x00010101, (%a1)+ /* 0x10 */ + move.l #DDR_CR06, %a1 + move.l #0x00010100, (%a1)+ /* 0x18 */ + move.l #0x00000001, (%a1)+ /* 0x1C */ + move.l #0x01000001, (%a1)+ /* 0x20 */ + move.l #0x00000100, (%a1)+ /* 0x24 */ + move.l #0x00010001, (%a1)+ /* 0x28 */ + move.l #0x00000200, (%a1)+ /* 0x2C */ + move.l #0x01000002, (%a1)+ /* 0x30 */ + move.l #0x00000000, (%a1)+ /* 0x34 */ + move.l #0x00000100, (%a1)+ /* 0x38 */ + move.l #0x02000100, (%a1)+ /* 0x3C */ + move.l #0x02000407, (%a1)+ /* 0x40 */ + move.l #0x02030007, (%a1)+ /* 0x44 */ + move.l #0x02000100, (%a1)+ /* 0x48 */ + move.l #0x0A030203, (%a1)+ /* 0x4C */ + move.l #0x00020708, (%a1)+ /* 0x50 */ + move.l #0x00050008, (%a1)+ /* 0x54 */ + move.l #0x04030002, (%a1)+ /* 0x58 */ + move.l #0x00000004, (%a1)+ /* 0x5C */ + move.l #0x020A0000, (%a1)+ /* 0x60 */ + move.l #0x0C00000E, (%a1)+ /* 0x64 */ + move.l #0x00002004, (%a1)+ /* 0x68 */ + move.l #0x00000000, (%a1)+ /* 0x6C */ + move.l #0x00100010, (%a1)+ /* 0x70 */ + move.l #0x00100010, (%a1)+ /* 0x74 */ + move.l #0x00000000, (%a1)+ /* 0x78 */ + move.l #0x07990000, (%a1)+ /* 0x7C */ + move.l #DDR_CR40, %a1 + move.l #0x00000000, (%a1)+ /* 0xA0 */ + move.l #0x00C80064, (%a1)+ /* 0xA4 */ + move.l #0x44520002, (%a1)+ /* 0xA8 */ + move.l #0x00C80023, (%a1)+ /* 0xAC */ + move.l #DDR_CR45, %a1 + move.l #0x0000C350, (%a1) /* 0xB4 */ + move.l #DDR_CR56, %a1 + move.l #0x04000000, (%a1)+ /* 0xE0 */ + move.l #0x03000304, (%a1)+ /* 0xE4 */ + move.l #0x40040000, (%a1)+ /* 0xE8 */ + move.l #0xC0004004, (%a1)+ /* 0xEC */ + move.l #0x0642C000, (%a1)+ /* 0xF0 */ + move.l #0x00000642, (%a1)+ /* 0xF4 */ + move.l #DDR_CR09, %a1 + tpf + move.l #0x01000100, (%a1) /* 0x24 */ + + move.l #0x2000, %d1 + bsr asm_delay + + + rts diff --git a/board/sysam/stmark2/stmark2.c b/board/sysam/stmark2/stmark2.c new file mode 100644 index 0000000000..4f291ab6d6 --- /dev/null +++ b/board/sysam/stmark2/stmark2.c @@ -0,0 +1,47 @@ +/* + * Board-specific init. + * + * (C) Copyright 2017 Angelo Dureghello <angelo(a)sysam.it> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <spi.h> +#include <asm/io.h> +#include <asm/immap.h> +#include <mmc.h> +#include <fsl_esdhc.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + /* + * need to to: + * Check serial flash size. if 2mb evb, else 8mb demo + */ + puts("Board: "); + puts("Sysam stmark2\n"); + return 0; +} + +int dram_init(void) +{ + u32 dramsize; + + /* + * Serial Boot: The dram is already initialized in start.S + * only require to return DRAM size + */ + dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000; + + gd->ram_size = dramsize; + + return 0; +} + +int testdram(void) +{ + return 0; +} diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig new file mode 100644 index 0000000000..cf3625c281 --- /dev/null +++ b/configs/stmark2_defconfig @@ -0,0 +1,26 @@ +CONFIG_M68K=y +CONFIG_SYS_TEXT_BASE=0x47E00000 +CONFIG_TARGET_STMARK2=y +CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=30000000" +# CONFIG_DISPLAY_BOARDINFO is not set +# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="stmark2 $ " +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +CONFIG_CMD_LOADB=y +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +CONFIG_CMD_CACHE=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_MTD=y +CONFIG_REGEX=y diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h new file mode 100644 index 0000000000..bd1f64bc8f --- /dev/null +++ b/include/configs/stmark2.h @@ -0,0 +1,202 @@ +/* + * Sysam stmark2 board configuration + * + * (C) Copyright 2016 Angelo Dureghello <angelo(a)sysam.it> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __STMARK2_CONFIG_H +#define __STMARK2_CONFIG_H + +#define CONFIG_STMARK2 +#define CONFIG_HOSTNAME stmark2 + +#define CONFIG_MCFUART +#define CONFIG_SYS_UART_PORT 0 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } + +#define LDS_BOARD_TEXT \ + board/sysam/stmark2/sbf_dram_init.o (.text*) + +#define CONFIG_TIMESTAMP + +/* commands */ +#define CONFIG_CMD_REGINFO + +#define CONFIG_BOOTARGS \ + "console=ttyS0,115200 root=/dev/ram0 rw " \ + "rootfstype=ramfs " \ + "rdinit=/bin/init " \ + "devtmpfs.mount=1" + +#define CONFIG_BOOTCOMMAND \ + "sf probe 0:1 50000000; " \ + "sf read ${loadaddr} 0x100000 ${kern_size}; " \ + "bootm ${loadaddr}" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kern_size=0x700000\0" \ + "loadaddr=0x40001000\0" \ + "-(rootfs)\0" \ + "update_uboot=loady ${loadaddr}; " \ + "sf probe 0:1 50000000; " \ + "sf erase 0 0x80000; " \ + "sf write ${loadaddr} 0 ${filesize}\0" \ + "update_kernel=loady ${loadaddr}; " \ + "setenv kern_size ${filesize}; saveenv; " \ + "sf probe 0:1 50000000; " \ + "sf erase 0x100000 0x700000; " \ + "sf write ${loadaddr} 0x100000 ${filesize}\0" \ + "update_rootfs=loady ${loadaddr}; " \ + "sf probe 0:1 50000000; " \ + "sf erase 0x00800000 0x100000; " \ + "sf write ${loadaddr} 0x00800000 ${filesize}\0" \ + "" + +/* Realtime clock */ +#undef CONFIG_MCFRTC +#define CONFIG_RTC_MCFRRTC +#define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000 + +/* spi not partitions */ +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_DEVICE +#define CONFIG_JFFS2_CMDLINE +#define CONFIG_JFFS2_DEV "nor0" +#define MTDIDS_DEFAULT "nor0=spi-flash.0" +#define MTDPARTS_DEFAULT \ + "mtdparts=spi-flash.0:" \ + "1m(u-boot)," \ + "7m(kernel)," \ + "-(rootfs)" + +/* Timer */ +#define CONFIG_MCFTMR +#undef CONFIG_MCFPIT + +/* DSPI and Serial Flash */ +#define CONFIG_CF_SPI +#define CONFIG_CF_DSPI +#define CONFIG_SF_DEFAULT_SPEED 50000000 +#define CONFIG_SERIAL_FLASH +#define CONFIG_HARD_SPI +#define CONFIG_SPI_FLASH_ISSI +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 1 + +#define CONFIG_SYS_SBFHDR_SIZE 0x7 + +#define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ + DSPI_CTAR_PCSSCK_1CLK | \ + DSPI_CTAR_PASC(0) | \ + DSPI_CTAR_PDT(0) | \ + DSPI_CTAR_CSSCK(0) | \ + DSPI_CTAR_ASC(0) | \ + DSPI_CTAR_DT(1) | \ + DSPI_CTAR_BR(6)) +#define CONFIG_SYS_DSPI_CTAR1 (CONFIG_SYS_DSPI_CTAR0) +#define CONFIG_SYS_DSPI_CTAR2 (CONFIG_SYS_DSPI_CTAR0) + +/* Input, PCI, Flexbus, and VCO */ +#define CONFIG_EXTRA_CLOCK + +#define CONFIG_PRAM 2048 /* 2048 KB */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000) +#define CONFIG_SYS_MBAR 0xFC000000 + +/* + * Definitions for initial stack pointer and data area (in internal SRAM) + */ +#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 +/* End of used area in internal SRAM */ +#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 +#define CONFIG_SYS_INIT_RAM_CTRL 0x221 +#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) - 32) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32) + +/* + * Start addresses for the final memory configuration + * (Set up by the startup code) + * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + */ +#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CONFIG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */ + +#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x400) +#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) +#define CONFIG_SYS_DRAM_TEST + +#if defined(CONFIG_CF_SBF) +#define CONFIG_SERIAL_BOOT +#endif + +#if defined(CONFIG_SERIAL_BOOT) +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) +#else +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) +#endif + +#define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024) +/* Reserve 256 kB for Monitor */ +#define CONFIG_SYS_MONITOR_LEN (256 << 10) +/* Reserve 256 kB for malloc() */ +#define CONFIG_SYS_MALLOC_LEN (256 << 10) + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization ?? + */ +/* Initial Memory map for Linux */ +#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \ + (CONFIG_SYS_SDRAM_SIZE << 20)) + +/* Configuration for environment + * Environment is embedded in u-boot in the second sector of the flash + */ + +#if defined(CONFIG_CF_SBF) +#define CONFIG_ENV_IS_IN_SPI_FLASH 1 +#define CONFIG_ENV_SPI_CS 1 +#define CONFIG_ENV_OFFSET 0x40000 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x10000 +#endif + +#undef CONFIG_ENV_OVERWRITE + +/* Cache Configuration */ +#define CONFIG_SYS_CACHELINE_SIZE 16 +#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - 4) +#define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA) +#define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA) +#define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ + CF_ACR_EN | CF_ACR_SM_ALL) +#define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \ + CF_CACR_ICINVA | CF_CACR_EUSP) +#define CONFIG_SYS_CACHE_DCACR ((CONFIG_SYS_CACHE_ICACR | \ + CF_CACR_DEC | CF_CACR_DDCM_P | \ + CF_CACR_DCINVA) & ~CF_CACR_ICINVA) + +#define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - 12) + +#endif /* __STMARK2_CONFIG_H */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index e8f49ebe5d..e6faf3450e 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -2696,6 +2696,7 @@ CONFIG_STM32_GPIO CONFIG_STM32_HSE_HZ CONFIG_STM32_HZ CONFIG_STM32_SERIAL +CONFIG_STMARK2 CONFIG_STRESS CONFIG_STRIDER CONFIG_STRIDER_CON -- 2.13.2

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