May 2017 - U-Boot

[U-Boot] [PATCH 2/3] nds32: Support AG101P timer DM.
by Andes 19 May '17

19 May '17

From: rick <rick(a)andestech.com> Support AG101P timer device tree flow. Signed-off-by: rick <rick(a)andestech.com> --- arch/nds32/cpu/n1213/ag101/timer.c | 3 +- arch/nds32/dts/ag101p.dts | 8 +++ configs/adp-ag101p_defconfig | 2 + drivers/timer/Kconfig | 6 ++ drivers/timer/Makefile | 1 + drivers/timer/ag101p_timer.c | 122 ++++++++++++++++++++++++++++++++++++ 6 files changed, 141 insertions(+), 1 deletion(-) create mode 100644 drivers/timer/ag101p_timer.c diff --git a/arch/nds32/cpu/n1213/ag101/timer.c b/arch/nds32/cpu/n1213/ag101/timer.c index 758b354..0c03a10 100644 --- a/arch/nds32/cpu/n1213/ag101/timer.c +++ b/arch/nds32/cpu/n1213/ag101/timer.c @@ -8,7 +8,7 @@ * * SPDX-License-Identifier: GPL-2.0+ */ - +#ifndef CONFIG_TIMER #include <common.h> #include <asm/io.h> #include <faraday/fttmr010.h> @@ -189,3 +189,4 @@ ulong get_tbclk(void) return CONFIG_SYS_CLK_FREQ; #endif } +#endif /* CONFIG_TIMER */ diff --git a/arch/nds32/dts/ag101p.dts b/arch/nds32/dts/ag101p.dts index 2baa3dc..91314b5 100644 --- a/arch/nds32/dts/ag101p.dts +++ b/arch/nds32/dts/ag101p.dts @@ -13,6 +13,7 @@ /* bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0x99600000 debug bootmem_debug memblock=debug loglevel=7"; */ bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0x99600000 debug loglevel=7"; stdout-path = "uart0:38400n8"; + tick-timer = &timer0; }; memory@0 { @@ -46,4 +47,11 @@ no-loopback-test = <1>; }; + timer0: timer@98400000 { + compatible = "andestech,attmr010"; + reg = <0x98400000 0x1000>; + interrupts = <19 4>; + clock-frequency = <15000000>; + }; + }; diff --git a/configs/adp-ag101p_defconfig b/configs/adp-ag101p_defconfig index 2a7302f..685a961 100644 --- a/configs/adp-ag101p_defconfig +++ b/configs/adp-ag101p_defconfig @@ -18,3 +18,5 @@ CONFIG_OF_CONTROL=y CONFIG_DM=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y +CONFIG_TIMER=y +CONFIG_AG101P_TIMER=y diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index e038523..356fa29 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -74,4 +74,10 @@ config ARC_TIMER usually at least one of them exists. Either of them is supported in U-Boot. +config AG101P_TIMER + bool "Ag101p timer support" + depends on TIMER + help + Select this to enable a timer for Ag101p devices. + endmenu diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile index bfe65fc..3dad956 100644 --- a/drivers/timer/Makefile +++ b/drivers/timer/Makefile @@ -12,3 +12,4 @@ obj-$(CONFIG_OMAP_TIMER) += omap-timer.o obj-$(CONFIG_AST_TIMER) += ast_timer.o obj-$(CONFIG_STI_TIMER) += sti-timer.o obj-$(CONFIG_ARC_TIMER) += arc_timer.o +obj-$(CONFIG_AG101P_TIMER) += ag101p_timer.o diff --git a/drivers/timer/ag101p_timer.c b/drivers/timer/ag101p_timer.c new file mode 100644 index 0000000..163402f --- /dev/null +++ b/drivers/timer/ag101p_timer.c @@ -0,0 +1,122 @@ +/* + * Andestech ATFTMR010 timer driver + * + * (C) Copyright 2016 + * Rick Chen, NDS32 Software Engineering, rick(a)andestech.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <timer.h> +#include <linux/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Timer Control Register + */ +#define T3_UPDOWN (1 << 11) +#define T2_UPDOWN (1 << 10) +#define T1_UPDOWN (1 << 9) +#define T3_OFENABLE (1 << 8) +#define T3_CLOCK (1 << 7) +#define T3_ENABLE (1 << 6) +#define T2_OFENABLE (1 << 5) +#define T2_CLOCK (1 << 4) +#define T2_ENABLE (1 << 3) +#define T1_OFENABLE (1 << 2) +#define T1_CLOCK (1 << 1) +#define T1_ENABLE (1 << 0) + +/* + * Timer Interrupt State & Mask Registers + */ +#define T3_OVERFLOW (1 << 8) +#define T3_MATCH2 (1 << 7) +#define T3_MATCH1 (1 << 6) +#define T2_OVERFLOW (1 << 5) +#define T2_MATCH2 (1 << 4) +#define T2_MATCH1 (1 << 3) +#define T1_OVERFLOW (1 << 2) +#define T1_MATCH2 (1 << 1) +#define T1_MATCH1 (1 << 0) + +struct atftmr_timer_regs { + u32 t1_counter; /* 0x00 */ + u32 t1_load; /* 0x04 */ + u32 t1_match1; /* 0x08 */ + u32 t1_match2; /* 0x0c */ + u32 t2_counter; /* 0x10 */ + u32 t2_load; /* 0x14 */ + u32 t2_match1; /* 0x18 */ + u32 t2_match2; /* 0x1c */ + u32 t3_counter; /* 0x20 */ + u32 t3_load; /* 0x24 */ + u32 t3_match1; /* 0x28 */ + u32 t3_match2; /* 0x2c */ + u32 cr; /* 0x30 */ + u32 int_state; /* 0x34 */ + u32 int_mask; /* 0x38 */ +}; + +struct atftmr_timer_platdata { + struct atftmr_timer_regs *regs; +}; + +static int atftmr_timer_get_count(struct udevice *dev, u64 *count) +{ + struct atftmr_timer_platdata *plat = dev->platdata; + struct atftmr_timer_regs *const regs = plat->regs; + u32 val; + val = readl(&regs->t3_counter); + *count = timer_conv_64(val); + return 0; +} + +static int atftmr_timer_probe(struct udevice *dev) +{ + struct atftmr_timer_platdata *plat = dev->platdata; + struct atftmr_timer_regs *const regs = plat->regs; + u32 cr; + writel(0, &regs->t3_load); + writel(0, &regs->t3_counter); + writel(TIMER_LOAD_VAL, &regs->t3_match1); + writel(TIMER_LOAD_VAL, &regs->t3_match2); + /* disable interrupts */ + writel(T3_MATCH1|T3_MATCH2|T3_OVERFLOW , &regs->int_mask); + cr = readl(&regs->cr); + cr |= (T3_ENABLE|T3_UPDOWN); + writel(cr, &regs->cr); + return 0; +} + +static int atftme_timer_ofdata_to_platdata(struct udevice *dev) +{ + struct atftmr_timer_platdata *plat = dev_get_platdata(dev); + plat->regs = map_physmem(dev_get_addr(dev), + sizeof(struct atftmr_timer_regs), + MAP_NOCACHE); + return 0; +} + +static const struct timer_ops ag101p_timer_ops = { + .get_count = atftmr_timer_get_count, +}; + +static const struct udevice_id ag101p_timer_ids[] = { + { .compatible = "andestech,attmr010" }, + {} +}; + +U_BOOT_DRIVER(altera_timer) = { + .name = "ag101p_timer", + .id = UCLASS_TIMER, + .of_match = ag101p_timer_ids, + .ofdata_to_platdata = atftme_timer_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct atftmr_timer_platdata), + .probe = atftmr_timer_probe, + .ops = &ag101p_timer_ops, + .flags = DM_FLAG_PRE_RELOC, +}; -- 1.7.9.5

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[U-Boot] [PATCH 1/3] nds32: Support AG101P serial DM.
by Andes 19 May '17

19 May '17

From: rick <rick(a)andestech.com> Support AG101P serial device tree flow. Signed-off-by: rick <rick(a)andestech.com> --- arch/Kconfig | 1 + arch/nds32/cpu/n1213/start.S | 10 +++++--- arch/nds32/dts/Makefile | 14 +++++++++++ arch/nds32/dts/ag101p.dts | 49 +++++++++++++++++++++++++++++++++++++++ arch/nds32/include/asm/config.h | 1 + arch/nds32/lib/bootm.c | 6 +++++ configs/adp-ag101p_defconfig | 5 ++++ include/configs/adp-ag101p.h | 8 +++++-- 8 files changed, 89 insertions(+), 5 deletions(-) create mode 100644 arch/nds32/dts/Makefile create mode 100644 arch/nds32/dts/ag101p.dts diff --git a/arch/Kconfig b/arch/Kconfig index 2528f50..1212635 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -43,6 +43,7 @@ config MIPS config NDS32 bool "NDS32 architecture" + select SUPPORT_OF_CONTROL config NIOS2 bool "Nios II architecture" diff --git a/arch/nds32/cpu/n1213/start.S b/arch/nds32/cpu/n1213/start.S index 99971fd..7992fd9 100644 --- a/arch/nds32/cpu/n1213/start.S +++ b/arch/nds32/cpu/n1213/start.S @@ -161,9 +161,13 @@ update_gp: */ call_board_init_f: li $sp, CONFIG_SYS_INIT_SP_ADDR - li $r10, GD_SIZE /* get GD size */ - sub $sp, $sp, $r10 /* GD start addr */ - move $r10, $sp + move $r0, $sp + bal board_init_f_alloc_reserve + move $sp, $r0 + bal board_init_f_init_reserve +#ifdef CONFIG_DEBUG_UART + bal debug_uart_init +#endif li $r0, 0x00000000 #ifdef __PIC__ diff --git a/arch/nds32/dts/Makefile b/arch/nds32/dts/Makefile new file mode 100644 index 0000000..2d8480b --- /dev/null +++ b/arch/nds32/dts/Makefile @@ -0,0 +1,14 @@ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +dtb-$(CONFIG_TARGET_ADP_AG101P) += ag101p.dtb +targets += $(dtb-y) + +DTC_FLAGS += -R 4 -p 0x1000 + +PHONY += dtbs +dtbs: $(addprefix $(obj)/, $(dtb-y)) + @: + +clean-files := *.dtb diff --git a/arch/nds32/dts/ag101p.dts b/arch/nds32/dts/ag101p.dts new file mode 100644 index 0000000..2baa3dc --- /dev/null +++ b/arch/nds32/dts/ag101p.dts @@ -0,0 +1,49 @@ +/dts-v1/; +/ { + compatible = "nds32 ag101p"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + aliases { + uart0 = &serial0; + } ; + + chosen { + /* bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0x99600000 debug bootmem_debug memblock=debug loglevel=7"; */ + bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0x99600000 debug loglevel=7"; + stdout-path = "uart0:38400n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x40000000>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + compatible = "andestech,n13"; + reg = <0>; + /* FIXME: to fill correct frqeuency */ + clock-frequency = <60000000>; + }; + }; + + intc: interrupt-controller { + compatible = "andestech,atnointc010"; + #interrupt-cells = <1>; + interrupt-controller; + }; + + serial0: serial@99600000 { + compatible = "andestech,uart16550", "ns16550a"; + reg = <0x99600000 0x1000>; + interrupts = <7 4>; + clock-frequency = <14745600>; + reg-shift = <2>; + no-loopback-test = <1>; + }; + +}; diff --git a/arch/nds32/include/asm/config.h b/arch/nds32/include/asm/config.h index 054cc48..7289217 100644 --- a/arch/nds32/include/asm/config.h +++ b/arch/nds32/include/asm/config.h @@ -8,5 +8,6 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ +#define CONFIG_LMB #endif diff --git a/arch/nds32/lib/bootm.c b/arch/nds32/lib/bootm.c index 8b0b28f..7999167 100644 --- a/arch/nds32/lib/bootm.c +++ b/arch/nds32/lib/bootm.c @@ -14,6 +14,12 @@ DECLARE_GLOBAL_DATA_PTR; +int arch_fixup_fdt(void *blob) +{ + return 0; +} + + #if defined(CONFIG_SETUP_MEMORY_TAGS) || \ defined(CONFIG_CMDLINE_TAG) || \ defined(CONFIG_INITRD_TAG) || \ diff --git a/configs/adp-ag101p_defconfig b/configs/adp-ag101p_defconfig index 48d08cc..2a7302f 100644 --- a/configs/adp-ag101p_defconfig +++ b/configs/adp-ag101p_defconfig @@ -1,5 +1,7 @@ CONFIG_NDS32=y CONFIG_TARGET_ADP_AG101P=y +CONFIG_DEFAULT_DEVICE_TREE="ag101p" +CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SYS_PROMPT="NDS32 # " CONFIG_CMD_MMC=y @@ -12,4 +14,7 @@ CONFIG_CMD_FAT=y CONFIG_MMC=y CONFIG_MTD_NOR_FLASH=y CONFIG_BAUDRATE=38400 +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index b42fcfa..106b591 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -20,8 +20,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_SYS_GENERIC_GLOBAL_DATA - /* * Definitions related to passing arguments to kernel. */ @@ -35,6 +33,10 @@ #ifdef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_TEXT_BASE 0x00500000 +#ifdef CONFIG_OF_CONTROL +#undef CONFIG_OF_SEPARATE +#define CONFIG_OF_EMBED +#endif #else #ifdef CONFIG_MEM_REMAP #define CONFIG_SYS_TEXT_BASE 0x80000000 @@ -87,7 +89,9 @@ #define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_COM1 CONFIG_FTUART010_02_BASE +#ifndef CONFIG_DM_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE -4 +#endif #define CONFIG_SYS_NS16550_CLK ((18432000 * 20) / 25) /* AG101P */ /* -- 1.7.9.5

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[U-Boot] [PATCH 0/2] Rockchip: USB: added usb phy control to support ...2017-05-19 16:05:02
by Ringo 19 May '17

19 May '17

Spam detection software, running on the system "lists.denx.de", has identified this incoming email as possible spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see @@CONTACT_ADDRESS@@ for details. Content preview: Dear Friend, Credit card shape USB flash drives, print your photos and information on both sides, as a best Corporate gifts for your clients. Picture show: [...] Content analysis details: (8.7 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- 3.6 RCVD_IN_PBL RBL: Received via a relay in Spamhaus PBL [61.141.124.108 listed in zen.spamhaus.org] 2.6 DEAR_FRIEND BODY: Dear Friend? That's not very dear! 1.1 MIME_HTML_ONLY BODY: Message only has text/html MIME parts 0.0 HTML_MESSAGE BODY: HTML included in message 0.0 RCVD_IN_SORBS_DUL RBL: SORBS: sent directly from dynamic IP address [61.141.124.108 listed in dnsbl.sorbs.net] 0.1 MISSING_MID Missing Message-Id: header 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines 1.3 RDNS_NONE Delivered to internal network by a host with no rDNS The original message was not completely plain text, and may be unsafe to open with some email clients; in particular, it may contain a virus, or confirm that your address can receive spam. If you wish to view it, it may be safer to save it to a file and open it with an editor.

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[U-Boot] [PATCH] board_f: skip timer_init() on Coldfire archs
by Angelo Dureghello 19 May '17

19 May '17

Coldfire arch is not happy with timer_init since interrupt handlers are still not set at that stage, and the boot hangs silently. Signed-off-by: Angelo Dureghello <angelo(a)sysam.it> --- common/board_f.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/common/board_f.c b/common/board_f.c index d9431ee79a..30e588e213 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -740,7 +740,9 @@ static const init_fnc_t init_sequence_f[] = { /* get CPU and bus clocks according to the environment variable */ get_clocks, /* get CPU and bus clocks (etc.) */ #endif +#if !defined(CONFIG_M68K) timer_init, /* initialize timer */ +#endif #if defined(CONFIG_BOARD_POSTCLK_INIT) board_postclk_init, #endif -- 2.11.0

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[U-Boot] [PATCH 1/2] drivers: net: fsl-mc: Define PHY_RESET_R function
by Bogdan Purcareata 19 May '17

19 May '17

DPAA2 platforms boot the Management Complex based on the u-boot env variable "mcinitcmd". Instead of doing this step on each platform individually, define a reset_phy function in the MC driver, since it's semantically tied to it and it gets called at a later moment, when all board PHY devices have been initialized. Signed-off-by: Bogdan Purcareata <bogdan.purcareata(a)nxp.com> Signed-off-by: Heinz Wrobel <heinz.wrobel(a)nxp.com> --- board/freescale/ls2080aqds/eth.c | 8 -------- board/freescale/ls2080ardb/eth_ls2080rdb.c | 7 +------ drivers/net/fsl-mc/mc.c | 18 ++++++++++++++++++ include/configs/ls2080a_common.h | 5 +++++ 4 files changed, 24 insertions(+), 14 deletions(-) diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c index 59361e9..23feb9b 100644 --- a/board/freescale/ls2080aqds/eth.c +++ b/board/freescale/ls2080aqds/eth.c @@ -834,7 +834,6 @@ void ls2080a_handle_phy_interface_xsgmii(int i) int board_eth_init(bd_t *bis) { int error; - char *mc_boot_env_var; #ifdef CONFIG_FSL_MC_ENET struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR; int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) & @@ -902,9 +901,6 @@ int board_eth_init(bd_t *bis) } } - mc_boot_env_var = getenv(MC_BOOT_ENV_VAR); - if (mc_boot_env_var) - run_command_list(mc_boot_env_var, -1, 0); error = cpu_eth_init(bis); if (hwconfig_f("xqsgmii", env_hwconfig)) { @@ -918,7 +914,3 @@ int board_eth_init(bd_t *bis) error = pci_eth_init(bis); return error; } - -#ifdef CONFIG_FSL_MC_ENET - -#endif diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c b/board/freescale/ls2080ardb/eth_ls2080rdb.c index ba584c8..0a8500b 100644 --- a/board/freescale/ls2080ardb/eth_ls2080rdb.c +++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c @@ -20,11 +20,9 @@ DECLARE_GLOBAL_DATA_PTR; -#define MC_BOOT_ENV_VAR "mcinitcmd" int board_eth_init(bd_t *bis) { #if defined(CONFIG_FSL_MC_ENET) - char *mc_boot_env_var; int i, interface; struct memac_mdio_info mdio_info; struct mii_dev *dev; @@ -98,11 +96,8 @@ int board_eth_init(bd_t *bis) } } - mc_boot_env_var = getenv(MC_BOOT_ENV_VAR); - if (mc_boot_env_var) - run_command_list(mc_boot_env_var, -1, 0); cpu_eth_init(bis); -#endif /* CONFIG_FMAN_ENET */ +#endif /* CONFIG_FSL_MC_ENET */ #ifdef CONFIG_PHY_AQUANTIA /* diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index 9f69d75..afaf285 100644 --- a/drivers/net/fsl-mc/mc.c +++ b/drivers/net/fsl-mc/mc.c @@ -26,6 +26,7 @@ #define MC_MEM_SIZE_ENV_VAR "mcmemsize" #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout" +#define MC_BOOT_ENV_VAR "mcinitcmd" DECLARE_GLOBAL_DATA_PTR; static int mc_boot_status = -1; @@ -1362,3 +1363,20 @@ U_BOOT_CMD( "fsl_mc lazyapply DPL [DPL_addr] - Apply DPL file on exit\n" "fsl_mc start aiop [FW_addr] - Start AIOP\n" ); + +#if defined(CONFIG_RESET_PHY_R) +void reset_phy(void) +{ +#if defined(CONFIG_FSL_MC_ENET) + char *mc_boot_env_var; + /* The MC may only be initialized in the reset PHY function + * because otherwise U-Boot has not yet set up all the MAC + * address info properly. Without MAC addresses, the MC code + * can not properly initialize the DPC. + */ + mc_boot_env_var = getenv(MC_BOOT_ENV_VAR); + if (mc_boot_env_var) + run_command_list(mc_boot_env_var, -1, 0); +#endif /* CONFIG_FSL_MC_ENET */ +} +#endif /* CONFIG_RESET_PHY_R */ diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 427f623..266ef02 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -149,6 +149,11 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH 0x200000 #define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 0x07000000 +/* Define phy_reset function to boot the MC based on mcinitcmd. + * This happens late enough to properly fixup u-boot env MAC addresses. + */ +#define CONFIG_RESET_PHY_R + /* * Carve out a DDR region which will not be used by u-boot/Linux * -- 1.9.1

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[U-Boot] [PATCH] rockchip: firefly-rk3399: enable rk3399 pinctrl in defconfig
by Alex Hixon 19 May '17

19 May '17

The config name enabling the rk3399-pinctrl driver is spelled wrong, so it does not get built. This causes SPL to fail during board init. Make rk3399-firefly boot by enabling the pinctrl driver via the correct config name. Signed-off-by: Alex Hixon <alex(a)alexhixon.com> --- configs/firefly-rk3399_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index f30f131f34..0a4d005975 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -39,7 +39,7 @@ CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y -CONFIG_ROCKCHIP_RK3399_PINCTRL=y +CONFIG_PINCTRL_ROCKCHIP_RK3399=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y -- 2.11.0

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[U-Boot] Please pull u-boot-fdt
by Simon Glass 19 May '17

19 May '17

Hi Tom, Here's the conversion to use the upstream pylibfdt implementation. The following changes since commit 85ea850976daea57c8045f3569566fad5ce9fe0f: p1_p2_rdb: Fix unused variable warning (2017-05-09 09:11:04 -0400) are available in the git repository at: git://git.denx.de/u-boot-fdt.git for you to fetch changes up to 8fbd55f0f8730e3a6994798f4e533138d15be6aa: fdt: Drop fdt_select.py (2017-05-09 14:56:19 -0600) ---------------------------------------------------------------- Simon Glass (20): fdt: Add Python bindings pci: Correct cast for sandbox fdt: Correct cast for sandbox in fdtdec_setup_memory_size() fdt: Use SPDX format for licenses in the libfdt headers fdt: Move header files into lib/libfdt fdt: Allow swig options to be provided by Makefile fdt: Add all source files to the libfdt build fdt: Rename existing python libfdt module fdt: Build the new python libfdt module fdt: Update fdt_test to use 'dt' instead of 'fdt' fdt: dtoc: Add a full set of property tests fdt: Support use of the new python libfdt library fdt: Makefile: Build python libfdt library if needed fdt: Stop building the old python libfdt module fdt: Drop use of the legacy libfdt python module fdt: Drop fdt_fallback library binman: Drop a special case related to fdt_fallback fdt: Merge fdt_normal with its base class binman: Rename fdt variable to dtb fdt: Drop fdt_select.py Makefile | 16 +- cmd/pci.c | 3 +- include/fdt.h | 112 +--- include/libfdt.h | 2138 +--------------------------------------------------------------------- lib/fdtdec.c | 3 +- lib/libfdt/fdt.h | 67 +++ lib/libfdt/libfdt.h | 2144 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ lib/libfdt/libfdt.swig | 113 ---- lib/libfdt/pylibfdt/libfdt.i | 389 +++++++++++++ lib/libfdt/pylibfdt/setup.py | 123 +++++ lib/libfdt/setup.py | 38 -- scripts/Makefile.spl | 17 +- tools/Makefile | 43 +- tools/binman/binman.py | 3 + tools/binman/control.py | 12 +- tools/binman/etype/u_boot_dtb_with_ucode.py | 24 +- tools/binman/fdt_test.py | 64 ++- tools/binman/func_test.py | 48 +- tools/binman/test/45_prop_test.dts | 23 + tools/dtoc/dtoc.py | 3 +- tools/dtoc/fdt.py | 183 +++++- tools/dtoc/fdt_fallback.py | 181 ------ tools/dtoc/fdt_normal.py | 225 -------- tools/dtoc/fdt_select.py | 36 -- 24 files changed, 3049 insertions(+), 2959 deletions(-) create mode 100644 lib/libfdt/fdt.h create mode 100644 lib/libfdt/libfdt.h delete mode 100644 lib/libfdt/libfdt.swig create mode 100644 lib/libfdt/pylibfdt/libfdt.i create mode 100755 lib/libfdt/pylibfdt/setup.py delete mode 100644 lib/libfdt/setup.py create mode 100644 tools/binman/test/45_prop_test.dts delete mode 100644 tools/dtoc/fdt_fallback.py delete mode 100644 tools/dtoc/fdt_normal.py delete mode 100644 tools/dtoc/fdt_select.py Regards, Simon

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[U-Boot] [PATCH v2 09/20] fdt: Build the new python libfdt module
by Simon Glass 19 May '17

19 May '17

Build the upstream python libfdt module. At present the legacy module is still built and is the one that it used. Future work will switch this over. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v2: - Fix building when srcpath is ".." tools/Makefile | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/tools/Makefile b/tools/Makefile index cd08d3b33b..9f2d698818 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -63,6 +63,16 @@ FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common/image-sig.o LIBFDT_CSRCS := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c \ fdt_empty_tree.c fdt_addresses.c fdt_overlay.c \ fdt_region.c + +# Unfortunately setup.py below cannot handle srctree being ".." which it often +# is. It fails with an error like: +# Fatal error: can't create build/temp.linux-x86_64-2.7/../lib/libfdt/fdt.o: +# No such file or directory +# To fix this, use an absolute path. +libfdt_tree := $(shell readlink -f $(srctree)/lib/libfdt) + +LIBFDT_SRCS := $(addprefix $(libfdt_tree)/, $(LIBFDT_CSRCS)) +LIBFDT_SWIG := $(addprefix $(libfdt_tree)/, pylibfdt/libfdt.i) LIBFDT_OBJS := $(addprefix lib/libfdt/, $(patsubst %.c, %.o, $(LIBFDT_CSRCS))) RSA_OBJS-$(CONFIG_FIT_SIGNATURE) := $(addprefix lib/rsa/, \ @@ -114,6 +124,15 @@ mkimage-objs := $(dumpimage-mkimage-objs) mkimage.o fit_info-objs := $(dumpimage-mkimage-objs) fit_info.o fit_check_sign-objs := $(dumpimage-mkimage-objs) fit_check_sign.o +tools/_libfdt.so: $(LIBFDT_SRCS) $(LIBFDT_SWIG) + LDFLAGS="$(HOSTLDFLAGS)" CFLAGS= VERSION=u-boot-$(UBOOTVERSION) \ + CPPFLAGS="$(_hostc_flags)" OBJDIR=tools \ + SOURCES="$(LIBFDT_SRCS) $(LIBFDT_SWIG)" \ + SWIG_OPTS="-I$(srctree)/lib/libfdt -I$(srctree)/lib" \ + $(libfdt_tree)/pylibfdt/setup.py --quiet build_ext --inplace + mv $(libfdt_tree)/pylibfdt/libfdt.py tools/. + rm $(libfdt_tree)/pylibfdt/libfdt_wrap.c + # Build a libfdt Python module if swig is available # Use 'sudo apt-get install swig libpython-dev' to enable this hostprogs-y += \ @@ -219,6 +238,10 @@ clean-dirs := lib common always := $(hostprogs-y) +# Build a libfdt Python module if swig is available +# Use 'sudo apt-get install swig libpython-dev' to enable this +always += $(if $(shell which swig 2> /dev/null),_libfdt.so) + # Generated LCD/video logo LOGO_H = $(objtree)/include/bmp_logo.h LOGO_DATA_H = $(objtree)/include/bmp_logo_data.h -- 2.13.0.303.g4ebf302169-goog

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[U-Boot] [PATCH v2] ARM: dts: am335x-evm: disable mmc3
by Jean-Jacques Hiblot 19 May '17

19 May '17

SDIO is not supported in u-boot, there is no point in enabling mmc3. For this purpose, add u-boot specific dtsi that this will be included automatically while building the dtb. Signed-off-by: Jean-Jacques Hiblot <jjhiblot(a)ti.com> --- This patch relies on "scripts/Makefile.lib: Always have ...-u-boot.dtsi be able to override". Changes since v1: * add a u-boot specific dtsi for the purpose. arch/arm/dts/am335x-evm-u-boot.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 arch/arm/dts/am335x-evm-u-boot.dtsi diff --git a/arch/arm/dts/am335x-evm-u-boot.dtsi b/arch/arm/dts/am335x-evm-u-boot.dtsi new file mode 100644 index 0000000..d7b296b --- /dev/null +++ b/arch/arm/dts/am335x-evm-u-boot.dtsi @@ -0,0 +1,10 @@ +/* + * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + + +&mmc3 { + status = "disabled"; +}; -- 1.9.1

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[U-Boot] [PATCHv2] scripts/Makefile.lib: Always have ...-u-boot.dtsi be able to override
by Tom Rini 19 May '17

19 May '17

The intention of having a -u-boot.dtsi file is to be able to make changes to the provided upstream dts files as well as to be able to add nodes. Change the logic for adding the file from making it the last included file at the top of the dts to being included at the end of the file. Cc: Jean-Jacques Hiblot <jjhiblot(a)ti.com> Cc: Simon Glass <sjg(a)chromium.org> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- Changes in v2: - Go back to using sed to append to the end of the file so that we keep dependencies rather than using cat directly, per Jean-Jacques --- scripts/Makefile.lib | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 23be32436922..774aa89a3fe6 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -308,10 +308,10 @@ $(obj)/%.dtb.S: $(obj)/%.dtb quiet_cmd_dtc = DTC $@ # Modified for U-Boot -# Bring in any U-Boot-specific include after the '/dts-v1/;' header +# Bring in any U-Boot-specific include at the end of the file cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \ cat $< $(if $(u_boot_dtsi),\ - | sed '/^\/ {$$/{x;s%$$%\#include \"$(u_boot_dtsi)\"%;G;}') | \ + | sed "$$ a\#include \"$(u_boot_dtsi)\"") | \ $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) - ; \ $(DTC) -O dtb -o $@ -b 0 \ -i $(dir $<) $(DTC_FLAGS) \ -- 1.9.1

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