September 2016 - U-Boot

[U-Boot] [PATCH v6 0/6] power: pmic: Add support for Palmas family of PMICs
by Keerthy 11 Oct '16

11 Oct '16

The series adds support for Palmas family of PMICs. Implements functions to configure regulators. Enable/Disable Get/Set voltages of regulators. Supports TPS659038, TPS65917, Palmas. Tested on TPS659038, TPS65917 using DRA7XX-EVM and AM57XX-EVM. Changes in v5: removed u8 i2c read/write functions made use of already existing functions. Added read/write functions. Changes in v4: Added Reviewed-by and a minor change from printf to debug. Changes in v3: Introduced u8 i2c read/write functions. Keerthy (6): power: regulator: Add ctrl_reg and volt_reg fields for pmic power: pmic: Palmas: Add the base pmic support power: regulator: palmas: Add regulator support configs: dra7xx_evm_defconfig: Enable PALMAS options configs: am57xx_evm_defconfig: Enable PALMAS options configs: am57xx_evm_defconfig: Enable CMD_REG option configs/am57xx_evm_defconfig | 5 + configs/dra7xx_evm_defconfig | 3 + drivers/power/pmic/Kconfig | 7 + drivers/power/pmic/Makefile | 1 + drivers/power/pmic/palmas.c | 104 +++++++ drivers/power/regulator/Kconfig | 8 + drivers/power/regulator/Makefile | 1 + drivers/power/regulator/palmas_regulator.c | 453 +++++++++++++++++++++++++++++ include/power/palmas.h | 25 ++ include/power/regulator.h | 4 + 10 files changed, 611 insertions(+) create mode 100644 drivers/power/pmic/palmas.c create mode 100644 drivers/power/regulator/palmas_regulator.c create mode 100644 include/power/palmas.h -- 1.9.1

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[U-Boot] [PATCH v2] power: regulator: Add support for gpio regulators
by Keerthy 11 Oct '16

11 Oct '16

Add support for gpio regulators. As of now this driver caters to gpio regulators with one gpio. Supports setting voltage values to gpio regulators and retrieving the values. Signed-off-by: Keerthy <j-keerthy(a)ti.com> --- Changes in v2: * Added states and voltages as part of plat data to have a generic state to voltage mapping removing any assumptions. drivers/power/regulator/Kconfig | 8 ++ drivers/power/regulator/Makefile | 1 + drivers/power/regulator/gpio-regulator.c | 137 +++++++++++++++++++++++++++++++ include/power/regulator.h | 1 + 4 files changed, 147 insertions(+) create mode 100644 drivers/power/regulator/gpio-regulator.c diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index 2510474..4776011 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -58,6 +58,14 @@ config DM_REGULATOR_FIXED features for fixed value regulators. The driver implements get/set api for enable and get only for voltage value. +config DM_REGULATOR_GPIO + bool "Enable Driver Model for GPIO REGULATOR" + depends on DM_REGULATOR + ---help--- + This config enables implementation of driver-model regulator uclass + features for gpio regulators. The driver implements get/set for + voltage value. + config REGULATOR_RK808 bool "Enable driver for RK808 regulators" depends on DM_REGULATOR && PMIC_RK808 diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile index 2093048..2d350cb 100644 --- a/drivers/power/regulator/Makefile +++ b/drivers/power/regulator/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_REGULATOR_ACT8846) += act8846.o obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o obj-$(CONFIG_DM_REGULATOR_PFUZE100) += pfuze100.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_FIXED) += fixed.o +obj-$(CONFIG_$(SPL_)DM_REGULATOR_GPIO) += gpio-regulator.o obj-$(CONFIG_REGULATOR_RK808) += rk808.o obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o obj-$(CONFIG_DM_REGULATOR_SANDBOX) += sandbox.o diff --git a/drivers/power/regulator/gpio-regulator.c b/drivers/power/regulator/gpio-regulator.c new file mode 100644 index 0000000..0a60a9c --- /dev/null +++ b/drivers/power/regulator/gpio-regulator.c @@ -0,0 +1,137 @@ +/* + * (C) Copyright 2016 Texas Instruments Incorporated, <www.ti.com> + * Keerthy <j-keerthy(a)ti.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <fdtdec.h> +#include <errno.h> +#include <dm.h> +#include <i2c.h> +#include <asm/gpio.h> +#include <power/pmic.h> +#include <power/regulator.h> + +#define GPIO_REGULATOR_MAX_STATES 2 + +DECLARE_GLOBAL_DATA_PTR; + +struct gpio_regulator_platdata { + struct gpio_desc gpio; /* GPIO for regulator voltage control */ + int states[GPIO_REGULATOR_MAX_STATES]; + int voltages[GPIO_REGULATOR_MAX_STATES]; +}; + +static int gpio_regulator_ofdata_to_platdata(struct udevice *dev) +{ + struct dm_regulator_uclass_platdata *uc_pdata; + struct gpio_regulator_platdata *dev_pdata; + struct gpio_desc *gpio; + const void *blob = gd->fdt_blob; + int node = dev->of_offset; + int ret, count, i, j; + u32 states_array[8]; + + dev_pdata = dev_get_platdata(dev); + uc_pdata = dev_get_uclass_platdata(dev); + if (!uc_pdata) + return -ENXIO; + + /* Set type to gpio */ + uc_pdata->type = REGULATOR_TYPE_GPIO; + + /* + * Get gpio regulator gpio desc + * Assuming one GPIO per regulator. + * Can be extended later to multiple GPIOs + * per gpio-regulator. As of now no instance with multiple + * gpios is presnt + */ + gpio = &dev_pdata->gpio; + ret = gpio_request_by_name(dev, "gpios", 0, gpio, GPIOD_IS_OUT); + if (ret) + debug("regulator gpio - not found! Error: %d", ret); + + count = fdtdec_get_int_array_count(blob, node, "states", + states_array, 8); + + if (!count) + return -EINVAL; + + for (i = 0, j = 0; i < count; i += 2) { + dev_pdata->voltages[j] = states_array[i]; + dev_pdata->states[j] = states_array[i + 1]; + j++; + } + + return 0; +} + +static int gpio_regulator_get_value(struct udevice *dev) +{ + struct dm_regulator_uclass_platdata *uc_pdata; + struct gpio_regulator_platdata *dev_pdata = dev_get_platdata(dev); + int enable; + + if (!dev_pdata->gpio.dev) + return -ENOSYS; + + uc_pdata = dev_get_uclass_platdata(dev); + if (uc_pdata->min_uV > uc_pdata->max_uV) { + debug("Invalid constraints for: %s\n", uc_pdata->name); + return -EINVAL; + } + + enable = dm_gpio_get_value(&dev_pdata->gpio); + if (enable == dev_pdata->states[0]) + return dev_pdata->voltages[0]; + else + return dev_pdata->voltages[1]; +} + +static int gpio_regulator_set_value(struct udevice *dev, int uV) +{ + struct gpio_regulator_platdata *dev_pdata = dev_get_platdata(dev); + int ret; + bool enable; + + if (!dev_pdata->gpio.dev) + return -ENOSYS; + + if (uV == dev_pdata->voltages[0]) + enable = dev_pdata->states[0]; + else if (uV == dev_pdata->voltages[1]) + enable = dev_pdata->states[1]; + else + return -EINVAL; + + ret = dm_gpio_set_value(&dev_pdata->gpio, enable); + if (ret) { + error("Can't set regulator : %s gpio to: %d\n", dev->name, + enable); + return ret; + } + + return 0; +} + +static const struct dm_regulator_ops gpio_regulator_ops = { + .get_value = gpio_regulator_get_value, + .set_value = gpio_regulator_set_value, +}; + +static const struct udevice_id gpio_regulator_ids[] = { + { .compatible = "regulator-gpio" }, + { }, +}; + +U_BOOT_DRIVER(gpio_regulator) = { + .name = "gpio regulator", + .id = UCLASS_REGULATOR, + .ops = &gpio_regulator_ops, + .of_match = gpio_regulator_ids, + .ofdata_to_platdata = gpio_regulator_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct gpio_regulator_platdata), +}; diff --git a/include/power/regulator.h b/include/power/regulator.h index 8ae6b14..5d327e6 100644 --- a/include/power/regulator.h +++ b/include/power/regulator.h @@ -108,6 +108,7 @@ enum regulator_type { REGULATOR_TYPE_BUCK, REGULATOR_TYPE_DVS, REGULATOR_TYPE_FIXED, + REGULATOR_TYPE_GPIO, REGULATOR_TYPE_OTHER, }; -- 1.9.1

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[U-Boot] [PATCH v2 0/6] toradex: config block handling
by Marcel Ziswiler 10 Oct '16

10 Oct '16

This series integrates Toradex factory configuration block handling. The config block is a data structure which gets stored to flash during production testing. The structure holds such information as board resp. hardware revision, product ID and serial number which is used as the NIC part of the Ethernet MAC address as well. The config block will be read upon boot by the checkboard() function, displayed as part of the board information and passed to Linux via device tree or ATAGs. Changes in v2: - fixed common.h include mess in board/toradex/common by renaming common* to tdx-common - renamed TRDX to TDX and trdx to tdx as in common use internally - consolidated makefiles and changed copyright message - renamed configblock* to tdx-cfg-block* analogous to Kconfig symbols - moved board/toradex/common/Kconfig sourcing from arch/arm/Kconfig into our own board Kconfig files - use a named choice for the config block location for above to work without issuing any warnings (undocumented kbuild feature curtsey Arnaud Lacombe) - added CUSTOM_BOARDINFO into our common Kconfig to avoid recent no_new_adhoc_configs_check error - add Max' patch colibri_vf: usb gadget: toradex pid is now set generically Marcel Ziswiler (5): colibri_imx7/vf: move to custom checkboard_fallback() apalis/colibri_t20/t30: deactivate displaying board info toradex: config block handling apalis/colibri_imx7/pxa270/t20/t30/vf: integrate config block handling apalis/colibri_t30: move environment location Max Krummenacher (1): colibri_vf: usb gadget: toradex pid is now set generically board/toradex/apalis_t30/Kconfig | 18 + board/toradex/apalis_t30/apalis_t30.c | 12 +- board/toradex/colibri_imx7/Kconfig | 16 + board/toradex/colibri_imx7/colibri_imx7.c | 6 +- board/toradex/colibri_pxa270/Kconfig | 11 + board/toradex/colibri_pxa270/colibri_pxa270.c | 8 + board/toradex/colibri_t20/Kconfig | 11 + board/toradex/colibri_t20/colibri_t20.c | 13 + board/toradex/colibri_t30/Kconfig | 18 + board/toradex/colibri_t30/colibri_t30.c | 9 +- board/toradex/colibri_vf/Kconfig | 14 + board/toradex/colibri_vf/colibri_vf.c | 24 +- board/toradex/common/Kconfig | 85 ++++ board/toradex/common/Makefile | 11 + board/toradex/common/tdx-cfg-block.c | 544 ++++++++++++++++++++++++++ board/toradex/common/tdx-cfg-block.h | 68 ++++ board/toradex/common/tdx-common.c | 180 +++++++++ board/toradex/common/tdx-common.h | 13 + include/configs/apalis_t30.h | 12 +- include/configs/colibri_imx7.h | 6 +- include/configs/colibri_pxa270.h | 7 +- include/configs/colibri_t20.h | 3 +- include/configs/colibri_t30.h | 12 +- include/configs/colibri_vf.h | 14 +- scripts/config_whitelist.txt | 5 - 25 files changed, 1066 insertions(+), 54 deletions(-) create mode 100644 board/toradex/common/Kconfig create mode 100644 board/toradex/common/Makefile create mode 100644 board/toradex/common/tdx-cfg-block.c create mode 100644 board/toradex/common/tdx-cfg-block.h create mode 100644 board/toradex/common/tdx-common.c create mode 100644 board/toradex/common/tdx-common.h -- 2.5.5

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[U-Boot] [PATCH 0/6] Add support for the BK4R1 variant of PCM052
by Albert ARIBAUD (3ADEV) 10 Oct '16

10 Oct '16

BK4R1 is basically PCM052 with the following differences or quirks: 1) it has 512MB of DDR using MT41K256M16HA_125IT, while the PCM052 has 256MB using MT41J128M16HA_15EIT; 2) it has 1GB of NAND. The size increase is supported by the env directly; 3) its Ethernet ports are physicaly tied together until GPIO 122 is raised. As this is a safety feature U-Boot does not untie the ports except if it needs networking, for instance when doing NAND updates via TFTP; 4) it has a USB hub which may remain in reset if GPIO 130 is not raised. This is done unconditionally at boot; 5) It has two NOR SPI flash chips on QSPI. This series has been run through checkpatch and has no errors or warning except the following one: warning: arch/arm/Kconfig,681: please write a paragraph that describes the config symbol fully Which I believe does not apply, as target configs in this file never have descriptions. Albert ARIBAUD (3ADEV) (6): pcm052: fix MTD partitioning pcm052: remove target-specific dtb name from env pcm052: add 'm4go' command tools: mkimage: add support for Vybrid image format pcm052: allow specifying onboard DDR size in configs pcm052: add new BK4r1 target based on PCM052 SoM Makefile | 6 ++ arch/arm/Kconfig | 4 + arch/arm/config.mk | 3 + arch/arm/cpu/armv7/vf610/Makefile | 5 + arch/arm/dts/Makefile | 3 +- arch/arm/dts/bk4r1.dts | 48 +++++++++ arch/arm/dts/vf.dtsi | 4 +- board/phytec/pcm052/Kconfig | 24 +++++ board/phytec/pcm052/pcm052.c | 206 ++++++++++++++++++++++++++++---------- common/image.c | 1 + configs/bk4r1_defconfig | 32 ++++++ include/configs/bk4r1.h | 33 ++++++ include/configs/pcm052.h | 78 ++++++++++----- include/image.h | 1 + tools/Makefile | 1 + tools/vybridimage.c | 164 ++++++++++++++++++++++++++++++ 16 files changed, 535 insertions(+), 78 deletions(-) create mode 100644 arch/arm/dts/bk4r1.dts create mode 100644 configs/bk4r1_defconfig create mode 100644 include/configs/bk4r1.h create mode 100644 tools/vybridimage.c -- 2.9.3

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[U-Boot] [PATCH] sunxi: Fix H3 DRAM impedance calibration on rev. A chips
by Jens Kuske 10 Oct '16

10 Oct '16

H3 seems to have a silicon bug breaking the impedance calibration. This is currently worked around in software by multiple steps combining the results to replace the wrong values. Revision A chips need a different workaround, which is present in the vendor bootloader too, but got overlooked in lack of information and affected boards till now. This commit adds a simplified version without correction factor, which would be 1.00 for all known boards anyway. Signed-off-by: Jens Kuske <jenskuske(a)gmail.com> --- Hi, This has been tested by an Armbian user: http://forum.armbian.com/index.php/topic/872-beelink-x2-with-armbian-possib… It looks like only few boards have revision A chips, probably only non-development boards, otherwise we would have found this earlier. The idea that these are different chip revision is based on: https://github.com/igorpecovnik/linux/blob/sun8i/arch/arm/mach-sunxi/sunxi-… Regards, Jens --- arch/arm/mach-sunxi/dram_sun8i_h3.c | 64 +++++++++++++++++++++++++------------ 1 file changed, 43 insertions(+), 21 deletions(-) diff --git a/arch/arm/mach-sunxi/dram_sun8i_h3.c b/arch/arm/mach-sunxi/dram_sun8i_h3.c index 2020d75..b08b8e6 100644 --- a/arch/arm/mach-sunxi/dram_sun8i_h3.c +++ b/arch/arm/mach-sunxi/dram_sun8i_h3.c @@ -217,35 +217,57 @@ static void mctl_zq_calibration(struct dram_para *para) struct sunxi_mctl_ctl_reg * const mctl_ctl = (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; - int i; - u16 zq_val[6]; - u8 val; + if ((readl(SUNXI_SRAMC_BASE + 0x24) & 0xff) == 0 && + (readl(SUNXI_SRAMC_BASE + 0xf0) & 0x1) == 0) { + u32 reg_val; - writel(0x0a0a0a0a, &mctl_ctl->zqdr[2]); - - for (i = 0; i < 6; i++) { - u8 zq = (CONFIG_DRAM_ZQ >> (i * 4)) & 0xf; - - writel((zq << 20) | (zq << 16) | (zq << 12) | - (zq << 8) | (zq << 4) | (zq << 0), - &mctl_ctl->zqcr); + clrsetbits_le32(&mctl_ctl->zqcr, 0xffff, + CONFIG_DRAM_ZQ & 0xffff); writel(PIR_CLRSR, &mctl_ctl->pir); mctl_phy_init(PIR_ZCAL); - zq_val[i] = readl(&mctl_ctl->zqdr[0]) & 0xff; - writel(REPEAT_BYTE(zq_val[i]), &mctl_ctl->zqdr[2]); + reg_val = readl(&mctl_ctl->zqdr[0]); + reg_val &= (0x1f << 16) | (0x1f << 0); + reg_val |= reg_val << 8; + writel(reg_val, &mctl_ctl->zqdr[0]); - writel(PIR_CLRSR, &mctl_ctl->pir); - mctl_phy_init(PIR_ZCAL); + reg_val = readl(&mctl_ctl->zqdr[1]); + reg_val &= (0x1f << 16) | (0x1f << 0); + reg_val |= reg_val << 8; + writel(reg_val, &mctl_ctl->zqdr[1]); + writel(reg_val, &mctl_ctl->zqdr[2]); + } else { + int i; + u16 zq_val[6]; + u8 val; - val = readl(&mctl_ctl->zqdr[0]) >> 24; - zq_val[i] |= bin_to_mgray(mgray_to_bin(val) - 1) << 8; - } + writel(0x0a0a0a0a, &mctl_ctl->zqdr[2]); + + for (i = 0; i < 6; i++) { + u8 zq = (CONFIG_DRAM_ZQ >> (i * 4)) & 0xf; + + writel((zq << 20) | (zq << 16) | (zq << 12) | + (zq << 8) | (zq << 4) | (zq << 0), + &mctl_ctl->zqcr); - writel((zq_val[1] << 16) | zq_val[0], &mctl_ctl->zqdr[0]); - writel((zq_val[3] << 16) | zq_val[2], &mctl_ctl->zqdr[1]); - writel((zq_val[5] << 16) | zq_val[4], &mctl_ctl->zqdr[2]); + writel(PIR_CLRSR, &mctl_ctl->pir); + mctl_phy_init(PIR_ZCAL); + + zq_val[i] = readl(&mctl_ctl->zqdr[0]) & 0xff; + writel(REPEAT_BYTE(zq_val[i]), &mctl_ctl->zqdr[2]); + + writel(PIR_CLRSR, &mctl_ctl->pir); + mctl_phy_init(PIR_ZCAL); + + val = readl(&mctl_ctl->zqdr[0]) >> 24; + zq_val[i] |= bin_to_mgray(mgray_to_bin(val) - 1) << 8; + } + + writel((zq_val[1] << 16) | zq_val[0], &mctl_ctl->zqdr[0]); + writel((zq_val[3] << 16) | zq_val[2], &mctl_ctl->zqdr[1]); + writel((zq_val[5] << 16) | zq_val[4], &mctl_ctl->zqdr[2]); + } } static void mctl_set_cr(struct dram_para *para) -- 2.10.0

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[U-Boot] Patch for OLinuXino Lime boards: default DRAM settings
by Josh Marshall 10 Oct '16

10 Oct '16

We have a number of OlinuXino Lime2 boards (both NAND and eMMC versions) which were experiencing sporadic hangs. After testing with some heavy benchmarking and help from the Armbian forum, it was pinned down as the DRAM settings for the board. The default is 480MHz, but this is unstable, and even the build instructions from the vendor Olimex themselves say to set the DRAM clock to 384. (See line 96 at: https://github.com/OLIMEX/OLINUXINO/blob/master/SOFTWARE/A20/A20-build-3.4.… ) I’ve attached a patch against master to change this default: diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 54343de..21c792a 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_MACH_SUN7I=y -CONFIG_DRAM_CLK=480 +CONFIG_DRAM_CLK=384 CONFIG_MMC0_CD_PIN="PH1" CONFIG_USB0_VBUS_PIN="PC17" CONFIG_USB0_VBUS_DET="PH5" diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig index c4f6e1a..024dc2d 100644 --- a/configs/A20-OLinuXino-Lime_defconfig +++ b/configs/A20-OLinuXino-Lime_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_MACH_SUN7I=y -CONFIG_DRAM_CLK=480 +CONFIG_DRAM_CLK=384 CONFIG_MMC0_CD_PIN="PH1" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set

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[U-Boot] [PATCH v2] mmc: sdhci: Add the programmable clock mode support
by Wenyou Yang 10 Oct '16

10 Oct '16

Add the programmable clock mode for the clock generator. Signed-off-by: Wenyou Yang <wenyou.yang(a)atmel.com> --- Changes in v2: - Rebase on the latest u-boot-mmc. - Fix the typo Muliplier->Multiplier. drivers/mmc/sdhci.c | 50 ++++++++++++++++++++++++++++++++++++++++---------- include/sdhci.h | 2 ++ 2 files changed, 42 insertions(+), 10 deletions(-) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 504f2d2..b2bf5a0 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -294,7 +294,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) { struct sdhci_host *host = mmc->priv; - unsigned int div, clk, timeout, reg; + unsigned int div, clk = 0, timeout, reg; /* Wait max 20 ms */ timeout = 200; @@ -318,14 +318,36 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) return 0; if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) { - /* Version 3.00 divisors must be a multiple of 2. */ - if (mmc->cfg->f_max <= clock) - div = 1; - else { - for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) { - if ((mmc->cfg->f_max / div) <= clock) + /* + * Check if the Host Controller supports Programmable Clock + * Mode. + */ + if (host->clk_mul) { + for (div = 1; div <= 1024; div++) { + if ((mmc->cfg->f_max * host->clk_mul / div) + <= clock) break; } + + /* + * Set Programmable Clock Mode in the Clock + * Control register. + */ + clk = SDHCI_PROG_CLOCK_MODE; + div--; + } else { + /* Version 3.00 divisors must be a multiple of 2. */ + if (mmc->cfg->f_max <= clock) { + div = 1; + } else { + for (div = 2; + div < SDHCI_MAX_DIV_SPEC_300; + div += 2) { + if ((mmc->cfg->f_max / div) <= clock) + break; + } + } + div >>= 1; } } else { /* Version 2.00 divisors must be a power of 2. */ @@ -333,13 +355,13 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) if ((mmc->cfg->f_max / div) <= clock) break; } + div >>= 1; } - div >>= 1; if (host->set_clock) host->set_clock(host->index, div); - clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; + clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) << SDHCI_DIVIDER_HI_SHIFT; clk |= SDHCI_CLOCK_INT_EN; @@ -513,7 +535,7 @@ static const struct mmc_ops sdhci_ops = { int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, u32 max_clk, u32 min_clk) { - u32 caps; + u32 caps, caps_1; caps = sdhci_readl(host, SDHCI_CAPABILITIES); @@ -577,6 +599,14 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; + /* + * In case of Host Controller v3.00, find out whether clock + * multiplier is supported. + */ + caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); + host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >> + SDHCI_CLOCK_MUL_SHIFT; + return 0; } diff --git a/include/sdhci.h b/include/sdhci.h index 6844c73..144570f 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -97,6 +97,7 @@ #define SDHCI_DIV_MASK 0xFF #define SDHCI_DIV_MASK_LEN 8 #define SDHCI_DIV_HI_MASK 0x300 +#define SDHCI_PROG_CLOCK_MODE 0x0020 #define SDHCI_CLOCK_CARD_EN 0x0004 #define SDHCI_CLOCK_INT_STABLE 0x0002 #define SDHCI_CLOCK_INT_EN 0x0001 @@ -242,6 +243,7 @@ struct sdhci_host { unsigned int quirks; unsigned int host_caps; unsigned int version; + unsigned int clk_mul; /* Clock Multiplier value */ unsigned int clock; struct mmc *mmc; const struct sdhci_ops *ops; -- 2.7.4

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[U-Boot] [PATCH 1/2] mmc: sdhci: use the host version value in sdhci_setup_cfg
by Jaehoon Chung 10 Oct '16

10 Oct '16

"host->version" isn't a SoC specific value. It doesn't need to get in each SoC drivers. Signed-off-by: Jaehoon Chung <jh80.chung(a)samsung.com> --- drivers/mmc/atmel_sdhci.c | 1 - drivers/mmc/bcm2835_sdhci.c | 1 - drivers/mmc/kona_sdhci.c | 5 ----- drivers/mmc/msm_sdhci.c | 3 --- drivers/mmc/mv_sdhci.c | 4 ---- drivers/mmc/s5p_sdhci.c | 1 - drivers/mmc/sdhci.c | 6 +++++- drivers/mmc/spear_sdhci.c | 5 ----- drivers/mmc/zynq_sdhci.c | 2 -- 9 files changed, 5 insertions(+), 23 deletions(-) diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c index dd6bd33..c197b09 100644 --- a/drivers/mmc/atmel_sdhci.c +++ b/drivers/mmc/atmel_sdhci.c @@ -29,7 +29,6 @@ int atmel_sdhci_init(void *regbase, u32 id) host->name = "atmel_sdhci"; host->ioaddr = regbase; host->quirks = 0; - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); max_clk = at91_get_periph_generated_clk(id); if (!max_clk) { printf("%s: Failed to get the proper clock\n", __func__); diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c index 680b754..c1d8700 100644 --- a/drivers/mmc/bcm2835_sdhci.c +++ b/drivers/mmc/bcm2835_sdhci.c @@ -184,7 +184,6 @@ int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq) host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; host->ops = &bcm2835_ops; - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); add_sdhci(host, emmc_freq, MIN_FREQ); return 0; diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c index 3653d00..0c4f30e 100644 --- a/drivers/mmc/kona_sdhci.c +++ b/drivers/mmc/kona_sdhci.c @@ -127,11 +127,6 @@ int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks) return -EINVAL; } - if (quirks & SDHCI_QUIRK_REG32_RW) - host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16; - else - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); - add_sdhci(host, max_clk, min_clk); return ret; } diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c index 8d4399e..90e90bc 100644 --- a/drivers/mmc/msm_sdhci.c +++ b/drivers/mmc/msm_sdhci.c @@ -140,9 +140,6 @@ static int msm_sdc_probe(struct udevice *dev) writel(caps, host->ioaddr + SDHCI_VENDOR_SPEC_CAPABILITIES0); } - /* Set host controller version */ - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); - ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0); host->mmc = &plat->mmc; if (ret) diff --git a/drivers/mmc/mv_sdhci.c b/drivers/mmc/mv_sdhci.c index 82c695f..ca5f872 100644 --- a/drivers/mmc/mv_sdhci.c +++ b/drivers/mmc/mv_sdhci.c @@ -88,9 +88,5 @@ int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks) sdhci_mvebu_mbus_config((void __iomem *)regbase); } - if (quirks & SDHCI_QUIRK_REG32_RW) - host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16; - else - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); return add_sdhci(host, max_clk, min_clk); } diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index 3bace21..7827b28 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -71,7 +71,6 @@ static int s5p_sdhci_core_init(struct sdhci_host *host) SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_USE_WIDE8; host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); host->set_control_reg = &s5p_sdhci_set_control_reg; host->set_clock = set_mmc_clk; diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 504f2d2..7fc11c0 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -524,7 +524,11 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, return -EINVAL; } #endif - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); + if (host->quirks & SDHCI_QUIRK_REG32_RW) + host->version = + sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16; + else + host->version = sdhci_readw(host, SDHCI_HOST_VERSION); cfg->name = host->name; #ifndef CONFIG_DM_MMC_OPS diff --git a/drivers/mmc/spear_sdhci.c b/drivers/mmc/spear_sdhci.c index 6ca96a2..06179cd 100644 --- a/drivers/mmc/spear_sdhci.c +++ b/drivers/mmc/spear_sdhci.c @@ -22,11 +22,6 @@ int spear_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks) host->ioaddr = (void *)regbase; host->quirks = quirks; - if (quirks & SDHCI_QUIRK_REG32_RW) - host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16; - else - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); - add_sdhci(host, max_clk, min_clk); return 0; } diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 3815b94..299d820 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -36,8 +36,6 @@ static int arasan_sdhci_probe(struct udevice *dev) host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT; #endif - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); - ret = sdhci_setup_cfg(&plat->cfg, host, CONFIG_ZYNQ_SDHCI_MAX_FREQ, CONFIG_ZYNQ_SDHCI_MIN_FREQ); host->mmc = &plat->mmc; -- 1.9.1

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[U-Boot] [PATCH v2 1/2] mmc: sdhci: use the host version value in sdhci_setup_cfg
by Jaehoon Chung 10 Oct '16

10 Oct '16

"host->version" isn't a SoC specific value. It doesn't need to get in each SoC drivers. Signed-off-by: Jaehoon Chung <jh80.chung(a)samsung.com> --- Changelog for V2: - None drivers/mmc/atmel_sdhci.c | 1 - drivers/mmc/bcm2835_sdhci.c | 1 - drivers/mmc/kona_sdhci.c | 5 ----- drivers/mmc/msm_sdhci.c | 3 --- drivers/mmc/mv_sdhci.c | 4 ---- drivers/mmc/s5p_sdhci.c | 1 - drivers/mmc/sdhci.c | 6 +++++- drivers/mmc/spear_sdhci.c | 5 ----- drivers/mmc/zynq_sdhci.c | 2 -- 9 files changed, 5 insertions(+), 23 deletions(-) diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c index d8f8087..20bba1a 100644 --- a/drivers/mmc/atmel_sdhci.c +++ b/drivers/mmc/atmel_sdhci.c @@ -29,7 +29,6 @@ int atmel_sdhci_init(void *regbase, u32 id) host->name = "atmel_sdhci"; host->ioaddr = regbase; host->quirks = 0; - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); max_clk = at91_get_periph_generated_clk(id); if (!max_clk) { printf("%s: Failed to get the proper clock\n", __func__); diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c index 680b754..c1d8700 100644 --- a/drivers/mmc/bcm2835_sdhci.c +++ b/drivers/mmc/bcm2835_sdhci.c @@ -184,7 +184,6 @@ int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq) host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; host->ops = &bcm2835_ops; - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); add_sdhci(host, emmc_freq, MIN_FREQ); return 0; diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c index e730caa..c67a262 100644 --- a/drivers/mmc/kona_sdhci.c +++ b/drivers/mmc/kona_sdhci.c @@ -127,11 +127,6 @@ int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks) return -EINVAL; } - if (quirks & SDHCI_QUIRK_REG32_RW) - host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16; - else - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); - add_sdhci(host, max_clk, min_clk); return ret; } diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c index 1b82991..f33714b 100644 --- a/drivers/mmc/msm_sdhci.c +++ b/drivers/mmc/msm_sdhci.c @@ -140,9 +140,6 @@ static int msm_sdc_probe(struct udevice *dev) writel(caps, host->ioaddr + SDHCI_VENDOR_SPEC_CAPABILITIES0); } - /* Set host controller version */ - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); - ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0); host->mmc = &plat->mmc; if (ret) diff --git a/drivers/mmc/mv_sdhci.c b/drivers/mmc/mv_sdhci.c index 82c695f..ca5f872 100644 --- a/drivers/mmc/mv_sdhci.c +++ b/drivers/mmc/mv_sdhci.c @@ -88,9 +88,5 @@ int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks) sdhci_mvebu_mbus_config((void __iomem *)regbase); } - if (quirks & SDHCI_QUIRK_REG32_RW) - host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16; - else - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); return add_sdhci(host, max_clk, min_clk); } diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index 3bace21..7827b28 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -71,7 +71,6 @@ static int s5p_sdhci_core_init(struct sdhci_host *host) SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_USE_WIDE8; host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); host->set_control_reg = &s5p_sdhci_set_control_reg; host->set_clock = set_mmc_clk; diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index b2bf5a0..7337722 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -546,7 +546,11 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, return -EINVAL; } #endif - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); + if (host->quirks & SDHCI_QUIRK_REG32_RW) + host->version = + sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16; + else + host->version = sdhci_readw(host, SDHCI_HOST_VERSION); cfg->name = host->name; #ifndef CONFIG_DM_MMC_OPS diff --git a/drivers/mmc/spear_sdhci.c b/drivers/mmc/spear_sdhci.c index 6ca96a2..06179cd 100644 --- a/drivers/mmc/spear_sdhci.c +++ b/drivers/mmc/spear_sdhci.c @@ -22,11 +22,6 @@ int spear_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks) host->ioaddr = (void *)regbase; host->quirks = quirks; - if (quirks & SDHCI_QUIRK_REG32_RW) - host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16; - else - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); - add_sdhci(host, max_clk, min_clk); return 0; } diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index b991102..3da1385 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -36,8 +36,6 @@ static int arasan_sdhci_probe(struct udevice *dev) host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT; #endif - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); - ret = sdhci_setup_cfg(&plat->cfg, host, CONFIG_ZYNQ_SDHCI_MAX_FREQ, CONFIG_ZYNQ_SDHCI_MIN_FREQ); host->mmc = &plat->mmc; -- 1.9.1

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[U-Boot] [PATCH] mmc: dw_mmc: remove the unnecessary arguments for dwmci_setup_cfg
by Jaehoon Chung 10 Oct '16

10 Oct '16

Some arguments don't need to pass to dwmci_setup_cfg. They are already included in dwmci_host structure. Signed-off-by: Jaehoon Chung <jh80.chung(a)samsung.com> --- drivers/mmc/dw_mmc.c | 13 ++++++------- drivers/mmc/exynos_dw_mmc.c | 3 +-- drivers/mmc/rockchip_dw_mmc.c | 3 +-- drivers/mmc/socfpga_dw_mmc.c | 3 +-- include/dwmmc.h | 8 +++----- 5 files changed, 12 insertions(+), 18 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index afc674d..e2028c2 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -487,10 +487,10 @@ static const struct mmc_ops dwmci_ops = { }; #endif -void dwmci_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth, - uint caps, u32 max_clk, u32 min_clk) +void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host, + u32 max_clk, u32 min_clk) { - cfg->name = name; + cfg->name = host->name; #ifndef CONFIG_DM_MMC_OPS cfg->ops = &dwmci_ops; #endif @@ -499,9 +499,9 @@ void dwmci_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth, cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; - cfg->host_caps = caps; + cfg->host_caps = host->caps; - if (buswidth == 8) { + if (host->buswidth == 8) { cfg->host_caps |= MMC_MODE_8BIT; cfg->host_caps &= ~MMC_MODE_4BIT; } else { @@ -521,8 +521,7 @@ int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg) #else int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk) { - dwmci_setup_cfg(&host->cfg, host->name, host->buswidth, host->caps, - max_clk, min_clk); + dwmci_setup_cfg(&host->cfg, host, max_clk, min_clk); host->mmc = mmc_create(&host->cfg, host); if (host->mmc == NULL) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 57271f1..d85442a 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -271,8 +271,7 @@ static int exynos_dwmmc_probe(struct udevice *dev) if (err) return err; - dwmci_setup_cfg(&plat->cfg, host->name, host->buswidth, host->caps, - DWMMC_MAX_FREQ, DWMMC_MIN_FREQ); + dwmci_setup_cfg(&plat->cfg, host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ); host->mmc = &plat->mmc; host->mmc->priv = &priv->host; host->priv = dev; diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c index 020a59b..5fdf2eb 100644 --- a/drivers/mmc/rockchip_dw_mmc.c +++ b/drivers/mmc/rockchip_dw_mmc.c @@ -129,8 +129,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev) return ret; } #endif - dwmci_setup_cfg(&plat->cfg, dev->name, host->buswidth, host->caps, - priv->minmax[1], priv->minmax[0]); + dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]); host->mmc = &plat->mmc; host->mmc->priv = &priv->host; host->mmc->dev = dev; diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c index 8a96302..5a3a4ff 100644 --- a/drivers/mmc/socfpga_dw_mmc.c +++ b/drivers/mmc/socfpga_dw_mmc.c @@ -111,8 +111,7 @@ static int socfpga_dwmmc_probe(struct udevice *dev) struct dwmci_host *host = &priv->host; #ifdef CONFIG_BLK - dwmci_setup_cfg(&plat->cfg, dev->name, host->buswidth, host->caps, - host->bus_hz, 400000); + dwmci_setup_cfg(&plat->cfg, host, host->bus_hz, 400000); host->mmc = &plat->mmc; #else int ret; diff --git a/include/dwmmc.h b/include/dwmmc.h index 5b9602c..4dda009 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -253,14 +253,12 @@ static inline u8 dwmci_readb(struct dwmci_host *host, int reg) * See rockchip_dw_mmc.c for an example. * * @cfg: Configuration structure to fill in (generally &plat->mmc) - * @name: Device name (normally dev->name) - * @buswidth: Bus width (in bits, such as 4 or 8) - * @caps: Host capabilities (MMC_MODE_...) + * @host: DWMMC host * @max_clk: Maximum supported clock speed in HZ (e.g. 150000000) * @min_clk: Minimum supported clock speed in HZ (e.g. 400000) */ -void dwmci_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth, - uint caps, u32 max_clk, u32 min_clk); +void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host, + u32 max_clk, u32 min_clk); /** * dwmci_bind() - Set up a new MMC block device -- 1.9.1

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