July 2016 - U-Boot

[U-Boot] [PATCH 1/2] fs/fat/fatwrite: Local variable as buffer to store dir_slot entries
by Tien Fong Chee 14 Jul '16

14 Jul '16

fill_dir_slot use get_contents_vfatname_block as a temporary buffer for constructing a list of dir_slot entries. To save the memory and providing correct type of memory for above usage, a local buffer with accurate size declaration is introduced. The local array size 640 is used because for long file name entry, each entry use 32 bytes, one entry can store up to 13 characters. The maximum number of entry possible is 20. So, total size is 32*20=640bytes. Signed-off-by: Genevieve Chan <ccheauya(a)altera.com> Signed-off-by: Tien Fong Chee <tfchee(a)altera.com> Cc: Dinh Nguyen <dinguyen(a)opensource.altera.com> Cc: Dinh Nguyen <dinh.linux(a)gmail.com> Cc: ChinLiang <clsee(a)altera.com> Cc: Vagrant Cascadian <vagrant(a)debian.org> Cc: Simon Glass <sjg(a)chromium.org> Cc: Stephen Warren <swarren(a)nvidia.com> Cc: Benoît Thébaudeau <benoit(a)wsystem.com> --- fs/fat/fat_write.c | 3 ++- include/fat.h | 3 +++ 2 files changed, 5 insertions(+), 1 deletions(-) diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c index eb3a916..c1d48c5 100644 --- a/fs/fat/fat_write.c +++ b/fs/fat/fat_write.c @@ -323,7 +323,8 @@ static void flush_dir_table(fsdata *mydata, dir_entry **dentptr); static void fill_dir_slot(fsdata *mydata, dir_entry **dentptr, const char *l_name) { - dir_slot *slotptr = (dir_slot *)get_contents_vfatname_block; + __u8 temp_dir_slot_buffer[MAX_LFN_SLOT * sizeof(dir_slot)]; + dir_slot *slotptr = (dir_slot *)temp_dir_slot_buffer; __u8 counter = 0, checksum; int idx = 0, ret; char s_name[16]; diff --git a/include/fat.h b/include/fat.h index 9d053e6..90fdeba 100644 --- a/include/fat.h +++ b/include/fat.h @@ -33,6 +33,9 @@ #define FAT16BUFSIZE (FATBUFSIZE/2) #define FAT32BUFSIZE (FATBUFSIZE/4) +/* Maximum number of entry for long file name according to spec */ +#define MAX_LFN_SLOT 20 + /* Filesystem identifiers */ #define FAT12_SIGN "FAT12 " -- 1.7.7.4

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[U-Boot] [PATCH v2 4/4] ARM: configs: cm_fx6: add mtd support
by christopher.spinrath＠rwth-aachen.de 14 Jul '16

14 Jul '16

From: Christopher Spinrath <christopher.spinrath(a)rwth-aachen.de> The cm-fx6 module has an on-board spi flash chip. Enable mtd support and the mtdparts command. Also define a default partitioning, add it to the default environment, and enable support to overwrite the partitioning defined in a device tree by it. Finally, probe for the chip on preboot to register the flash chip and, thus, establish the connection between the mtd environment settings and the actual device. These changes move the effective default partitioning from the device tree shipped with the vendor kernels to U-Boot which becomes the single point of definition for the partitioning for all device tree based kernels (in particular, for the upstream Linux kernel which does not have a default partitioning defined in its device tree). Signed-off-by: Christopher Spinrath <christopher.spinrath(a)rwth-aachen.de> --- Notes: Changes since v1: - explain the "sf probe" command added to preboot in the commit message include/configs/cm_fx6.h | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index f054ca8..c839b03 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -18,6 +18,7 @@ #define CONFIG_MACH_TYPE 4273 /* CMD */ +#define CONFIG_CMD_MTDPARTS /* MMC */ #define CONFIG_SYS_FSL_USDHC_NUM 3 @@ -53,6 +54,20 @@ #define CONFIG_SF_DEFAULT_SPEED 25000000 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +/* MTD support */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_FDT_FIXUP_PARTITIONS +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_SPI_FLASH_MTD +#endif + +#define MTDIDS_DEFAULT "nor0=spi0.0" +#define MTDPARTS_DEFAULT "mtdparts=spi0.0:" \ + "768k(uboot)," \ + "256k(uboot-environment)," \ + "-(reserved)" + /* Environment */ #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED @@ -83,6 +98,8 @@ "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ "doboot=bootm ${loadaddr}\0" \ "doloadfdt=false\0" \ + "mtdids=" MTDIDS_DEFAULT "\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ "setboottypez=setenv kernel ${zImage};" \ "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \ "setenv doloadfdt true;\0" \ @@ -157,7 +174,7 @@ "run setupnandboot;" \ "run nandboot;" -#define CONFIG_PREBOOT "usb start" +#define CONFIG_PREBOOT "usb start;sf probe" /* SPI */ #define CONFIG_SPI -- 2.9.0

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[U-Boot] [PATCH v2 3/4] ARM: board: cm_fx6: fixup mtd partitions in the fdt
by christopher.spinrath＠rwth-aachen.de 14 Jul '16

14 Jul '16

From: Christopher Spinrath <christopher.spinrath(a)rwth-aachen.de> The cm-fx6 module has an on-board st,m25p compatible spi flash chip used for U-Boot (binary & environment). Overwrite the partitions in the device tree by the partition table provided in the mtdparts environment variable, if it is set. This allows to specify a kernel independent partitioning in the environment and provides a convient way for the user to adapt the partition table. Signed-off-by: Christopher Spinrath <christopher.spinrath(a)rwth-aachen.de> --- Notes: Changes since v1: - remove #ifdef CONFIG_FDT_FIXUP_PARTITIONS guards (no longer required thanks to the stub introduced by patch 2 of this series) - fallback to the documented jedec,spi-nor compatible if the undocumented compatible st,m25p used by the vendor device treeis not in the dt board/compulab/cm_fx6/cm_fx6.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index 712057a..566c19b 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -12,6 +12,7 @@ #include <dm.h> #include <fsl_esdhc.h> #include <miiphy.h> +#include <mtd_node.h> #include <netdev.h> #include <errno.h> #include <usb.h> @@ -28,6 +29,7 @@ #include <asm/io.h> #include <asm/gpio.h> #include <dm/platform_data/serial_mxc.h> +#include <jffs2/load_kernel.h> #include "common.h" #include "../common/eeprom.h" #include "../common/common.h" @@ -581,6 +583,17 @@ int cm_fx6_setup_ecspi(void) { return 0; } #ifdef CONFIG_OF_BOARD_SETUP #define USDHC3_PATH "/soc/aips-bus@02100000/usdhc@02198000/" + +struct node_info nodes[] = { + /* + * Both entries target the same flash chip. The st,m25p compatible + * is used in the vendor device trees, while upstream uses (the + * documented) jedec,spi-nor comptatible. + */ + { "st,m25p", MTD_DEV_TYPE_NOR, }, + { "jedec,spi-nor", MTD_DEV_TYPE_NOR, }, +}; + int ft_board_setup(void *blob, bd_t *bd) { u32 baseboard_rev; @@ -589,6 +602,8 @@ int ft_board_setup(void *blob, bd_t *bd) char baseboard_name[16]; int err; + fdt_shrink_to_minimum(blob); /* Make room for new properties */ + /* MAC addr */ if (eth_getenv_enetaddr("ethaddr", enetaddr)) { fdt_find_and_setprop(blob, @@ -607,7 +622,6 @@ int ft_board_setup(void *blob, bd_t *bd) return 0; /* Assume not an early revision SB-FX6m baseboard */ if (!strncmp("SB-FX6m", baseboard_name, 7) && baseboard_rev <= 120) { - fdt_shrink_to_minimum(blob); /* Make room for new properties */ nodeoffset = fdt_path_offset(blob, USDHC3_PATH); fdt_delprop(blob, nodeoffset, "cd-gpios"); fdt_find_and_setprop(blob, USDHC3_PATH, "broken-cd", @@ -616,6 +630,8 @@ int ft_board_setup(void *blob, bd_t *bd) NULL, 0, 1); } + fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes)); + return 0; } #endif -- 2.9.0

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[U-Boot] [PATCH v2 2/4] fdt_support: define stub for fdt_fixup_mtdparts
by christopher.spinrath＠rwth-aachen.de 14 Jul '16

14 Jul '16

From: Christopher Spinrath <christopher.spinrath(a)rwth-aachen.de> Define an inline stub for fdt_fixup_mtdparts in the case that CONFIG_FDT_FIXUP_PARTITIONS is not defined. This avoids the need to guard every call to this function by a proper #ifdef in board files. Signed-off-by: Christopher Spinrath <christopher.spinrath(a)rwth-aachen.de> --- Notes: Changes since v1: - this is a new patch in v2 that is required to address the review comments for patch 3 (remove #ifdef guards) include/fdt_support.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/fdt_support.h b/include/fdt_support.h index d34e959..7318098 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -172,7 +172,13 @@ int fdt_increase_size(void *fdt, int add_len); int fdt_fixup_nor_flash_size(void *blob); +#if defined(CONFIG_FDT_FIXUP_PARTITIONS) void fdt_fixup_mtdparts(void *fdt, void *node_info, int node_info_size); +#else +static inline void fdt_fixup_mtdparts(void *fdt, void *node_info, + int node_info_size) {} +#endif + void fdt_del_node_and_alias(void *blob, const char *alias); u64 fdt_translate_address(void *blob, int node_offset, const __be32 *in_addr); int fdt_node_offset_by_compat_reg(void *blob, const char *compat, -- 2.9.0

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[U-Boot] [PATCH v2 1/3] spi: spi_flash: Dont set quad enable for micron in all cases
by Siva Durga Prasad Paladugu 14 Jul '16

14 Jul '16

Dont set quad enable for micron devices in all cases Setting the quad enable bit in micron expects all other commands like register reads on quad lines which may not be supported by some controllers. Hence, dont set the quad enable if controller driver sets the no_all_quad. Signed-off-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> --- Changes for v2: - Newly added in series. --- drivers/mtd/spi/spi_flash.c | 13 ++++++++++++- include/spi.h | 2 +- 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 5451725..5b22ae2 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -926,6 +926,8 @@ static int micron_quad_enable(struct spi_flash *flash) static int set_quad_mode(struct spi_flash *flash, u8 idcode0) { + struct spi_slave *spi = flash->spi; + switch (idcode0) { #ifdef CONFIG_SPI_FLASH_MACRONIX case SPI_FLASH_CFI_MFR_MACRONIX: @@ -938,7 +940,16 @@ static int set_quad_mode(struct spi_flash *flash, u8 idcode0) #endif #ifdef CONFIG_SPI_FLASH_STMICRO case SPI_FLASH_CFI_MFR_STMICRO: - return micron_quad_enable(flash); + /* + * Set quad enable for micron only + * if controller supports sending of + * all commands on quad lines, otherwise + * dont enable it + */ + if (spi->no_all_quad) + return 0; + else + return micron_quad_enable(flash); #endif default: printf("SF: Need set QEB func for %02x flash\n", idcode0); diff --git a/include/spi.h b/include/spi.h index 4b88d39..17c6e4d 100644 --- a/include/spi.h +++ b/include/spi.h @@ -117,7 +117,7 @@ struct spi_slave { unsigned int max_write_size; void *memory_map; u8 option; - + u8 no_all_quad; u8 flags; #define SPI_XFER_BEGIN BIT(0) /* Assert CS before transfer */ #define SPI_XFER_END BIT(1) /* Deassert CS after transfer */ -- 1.7.1

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[U-Boot] [PATCH 1/9] spi: zynq_qspi: Add quad support for zynq qspi
by Siva Durga Prasad Paladugu 14 Jul '16

14 Jul '16

Add quad commands supports for zynq qspi driver Signed-off-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> --- - Tested on zc702 board --- drivers/spi/zynq_qspi.c | 14 ++++++++++++++ 1 files changed, 14 insertions(+), 0 deletions(-) diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c index b98663c..e636244 100644 --- a/drivers/spi/zynq_qspi.c +++ b/drivers/spi/zynq_qspi.c @@ -11,7 +11,9 @@ #include <dm.h> #include <malloc.h> #include <spi.h> +#include <spi_flash.h> #include <asm/io.h> +#include "../mtd/spi/sf_internal.h" DECLARE_GLOBAL_DATA_PTR; @@ -156,6 +158,17 @@ static void zynq_qspi_init_hw(struct zynq_qspi_priv *priv) writel(ZYNQ_QSPI_ENR_SPI_EN_MASK, &regs->enr); } +static int zynq_qspi_child_pre_probe(struct udevice *bus) +{ + struct spi_slave *slave = dev_get_parent_priv(bus); + + slave->mode_rx = QUAD_OUTPUT_FAST; + slave->mode = SPI_TX_QUAD; + slave->no_all_quad = 1; + + return 0; +} + static int zynq_qspi_probe(struct udevice *bus) { struct zynq_qspi_platdata *plat = dev_get_platdata(bus); @@ -627,4 +640,5 @@ U_BOOT_DRIVER(zynq_qspi) = { .platdata_auto_alloc_size = sizeof(struct zynq_qspi_platdata), .priv_auto_alloc_size = sizeof(struct zynq_qspi_priv), .probe = zynq_qspi_probe, + .child_pre_probe = zynq_qspi_child_pre_probe, }; -- 1.7.1

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[U-Boot] [PATCH] misc: Add simple driver for some Nuvoton NCT6102D devices
by Stefan Roese 14 Jul '16

14 Jul '16

This simple driver provides some functions to control some of the integrated devices. The watchdog is enabled per default. This driver adds a function to disable the watchdog. Also the internal legacy UART (io address 0x3f8/0x2f8) is enabled per default. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Bin Meng <bmeng.cn(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> --- drivers/misc/Kconfig | 8 ++++++ drivers/misc/Makefile | 1 + drivers/misc/nuvoton_nct6102d.c | 57 +++++++++++++++++++++++++++++++++++++++++ include/nuvoton_nct6102d.h | 29 +++++++++++++++++++++ 4 files changed, 95 insertions(+) create mode 100644 drivers/misc/nuvoton_nct6102d.c create mode 100644 include/nuvoton_nct6102d.h diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 2373037..5d212a3 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -90,6 +90,14 @@ config MXC_OCOTP Programmable memory pages that are stored on the some Freescale i.MX processors. +config NUVOTON_NCT6102D + bool "Enable Nuvoton NCT6102D Super I/O driver" + help + If you say Y here, you will get support for the Nuvoton + NCT6102D Super I/O driver. This can be used to enable or + disable the legacy UART, the watchdog or other devices + in the Nuvoton Super IO chips on X86 platforms. + config PWRSEQ bool "Enable power-sequencing drivers" depends on DM diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 066639b..1b0c7b6 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -24,6 +24,7 @@ obj-$(CONFIG_I2C_EEPROM) += i2c_eeprom.o obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o +obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o obj-$(CONFIG_NS87308) += ns87308.o obj-$(CONFIG_PDSP188x) += pdsp188x.o obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o diff --git a/drivers/misc/nuvoton_nct6102d.c b/drivers/misc/nuvoton_nct6102d.c new file mode 100644 index 0000000..38355db --- /dev/null +++ b/drivers/misc/nuvoton_nct6102d.c @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2016 Stefan Roese <sr(a)denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <nuvoton_nct6102d.h> +#include <asm/io.h> +#include <asm/pnp_def.h> + +static void superio_outb(int reg, int val) +{ + outb(reg, WDT_EFER); + outb(val, WDT_EFDR); +} + +static inline int superio_inb(int reg) +{ + outb(reg, WDT_EFER); + return inb(WDT_EFDR); +} + +static int superio_enter(void) +{ + outb(0x87, WDT_EFER); /* Enter extended function mode */ + outb(0x87, WDT_EFER); /* Again according to manual */ + + return 0; +} + +static void superio_select(int ld) +{ + superio_outb(0x07, ld); +} + +static void superio_exit(void) +{ + outb(0xAA, WDT_EFER); /* Leave extended function mode */ +} + +/* + * The Nuvoton NCT6102D starts per default after reset with both, + * the internal watchdog and the internal legacy UART enabled. This + * code provides functions to disable the watchdog and the UART + * if this is needed on platforms. + */ +int nct6102d_wdt_disable(void) +{ + superio_enter(); + /* Select logical device for WDT */ + superio_select(NCT6102D_LD_WDT); + superio_outb(NCT6102D_WDT_TIMEOUT, 0x00); + superio_exit(); + + return 0; +} diff --git a/include/nuvoton_nct6102d.h b/include/nuvoton_nct6102d.h new file mode 100644 index 0000000..297cef4 --- /dev/null +++ b/include/nuvoton_nct6102d.h @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2016 Stefan Roese <sr(a)denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _NUVOTON_NCT6102D_H_ +#define _NUVOTON_NCT6102D_H_ + +/* I/O address of Nuvoton Super IO chip */ +#define NCT6102D_IO_PORT 0x4e + +/* Extended Function Enable Registers */ +#define WDT_EFER (NCT6102D_IO_PORT + 0) +/* Extended Function Index Register (same as EFER) */ +#define WDT_EFIR (NCT6102D_IO_PORT + 0) +/* Extended Function Data Register */ +#define WDT_EFDR (WDT_EFIR + 1) + +/* Logical device number */ +#define NCT6102D_LD_UARTA 0x02 +#define NCT6102D_LD_WDT 0x08 + +#define NCT6102D_UARTA_ENABLE 0x30 +#define NCT6102D_WDT_TIMEOUT 0xf1 + +int nct6102d_wdt_disable(void); + +#endif /* _NUVOTON_NCT6102D_H_ */ -- 2.9.1

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[U-Boot] [PATCH v2] warp7: Remove CONFIG_BOOTDELAY variable
by Breno Lima 13 Jul '16

13 Jul '16

It's not necessary anymore to declare the CONFIG_BOOTDELAY variable, it's already set by default as 2 seconds. Signed-off-by: Breno Lima <breno.lima(a)nxp.com> --- Changes since v1: -Remove CONFIG_BOOTDELAY as suggested by Otavio Salvador and Peter Robinson configs/warp7_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index 102b5b1..ad4fbbf 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -4,7 +4,6 @@ CONFIG_TARGET_WARP7=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp7/imximage.cfg" -CONFIG_BOOTDELAY=1 CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y -- 2.7.4

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[U-Boot] [PATCH] pico-imx6ul: Add PMIC support
by Vanessa Maegima 13 Jul '16

13 Jul '16

Add PMIC support. Tested by command "pmic PFUZE3000 dump". Signed-off-by: Vanessa Maegima <vanessa.maegima(a)nxp.com> --- board/technexion/pico-imx6ul/pico-imx6ul.c | 70 ++++++++++++++++++++++++++++++ include/configs/pico-imx6ul.h | 12 +++++ 2 files changed, 82 insertions(+) diff --git a/board/technexion/pico-imx6ul/pico-imx6ul.c b/board/technexion/pico-imx6ul/pico-imx6ul.c index b0b8f05..20077d1 100644 --- a/board/technexion/pico-imx6ul/pico-imx6ul.c +++ b/board/technexion/pico-imx6ul/pico-imx6ul.c @@ -14,13 +14,18 @@ #include <asm/arch/sys_proto.h> #include <asm/gpio.h> #include <asm/imx-common/iomux-v3.h> +#include <asm/imx-common/mxc_i2c.h> #include <asm/io.h> #include <common.h> #include <miiphy.h> #include <netdev.h> #include <fsl_esdhc.h> +#include <i2c.h> #include <linux/sizes.h> #include <usb.h> +#include <power/pmic.h> +#include <power/pfuze3000_pmic.h> +#include "../../freescale/common/pfuze.h" DECLARE_GLOBAL_DATA_PTR; @@ -32,6 +37,11 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE) + #define OTG_ID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) @@ -47,6 +57,23 @@ DECLARE_GLOBAL_DATA_PTR; #define RMII_PHY_RESET IMX_GPIO_NR(1, 28) +#ifdef CONFIG_SYS_I2C_MXC +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) +/* I2C2 for PMIC */ +struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_GPIO1_IO02__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_GPIO1_IO02__GPIO1_IO02 | PC, + .gp = IMX_GPIO_NR(1, 2), + }, + .sda = { + .i2c_mode = MX6_PAD_GPIO1_IO03__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_GPIO1_IO03__GPIO1_IO03 | PC, + .gp = IMX_GPIO_NR(1, 3), + }, +}; +#endif + static iomux_v3_cfg_t const fec_pads[] = { MX6_PAD_ENET1_TX_EN__ENET2_MDC | MUX_PAD_CTRL(MDIO_PAD_CTRL), MX6_PAD_ENET1_TX_DATA1__ENET2_MDIO | MUX_PAD_CTRL(MDIO_PAD_CTRL), @@ -182,6 +209,45 @@ int board_early_init_f(void) return 0; } +#ifdef CONFIG_POWER +#define I2C_PMIC 0 +static struct pmic *pfuze; +int power_init_board(void) +{ + int ret; + unsigned int reg, rev_id; + + ret = power_pfuze3000_init(I2C_PMIC); + if (ret) + return ret; + + pfuze = pmic_get("PFUZE3000"); + ret = pmic_probe(pfuze); + if (ret) + return ret; + + pmic_reg_read(pfuze, PFUZE3000_DEVICEID, &reg); + pmic_reg_read(pfuze, PFUZE3000_REVID, &rev_id); + printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", reg, rev_id); + + /* disable Low Power Mode during standby mode */ + pmic_reg_read(pfuze, PFUZE3000_LDOGCTL, &reg); + reg |= 0x1; + pmic_reg_write(pfuze, PFUZE3000_LDOGCTL, reg); + + /* SW1B step ramp up time from 2us to 4us/25mV */ + pmic_reg_write(pfuze, PFUZE3000_SW1BCONF, reg); + + /* SW1B mode to APS/PFM */ + pmic_reg_write(pfuze, PFUZE3000_SW1BMODE, reg); + + /* SW1B standby voltage set to 0.975V */ + pmic_reg_write(pfuze, PFUZE3000_SW1BSTBY, reg); + + return 0; +} +#endif + int board_usb_phy_mode(int port) { if (port == 1) @@ -211,6 +277,10 @@ int board_init(void) /* Address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + #ifdef CONFIG_SYS_I2C_MXC + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + #endif + setup_fec(); setup_usb(); diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index f9fc263..a1e5f01 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -158,6 +158,18 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) +/* I2C configs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 +#define CONFIG_SYS_I2C_SPEED 100000 + +/* PMIC */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_PFUZE3000 +#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 + /* FLASH and environment organization */ #define CONFIG_SYS_NO_FLASH -- 2.7.4

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[U-Boot] [PATCH] warp7: Remove CONFIG_BOOTDELAY variable
by Breno Lima 13 Jul '16

13 Jul '16

It's not necessary anymore to declare the CONFIG_BOOTDELAY variable, it's already set by default as 2 seconds. Signed-off-by: Breno Lima <breno.lima(a)nxp.com> --- configs/warp7_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index defa15a..ad4fbbf 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -4,7 +4,6 @@ CONFIG_TARGET_WARP7=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp7/imximage.cfg" -CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y -- 2.7.4

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