April 2016 - U-Boot

[U-Boot] [PATCH 1/2] efi_loader: Pass fdt address directly to bootefi cmd
by Alexander Graf 14 Apr '16

14 Apr '16

The bootefi cmd today fetches its device tree pointer from either the location appointed by "fdt addr" with a fallback to the U-Boot control fdt. This integration is unusual for U-Boot and diverges from the way we usually handle parameters to boot commands. So let's pass the fdt directly into the bootefi command instead and move the control fdt logic into the distro boot script. Signed-off-by: Alexander Graf <agraf(a)suse.de> --- cmd/bootefi.c | 34 +++++++++++++--------------------- include/config_distro_bootcmd.h | 9 ++++++--- 2 files changed, 19 insertions(+), 24 deletions(-) diff --git a/cmd/bootefi.c b/cmd/bootefi.c index b213ef1..ab39b95 100644 --- a/cmd/bootefi.c +++ b/cmd/bootefi.c @@ -142,12 +142,11 @@ static void *copy_fdt(void *fdt) * Load an EFI payload into a newly allocated piece of memory, register all * EFI objects it would want to access and jump to it. */ -static unsigned long do_bootefi_exec(void *efi) +static unsigned long do_bootefi_exec(void *efi, void *fdt) { ulong (*entry)(void *image_handle, struct efi_system_table *st); ulong fdt_pages, fdt_size, fdt_start, fdt_end; bootm_headers_t img = { 0 }; - void *fdt = working_fdt; /* * gd lives in a fixed register which may get clobbered while we execute @@ -155,13 +154,7 @@ static unsigned long do_bootefi_exec(void *efi) */ efi_save_gd(); - /* Update system table to point to our currently loaded FDT */ - - /* Fall back to included fdt if none was manually loaded */ - if (!fdt && gd->fdt_blob) - fdt = (void *)gd->fdt_blob; - - if (fdt) { + if (fdt && !fdt_check_header(fdt)) { /* Prepare fdt for payload */ fdt = copy_fdt(fdt); @@ -185,7 +178,7 @@ static unsigned long do_bootefi_exec(void *efi) efi_add_memory_map(fdt_start, fdt_pages, EFI_BOOT_SERVICES_DATA, true); } else { - printf("WARNING: No device tree loaded, expect boot to fail\n"); + printf("WARNING: Invalid device tree, expect boot to fail\n"); systab.nr_tables = 0; } @@ -216,18 +209,20 @@ static unsigned long do_bootefi_exec(void *efi) /* Interpreter command to boot an arbitrary EFI image from memory */ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - char *saddr; - unsigned long addr; + char *saddr, *sfdt; + unsigned long addr, fdt_addr; int r = 0; - if (argc < 2) + if (argc < 3) return 1; saddr = argv[1]; + sfdt = argv[2]; addr = simple_strtoul(saddr, NULL, 16); + fdt_addr = simple_strtoul(sfdt, NULL, 16); printf("## Starting EFI application at 0x%08lx ...\n", addr); - r = do_bootefi_exec((void *)addr); + r = do_bootefi_exec((void *)addr, (void*)fdt_addr); printf("## Application terminated, r = %d\n", r); if (r != 0) @@ -238,16 +233,13 @@ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_LONGHELP static char bootefi_help_text[] = - "<image address>\n" - " - boot EFI payload stored at address <image address>\n" - "\n" - "Since most EFI payloads want to have a device tree provided, please\n" - "make sure you load a device tree using the fdt addr command before\n" - "executing bootefi.\n"; + "<image address> <fdt address>\n" + " - boot EFI payload stored at address <image address> with a device\n" + " tree located at <fdt address>\n"; #endif U_BOOT_CMD( - bootefi, 2, 0, do_bootefi, + bootefi, 3, 0, do_bootefi, "Boots an EFI payload from memory\n", bootefi_help_text ); diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h index ad9045e..67eb8f2 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -103,12 +103,15 @@ "boot_efi_binary=" \ "load ${devtype} ${devnum}:${distro_bootpart} " \ "${kernel_addr_r} efi/boot/"BOOTEFI_NAME"; " \ - "bootefi ${kernel_addr_r}\0" \ + "if fdt addr ${fdt_addr_r}; then " \ + "bootefi ${kernel_addr_r} ${fdt_addr_r};" \ + "else" \ + "bootefi ${kernel_addr_r} ${fdtcontroladdr};" \ + "fi\0" \ \ "load_efi_dtb=" \ "load ${devtype} ${devnum}:${distro_bootpart} " \ - "${fdt_addr_r} ${prefix}${fdtfile}; " \ - "fdt addr ${fdt_addr_r}\0" \ + "${fdt_addr_r} ${prefix}${fdtfile}\0" \ \ "efi_dtb_prefixes=/ /dtb/ /dtb/current/\0" \ "scan_dev_for_efi=" \ -- 1.8.5.6

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[U-Boot] [PATCH V3] dm: gpio: pca953x: introduce driver model support for pca953x
by Peng Fan 14 Apr '16

14 Apr '16

Introduce a new driver that supports driver model for pca953x. The pca953x chips are used as I2C I/O expanders. This driver is designed to support the following chips: " 4 bits: pca9536, pca9537 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554, pca9556, pca9557, pca9574, tca6408, xra1202 16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575, tca6416 24 bits: tca6424 40 bits: pca9505, pca9698 " But for now this driver only supports max 24 bits and pca953x compatible chips. pca957x compatible chips are not supported now. These can be addressed when we need to add such support for the different chips. This driver has been tested on i.MX6 SoloX Sabreauto board with max7310 i2c expander using gpio command as following: =>gpio status -a Bank gpio@30_: gpio@30_0: input: 1 [ ] => dm tree: i2c [ ] | | `-- i2c@021a8000 gpio [ ] | | |-- gpio@30 gpio [ ] | | `-- gpio@32 Signed-off-by: Peng Fan <van.freenix(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Masahiro Yamada <yamada.masahiro(a)socionext.com> Cc: Wenyou Yang <wenyou.yang(a)atmel.com> Cc: Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> Cc: Purna Chandra Mandal <purna.mandal(a)microchip.com> Cc: Thomas Chou <thomas(a)wytron.com.tw> Cc: Bhuvanchandra DV <bhuvanchandra.dv(a)toradex.com> Cc: Andrea Scian <andrea.scian(a)dave.eu> Cc: Michal Simek <michal.simek(a)xilinx.com> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Fabio Estevam <fabio.estevam(a)nxp.com> Acked-by: Simon Glass <sjg(a)chromium.org> Tested-by: Michal Simek <michal.simek(a)xilinx.com> #on ZynqMP zcu102 --- V3: Add Michal's tested by Take Michal's suggestion, use hex vaule for gpio@[x]. V2: change bank name according to Simon's comments. drivers/gpio/Kconfig | 22 +++ drivers/gpio/Makefile | 2 + drivers/gpio/pca953x_gpio.c | 349 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 373 insertions(+) create mode 100644 drivers/gpio/pca953x_gpio.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 2311309..8ff657c 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -112,4 +112,26 @@ config MVEBU_GPIO help Say yes here to support Marvell MVEBU (Armada XP/38x) GPIOs. +config DM_PCA953X + bool "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports" + depends on DM_GPIO + help + Say yes here to provide access to several register-oriented + SMBus I/O expanders, made mostly by NXP or TI. Compatible + models include: + + 4 bits: pca9536, pca9537 + + 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554, + pca9556, pca9557, pca9574, tca6408, xra1202 + + 16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575, + tca6416 + + 24 bits: tca6424 + + 40 bits: pca9505, pca9698 + + Now, max 24 bits chips and PCA953X compatible chips are + supported endmenu diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index ea6e2ed..a7a466c 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -11,6 +11,8 @@ obj-$(CONFIG_AXP_GPIO) += axp_gpio.o endif obj-$(CONFIG_DM_GPIO) += gpio-uclass.o +obj-$(CONFIG_DM_PCA953X) += pca953x_gpio.o + obj-$(CONFIG_AT91_GPIO) += at91_gpio.o obj-$(CONFIG_ATMEL_PIO4) += atmel_pio4.o obj-$(CONFIG_INTEL_ICH6_GPIO) += intel_ich6_gpio.o diff --git a/drivers/gpio/pca953x_gpio.c b/drivers/gpio/pca953x_gpio.c new file mode 100644 index 0000000..1eeb4c8 --- /dev/null +++ b/drivers/gpio/pca953x_gpio.c @@ -0,0 +1,349 @@ +/* + * Take linux kernel driver drivers/gpio/gpio-pca953x.c for reference. + * + * Copyright (C) 2016 Peng Fan <van.freenix(a)gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + * + */ + +/* + * Note: + * The driver's compatible table is borrowed from Linux Kernel, + * but now max supported gpio pins is 24 and only PCA953X_TYPE + * is supported. PCA957X_TYPE is not supported now. + * Also the Polarity Inversion feature is not supported now. + * + * TODO: + * 1. Support PCA957X_TYPE + * 2. Support max 40 gpio pins + * 3. Support Plolarity Inversion + */ + +#include <common.h> +#include <errno.h> +#include <dm.h> +#include <fdtdec.h> +#include <i2c.h> +#include <malloc.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <dt-bindings/gpio/gpio.h> + +#define PCA953X_INPUT 0 +#define PCA953X_OUTPUT 1 +#define PCA953X_INVERT 2 +#define PCA953X_DIRECTION 3 + +#define PCA_GPIO_MASK 0x00FF +#define PCA_INT 0x0100 +#define PCA953X_TYPE 0x1000 +#define PCA957X_TYPE 0x2000 +#define PCA_TYPE_MASK 0xF000 +#define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK) + +enum { + PCA953X_DIRECTION_IN, + PCA953X_DIRECTION_OUT, +}; + +#define MAX_BANK 3 +#define BANK_SZ 8 + +/* + * struct pca953x_info - Data for pca953x + * + * @dev: udevice structure for the device + * @addr: i2c slave address + * @invert: Polarity inversion or not + * @gpio_count: the number of gpio pins that the device supports + * @chip_type: indicate the chip type,PCA953X or PCA957X + * @bank_count: the number of banks that the device supports + * @reg_output: array to hold the value of output registers + * @reg_direction: array to hold the value of direction registers + */ +struct pca953x_info { + struct udevice *dev; + unsigned int addr; + unsigned int invert; + unsigned int gpio_count; + unsigned int chip_type; + unsigned int bank_count; + u8 reg_output[MAX_BANK]; + u8 reg_direction[MAX_BANK]; +}; + +static int pca953x_write_single(struct udevice *dev, int reg, u8 val, + int offset) +{ + struct pca953x_info *info = dev_get_platdata(dev); + int bank_shift = fls((info->gpio_count - 1) / BANK_SZ); + int off = offset / BANK_SZ; + int ret = 0; + + ret = dm_i2c_write(dev, (reg << bank_shift) + off, &val, 1); + if (ret) { + dev_err(dev, "%s error\n", __func__); + return ret; + } + + return 0; +} + +static int pca953x_read_single(struct udevice *dev, int reg, u8 *val, + int offset) +{ + struct pca953x_info *info = dev_get_platdata(dev); + int bank_shift = fls((info->gpio_count - 1) / BANK_SZ); + int off = offset / BANK_SZ; + int ret; + u8 byte; + + ret = dm_i2c_read(dev, (reg << bank_shift) + off, &byte, 1); + if (ret) { + dev_err(dev, "%s error\n", __func__); + return ret; + } + + *val = byte; + + return 0; +} + +static int pca953x_read_regs(struct udevice *dev, int reg, u8 *val) +{ + struct pca953x_info *info = dev_get_platdata(dev); + int ret = 0; + + if (info->gpio_count <= 8) { + ret = dm_i2c_read(dev, reg, val, 1); + } else if (info->gpio_count <= 16) { + ret = dm_i2c_read(dev, reg << 1, val, info->bank_count); + } else { + dev_err(dev, "Unsupported now\n"); + return -EINVAL; + } + + return ret; +} + +static int pca953x_is_output(struct udevice *dev, int offset) +{ + struct pca953x_info *info = dev_get_platdata(dev); + + int bank = offset / BANK_SZ; + int off = offset % BANK_SZ; + + /*0: output; 1: input */ + return !(info->reg_direction[bank] & (1 << off)); +} + +static int pca953x_get_value(struct udevice *dev, unsigned offset) +{ + int ret; + u8 val = 0; + + ret = pca953x_read_single(dev, PCA953X_INPUT, &val, offset); + if (ret) + return ret; + + return (val >> offset) & 0x1; +} + +static int pca953x_set_value(struct udevice *dev, unsigned offset, + int value) +{ + struct pca953x_info *info = dev_get_platdata(dev); + int bank = offset / BANK_SZ; + int off = offset % BANK_SZ; + u8 val; + int ret; + + if (value) + val = info->reg_output[bank] | (1 << off); + else + val = info->reg_output[bank] & ~(1 << off); + + ret = pca953x_write_single(dev, PCA953X_OUTPUT, val, offset); + if (ret) + return ret; + + info->reg_output[bank] = val; + + return 0; +} + +static int pca953x_set_direction(struct udevice *dev, unsigned offset, int dir) +{ + struct pca953x_info *info = dev_get_platdata(dev); + int bank = offset / BANK_SZ; + int off = offset % BANK_SZ; + u8 val; + int ret; + + if (dir == PCA953X_DIRECTION_IN) + val = info->reg_direction[bank] | (1 << off); + else + val = info->reg_direction[bank] & ~(1 << off); + + ret = pca953x_write_single(dev, PCA953X_DIRECTION, val, offset); + if (ret) + return ret; + + info->reg_direction[bank] = val; + + return 0; +} + +static int pca953x_direction_input(struct udevice *dev, unsigned offset) +{ + return pca953x_set_direction(dev, offset, PCA953X_DIRECTION_IN); +} + +static int pca953x_direction_output(struct udevice *dev, unsigned offset, + int value) +{ + /* Configure output value. */ + pca953x_set_value(dev, offset, value); + + /* Configure direction as output. */ + pca953x_set_direction(dev, offset, PCA953X_DIRECTION_OUT); + + return 0; +} + +static int pca953x_get_function(struct udevice *dev, unsigned offset) +{ + if (pca953x_is_output(dev, offset)) + return GPIOF_OUTPUT; + else + return GPIOF_INPUT; +} + +static int pca953x_xlate(struct udevice *dev, struct gpio_desc *desc, + struct fdtdec_phandle_args *args) +{ + desc->offset = args->args[0]; + desc->flags = args->args[1] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0; + + return 0; +} + +static const struct dm_gpio_ops pca953x_ops = { + .direction_input = pca953x_direction_input, + .direction_output = pca953x_direction_output, + .get_value = pca953x_get_value, + .set_value = pca953x_set_value, + .get_function = pca953x_get_function, + .xlate = pca953x_xlate, +}; + +static int pca953x_probe(struct udevice *dev) +{ + struct pca953x_info *info = dev_get_platdata(dev); + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); + char name[32], *str; + fdt_addr_t addr; + ulong driver_data; + int ret; + + if (!info) { + dev_err(dev, "platdata not ready\n"); + return -ENOMEM; + } + + if (!chip) { + dev_err(dev, "i2c not ready\n"); + return -ENODEV; + } + + addr = dev_get_addr(dev); + if (addr == FDT_ADDR_T_NONE) + return -ENODEV; + + info->addr = (unsigned int)addr; + + driver_data = dev_get_driver_data(dev); + + info->gpio_count = driver_data & PCA_GPIO_MASK; + if (info->gpio_count > MAX_BANK * BANK_SZ) { + dev_err(dev, "Max support %d pins now\n", MAX_BANK * BANK_SZ); + return -EINVAL; + } + + info->chip_type = PCA_CHIP_TYPE(driver_data); + if (info->chip_type != PCA953X_TYPE) { + dev_err(dev, "Only support PCA953X chip type now.\n"); + return -EINVAL; + } + + info->bank_count = DIV_ROUND_UP(info->gpio_count, BANK_SZ); + + ret = pca953x_read_regs(dev, PCA953X_OUTPUT, info->reg_output); + if (ret) { + dev_err(dev, "Error reading output register\n"); + return ret; + } + + ret = pca953x_read_regs(dev, PCA953X_DIRECTION, info->reg_direction); + if (ret) { + dev_err(dev, "Error reading direction register\n"); + return ret; + } + + snprintf(name, sizeof(name), "gpio@%x_", info->addr); + str = strdup(name); + if (!str) + return -ENOMEM; + uc_priv->bank_name = str; + uc_priv->gpio_count = info->gpio_count; + + dev_dbg(dev, "%s is ready\n", str); + + return 0; +} + +#define OF_953X(__nrgpio, __int) (ulong)(__nrgpio | PCA953X_TYPE | __int) +#define OF_957X(__nrgpio, __int) (ulong)(__nrgpio | PCA957X_TYPE | __int) + +static const struct udevice_id pca953x_ids[] = { + { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), }, + { .compatible = "nxp,pca9534", .data = OF_953X(8, PCA_INT), }, + { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), }, + { .compatible = "nxp,pca9536", .data = OF_953X(4, 0), }, + { .compatible = "nxp,pca9537", .data = OF_953X(4, PCA_INT), }, + { .compatible = "nxp,pca9538", .data = OF_953X(8, PCA_INT), }, + { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), }, + { .compatible = "nxp,pca9554", .data = OF_953X(8, PCA_INT), }, + { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), }, + { .compatible = "nxp,pca9556", .data = OF_953X(8, 0), }, + { .compatible = "nxp,pca9557", .data = OF_953X(8, 0), }, + { .compatible = "nxp,pca9574", .data = OF_957X(8, PCA_INT), }, + { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), }, + { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), }, + + { .compatible = "maxim,max7310", .data = OF_953X(8, 0), }, + { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), }, + { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), }, + { .compatible = "maxim,max7315", .data = OF_953X(8, PCA_INT), }, + + { .compatible = "ti,pca6107", .data = OF_953X(8, PCA_INT), }, + { .compatible = "ti,tca6408", .data = OF_953X(8, PCA_INT), }, + { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), }, + { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), }, + + { .compatible = "onsemi,pca9654", .data = OF_953X(8, PCA_INT), }, + + { .compatible = "exar,xra1202", .data = OF_953X(8, 0), }, + { } +}; + +U_BOOT_DRIVER(pca953x) = { + .name = "pca953x", + .id = UCLASS_GPIO, + .ops = &pca953x_ops, + .probe = pca953x_probe, + .platdata_auto_alloc_size = sizeof(struct pca953x_info), + .of_match = pca953x_ids, +}; -- 2.6.2

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[U-Boot] [PATCH] fdt: Do not report bad cell count when #size-cells = <0>
by Michal Simek 14 Apr '16

14 Apr '16

Upcomming pca953x gpio driver (tca6416 is compatible with it) is using for example this DT description (ZynqMP zcu102): i2c0: i2c@ff020000 { compatible = "cdns,i2c-r1p10"; interrupt-parent = <&gic>; interrupts = <0 17 4>; reg = <0x0 0xff020000 0x1000>; #address-cells = <1>; #size-cells = <0>; tca6416_u61: gpio@21 { compatible = "ti,tca6416"; reg = <0x21>; gpio-controller; #gpio-cells = <2>; }; }; I2C bus is using #size-cells = <0> which current code detects as "Bad cell count": OF: reached root node OF: ** translation for device gpio@20 ** __of_translate_address: Bad cell count for gpio@20 Command 'gpio' failed: Error -19 This patch fixes OF_CHECK_COUNTS macro not to report problem when size-cells is 0 which is also valid bus configuration. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- common/fdt_support.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/fdt_support.c b/common/fdt_support.c index ced119e70d9f..5f5b49c6210b 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -941,7 +941,7 @@ void fdt_del_node_and_alias(void *blob, const char *alias) #define OF_MAX_ADDR_CELLS 4 #define OF_BAD_ADDR FDT_ADDR_T_NONE #define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \ - (ns) > 0) + (ns) >= 0) /* Debug utility */ #ifdef DEBUG -- 1.9.1

3 3

[U-Boot] [PATCH V2] dm: gpio: pca953x: introduce driver model support for pca953x
by Peng Fan 14 Apr '16

14 Apr '16

Introduce a new driver that supports driver model for pca953x. The pca953x chips are used as I2C I/O expanders. This driver is designed to support the following chips: " 4 bits: pca9536, pca9537 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554, pca9556, pca9557, pca9574, tca6408, xra1202 16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575, tca6416 24 bits: tca6424 40 bits: pca9505, pca9698 " But for now this driver only supports max 24 bits and pca953x compatible chips. pca957x compatible chips are not supported now. These can be addressed when we need to add such support for the different chips. This driver has been tested on i.MX6 SoloX Sabreauto board with max7310 i2c expander using gpio command as following: =>gpio status -a Bank gpio@48_: gpio@48_0: input: 1 [ ] => dm tree: i2c [ ] | | `-- i2c@021a8000 gpio [ ] | | |-- gpio@30 gpio [ ] | | `-- gpio@32 Signed-off-by: Peng Fan <van.freenix(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Masahiro Yamada <yamada.masahiro(a)socionext.com> Cc: Wenyou Yang <wenyou.yang(a)atmel.com> Cc: Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> Cc: Purna Chandra Mandal <purna.mandal(a)microchip.com> Cc: Thomas Chou <thomas(a)wytron.com.tw> Cc: Bhuvanchandra DV <bhuvanchandra.dv(a)toradex.com> Cc: Andrea Scian <andrea.scian(a)dave.eu> Cc: Michal Simek <michal.simek(a)xilinx.com> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Fabio Estevam <fabio.estevam(a)nxp.com> Acked-by: Simon Glass <sjg(a)chromium.org> --- V2: change bank name according to Simon's comments. drivers/gpio/Kconfig | 22 +++ drivers/gpio/Makefile | 2 + drivers/gpio/pca953x_gpio.c | 349 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 373 insertions(+) create mode 100644 drivers/gpio/pca953x_gpio.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 2311309..8ff657c 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -112,4 +112,26 @@ config MVEBU_GPIO help Say yes here to support Marvell MVEBU (Armada XP/38x) GPIOs. +config DM_PCA953X + bool "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports" + depends on DM_GPIO + help + Say yes here to provide access to several register-oriented + SMBus I/O expanders, made mostly by NXP or TI. Compatible + models include: + + 4 bits: pca9536, pca9537 + + 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554, + pca9556, pca9557, pca9574, tca6408, xra1202 + + 16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575, + tca6416 + + 24 bits: tca6424 + + 40 bits: pca9505, pca9698 + + Now, max 24 bits chips and PCA953X compatible chips are + supported endmenu diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index ea6e2ed..a7a466c 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -11,6 +11,8 @@ obj-$(CONFIG_AXP_GPIO) += axp_gpio.o endif obj-$(CONFIG_DM_GPIO) += gpio-uclass.o +obj-$(CONFIG_DM_PCA953X) += pca953x_gpio.o + obj-$(CONFIG_AT91_GPIO) += at91_gpio.o obj-$(CONFIG_ATMEL_PIO4) += atmel_pio4.o obj-$(CONFIG_INTEL_ICH6_GPIO) += intel_ich6_gpio.o diff --git a/drivers/gpio/pca953x_gpio.c b/drivers/gpio/pca953x_gpio.c new file mode 100644 index 0000000..ff2aa48 --- /dev/null +++ b/drivers/gpio/pca953x_gpio.c @@ -0,0 +1,349 @@ +/* + * Take linux kernel driver drivers/gpio/gpio-pca953x.c for reference. + * + * Copyright (C) 2016 Peng Fan <van.freenix(a)gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + * + */ + +/* + * Note: + * The driver's compatible table is borrowed from Linux Kernel, + * but now max supported gpio pins is 24 and only PCA953X_TYPE + * is supported. PCA957X_TYPE is not supported now. + * Also the Polarity Inversion feature is not supported now. + * + * TODO: + * 1. Support PCA957X_TYPE + * 2. Support max 40 gpio pins + * 3. Support Plolarity Inversion + */ + +#include <common.h> +#include <errno.h> +#include <dm.h> +#include <fdtdec.h> +#include <i2c.h> +#include <malloc.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <dt-bindings/gpio/gpio.h> + +#define PCA953X_INPUT 0 +#define PCA953X_OUTPUT 1 +#define PCA953X_INVERT 2 +#define PCA953X_DIRECTION 3 + +#define PCA_GPIO_MASK 0x00FF +#define PCA_INT 0x0100 +#define PCA953X_TYPE 0x1000 +#define PCA957X_TYPE 0x2000 +#define PCA_TYPE_MASK 0xF000 +#define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK) + +enum { + PCA953X_DIRECTION_IN, + PCA953X_DIRECTION_OUT, +}; + +#define MAX_BANK 3 +#define BANK_SZ 8 + +/* + * struct pca953x_info - Data for pca953x + * + * @dev: udevice structure for the device + * @addr: i2c slave address + * @invert: Polarity inversion or not + * @gpio_count: the number of gpio pins that the device supports + * @chip_type: indicate the chip type,PCA953X or PCA957X + * @bank_count: the number of banks that the device supports + * @reg_output: array to hold the value of output registers + * @reg_direction: array to hold the value of direction registers + */ +struct pca953x_info { + struct udevice *dev; + unsigned int addr; + unsigned int invert; + unsigned int gpio_count; + unsigned int chip_type; + unsigned int bank_count; + u8 reg_output[MAX_BANK]; + u8 reg_direction[MAX_BANK]; +}; + +static int pca953x_write_single(struct udevice *dev, int reg, u8 val, + int offset) +{ + struct pca953x_info *info = dev_get_platdata(dev); + int bank_shift = fls((info->gpio_count - 1) / BANK_SZ); + int off = offset / BANK_SZ; + int ret = 0; + + ret = dm_i2c_write(dev, (reg << bank_shift) + off, &val, 1); + if (ret) { + dev_err(dev, "%s error\n", __func__); + return ret; + } + + return 0; +} + +static int pca953x_read_single(struct udevice *dev, int reg, u8 *val, + int offset) +{ + struct pca953x_info *info = dev_get_platdata(dev); + int bank_shift = fls((info->gpio_count - 1) / BANK_SZ); + int off = offset / BANK_SZ; + int ret; + u8 byte; + + ret = dm_i2c_read(dev, (reg << bank_shift) + off, &byte, 1); + if (ret) { + dev_err(dev, "%s error\n", __func__); + return ret; + } + + *val = byte; + + return 0; +} + +static int pca953x_read_regs(struct udevice *dev, int reg, u8 *val) +{ + struct pca953x_info *info = dev_get_platdata(dev); + int ret = 0; + + if (info->gpio_count <= 8) { + ret = dm_i2c_read(dev, reg, val, 1); + } else if (info->gpio_count <= 16) { + ret = dm_i2c_read(dev, reg << 1, val, info->bank_count); + } else { + dev_err(dev, "Unsupported now\n"); + return -EINVAL; + } + + return ret; +} + +static int pca953x_is_output(struct udevice *dev, int offset) +{ + struct pca953x_info *info = dev_get_platdata(dev); + + int bank = offset / BANK_SZ; + int off = offset % BANK_SZ; + + /*0: output; 1: input */ + return !(info->reg_direction[bank] & (1 << off)); +} + +static int pca953x_get_value(struct udevice *dev, unsigned offset) +{ + int ret; + u8 val = 0; + + ret = pca953x_read_single(dev, PCA953X_INPUT, &val, offset); + if (ret) + return ret; + + return (val >> offset) & 0x1; +} + +static int pca953x_set_value(struct udevice *dev, unsigned offset, + int value) +{ + struct pca953x_info *info = dev_get_platdata(dev); + int bank = offset / BANK_SZ; + int off = offset % BANK_SZ; + u8 val; + int ret; + + if (value) + val = info->reg_output[bank] | (1 << off); + else + val = info->reg_output[bank] & ~(1 << off); + + ret = pca953x_write_single(dev, PCA953X_OUTPUT, val, offset); + if (ret) + return ret; + + info->reg_output[bank] = val; + + return 0; +} + +static int pca953x_set_direction(struct udevice *dev, unsigned offset, int dir) +{ + struct pca953x_info *info = dev_get_platdata(dev); + int bank = offset / BANK_SZ; + int off = offset % BANK_SZ; + u8 val; + int ret; + + if (dir == PCA953X_DIRECTION_IN) + val = info->reg_direction[bank] | (1 << off); + else + val = info->reg_direction[bank] & ~(1 << off); + + ret = pca953x_write_single(dev, PCA953X_DIRECTION, val, offset); + if (ret) + return ret; + + info->reg_direction[bank] = val; + + return 0; +} + +static int pca953x_direction_input(struct udevice *dev, unsigned offset) +{ + return pca953x_set_direction(dev, offset, PCA953X_DIRECTION_IN); +} + +static int pca953x_direction_output(struct udevice *dev, unsigned offset, + int value) +{ + /* Configure output value. */ + pca953x_set_value(dev, offset, value); + + /* Configure direction as output. */ + pca953x_set_direction(dev, offset, PCA953X_DIRECTION_OUT); + + return 0; +} + +static int pca953x_get_function(struct udevice *dev, unsigned offset) +{ + if (pca953x_is_output(dev, offset)) + return GPIOF_OUTPUT; + else + return GPIOF_INPUT; +} + +static int pca953x_xlate(struct udevice *dev, struct gpio_desc *desc, + struct fdtdec_phandle_args *args) +{ + desc->offset = args->args[0]; + desc->flags = args->args[1] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0; + + return 0; +} + +static const struct dm_gpio_ops pca953x_ops = { + .direction_input = pca953x_direction_input, + .direction_output = pca953x_direction_output, + .get_value = pca953x_get_value, + .set_value = pca953x_set_value, + .get_function = pca953x_get_function, + .xlate = pca953x_xlate, +}; + +static int pca953x_probe(struct udevice *dev) +{ + struct pca953x_info *info = dev_get_platdata(dev); + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); + char name[32], *str; + fdt_addr_t addr; + ulong driver_data; + int ret; + + if (!info) { + dev_err(dev, "platdata not ready\n"); + return -ENOMEM; + } + + if (!chip) { + dev_err(dev, "i2c not ready\n"); + return -ENODEV; + } + + addr = dev_get_addr(dev); + if (addr == FDT_ADDR_T_NONE) + return -ENODEV; + + info->addr = (unsigned int)addr; + + driver_data = dev_get_driver_data(dev); + + info->gpio_count = driver_data & PCA_GPIO_MASK; + if (info->gpio_count > MAX_BANK * BANK_SZ) { + dev_err(dev, "Max support %d pins now\n", MAX_BANK * BANK_SZ); + return -EINVAL; + } + + info->chip_type = PCA_CHIP_TYPE(driver_data); + if (info->chip_type != PCA953X_TYPE) { + dev_err(dev, "Only support PCA953X chip type now.\n"); + return -EINVAL; + } + + info->bank_count = DIV_ROUND_UP(info->gpio_count, BANK_SZ); + + ret = pca953x_read_regs(dev, PCA953X_OUTPUT, info->reg_output); + if (ret) { + dev_err(dev, "Error reading output register\n"); + return ret; + } + + ret = pca953x_read_regs(dev, PCA953X_DIRECTION, info->reg_direction); + if (ret) { + dev_err(dev, "Error reading direction register\n"); + return ret; + } + + snprintf(name, sizeof(name), "gpio@%u_", info->addr); + str = strdup(name); + if (!str) + return -ENOMEM; + uc_priv->bank_name = str; + uc_priv->gpio_count = info->gpio_count; + + dev_dbg(dev, "%s is ready\n", str); + + return 0; +} + +#define OF_953X(__nrgpio, __int) (ulong)(__nrgpio | PCA953X_TYPE | __int) +#define OF_957X(__nrgpio, __int) (ulong)(__nrgpio | PCA957X_TYPE | __int) + +static const struct udevice_id pca953x_ids[] = { + { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), }, + { .compatible = "nxp,pca9534", .data = OF_953X(8, PCA_INT), }, + { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), }, + { .compatible = "nxp,pca9536", .data = OF_953X(4, 0), }, + { .compatible = "nxp,pca9537", .data = OF_953X(4, PCA_INT), }, + { .compatible = "nxp,pca9538", .data = OF_953X(8, PCA_INT), }, + { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), }, + { .compatible = "nxp,pca9554", .data = OF_953X(8, PCA_INT), }, + { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), }, + { .compatible = "nxp,pca9556", .data = OF_953X(8, 0), }, + { .compatible = "nxp,pca9557", .data = OF_953X(8, 0), }, + { .compatible = "nxp,pca9574", .data = OF_957X(8, PCA_INT), }, + { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), }, + { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), }, + + { .compatible = "maxim,max7310", .data = OF_953X(8, 0), }, + { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), }, + { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), }, + { .compatible = "maxim,max7315", .data = OF_953X(8, PCA_INT), }, + + { .compatible = "ti,pca6107", .data = OF_953X(8, PCA_INT), }, + { .compatible = "ti,tca6408", .data = OF_953X(8, PCA_INT), }, + { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), }, + { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), }, + + { .compatible = "onsemi,pca9654", .data = OF_953X(8, PCA_INT), }, + + { .compatible = "exar,xra1202", .data = OF_953X(8, 0), }, + { } +}; + +U_BOOT_DRIVER(pca953x) = { + .name = "pca953x", + .id = UCLASS_GPIO, + .ops = &pca953x_ops, + .probe = pca953x_probe, + .platdata_auto_alloc_size = sizeof(struct pca953x_info), + .of_match = pca953x_ids, +}; -- 2.6.2

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[U-Boot] want to clarify a couple things about vendor common/ directories
by Robert P. J. Day 14 Apr '16

14 Apr '16

currently refactoring a pile of (closely-related) board support code and can clearly stuff a lot of duplicate code and header files into a vendor-specific "common/" directory so just want to make sure i'm doing this properly. first, i can see from the top-level Makefile that a common board directory is identified specifically by containing a Makefile: HAVE_VENDOR_COMMON_LIB = $(if $(wildcard $(srctree)/board/$(VENDOR)/common/Makefile),y,n) but not necessarily a Kconfig file. (in fact, i can see that of the several vendors that have common/ directories, only ti/common/ has a Kconfig file, so i'm concluding that a common/ directory containing a Kconfig file is more the exception rather than the norm. ti/common/ seems like a special case, in that it contains just some board_detect code, and its Kconfig would be explicitly sourced by the subset of ti boards for which it's relevant, so that makes sense. but, as i mentioned, that's the only example i see.) next, when including common header files, it seems clear that board files need to refer explicitly to that sibling directory, as in: #include "../common/qixis.h" i suppose it might have been possible for the build process to add the common directory to the include search path for header files, but it's clear that wasn't done so common header file inclusion *needs* that "../common/whatever.h" form, correct? finally, in terms of pulling in common source files, i'm just going to be appalled by the occasional form of this: amcc/bubinga/flash.c:#include "../common/flash.c" amcc/walnut/flash.c:#include "../common/flash.c" amcc/bamboo/flash.c:#include "../common/flash.c" amcc/luan/flash.c:#include "../common/flash.c" or is textual inclusion of source files from a common directory acceptable practice? i normally really dislike this, but is doing that in this specific context in u-boot considered acceptable? in any event, the regular way appears to be having a Makefile controlling what vendor-common code gets compiled, and Kconfig files elsewhere allowing the selection of config options to drive that process, is that about right? am i missing anything regarding proper common/ vendor usage? rday -- ======================================================================== Robert P. J. Day Ottawa, Ontario, CANADA http://crashcourse.ca Twitter: http://twitter.com/rpjday LinkedIn: http://ca.linkedin.com/in/rpjday ========================================================================

2 2

[U-Boot] [PATCH] odroid: Update README with correct firmware link and XU4 support
by Shawn Guo 14 Apr '16

14 Apr '16

The firmware from link [1] only works with U-Boot image that is no bigger than 328KiB. Using it with the default mainline U-Boot today which is already around 500KiB is just not working. Correct the link to be hardkernel_1mb_uboot one [2], so that users can get mainline U-Boot work out of box. While at it, the README is updated to include XU4 support, like DTB file name. [1] https://github.com/hardkernel/u-boot/tree/odroidxu3-v2012.07/sd_fuse/hardke… [2] https://github.com/hardkernel/u-boot/tree/odroidxu3-v2012.07/sd_fuse/hardke… Signed-off-by: Shawn Guo <shawnguo(a)kernel.org> --- doc/README.odroid | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/doc/README.odroid b/doc/README.odroid index ef243d1bde36..c088ec4cb08f 100644 --- a/doc/README.odroid +++ b/doc/README.odroid @@ -1,11 +1,11 @@ - U-Boot for Odroid X2/U3/XU3 + U-Boot for Odroid X2/U3/XU3/XU4 ======================== 1. Summary ========== This is a quick instruction for setup Odroid boards. Board config: odroid_config for X2/U3 -Board config: odroid-xu3_config for XU3 +Board config: odroid-xu3_config for XU3/XU4 2. Supported devices ==================== @@ -14,6 +14,7 @@ This U-BOOT config can be used on three boards: - Odroid X2 with CPU Exynos 4412 rev 2.0 and 2GB of RAM - Odroid XU3 +- Odroid XU4 with CPU Exynos5422 and 2GB of RAM 3. Boot sequence @@ -29,9 +30,9 @@ http://dev.odroid.com/projects/4412boot/wiki/FrontPage?action=download&valu… or here: http://odroid.in/guides/ubuntu-lfs/boot.tar.gz -<< XU3 >> +<< XU3/XU4 >> It can be downloaded from: -https://github.com/hardkernel/u-boot/tree/odroidxu3-v2012.07/sd_fuse/hardkernel +https://github.com/hardkernel/u-boot/tree/odroidxu3-v2012.07/sd_fuse/hardkernel_1mb_uboot 4. Boot media layout @@ -120,6 +121,7 @@ Supported fdt files are: - exynos4412-odroidx2.dtb - exynos4412-odroidu3.dtb - exynos5422-odroidxu3.dtb +- exynos5422-odroidxu4.dtb Supported kernel files are: - Image.itb -- 1.9.1

4 3

[U-Boot] [PATCH] exynos: Set CNTFRQ
by Alexander Graf 14 Apr '16

14 Apr '16

Commit 73a1cb27 moved the check whether we should set the architected timer frequency from CONFIG_SYS_CLK_FREQ to CONFIG_TIMER_CLK_FREQ, but did not update all users of it. The one where I (finally) realized why KVM didn't work is the Arndale board, so this patch adds the respective define to it. Signed-off-by: Alexander Graf <agraf(a)suse.de> Fixes: 73a1cb27 --- include/configs/exynos-common.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index 852829c..c4e731f 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -31,6 +31,7 @@ /* input clock of PLL: 24MHz input clock */ #define CONFIG_SYS_CLK_FREQ 24000000 +#define CONFIG_TIMER_CLK_FREQ 24000000 #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG -- 2.6.2

4 6

[U-Boot] [GIT] Pull request: u-boot-dfu
by Lukasz Majewski 14 Apr '16

14 Apr '16

Dear Marek, The following changes since commit bbf8bef196ae52517284a0a2e2ffc94a4ff89f5f: Prepare v2016.05-rc1 (2016-04-11 22:22:25 -0400) are available in the git repository at: u-boot-dfu/master for you to fetch changes up to e867669afd0478b1582b67e0c08ad047f1f49ec1: usb: gadget Move: CONFIG_G_DNL_* to Kconfig (2016-04-14 11:55:30 +0200) ---------------------------------------------------------------- John Tobias (2): USB: g_dnl: Change device class usb: ums - expose selected partition/s Sam Protsenko (7): usb: gadget: Move CONFIG_USB_GADGET_VBUS_DRAW to Kconfig usb: gadget: Move CONFIG_USB_GADGET_DUALSPEED to Kconfig usb: gadget: Move CONFIG_USB_GADGET_DOWNLOAD to Kconfig usb: dwc3: Move CONFIG_USB_DWC3_GADGET/HOST to Kconfig usb: dwc3: Move CONFIG_USB_DWC3_OMAP to Kconfig usb: dwc3: Move CONFIG_USB_DWC3_PHY_* to Kconfig usb: gadget Move: CONFIG_G_DNL_* to Kconfig cmd/usb_mass_storage.c | 39 +++++++++++++++++++++++++++++---------- configs/A13-OLinuXino_defconfig | 4 ++++ configs/CHIP_defconfig | 4 ++++ configs/Cubietruck_defconfig | 4 ++++ configs/am335x_baltos_defconfig | 5 +++++ configs/am335x_boneblack_defconfig | 5 +++++ configs/am335x_boneblack_vboot_defconfig | 5 +++++ configs/am335x_evm_defconfig | 5 +++++ configs/am335x_evm_nor_defconfig | 5 +++++ configs/am335x_evm_norboot_defconfig | 5 +++++ configs/am335x_evm_spiboot_defconfig | 5 +++++ configs/am335x_evm_usbspl_defconfig | 5 +++++ configs/am335x_gp_evm_defconfig | 5 +++++ configs/am437x_gp_evm_defconfig | 8 ++++++++ configs/am437x_sk_evm_defconfig | 8 ++++++++ configs/am43xx_evm_defconfig | 8 ++++++++ configs/am43xx_evm_ethboot_defconfig | 8 ++++++++ configs/am43xx_evm_qspiboot_defconfig | 8 ++++++++ configs/am43xx_evm_usbhost_boot_defconfig | 8 ++++++++ configs/apalis_t30_defconfig | 5 +++++ configs/bcm11130_defconfig | 5 +++++ configs/bcm11130_nand_defconfig | 5 +++++ configs/bcm28155_ap_defconfig | 5 +++++ configs/bcm28155_w1d_defconfig | 5 +++++ configs/beaver_defconfig | 5 +++++ configs/birdland_bav335a_defconfig | 5 +++++ configs/birdland_bav335b_defconfig | 5 +++++ configs/cgtqmx6eval_defconfig | 5 +++++ configs/colibri_t20_defconfig | 9 +++++++-- configs/colibri_t30_defconfig | 5 +++++ configs/colibri_vf_defconfig | 5 +++++ configs/corvus_defconfig | 5 +++++ configs/dalmore_defconfig | 5 +++++ configs/dra72_evm_defconfig | 8 ++++++++ configs/dra74_evm_defconfig | 8 ++++++++ configs/dra7xx_evm_defconfig | 8 ++++++++ configs/dra7xx_evm_qspiboot_defconfig | 8 ++++++++ configs/dra7xx_evm_uart3_defconfig | 8 ++++++++ configs/draco_defconfig | 5 +++++ configs/e2220-1170_defconfig | 5 +++++ configs/gwventana_defconfig | 5 +++++ configs/jetson-tk1_defconfig | 5 +++++ configs/kc1_defconfig | 4 ++++ configs/ma5d4evk_defconfig | 1 + configs/mx6dlsabreauto_defconfig | 5 +++++ configs/mx6dlsabresd_defconfig | 5 +++++ configs/mx6qpsabreauto_defconfig | 5 +++++ configs/mx6qsabreauto_defconfig | 5 +++++ configs/mx6qsabrelite_defconfig | 5 +++++ configs/mx6qsabresd_defconfig | 5 +++++ configs/mx6sabresd_spl_defconfig | 5 +++++ configs/mx7dsabresd_defconfig | 5 +++++ configs/nitrogen6dl2g_defconfig | 5 +++++ configs/nitrogen6dl_defconfig | 5 +++++ configs/nitrogen6q2g_defconfig | 5 +++++ configs/nitrogen6q_defconfig | 5 +++++ configs/nitrogen6s1g_defconfig | 5 +++++ configs/nitrogen6s_defconfig | 5 +++++ configs/novena_defconfig | 3 +++ configs/nyan-big_defconfig | 5 +++++ configs/odroid-xu3_defconfig | 7 +++++++ configs/odroid_defconfig | 5 +++++ configs/omap3_beagle_defconfig | 5 +++++ configs/omap3_logic_defconfig | 5 +++++ configs/omap5_uevm_defconfig | 8 ++++++++ configs/origen_defconfig | 5 +++++ configs/p2371-0000_defconfig | 5 +++++ configs/p2371-2180_defconfig | 5 +++++ configs/p2571_defconfig | 5 +++++ configs/pcm051_rev1_defconfig | 3 +++ configs/pcm051_rev3_defconfig | 3 +++ configs/pengwyn_defconfig | 1 + configs/pxm2_defconfig | 5 +++++ configs/rastaban_defconfig | 5 +++++ configs/rut_defconfig | 5 +++++ configs/s5p_goni_defconfig | 5 +++++ configs/s5pc210_universal_defconfig | 5 +++++ configs/sama5d2_xplained_mmc_defconfig | 1 + configs/sama5d2_xplained_spiflash_defconfig | 1 + configs/sama5d3xek_mmc_defconfig | 1 + configs/sama5d3xek_nandflash_defconfig | 1 + configs/sama5d3xek_spiflash_defconfig | 1 + configs/sama5d4_xplained_mmc_defconfig | 1 + configs/sama5d4_xplained_nandflash_defconfig | 1 + configs/sama5d4_xplained_spiflash_defconfig | 1 + configs/sama5d4ek_mmc_defconfig | 1 + configs/sama5d4ek_nandflash_defconfig | 1 + configs/sama5d4ek_spiflash_defconfig | 1 + configs/sansa_fuze_plus_defconfig | 3 +++ configs/smartweb_defconfig | 4 ++++ configs/sniper_defconfig | 4 ++++ configs/socfpga_arria5_defconfig | 5 +++++ configs/socfpga_cyclone5_defconfig | 5 +++++ configs/socfpga_de0_nano_soc_defconfig | 5 +++++ configs/socfpga_mcvevk_defconfig | 5 +++++ configs/socfpga_sockit_defconfig | 5 +++++ configs/socfpga_socrates_defconfig | 5 +++++ configs/taurus_defconfig | 4 ++++ configs/tbs2910_defconfig | 5 +++++ configs/thuban_defconfig | 5 +++++ configs/trats2_defconfig | 5 +++++ configs/trats_defconfig | 5 +++++ configs/venice2_defconfig | 5 +++++ configs/vinco_defconfig | 1 + configs/xfi3_defconfig | 3 +++ configs/xilinx_zynqmp_ep_defconfig | 6 ++++++ configs/zynq_picozed_defconfig | 9 +++++++-- configs/zynq_zc702_defconfig | 9 +++++++-- configs/zynq_zc706_defconfig | 9 +++++++-- configs/zynq_zed_defconfig | 9 +++++++-- configs/zynq_zybo_defconfig | 9 +++++++-- drivers/usb/Kconfig | 2 ++ drivers/usb/dwc3/Kconfig | 57 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/usb/gadget/Kconfig | 67 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/usb/gadget/g_dnl.c | 6 +++--- drivers/usb/musb-new/Kconfig | 1 + include/configs/am335x_evm.h | 9 --------- include/configs/am3517_evm.h | 1 - include/configs/am43xx_evm.h | 26 ++++++++++++-------------- include/configs/baltos.h | 9 --------- include/configs/bav335x.h | 9 --------- include/configs/bcm28155_ap.h | 7 ------- include/configs/cgtqmx6eval.h | 8 -------- include/configs/colibri_vf.h | 7 ------- include/configs/corvus.h | 10 ---------- include/configs/dra7xx_evm.h | 13 ------------- include/configs/exynos4-common.h | 11 +---------- include/configs/gw_ventana.h | 9 --------- include/configs/kc1.h | 13 ------------- include/configs/kwb.h | 2 -- include/configs/ma5d4evk.h | 2 -- include/configs/mx6sabre_common.h | 8 -------- include/configs/mx7dsabresd.h | 8 -------- include/configs/nitrogen6x.h | 9 --------- include/configs/novena.h | 2 -- include/configs/odroid_xu3.h | 15 --------------- include/configs/omap3_beagle.h | 7 ------- include/configs/omap3_logic.h | 7 ------- include/configs/omap5_uevm.h | 13 ------------- include/configs/pcm051.h | 2 -- include/configs/pengwyn.h | 3 --- include/configs/s5p_goni.h | 10 ++-------- include/configs/s5pc210_universal.h | 2 -- include/configs/sama5d2_xplained.h | 2 -- include/configs/sama5d3xek.h | 2 -- include/configs/sama5d4_xplained.h | 2 -- include/configs/sama5d4ek.h | 2 -- include/configs/sansa_fuze_plus.h | 3 --- include/configs/siemens-am33x-common.h | 7 ------- include/configs/smartweb.h | 7 ------- include/configs/sniper.h | 13 ------------- include/configs/socfpga_common.h | 15 ++------------- include/configs/sunxi-common.h | 10 ---------- include/configs/taurus.h | 7 ------- include/configs/tbs2910.h | 7 ------- include/configs/tegra-common-usb-gadget.h | 13 ------------- include/configs/tseries.h | 2 -- include/configs/vinco.h | 2 -- include/configs/warp.h | 8 -------- include/configs/xfi3.h | 3 --- include/configs/xilinx_zynqmp.h | 10 ---------- include/configs/zynq-common.h | 7 ------- 163 files changed, 709 insertions(+), 352 deletions(-) create mode 100644 drivers/usb/dwc3/Kconfig Tested with tests/py DFU and UMS on Odroid XU3 target board. -- Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group

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[U-Boot] is there an official MAINTAINER for u-boot POST support?
by Robert P. J. Day 14 Apr '16

14 Apr '16

as i posted sort of recently, i'm playing with the POST tests for the first time and it's clear that the docs (doc/README.POST) is a bit out of date, so i'm willing to submit a patch or two to bring it at least a bit closer to current. there is (AFAICT) no official maintainer for the POST stuff, so does one just ask questions on this general list? i don't want to bore people with POST-related questions if there's a more specific forum for that stuff. thank you kindly. rday -- ======================================================================== Robert P. J. Day Ottawa, Ontario, CANADA http://crashcourse.ca Twitter: http://twitter.com/rpjday LinkedIn: http://ca.linkedin.com/in/rpjday ========================================================================

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[U-Boot] [PATCH v3 0/2] Amlogic Meson GXBaby and ODROID-C2 support
by Beniamino Galvani 14 Apr '16

14 Apr '16

Hi, this series adds a very basic support for Amlogic S905 SoC (GXBaby) and for the ODROID-C2 board [1], and is based on u-boot sources available from the board vendor [2]. At the moment the only supported devices are the integrated UART and Ethernet adapter. Changes since v2: - squashed all platform patches into a single one - got rid of additional non-upstream DTS node for ethernet - improved board README - added macros for SoC registers fields Changes since v1: - updated DTS files from Linux kernel - added Ethernet support - first 16MiB of RAM are now marked as unavailable; this seems to be required to successfully boot Linux - fixed typo in config file [1] http://www.hardkernel.com/main/products/prdt_info.php?g_code=G145457216438 [2] https://github.com/hardkernel/u-boot/tree/odroidc2-v2015.01 Beniamino Galvani (2): net: designware: fix descriptor layout and warnings on 64-bit archs arm: add initial support for Amlogic Meson and ODROID-C2 arch/arm/Kconfig | 5 + arch/arm/Makefile | 1 + arch/arm/dts/Makefile | 2 + arch/arm/dts/meson-gxbb-odroidc2.dts | 69 +++++++++++++ arch/arm/dts/meson-gxbb.dtsi | 178 +++++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-meson/gxbb.h | 77 ++++++++++++++ arch/arm/mach-meson/Kconfig | 31 ++++++ arch/arm/mach-meson/Makefile | 7 ++ arch/arm/mach-meson/board.c | 65 ++++++++++++ board/hardkernel/odroid-c2/Kconfig | 12 +++ board/hardkernel/odroid-c2/MAINTAINERS | 6 ++ board/hardkernel/odroid-c2/Makefile | 7 ++ board/hardkernel/odroid-c2/README | 60 +++++++++++ board/hardkernel/odroid-c2/odroid-c2.c | 53 ++++++++++ configs/odroid-c2_defconfig | 23 +++++ drivers/net/designware.c | 54 +++++----- drivers/net/designware.h | 4 +- drivers/serial/Kconfig | 15 +++ drivers/serial/Makefile | 1 + drivers/serial/serial_meson.c | 162 ++++++++++++++++++++++++++++++ include/configs/odroid-c2.h | 55 ++++++++++ 21 files changed, 858 insertions(+), 29 deletions(-) create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts create mode 100644 arch/arm/dts/meson-gxbb.dtsi create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h create mode 100644 arch/arm/mach-meson/Kconfig create mode 100644 arch/arm/mach-meson/Makefile create mode 100644 arch/arm/mach-meson/board.c create mode 100644 board/hardkernel/odroid-c2/Kconfig create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS create mode 100644 board/hardkernel/odroid-c2/Makefile create mode 100644 board/hardkernel/odroid-c2/README create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c create mode 100644 configs/odroid-c2_defconfig create mode 100644 drivers/serial/serial_meson.c create mode 100644 include/configs/odroid-c2.h -- 2.7.3

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