April 2016 - U-Boot

[U-Boot] [PATCH v3 2/2] m68k: add DM model serial driver
by Angelo Dureghello 27 Apr '16

27 Apr '16

Boards can now use DM serial driver, or still legacy mcf uart driver version. Signed-off-by: Angelo Dureghello <angelo(a)sysam.it> --- Changes for v2: - remove while loops in putc and getc, replacing with return -EAGAIN - remove unneeded ifdef Changes for v3: - no changes --- drivers/serial/mcfuart.c | 188 ++++++++++++++++++++++++++++++++++++----------- 1 file changed, 144 insertions(+), 44 deletions(-) diff --git a/drivers/serial/mcfuart.c b/drivers/serial/mcfuart.c index 407354f..059cb0f 100644 --- a/drivers/serial/mcfuart.c +++ b/drivers/serial/mcfuart.c @@ -2,6 +2,9 @@ * (C) Copyright 2004-2007 Freescale Semiconductor, Inc. * TsiChung Liew, Tsi-Chung.Liew(a)freescale.com. * + * Modified to add device model (DM) support + * (C) Copyright 2015 Angelo Dureghello <angelo(a)sysam.it> + * * SPDX-License-Identifier: GPL-2.0+ */ @@ -11,9 +14,10 @@ */ #include <common.h> +#include <dm.h> +#include <dm/platform_data/serial_coldfire.h> #include <serial.h> #include <linux/compiler.h> - #include <asm/immap.h> #include <asm/uart.h> @@ -21,91 +25,110 @@ DECLARE_GLOBAL_DATA_PTR; extern void uart_port_conf(int port); -static int mcf_serial_init(void) +static int mcf_serial_init_common(uart_t *uart, int port_idx, int baudrate) { - volatile uart_t *uart; u32 counter; - uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); - - uart_port_conf(CONFIG_SYS_UART_PORT); + uart_port_conf(port_idx); /* write to SICR: SIM2 = uart mode,dcd does not affect rx */ - uart->ucr = UART_UCR_RESET_RX; - uart->ucr = UART_UCR_RESET_TX; - uart->ucr = UART_UCR_RESET_ERROR; - uart->ucr = UART_UCR_RESET_MR; + writeb(UART_UCR_RESET_RX, &uart->ucr); + writeb(UART_UCR_RESET_TX, &uart->ucr); + writeb(UART_UCR_RESET_ERROR, &uart->ucr); + writeb(UART_UCR_RESET_MR, &uart->ucr); __asm__("nop"); - uart->uimr = 0; + writeb(0, &uart->uimr); /* write to CSR: RX/TX baud rate from timers */ - uart->ucsr = (UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK); + writeb(UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK, &uart->ucsr); - uart->umr = (UART_UMR_BC_8 | UART_UMR_PM_NONE); - uart->umr = UART_UMR_SB_STOP_BITS_1; + writeb(UART_UMR_BC_8 | UART_UMR_PM_NONE, &uart->umr); + writeb(UART_UMR_SB_STOP_BITS_1, &uart->umr); /* Setting up BaudRate */ - counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2)); - counter = counter / gd->baudrate; + counter = (u32) ((gd->bus_clk / 32) + (baudrate / 2)); + counter = counter / baudrate; /* write to CTUR: divide counter upper byte */ - uart->ubg1 = (u8) ((counter & 0xff00) >> 8); + writeb((u8)((counter & 0xff00) >> 8), &uart->ubg1); /* write to CTLR: divide counter lower byte */ - uart->ubg2 = (u8) (counter & 0x00ff); + writeb((u8)(counter & 0x00ff), &uart->ubg2); - uart->ucr = (UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED); + writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, &uart->ucr); return (0); } +static void mcf_serial_setbrg_common(uart_t *uart, int baudrate) +{ + u32 counter; + + /* Setting up BaudRate */ + counter = (u32) ((gd->bus_clk / 32) + (baudrate / 2)); + counter = counter / baudrate; + + /* write to CTUR: divide counter upper byte */ + writeb(((counter & 0xff00) >> 8), &uart->ubg1); + /* write to CTLR: divide counter lower byte */ + writeb((counter & 0x00ff), &uart->ubg2); + + writeb(UART_UCR_RESET_RX, &uart->ucr); + writeb(UART_UCR_RESET_TX, &uart->ucr); + + writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, &uart->ucr); +} + +#ifndef CONFIG_DM_SERIAL + +static int mcf_serial_init(void) +{ + uart_t *uart_base; + int port_idx; + + uart_base = (uart_t *)CONFIG_SYS_UART_BASE; + port_idx = CONFIG_SYS_UART_PORT; + + return mcf_serial_init_common(uart_base, port_idx, gd->baudrate); +} + static void mcf_serial_putc(const char c) { - volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); + uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE; if (c == '\n') serial_putc('\r'); /* Wait for last character to go. */ - while (!(uart->usr & UART_USR_TXRDY)) ; + while (!(readb(&uart->usr) & UART_USR_TXRDY)) + ; - uart->utb = c; + writeb(c, &uart->utb); } static int mcf_serial_getc(void) { - volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); + uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE; /* Wait for a character to arrive. */ - while (!(uart->usr & UART_USR_RXRDY)) ; - return uart->urb; -} - -static int mcf_serial_tstc(void) -{ - volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); + while (!(readb(&uart->usr) & UART_USR_RXRDY)) + ; - return (uart->usr & UART_USR_RXRDY); + return readb(&uart->urb); } static void mcf_serial_setbrg(void) { - volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); - u32 counter; - - /* Setting up BaudRate */ - counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2)); - counter = counter / gd->baudrate; + uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE; - /* write to CTUR: divide counter upper byte */ - uart->ubg1 = ((counter & 0xff00) >> 8); - /* write to CTLR: divide counter lower byte */ - uart->ubg2 = (counter & 0x00ff); + mcf_serial_setbrg_common(uart, gd->baudrate); +} - uart->ucr = UART_UCR_RESET_RX; - uart->ucr = UART_UCR_RESET_TX; +static int mcf_serial_tstc(void) +{ + uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE; - uart->ucr = UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED; + return readb(&uart->usr) & UART_USR_RXRDY; } static struct serial_device mcf_serial_drv = { @@ -128,3 +151,80 @@ __weak struct serial_device *default_serial_console(void) { return &mcf_serial_drv; } + +#endif + +#ifdef CONFIG_DM_SERIAL + +static int coldfire_serial_probe(struct udevice *dev) +{ + struct coldfire_serial_platdata *plat = dev->platdata; + + return mcf_serial_init_common((uart_t *)plat->base, + plat->port, plat->baudrate); +} + +static int coldfire_serial_putc(struct udevice *dev, const char ch) +{ + struct coldfire_serial_platdata *plat = dev->platdata; + uart_t *uart = (uart_t *)plat->base; + + /* Wait for last character to go. */ + if (!(readb(&uart->usr) & UART_USR_TXRDY)) + return -EAGAIN; + + writeb(ch, &uart->utb); + + return 0; +} + +static int coldfire_serial_getc(struct udevice *dev) +{ + struct coldfire_serial_platdata *plat = dev->platdata; + uart_t *uart = (uart_t *)(plat->base); + + /* Wait for a character to arrive. */ + if (!(readb(&uart->usr) & UART_USR_RXRDY)) + return -EAGAIN; + + return readb(&uart->urb); +} + +int coldfire_serial_setbrg(struct udevice *dev, int baudrate) +{ + struct coldfire_serial_platdata *plat = dev->platdata; + uart_t *uart = (uart_t *)(plat->base); + + mcf_serial_setbrg_common(uart, baudrate); + + return 0; +} + +static int coldfire_serial_pending(struct udevice *dev, bool input) +{ + struct coldfire_serial_platdata *plat = dev->platdata; + uart_t *uart = (uart_t *)(plat->base); + + if (input) + return readb(&uart->usr) & UART_USR_RXRDY ? 1 : 0; + else + return readb(&uart->usr) & UART_USR_TXRDY ? 0 : 1; + + return 0; +} + +static const struct dm_serial_ops coldfire_serial_ops = { + .putc = coldfire_serial_putc, + .pending = coldfire_serial_pending, + .getc = coldfire_serial_getc, + .setbrg = coldfire_serial_setbrg, +}; + +U_BOOT_DRIVER(serial_coldfire) = { + .name = "serial_coldfire", + .id = UCLASS_SERIAL, + .probe = coldfire_serial_probe, + .ops = &coldfire_serial_ops, + .flags = DM_FLAG_PRE_RELOC, +}; +#endif -- 2.7.0.rc3

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[U-Boot] imx6 devices failing to build with 2016.05
by Peter Robinson 27 Apr '16

27 Apr '16

Hi All, I didn't look closely when it happened with rc1 because I saw a pull req from Stefano shortly afterwards and I decided to try again after that landed. With rc3 I'm still seeing the same issue. Basically all the i.MX6 devices (cm_fx6,mx6cuboxi,novena,riotboard,udoo,wandboard,warp) we currently build for Fedora are failing to build. It looks very similar to some 64 bit math issues [1] [2] a search gives me although from the linker command I'm failing to see what code is at fault so any assistance in debugging this would be great. I've checked it failed on < gcc6 too and 2016.03 builds so it appears a regression in 05rcX. The (for cuboxi example) basic error is: ld.bfd -pie --gc-sections -Bstatic -Ttext 0x17800000 -o u-boot -T u-boot.lds arch/arm/cpu/armv7/start.o --start-group arch/arm/cpu/built-in.o arch/arm/cpu/armv7/built-in.o arch/arm/imx-common/built-in.o arch/arm/lib/built-in.o board/solidrun/mx6cuboxi/built-in.o cmd/built-in.o common/built-in.o disk/built-in.o drivers/built-in.o drivers/dma/built-in.o drivers/gpio/built-in.o drivers/i2c/built-in.o drivers/mmc/built-in.o drivers/mtd/built-in.o drivers/mtd/onenand/built-in.o drivers/mtd/spi/built-in.o drivers/net/built-in.o drivers/net/phy/built-in.o drivers/pci/built-in.o drivers/power/built-in.o drivers/power/battery/built-in.o drivers/power/fuel_gauge/built-in.o drivers/power/mfd/built-in.o drivers/power/pmic/built-in.o drivers/power/regulator/built-in.o drivers/serial/built-in.o drivers/spi/built-in.o drivers/usb/common/built-in.o drivers/usb/dwc3/built-in.o drivers/usb/emul/built-in.o drivers/usb/eth/built-in.o drivers/usb/gadget/built-in.o drivers/usb/gadget/udc/built-in.o drivers/usb/host/built-in.o drivers/usb/musb-new/built-in.o drivers/usb/musb/built-in.o drivers/usb/phy/built-in.o drivers/usb/ulpi/built-in.o fs/built-in.o lib/built-in.o net/built-in.o test/built-in.o test/dm/built-in.o --end-group arch/arm/lib/eabi_compat.o -L /usr/lib/gcc/armv7hl-redhat-linux-gnueabi/6.0.0 -lgcc -Map u-boot.map ld.bfd: error: /usr/lib/gcc/armv7hl-redhat-linux-gnueabi/6.0.0/libgcc.a(_udivmoddi4.o) uses VFP register arguments, u-boot does not ld.bfd: failed to merge target specific data of file /usr/lib/gcc/armv7hl-redhat-linux-gnueabi/6.0.0/libgcc.a(_udivmoddi4.o) Full log at https://pbrobinson.fedorapeople.org/u-boot-mx6cuboxi-fail.txt Peter [1] http://u-boot.10912.n7.nabble.com/Cannot-compile-arm-u-boot-with-hardfloat-… [2] http://lists.denx.de/pipermail/u-boot/2015-June/216480.html

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[U-Boot] [PATCH] fs: ext4: fix symlink read function
by Stefan Roese 27 Apr '16

27 Apr '16

From: Ronald Zachariah <rozachar(a)cisco.com> The function ext4fs_read_symlink was unable to handle a symlink which had target name of exactly 60 characters. Signed-off-by: Ronald Zachariah <rozachar(a)cisco.com> Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Stephen Warren <swarren(a)nvidia.com> Cc: Tom Rini <trini(a)konsulko.com> --- fs/ext4/ext4_common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c index 84fba76..868c281 100644 --- a/fs/ext4/ext4_common.c +++ b/fs/ext4/ext4_common.c @@ -2040,7 +2040,7 @@ static char *ext4fs_read_symlink(struct ext2fs_node *node) if (!symlink) return 0; - if (__le32_to_cpu(diro->inode.size) <= 60) { + if (__le32_to_cpu(diro->inode.size) < 60) { strncpy(symlink, diro->inode.b.symlink, __le32_to_cpu(diro->inode.size)); } else { -- 2.8.1

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[U-Boot] [PATCH v2] dm: core: Add dev_get_addr_ptr() to return a pointer to the reg address
by Stefan Roese 27 Apr '16

27 Apr '16

On some platforms (e.g. x86), the return value of dev_get_addr() can't be assigned to a pointer type variable directly. As there might be a difference between the size of fdt_addr_t and the pointer type. On x86 for example, "fdt_addr_t" is 64bit but "void *" only 32bit. So assigning the register base directly in dev_get_addr() results in this compilation warning: warning: cast to pointer from integer of different size This patch introduces the new function dev_get_addr_ptr() that returns a pointer to the 'reg' address that can be used by drivers in this case. Signed-off-by: Stefan Roese <sr(a)denx.de> Reviewed-by: Simon Glass <sjg(a)chromium.org> --- v2: - Mention error condition in function prototype as suggested by Simon drivers/core/device.c | 5 +++++ include/dm/device.h | 10 ++++++++++ 2 files changed, 15 insertions(+) diff --git a/drivers/core/device.c b/drivers/core/device.c index 269087a..1322991 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -673,6 +673,11 @@ fdt_addr_t dev_get_addr(struct udevice *dev) return dev_get_addr_index(dev, 0); } +void *dev_get_addr_ptr(struct udevice *dev) +{ + return (void *)(uintptr_t)dev_get_addr_index(dev, 0); +} + bool device_has_children(struct udevice *dev) { return !list_empty(&dev->child_head); diff --git a/include/dm/device.h b/include/dm/device.h index dad7591..8970fc0 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -454,6 +454,16 @@ int device_find_next_child(struct udevice **devp); fdt_addr_t dev_get_addr(struct udevice *dev); /** + * dev_get_addr_ptr() - Return pointer to the address of the reg property + * of a device + * + * @dev: Pointer to a device + * + * @return Pointer to addr, or NULL if there is no such property + */ +void *dev_get_addr_ptr(struct udevice *dev); + +/** * dev_get_addr_index() - Get the indexed reg property of a device * * @dev: Pointer to a device -- 2.8.1

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[U-Boot] [ANN] v2016.05-rc3
by Tom Rini 27 Apr '16

27 Apr '16

Hey all, I know I did v2016.05-rc2 just last week, but that's because I was off schedule. We are two weeks out from scheduled release, so he's -rc3. Please test this everywhere you can. The diffstat here is large due to moving things from config.h to Kconfig but the binary delta is not. At this point forward, I expect things that come in to be bug fixes of a fairly important nature. Oh, and I'm going to re-generate the defconfigs and let people know about the surprises that spring up. Correcting those is also fine. Thanks all! -- Tom

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[U-Boot] [PATCH] igep00x0: Use all SRAM available for SPL.
by Enric Balletbo i Serra 27 Apr '16

27 Apr '16

Internal SRAM starts at 0x40200000 and ends at 0x4020FFFF, so there are 64KB available to be used for SPL. This will also help some compilers to fit all the code into the allocated space. Signed-off-by: Enric Balletbo i Serra <enric.balletbo(a)collabora.com> --- include/configs/omap3_igep00x0.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 5da50a5..2459064 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -19,6 +19,13 @@ #include <configs/ti_omap3_common.h> #include <asm/mach-types.h> +/* SRAM starts at 0x40200000 and ends at 0x4020FFFF (64KB) */ +#undef CONFIG_SPL_MAX_SIZE +#undef CONFIG_SPL_TEXT_BASE + +#define CONFIG_SPL_MAX_SIZE (64*1024) +#define CONFIG_SPL_TEXT_BASE 0x40200000 + /* * Display CPU and Board information */ -- 2.1.0

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[U-Boot] [PATCH v3 1/7] armv8: fsl-layerscape: add i/d-cache enable function to enable_caches
by Zhiqiang Hou 27 Apr '16

27 Apr '16

From: Hou Zhiqiang <Zhiqiang.Hou(a)freescale.com> This function assume that the d-cache and MMU has been enabled earlier, so it just created MMU table in main memory. But the assumption is not always correct, for example, the early setup is done in EL3, while enable_caches() is called when the PE has turned into another EL. Define the function mmu_setup() for fsl-layerscape to cover the weak one. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou(a)freescale.com> --- V3: - no change arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index d939900..672a453 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -425,15 +425,21 @@ int arch_cpu_init(void) return 0; } +void mmu_setup(void) +{ + final_mmu_setup(); +} + /* - * This function is called from lib/board.c. - * It recreates MMU table in main memory. MMU and d-cache are enabled earlier. - * There is no need to disable d-cache for this operation. + * This function is called from common/board_r.c. + * It recreates MMU table in main memory. */ void enable_caches(void) { - final_mmu_setup(); + mmu_setup(); __asm_invalidate_tlb_all(); + icache_enable(); + dcache_enable(); } #endif -- 2.1.0.27.g96db324

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[U-Boot] U-boot & AMP config
by Badr El Hiouel 27 Apr '16

27 Apr '16

Hello, I want to run a AMP configuration on my Zebdoard ( zynq ) I saw xilinx application notes about this. But, my question is : Is it possible for u-boot to boot two images on two seperate processors ? Thank you ________ *Badr EL HIOUEL* Mail : elh.badr(a)gmail.com

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[U-Boot] [PATCH] net: Add mv88e60xx support to the mv88e61xx driver
by Joshua Scott 26 Apr '16

26 Apr '16

The Marvell Link Street mv88e60xx is a series of FastEthernet switch chips, some of which also support Gigabit ports. It is similar to the mv88e61xx series which support Gigabit on all ports. There is already a driver for the mv88e61xx in U-Boot, and this patch updates it to also work with the mv88e60xx. The main change that was required was the size of the port bitmaps. Previously, 8-bit port bitmaps were in use, as the driver had only been used with six-port mv88e61xx devices. This has been changed so that 16-bit port bitmaps are now used, which covers the largest port-counts available for the mv88e60xx / mv88e61xx. Reviewed-by: Chris Packham <chris.packham(a)alliedtelesis.co.nz> Signed-off-by: Joshua Scott <joshua.scott(a)alliedtelesis.co.nz> --- drivers/net/phy/mv88e61xx.c | 29 +++++++++++++++++++++-------- drivers/net/phy/mv88e61xx.h | 2 -- include/netdev.h | 20 +++++++++++++++----- 3 files changed, 36 insertions(+), 15 deletions(-) diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c index 302abe8..79204f3 100644 --- a/drivers/net/phy/mv88e61xx.c +++ b/drivers/net/phy/mv88e61xx.c @@ -215,17 +215,17 @@ static void mv88e61xx_port_vlan_config(struct mv88e61xx_config *swconfig) u32 port_mask = swconfig->ports_enabled; /* apply internal vlan config */ - for (prt = 0; prt < MV88E61XX_MAX_PORTS_NUM; prt++) { + for (prt = 0; prt < swconfig->numports; prt++) { /* only for enabled ports */ if ((1 << prt) & port_mask) { /* take vlan map from swconfig */ - u8 vlanmap = swconfig->vlancfg[prt]; + u16 vlanmap = swconfig->vlancfg[prt]; /* remove disabled ports from vlan map */ vlanmap &= swconfig->ports_enabled; /* apply vlan map to port */ RD_SWITCH_PORT_REG(name, prt, MV88E61XX_PRT_VMAP_REG, &reg); - reg &= ~((1 << MV88E61XX_MAX_PORTS_NUM) - 1); + reg &= ~((1 << swconfig->numports) - 1); reg |= vlanmap; WR_SWITCH_PORT_REG(name, prt, MV88E61XX_PRT_VMAP_REG, reg); @@ -331,32 +331,44 @@ int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig) return -1; } - if (!(swconfig->cpuport & ((1 << 4) | (1 << 5)))) { + if (!(swconfig->cpuport & ((1 << 4) | (1 << 5) | (1 << 10)))) { swconfig->cpuport = (1 << 5); printf("Invalid cpu port config, using default port5\n"); } RD_SWITCH_PORT_REG(name, 0, MII_PHYSID2, &reg); switch (reg &= 0xfff0) { + case 0x0980: + idstr = "88E6096"; + swconfig->numports = 0x0b; + break; + case 0x0990: + idstr = "88E6097"; + swconfig->numports = 0x0b; + break; case 0x1610: idstr = "88E6161"; + swconfig->numports = 0x06; break; case 0x1650: idstr = "88E6165"; + swconfig->numports = 0x06; break; case 0x1210: idstr = "88E6123"; + swconfig->numports = 0x06; /* ports 2,3,4 not available */ swconfig->ports_enabled &= 0x023; break; default: /* Could not detect switch id */ idstr = "88E61??"; + swconfig->numports = 0x06; break; } /* be sure all ports are disabled */ - for (prt = 0; prt < MV88E61XX_MAX_PORTS_NUM; prt++) { + for (prt = 0; prt < swconfig->numports; prt++) { RD_SWITCH_PORT_REG(name, prt, MV88E61XX_PRT_CTRL_REG, &reg); reg &= ~0x3; WR_SWITCH_PORT_REG(name, prt, MV88E61XX_PRT_CTRL_REG, reg); @@ -405,12 +417,13 @@ int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig) WR_SWITCH_PORT_REG(name, 5, MV88E61XX_PCS_CTRL_REG, 0x3e); } - for (prt = 0; prt < MV88E61XX_MAX_PORTS_NUM; prt++) { + for (prt = 0; prt < swconfig->numports; prt++) { /* configure port's PHY */ if (!((1 << prt) & swconfig->cpuport)) { - /* port 4 has phy 6, not 4 */ - int phy = (prt == 4) ? 6 : prt; + /* 88e61xx: port 4 has phy 6, not 4 */ + int phy = (swconfig->numports == 6 && + prt == 4) ? 6 : prt; if (mv88361xx_powerup(swconfig, phy)) return -1; if (mv88361xx_reverse_mdipn(swconfig, phy)) diff --git a/drivers/net/phy/mv88e61xx.h b/drivers/net/phy/mv88e61xx.h index 9c62e4a..b289f21 100644 --- a/drivers/net/phy/mv88e61xx.h +++ b/drivers/net/phy/mv88e61xx.h @@ -11,8 +11,6 @@ #include <miiphy.h> -#define MV88E61XX_CPU_PORT 0x5 - #define MV88E61XX_PHY_TIMEOUT 100000 /* port dev-addr (= port + 0x10) */ diff --git a/include/netdev.h b/include/netdev.h index 34651ab..cbd0420 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -154,7 +154,9 @@ static inline int pci_eth_init(bd_t *bis) #if defined(CONFIG_MV88E61XX_SWITCH) /* constants for any 88E61xx switch */ -#define MV88E61XX_MAX_PORTS_NUM 6 +/* Allow enough space in the struct to fit 11 ports, as this is + * the number used in the mv88e60xx */ +#define MV88E61XX_MAX_PORTS_NUM 0x0b enum mv88e61xx_cfg_mdip { MV88E61XX_MDIP_NOCHANGE, @@ -180,13 +182,14 @@ enum mv88e61xx_cfg_prtstt { struct mv88e61xx_config { char *name; - u8 vlancfg[MV88E61XX_MAX_PORTS_NUM]; + u16 vlancfg[MV88E61XX_MAX_PORTS_NUM]; enum mv88e61xx_cfg_rgmiid rgmii_delay; enum mv88e61xx_cfg_prtstt portstate; enum mv88e61xx_cfg_ledinit led_init; enum mv88e61xx_cfg_mdip mdip; + u32 numports; u32 ports_enabled; - u8 cpuport; + u32 cpuport; }; /* @@ -196,10 +199,17 @@ struct mv88e61xx_config { */ /* Switch mode : routes any port to any port */ -#define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F } +#define MV88E61XX_VLANCFG_SWITCH { 0x003F, 0x003F, 0x003F, 0x003F, 0x003F, \ + 0x003F, 0x0000, 0x0000, 0x0000, 0x0000, \ + 0x0000 } /* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */ -#define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F } +#define MV88E61XX_VLANCFG_ROUTER { 0x0020, 0x0020, 0x0020, 0x0020, 0x0020, \ + 0x001F, 0x0000, 0x0000, 0x0000, 0x0000, \ + 0x0000 } +#define MV88E60XX_VLANCFG_ROUTER { 0x0400, 0x0400, 0x0400, 0x0400, 0x0400, \ + 0x0400, 0x0400, 0x0400, 0x0400, 0x0400, \ + 0x03ff } int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig); #endif /* CONFIG_MV88E61XX_SWITCH */ -- 1.9.1

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[U-Boot] [RFC PATCH] net: rtl8169: allow multiple devices
by Stephen Warren 26 Apr '16

26 Apr '16

From: Stephen Warren <swarren(a)nvidia.com> Currently, if multiple rtl8169 devices exist on the PCI bus, they all get the same name, which prevents the user from selecting which to use via the ethact environment variable. Port the auto-naming code from the e1000 driver to solve this. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- Having to put this code into each Ethernet driver seems a bit odd. Surely the core should handle this; should eth_get_dev_by_name() parse "#n" out of the ethact value and compare it to the device sequence number? It looks like I should be able to set ethprime to e.g. eth0, eth1, etc. and this should work. However, I couldn't get ethprime to behave sensibly, and I'm not sure what its semantics are supposed to be. Specifically, ethprime seems to only be used if ethact isn't set, yet accessing the network (e.g. running "dhcp zImage") seems to set ethact, thus preventing any further modification to ethprime from having any effect. Equally, simply running e.g. "dhcp zImage" twice in a row doesn't seem to work; perhaps the subsequent attempts perform another lookup by name from ethact rather than just using the same device pointer from before? Is ethprime intended to be functional at present, or is it some legacy feature that's bit-rotted and should be removed? --- drivers/net/rtl8169.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c index 163b9df55c9b..0ccddcabc478 100644 --- a/drivers/net/rtl8169.c +++ b/drivers/net/rtl8169.c @@ -1192,6 +1192,22 @@ static int rtl8169_eth_probe(struct udevice *dev) return 0; } +static int rtl8169_eth_bind(struct udevice *dev) +{ + static int num_cards; + char name[20]; + + /* + * A simple way to number the devices. When device tree is used this + * is unnecessary, but when the device is just discovered on the PCI + * bus we need a name. We could instead have the uclass figure out + * which devices are different and number them. + */ + sprintf(name, "RTL8169#%d", num_cards++); + + return device_set_name(dev, name); +} + static const struct eth_ops rtl8169_eth_ops = { .start = rtl8169_eth_start, .send = rtl8169_eth_send, @@ -1208,6 +1224,7 @@ U_BOOT_DRIVER(eth_rtl8169) = { .name = "eth_rtl8169", .id = UCLASS_ETH, .of_match = rtl8169_eth_ids, + .bind = rtl8169_eth_bind, .probe = rtl8169_eth_probe, .ops = &rtl8169_eth_ops, .priv_auto_alloc_size = sizeof(struct rtl8169_private), -- 2.8.1

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