April 2016 - U-Boot

[U-Boot] [PATCH] drivers: net: ldpaa: Memset pools_params as "0" before use
by Prabhakar Kushwaha 03 May '16

03 May '16

Memset pools_params as "0" to avoid garbage value in dpni_set_pools. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> Reported-by: Jose Rivera <german.rivera(a)nxp.com> --- drivers/net/ldpaa_eth/ldpaa_eth.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c index bc7f8bb..75b2b6b 100644 --- a/drivers/net/ldpaa_eth/ldpaa_eth.c +++ b/drivers/net/ldpaa_eth/ldpaa_eth.c @@ -920,6 +920,7 @@ static int ldpaa_dpni_bind(struct ldpaa_eth_priv *priv) struct dpni_tx_conf_cfg tx_conf_cfg; int err = 0; + memset(&pools_params, 0, sizeof(pools_params)); pools_params.num_dpbp = 1; pools_params.pools[0].dpbp_id = (uint16_t)dflt_dpbp->dpbp_attr.id; pools_params.pools[0].buffer_size = LDPAA_ETH_RX_BUFFER_SIZE; -- 1.9.1

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[U-Boot] [PATCH] omap3: Reduce logic/overo SPL max image size
by Tom Rini 03 May '16

03 May '16

While the OMAP3 has 64KiB of SRAM, per the TRM the download area is only from 0x40200000 to 0x4020F000 and exceeding that will cause failure to boot. Further, we need to make sure that we don't run into SRAM_SCRATCH_SPACE_ADDR as once SPL is running we will write values there and would corrupt our running image. Cc: Adam Ford <aford173(a)gmail.com> Cc: Steve Sakoman <sakoman(a)gmail.com> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- include/configs/omap3_logic.h | 2 +- include/configs/omap3_overo.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 055dcb7..6c79643 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -34,7 +34,7 @@ #undef CONFIG_SPL_TEXT_BASE #undef CONFIG_SPL_MAX_SIZE #define CONFIG_SPL_TEXT_BASE 0x40200000 -#define CONFIG_SPL_MAX_SIZE (64 * 1024) +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE) /* Display CPU and Board information */ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index c066eae5..fbd0c2a 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -12,9 +12,9 @@ #include <configs/ti_omap3_common.h> #undef CONFIG_SPL_MAX_SIZE -#define CONFIG_SPL_MAX_SIZE (64*1024) #undef CONFIG_SPL_TEXT_BASE #define CONFIG_SPL_TEXT_BASE 0x40200000 +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE) #define CONFIG_BCH -- 1.9.1

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[U-Boot] [RFC PATCH] SPL: FIT: Enable SPL_FIT_LOAD for sd bootmode for fat partions
by Michal Simek 03 May '16

03 May '16

Support U-Boot SPL to load FIT image from fat partition. Fit image can be setup via CONFIG_SPL_FS_LOAD_KERNEL_NAME. Falcon mode is not supported. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- common/spl/spl_fat.c | 50 ++++++++++++++++++++++++++++++++++++++++++++------ fs/fat/fat.c | 4 ++-- 2 files changed, 46 insertions(+), 8 deletions(-) diff --git a/common/spl/spl_fat.c b/common/spl/spl_fat.c index d16cd540e38a..4e319c5fa470 100644 --- a/common/spl/spl_fat.c +++ b/common/spl/spl_fat.c @@ -13,6 +13,7 @@ #include <spl.h> #include <asm/u-boot.h> #include <fat.h> +#include <libfdt.h> #include <errno.h> #include <image.h> @@ -39,6 +40,29 @@ static int spl_register_fat_device(struct blk_desc *block_dev, int partition) return err; } +#ifdef CONFIG_SPL_LOAD_FIT +static ulong spl_fat_file_read(struct spl_load_info *load, ulong sector, + ulong count, void *buf) +{ + int err; + loff_t actread; + char *filename = (char *)load->priv; + + debug("%s: name %s, sector %lx, count %lx, buf %lx\n", + __func__, filename, sector, count, (ulong)buf); + + err = file_fat_read_at(filename, sector, buf, count, &actread); + if (err < 0) { + printf("%s: error reading image %s, err - %d\n", + __func__, filename, err); + return err; + } + + debug("actread %lx\n", (ulong)actread); + return actread; +} +#endif + int spl_load_image_fat(struct blk_desc *block_dev, int partition, const char *filename) @@ -57,16 +81,29 @@ int spl_load_image_fat(struct blk_desc *block_dev, if (err <= 0) goto end; - spl_parse_image_header(header); + if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) && + image_get_magic(header) == FDT_MAGIC) { + struct spl_load_info load; + + debug("Found FIT\n"); + load.priv = (char *)filename; + load.bl_len = 1; + load.read = spl_fat_file_read; + spl_load_simple_fit(&load, 0, header); + } else { + debug("Legacy image\n"); - err = file_fat_read(filename, (u8 *)(uintptr_t)spl_image.load_addr, 0); + spl_parse_image_header(header); + err = file_fat_read(filename, + (u8 *)(uintptr_t)spl_image.load_addr, 0); end: #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT - if (err <= 0) - printf("%s: error reading image %s, err - %d\n", - __func__, filename, err); + if (err <= 0) + printf("%s: error reading image %s, err - %d\n", + __func__, filename, err); #endif + } return (err <= 0); } @@ -81,6 +118,7 @@ int spl_load_image_fat_os(struct blk_desc *block_dev, int partition) if (err) return err; +#if !defined(CONFIG_SPL_LOAD_FIT) #if defined(CONFIG_SPL_ENV_SUPPORT) && defined(CONFIG_SPL_OS_BOOT) file = getenv("falcon_args_file"); if (file) { @@ -116,7 +154,7 @@ defaults: #endif return -1; } - +#endif return spl_load_image_fat(block_dev, partition, CONFIG_SPL_FS_LOAD_KERNEL_NAME); } diff --git a/fs/fat/fat.c b/fs/fat/fat.c index 600a90e30922..0d987e0465ee 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -281,9 +281,9 @@ get_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer, unsigned long size) if ((unsigned long)buffer & (ARCH_DMA_MINALIGN - 1)) { ALLOC_CACHE_ALIGN_BUFFER(__u8, tmpbuf, mydata->sect_size); - +#if !defined(CONFIG_SPL_LOAD_FIT) printf("FAT: Misaligned buffer address (%p)\n", buffer); - +#endif while (size >= mydata->sect_size) { ret = disk_read(startsect++, 1, tmpbuf); if (ret != 1) { -- 1.9.1

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[U-Boot] [PATCH] ARM: sama5d2: Implement boot device autodetection
by Marek Vasut 03 May '16

03 May '16

Implement support for saving ARM register R4 early during boot using save_boot_params . Implement support for decoding the stored register R4 value in spl_boot_device() to obtain boot device from which the SoC booted. This way, the SPL will always load U-Boot from the same device from which the SPL itself booted instead of using hard-coded boot device. This functionality is useful for example when booting sama5d2-xplained from SD card, where by default the SPL would try loading the U-Boot from eMMC and fail. This is because eMMC is on SDHCI0 (BOOT_DEVICE_MMC1), while SD slot is on SDHCI1 (BOOT_DEVICE_MMC2) and the SPL was hard-wired to always boot from BOOT_DEVICE_MMC1. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Andreas Bießmann <andreas.devel(a)googlemail.com> Cc: Wenyou Yang <wenyou.yang(a)atmel.com> --- arch/arm/mach-at91/Makefile | 2 +- arch/arm/mach-at91/bootparams_atmel.S | 18 ++++++++++++++++ arch/arm/mach-at91/include/mach/sama5d2.h | 12 +++++++++++ arch/arm/mach-at91/spl.c | 36 +++++++++++++++++++++++++++++++ 4 files changed, 67 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-at91/bootparams_atmel.S diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 4424523..d2abf31 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -9,7 +9,7 @@ obj-$(CONFIG_AT91SAM9G20) += sdram.o spl_at91.o obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o -obj-$(CONFIG_SAMA5D2) += mpddrc.o spl_atmel.o matrix.o atmel_sfr.o +obj-$(CONFIG_SAMA5D2) += bootparams_atmel.o mpddrc.o spl_atmel.o matrix.o atmel_sfr.o obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o atmel_sfr.o obj-y += spl.o diff --git a/arch/arm/mach-at91/bootparams_atmel.S b/arch/arm/mach-at91/bootparams_atmel.S new file mode 100644 index 0000000..568094b --- /dev/null +++ b/arch/arm/mach-at91/bootparams_atmel.S @@ -0,0 +1,18 @@ +/* + * Atmel SAMA5Dx boot parameter handling + * + * Copyright (c) 2016 Marek Vasut <marex(a)denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm-offsets.h> +#include <config.h> +#include <asm/system.h> +#include <linux/linkage.h> + +ENTRY(save_boot_params) + ldr r0, =bootrom_stash + str r4, [r0, #0] + b save_boot_params_ret +ENDPROC(save_boot_params) diff --git a/arch/arm/mach-at91/include/mach/sama5d2.h b/arch/arm/mach-at91/include/mach/sama5d2.h index dd5a2a7..e6d498c 100644 --- a/arch/arm/mach-at91/include/mach/sama5d2.h +++ b/arch/arm/mach-at91/include/mach/sama5d2.h @@ -225,6 +225,18 @@ /* No PMECC Galois table in ROM */ #define NO_GALOIS_TABLE_IN_ROM +/* Boot modes stored by BootROM in r4 */ +#define ATMEL_SAMA5D2_BOOT_FROM_OFF 0 +#define ATMEL_SAMA5D2_BOOT_FROM_MASK 0xf +#define ATMEL_SAMA5D2_BOOT_FROM_SPI (0 << 0) +#define ATMEL_SAMA5D2_BOOT_FROM_MCI (1 << 0) +#define ATMEL_SAMA5D2_BOOT_FROM_SMC (2 << 0) +#define ATMEL_SAMA5D2_BOOT_FROM_TWI (3 << 0) +#define ATMEL_SAMA5D2_BOOT_FROM_QSPI (4 << 0) + +#define ATMEL_SAMA5D2_BOOT_DEV_ID_OFF 4 +#define ATMEL_SAMA5D2_BOOT_DEV_ID_MASK 0xf + #ifndef __ASSEMBLY__ unsigned int get_chip_id(void); unsigned int get_extension_chip_id(void); diff --git a/arch/arm/mach-at91/spl.c b/arch/arm/mach-at91/spl.c index 27a405a..c4ed224 100644 --- a/arch/arm/mach-at91/spl.c +++ b/arch/arm/mach-at91/spl.c @@ -23,6 +23,40 @@ void at91_disable_wdt(void) } #endif +#if defined(CONFIG_SAMA5D2) +struct { + u32 r4; +} bootrom_stash __attribute__((section(".data"))); + +u32 spl_boot_device(void) +{ + u32 dev = (bootrom_stash.r4 >> ATMEL_SAMA5D2_BOOT_FROM_OFF) & + ATMEL_SAMA5D2_BOOT_FROM_MASK; + u32 off = (bootrom_stash.r4 >> ATMEL_SAMA5D2_BOOT_DEV_ID_OFF) & + ATMEL_SAMA5D2_BOOT_DEV_ID_MASK; + +#if defined(CONFIG_SYS_USE_MMC) + if (dev == ATMEL_SAMA5D2_BOOT_FROM_MCI) { + if (off == 0) + return BOOT_DEVICE_MMC1; + if (off == 1) + return BOOT_DEVICE_MMC2; + printf("ERROR: MMC controller %i not present!\n", dev); + hang(); + } +#endif + +#if defined(CONFIG_SYS_USE_SERIALFLASH) || defined(CONFIG_SYS_USE_SPIFLASH) + if (dev == ATMEL_SAMA5D2_BOOT_FROM_SPI) + return BOOT_DEVICE_SPI; +#endif + + printf("ERROR: SMC/TWI/QSPI boot device not supported!\n" + " Boot device %i, controller number %i\n", dev, off); + + return BOOT_DEVICE_NONE; +} +#else u32 spl_boot_device(void) { #ifdef CONFIG_SYS_USE_MMC @@ -34,12 +68,14 @@ u32 spl_boot_device(void) #endif return BOOT_DEVICE_NONE; } +#endif u32 spl_boot_mode(void) { switch (spl_boot_device()) { #ifdef CONFIG_SYS_USE_MMC case BOOT_DEVICE_MMC1: + case BOOT_DEVICE_MMC2: return MMCSD_MODE_FS; break; #endif -- 2.7.0

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[U-Boot] [PATCH 0/2] board: atmel: add SAMA5D2 PTC Engineering board
by Wenyou Yang 03 May '16

03 May '16

This board supports booting from NAND Flash and spi Flash. Wenyou Yang (2): ARM: at91: sama5d2: add macro & field definitions board: atmel: add SAMA5D2 PTC Engineering board arch/arm/mach-at91/Kconfig | 6 + arch/arm/mach-at91/include/mach/sama5_sfr.h | 24 +++ arch/arm/mach-at91/include/mach/sama5d2.h | 5 + board/atmel/sama5d2_ptc/Kconfig | 15 ++ board/atmel/sama5d2_ptc/MAINTAINERS | 7 + board/atmel/sama5d2_ptc/Makefile | 8 + board/atmel/sama5d2_ptc/sama5d2_ptc.c | 285 +++++++++++++++++++++++++++ configs/sama5d2_ptc_nandflash_defconfig | 12 ++ configs/sama5d2_ptc_spiflash_defconfig | 12 ++ include/configs/sama5d2_ptc.h | 155 +++++++++++++++ 10 files changed, 529 insertions(+) create mode 100644 board/atmel/sama5d2_ptc/Kconfig create mode 100644 board/atmel/sama5d2_ptc/MAINTAINERS create mode 100644 board/atmel/sama5d2_ptc/Makefile create mode 100644 board/atmel/sama5d2_ptc/sama5d2_ptc.c create mode 100644 configs/sama5d2_ptc_nandflash_defconfig create mode 100644 configs/sama5d2_ptc_spiflash_defconfig create mode 100644 include/configs/sama5d2_ptc.h -- 1.7.9.5

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[U-Boot] [PATCH] ARM: atmel: Enable FIT image support for SAMA5Dx
by Marek Vasut 03 May '16

03 May '16

Enable the fitImage support for the entire SAMA5Dx lineup of CPUs. The fitImage is superior image format to uImage and it is useful to have it available. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Andreas Bießmann <andreas.devel(a)googlemail.com> Cc: Wenyou Yang <wenyou.yang(a)atmel.com> --- configs/sama5d2_xplained_mmc_defconfig | 1 + configs/sama5d2_xplained_spiflash_defconfig | 1 + configs/sama5d3_xplained_mmc_defconfig | 1 + configs/sama5d3_xplained_nandflash_defconfig | 1 + configs/sama5d3xek_mmc_defconfig | 1 + configs/sama5d3xek_nandflash_defconfig | 1 + configs/sama5d3xek_spiflash_defconfig | 1 + configs/sama5d4_xplained_mmc_defconfig | 1 + configs/sama5d4_xplained_nandflash_defconfig | 1 + configs/sama5d4_xplained_spiflash_defconfig | 1 + configs/sama5d4ek_mmc_defconfig | 1 + configs/sama5d4ek_nandflash_defconfig | 1 + configs/sama5d4ek_spiflash_defconfig | 1 + 13 files changed, 13 insertions(+) diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 7f89698..f2b7f14 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -13,3 +13,4 @@ CONFIG_SPI_FLASH=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_OF_LIBFDT=y +CONFIG_FIT=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 28318fa..a6ab3b7 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -13,3 +13,4 @@ CONFIG_SPI_FLASH=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_OF_LIBFDT=y +CONFIG_FIT=y diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index 1133892..0d54123 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -9,3 +9,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC" # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_OF_LIBFDT=y +CONFIG_FIT=y diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index e4f577b..9b1c7b1 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -9,3 +9,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH" # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_OF_LIBFDT=y +CONFIG_FIT=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index f8cb309..8d58d8c 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -11,3 +11,4 @@ CONFIG_SPI_FLASH_ATMEL=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_OF_LIBFDT=y +CONFIG_FIT=y diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index 3a7cc7d..0051874 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -11,3 +11,4 @@ CONFIG_SPI_FLASH_ATMEL=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_OF_LIBFDT=y +CONFIG_FIT=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index e562f5a..2bb89c4 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -11,3 +11,4 @@ CONFIG_SPI_FLASH_ATMEL=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_OF_LIBFDT=y +CONFIG_FIT=y diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index c0c0416..e3c1954 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -13,3 +13,4 @@ CONFIG_SPI_FLASH_ATMEL=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_OF_LIBFDT=y +CONFIG_FIT=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 96aefc7..508c507 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -13,3 +13,4 @@ CONFIG_SPI_FLASH_ATMEL=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_OF_LIBFDT=y +CONFIG_FIT=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index b9d1c3c..70e326b 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -13,3 +13,4 @@ CONFIG_SPI_FLASH_ATMEL=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_OF_LIBFDT=y +CONFIG_FIT=y diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index 2a17e20..8b6fb96 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -13,3 +13,4 @@ CONFIG_SPI_FLASH_ATMEL=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_OF_LIBFDT=y +CONFIG_FIT=y diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index f92fe50..8a512ce 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -13,3 +13,4 @@ CONFIG_SPI_FLASH_ATMEL=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_OF_LIBFDT=y +CONFIG_FIT=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index c5a3431..359aa56 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -13,3 +13,4 @@ CONFIG_SPI_FLASH_ATMEL=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_OF_LIBFDT=y +CONFIG_FIT=y -- 2.7.0

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[U-Boot] [PATCH 0/3] ARM: at91: sama5d2_xplained: change SDHCI GCK's clock source to UPLL
by Wenyou Yang 03 May '16

03 May '16

To align to the Linux driver, change the clock source of the SDHCI's generated clock from PLLA to UPLL clock. Wenyou Yang (3): ARM: at91: clock: fix the GCK's clock source ARM: at91: clock: complete the GCK's clock sources board: sama5d2_xplained: change SDHCI GCK's clock source to UPLL arch/arm/mach-at91/armv7/clock.c | 11 +++++++++++ arch/arm/mach-at91/include/mach/clk.h | 2 ++ board/atmel/sama5d2_xplained/sama5d2_xplained.c | 4 ++-- 3 files changed, 15 insertions(+), 2 deletions(-) -- 2.7.4

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[U-Boot] [PATCH] board: atmel: sama5d2_xplained: fix the missing pin config of SDMMC0
by Wenyou Yang 03 May '16

03 May '16

Fix the missing pin config of the SDMMC0 interface. Signed-off-by: Wenyou Yang <wenyou.yang(a)atmel.com> --- board/atmel/sama5d2_xplained/sama5d2_xplained.c | 1 + 1 file changed, 1 insertion(+) diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c b/board/atmel/sama5d2_xplained/sama5d2_xplained.c index 10edf28..04422ce 100644 --- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c +++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c @@ -171,6 +171,7 @@ static void board_sdhci0_hw_init(void) atmel_pio4_set_a_periph(AT91_PIO_PORTA, 9, 0); /* SDMMC0_DAT7 */ atmel_pio4_set_a_periph(AT91_PIO_PORTA, 10, 0); /* SDMMC0_RSTN */ atmel_pio4_set_a_periph(AT91_PIO_PORTA, 11, 0); /* SDMMC0_VDDSEL */ + atmel_pio4_set_a_periph(AT91_PIO_PORTA, 13, 0); /* SDMMC0_CD */ at91_periph_clk_enable(ATMEL_ID_SDMMC0); at91_enable_periph_generated_clk(ATMEL_ID_SDMMC0, -- 2.7.4

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[U-Boot] chainloading u-boot on an acer cb5 chromebook (nyan_big)
by Thomas Hoff 03 May '16

03 May '16

Hello, Could someone help point me in the right direction about chainloading u-boot on an acer cb5 chromebook (nyan_big)? I'd like to be able to do a nonverified uboot similar to what was done here: https://www.chromium.org/chromium-os/firmware-porting-guide/using-nv-u-boot… I'd really appreciate the help. Cheers, Thomas Hoff

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[U-Boot] [PATCH] dm: at91: Add driver model support for the spi driver
by Wenyou Yang 03 May '16

03 May '16

Add driver model support while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: Wenyou Yang <wenyou.yang(a)atmel.com> --- drivers/spi/Kconfig | 9 ++ drivers/spi/atmel_spi.c | 254 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 263 insertions(+) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index f0258f8..e6b53ce 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -23,6 +23,15 @@ config ALTERA_SPI IP core. Please find details on the "Embedded Peripherals IP User Guide" of Altera. +config ATMEL_SPI + bool "Atmel SPI driver" + depends on ARCH_AT91 + select SPI_FLASH + select SPI_FLASH_ATMEL + help + Enable the Atmel SPI driver. This driver can be used to access + the SPI Flash, such as AT25DF321. + config CADENCE_QSPI bool "Cadence QSPI driver" help diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c index ed6278b..24d4a52 100644 --- a/drivers/spi/atmel_spi.c +++ b/drivers/spi/atmel_spi.c @@ -4,6 +4,8 @@ * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> +#include <dm.h> +#include <fdtdec.h> #include <spi.h> #include <malloc.h> @@ -11,9 +13,15 @@ #include <asm/arch/clk.h> #include <asm/arch/hardware.h> +#include <asm/arch/at91_spi.h> +#include <asm/gpio.h> #include "atmel_spi.h" +DECLARE_GLOBAL_DATA_PTR; + +#ifndef CONFIG_DM_SPI + static int spi_has_wdrbt(struct atmel_spi_slave *slave) { unsigned int ver; @@ -209,3 +217,249 @@ out: return 0; } + +#else + +#define MAX_CS_COUNT 4 + +struct atmel_spi_platdata { + struct at91_spi *regs; +}; + +struct atmel_spi_priv { + unsigned int freq; /* Default frequency */ + unsigned int mode; + struct gpio_desc cs_gpios[MAX_CS_COUNT]; +}; + +static int atmel_spi_claim_bus(struct udevice *dev) +{ + struct udevice *bus = dev_get_parent(dev); + struct atmel_spi_platdata *bus_plat = dev_get_platdata(bus); + struct atmel_spi_priv *priv = dev_get_priv(bus); + struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); + struct at91_spi *reg_base = bus_plat->regs; + u32 cs = slave_plat->cs; + u32 freq = priv->freq; + u32 scbr, csrx, mode; + + scbr = (get_spi_clk_rate(0) + freq - 1) / freq; + if (scbr > ATMEL_SPI_CSRx_SCBR_MAX) + return -EINVAL; + + if (scbr < 1) + scbr = 1; + + csrx = ATMEL_SPI_CSRx_SCBR(scbr); + csrx |= ATMEL_SPI_CSRx_BITS(ATMEL_SPI_BITS_8); + + if (!(priv->mode & SPI_CPHA)) + csrx |= ATMEL_SPI_CSRx_NCPHA; + if (priv->mode & SPI_CPOL) + csrx |= ATMEL_SPI_CSRx_CPOL; + + writel(csrx, &reg_base->csr[cs]); + + mode = ATMEL_SPI_MR_MSTR | + ATMEL_SPI_MR_MODFDIS | + ATMEL_SPI_MR_WDRBT | + ATMEL_SPI_MR_PCS(~(1 << cs)); + + writel(mode, &reg_base->mr); + + writel(ATMEL_SPI_CR_SPIEN, &reg_base->cr); + + return 0; +} + +static int atmel_spi_release_bus(struct udevice *dev) +{ + struct udevice *bus = dev_get_parent(dev); + struct atmel_spi_platdata *bus_plat = dev_get_platdata(bus); + + writel(ATMEL_SPI_CR_SPIDIS, &bus_plat->regs->cr); + + return 0; +} + +static void atmel_spi_cs_activate(struct udevice *dev) +{ + struct udevice *bus = dev_get_parent(dev); + struct atmel_spi_priv *priv = dev_get_priv(bus); + struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); + u32 cs = slave_plat->cs; + + dm_gpio_set_value(&priv->cs_gpios[cs], 0); +} + +static void atmel_spi_cs_deactivate(struct udevice *dev) +{ + struct udevice *bus = dev_get_parent(dev); + struct atmel_spi_priv *priv = dev_get_priv(bus); + struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); + u32 cs = slave_plat->cs; + + dm_gpio_set_value(&priv->cs_gpios[cs], 1); +} + +static int atmel_spi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + struct udevice *bus = dev_get_parent(dev); + struct atmel_spi_platdata *bus_plat = dev_get_platdata(bus); + struct at91_spi *reg_base = bus_plat->regs; + + u32 len_tx, len_rx, len; + u32 status; + const u8 *txp = dout; + u8 *rxp = din; + u8 value; + + if (bitlen == 0) + goto out; + + /* + * The controller can do non-multiple-of-8 bit + * transfers, but this driver currently doesn't support it. + * + * It's also not clear how such transfers are supposed to be + * represented as a stream of bytes...this is a limitation of + * the current SPI interface. + */ + if (bitlen % 8) { + /* Errors always terminate an ongoing transfer */ + flags |= SPI_XFER_END; + goto out; + } + + len = bitlen / 8; + + /* + * The controller can do automatic CS control, but it is + * somewhat quirky, and it doesn't really buy us much anyway + * in the context of U-Boot. + */ + if (flags & SPI_XFER_BEGIN) { + atmel_spi_cs_activate(dev); + + /* + * sometimes the RDR is not empty when we get here, + * in theory that should not happen, but it DOES happen. + * Read it here to be on the safe side. + * That also clears the OVRES flag. Required if the + * following loop exits due to OVRES! + */ + readl(&reg_base->rdr); + } + + for (len_tx = 0, len_rx = 0; len_rx < len; ) { + status = readl(&reg_base->sr); + + if (status & ATMEL_SPI_SR_OVRES) + return -1; + + if ((len_tx < len) && (status & ATMEL_SPI_SR_TDRE)) { + if (txp) + value = *txp++; + else + value = 0; + writel(value, &reg_base->tdr); + len_tx++; + } + + if (status & ATMEL_SPI_SR_RDRF) { + value = readl(&reg_base->rdr); + if (rxp) + *rxp++ = value; + len_rx++; + } + } + +out: + if (flags & SPI_XFER_END) { + /* + * Wait until the transfer is completely done before + * we deactivate CS. + */ + do { + status = readl(&reg_base->sr); + } while (!(status & ATMEL_SPI_SR_TXEMPTY)); + + atmel_spi_cs_deactivate(dev); + } + + return 0; +} + +static int atmel_spi_set_speed(struct udevice *bus, uint speed) +{ + struct atmel_spi_priv *priv = dev_get_priv(bus); + + priv->freq = speed; + + return 0; +} + +static int atmel_spi_set_mode(struct udevice *bus, uint mode) +{ + struct atmel_spi_priv *priv = dev_get_priv(bus); + + priv->mode = mode; + + return 0; +} + +static const struct dm_spi_ops atmel_spi_ops = { + .claim_bus = atmel_spi_claim_bus, + .release_bus = atmel_spi_release_bus, + .xfer = atmel_spi_xfer, + .set_speed = atmel_spi_set_speed, + .set_mode = atmel_spi_set_mode, + /* + * cs_info is not needed, since we require all chip selects to be + * in the device tree explicitly + */ +}; + +static int atmel_spi_ofdata_to_platdata(struct udevice *bus) +{ + struct atmel_spi_priv *priv = dev_get_priv(bus); + int ret; + + ret = gpio_request_list_by_name(bus, "cs-gpios", priv->cs_gpios, + ARRAY_SIZE(priv->cs_gpios), 0); + if (ret < 0) { + error("Can't get %s gpios! Error: %d", bus->name, ret); + return ret; + } + + return 0; +} + +static int atmel_spi_probe(struct udevice *bus) +{ + struct atmel_spi_platdata *bus_plat = dev_get_platdata(bus); + + bus_plat->regs = (struct at91_spi *)dev_get_addr(bus); + + writel(ATMEL_SPI_CR_SWRST, &bus_plat->regs->cr); + + return 0; +} + +static const struct udevice_id atmel_spi_ids[] = { + { .compatible = "atmel,at91rm9200-spi" }, + { } +}; + +U_BOOT_DRIVER(atmel_spi) = { + .name = "atmel_spi", + .id = UCLASS_SPI, + .of_match = atmel_spi_ids, + .ops = &atmel_spi_ops, + .ofdata_to_platdata = atmel_spi_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct atmel_spi_platdata), + .priv_auto_alloc_size = sizeof(struct atmel_spi_priv), + .probe = atmel_spi_probe, +}; +#endif -- 2.7.4

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