April 2016 - U-Boot

[U-Boot] [PATCH 1/3] SPL: Let spl_parse_image_header() return value
by Marek Vasut 23 May '16

23 May '16

Allow the spl_parse_image_header() to return value. This is convenient for controlling the SPL boot flow if the loaded image is corrupted. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <fabio.estevam(a)nxp.com> Cc: Peng Fan <van.freenix(a)gmail.com> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Tom Rini <trini(a)konsulko.com> --- common/spl/spl.c | 3 ++- common/spl/spl_ext.c | 6 +++++- common/spl/spl_fat.c | 4 +++- common/spl/spl_mmc.c | 6 +++++- common/spl/spl_nand.c | 9 +++++++-- common/spl/spl_net.c | 4 +--- common/spl/spl_nor.c | 9 +++++++-- common/spl/spl_onenand.c | 5 ++++- common/spl/spl_ymodem.c | 7 +++++-- drivers/mtd/spi/spi_spl_load.c | 10 ++++++++-- include/spl.h | 2 +- 11 files changed, 48 insertions(+), 17 deletions(-) diff --git a/common/spl/spl.c b/common/spl/spl.c index 82e7f58..7259619 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -73,7 +73,7 @@ void spl_set_header_raw_uboot(void) spl_image.name = "U-Boot"; } -void spl_parse_image_header(const struct image_header *header) +int spl_parse_image_header(const struct image_header *header) { u32 header_size = sizeof(struct image_header); @@ -118,6 +118,7 @@ void spl_parse_image_header(const struct image_header *header) spl_set_header_raw_uboot(); #endif } + return 0; } __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) diff --git a/common/spl/spl_ext.c b/common/spl/spl_ext.c index b77dbf4..ade5496 100644 --- a/common/spl/spl_ext.c +++ b/common/spl/spl_ext.c @@ -48,7 +48,11 @@ int spl_load_image_ext(struct blk_desc *block_dev, goto end; } - spl_parse_image_header(header); + err = spl_parse_image_header(header); + if (err < 0) { + puts("spl: ext4fs_read failed\n"); + goto end; + } err = ext4fs_read((char *)spl_image.load_addr, filelen, &actlen); diff --git a/common/spl/spl_fat.c b/common/spl/spl_fat.c index d761b26..338ea2f 100644 --- a/common/spl/spl_fat.c +++ b/common/spl/spl_fat.c @@ -57,7 +57,9 @@ int spl_load_image_fat(struct blk_desc *block_dev, if (err <= 0) goto end; - spl_parse_image_header(header); + err = spl_parse_image_header(header); + if (err <= 0) + goto end; err = file_fat_read(filename, (u8 *)spl_image.load_addr, 0); diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c index 8d588d1..360c754 100644 --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@ -23,8 +23,12 @@ static int mmc_load_legacy(struct mmc *mmc, ulong sector, { u32 image_size_sectors; unsigned long count; + int ret; + + ret = spl_parse_image_header(header); + if (ret) + return ret; - spl_parse_image_header(header); /* convert size to sectors - round up */ image_size_sectors = (spl_image.size + mmc->read_bl_len - 1) / mmc->read_bl_len; diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c index 79388ff..bbd9546 100644 --- a/common/spl/spl_nand.c +++ b/common/spl/spl_nand.c @@ -32,7 +32,10 @@ static int spl_nand_load_element(int offset, struct image_header *header) if (err) return err; - spl_parse_image_header(header); + err = spl_parse_image_header(header); + if (err) + return err; + return nand_spl_load_image(offset, spl_image.size, (void *)(unsigned long)spl_image.load_addr); } @@ -77,7 +80,9 @@ int spl_nand_load_image(void) /* load linux */ nand_spl_load_image(CONFIG_SYS_NAND_SPL_KERNEL_OFFS, sizeof(*header), (void *)header); - spl_parse_image_header(header); + err = spl_parse_image_header(header); + if (err) + return err; if (header->ih_os == IH_OS_LINUX) { /* happy - was a linux */ err = nand_spl_load_image( diff --git a/common/spl/spl_net.c b/common/spl/spl_net.c index 63b20d8..ae71d26 100644 --- a/common/spl/spl_net.c +++ b/common/spl/spl_net.c @@ -34,7 +34,5 @@ int spl_net_load_image(const char *device) printf("Problem booting with BOOTP\n"); return rv; } - spl_parse_image_header((struct image_header *)load_addr); - - return 0; + return spl_parse_image_header((struct image_header *)load_addr); } diff --git a/common/spl/spl_nor.c b/common/spl/spl_nor.c index d0bd0b0..da2422f 100644 --- a/common/spl/spl_nor.c +++ b/common/spl/spl_nor.c @@ -9,6 +9,7 @@ int spl_nor_load_image(void) { + int ret; /* * Loading of the payload to SDRAM is done with skipping of * the mkimage header in this SPL NOR driver @@ -28,7 +29,9 @@ int spl_nor_load_image(void) if (image_get_os(header) == IH_OS_LINUX) { /* happy - was a Linux */ - spl_parse_image_header(header); + ret = spl_parse_image_header(header); + if (ret) + return ret; memcpy((void *)spl_image.load_addr, (void *)(CONFIG_SYS_OS_BASE + @@ -56,8 +59,10 @@ int spl_nor_load_image(void) * Load real U-Boot from its location in NOR flash to its * defined location in SDRAM */ - spl_parse_image_header( + ret = spl_parse_image_header( (const struct image_header *)CONFIG_SYS_UBOOT_BASE); + if (ret) + return ret; memcpy((void *)(unsigned long)spl_image.load_addr, (void *)(CONFIG_SYS_UBOOT_BASE + sizeof(struct image_header)), diff --git a/common/spl/spl_onenand.c b/common/spl/spl_onenand.c index af7d82e..1a28a84 100644 --- a/common/spl/spl_onenand.c +++ b/common/spl/spl_onenand.c @@ -17,6 +17,7 @@ int spl_onenand_load_image(void) { struct image_header *header; + int ret; debug("spl: onenand\n"); @@ -25,7 +26,9 @@ int spl_onenand_load_image(void) /* Load u-boot */ onenand_spl_load_image(CONFIG_SYS_ONENAND_U_BOOT_OFFS, CONFIG_SYS_ONENAND_PAGE_SIZE, (void *)header); - spl_parse_image_header(header); + ret = spl_parse_image_header(header); + if (ret) + return ret; onenand_spl_load_image(CONFIG_SYS_ONENAND_U_BOOT_OFFS, spl_image.size, (void *)spl_image.load_addr); diff --git a/common/spl/spl_ymodem.c b/common/spl/spl_ymodem.c index 380d8dd..4f26ea5 100644 --- a/common/spl/spl_ymodem.c +++ b/common/spl/spl_ymodem.c @@ -40,8 +40,11 @@ int spl_ymodem_load_image(void) if (!ret) { while ((res = xyzModem_stream_read(buf, BUF_SIZE, &err)) > 0) { - if (addr == 0) - spl_parse_image_header((struct image_header *)buf); + if (addr == 0) { + ret = spl_parse_image_header((struct image_header *)buf); + if (ret) + return ret; + } store_addr = addr + spl_image.load_addr; size += res; addr += res; diff --git a/drivers/mtd/spi/spi_spl_load.c b/drivers/mtd/spi/spi_spl_load.c index ca56fe9..46c98a9 100644 --- a/drivers/mtd/spi/spi_spl_load.c +++ b/drivers/mtd/spi/spi_spl_load.c @@ -23,6 +23,8 @@ static int spi_load_image_os(struct spi_flash *flash, struct image_header *header) { + int err; + /* Read for a header, parse or error out. */ spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, 0x40, (void *)header); @@ -30,7 +32,9 @@ static int spi_load_image_os(struct spi_flash *flash, if (image_get_magic(header) != IH_MAGIC) return -1; - spl_parse_image_header(header); + err = spl_parse_image_header(header); + if (err) + return err; spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, spl_image.size, (void *)spl_image.load_addr); @@ -81,7 +85,9 @@ int spl_spi_load_image(void) if (err) return err; - spl_parse_image_header(header); + err = spl_parse_image_header(header); + if (err) + return err; err = spi_flash_read(flash, CONFIG_SYS_SPI_U_BOOT_OFFS, spl_image.size, (void *)spl_image.load_addr); } diff --git a/include/spl.h b/include/spl.h index de4f70a..7edfab4 100644 --- a/include/spl.h +++ b/include/spl.h @@ -56,7 +56,7 @@ void preloader_console_init(void); u32 spl_boot_device(void); u32 spl_boot_mode(void); void spl_set_header_raw_uboot(void); -void spl_parse_image_header(const struct image_header *header); +int spl_parse_image_header(const struct image_header *header); void spl_board_prepare_for_linux(void); void __noreturn jump_to_image_linux(void *arg); int spl_start_uboot(void); -- 2.7.0

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[U-Boot] [PATCH v3 00/11] arm: rpi: Enable USB and Ethernet driver model Raspberry Pi
by Simon Glass 23 May '16

23 May '16

Raspberry Pi uses a DWC2 USB controller and a SMSC USB Ethernet adaptor. Driver model support for these was recently merged. This series does the following: - Move Raspberry Pi to use device tree control (u-boot-dtb.bin instead of u-boot.bin) - Remove GPIO platform data (now uses device tree) - Remove serial platform data (now uses device tree) - Enable CONFIG_DM_ETH and CONFIG_DM_USB on Raspberry Pi With Ethernet active the device list looks something like this: U-Boot> dm tree Class Probed Name ---------------------------------------- root [ + ] root_driver simple_bus [ + ] |-- soc gpio [ ] | |-- gpio@7e200000 serial [ + ] | |-- uart@7e201000 usb [ + ] | `-- usb@7e980000 usb_hub [ + ] | `-- usb_hub usb_hub [ + ] | `-- usb_hub eth [ + ] | `-- smsc95xx_eth simple_bus [ ] `-- clocks Changes in v3: - Drop applied patches from series - Drop patch to introduce usbethaddr for driver model - Rename binding file to pl01x.txt Changes in v2: - Add support for Raspberry Pi 2 Simon Glass (11): dm: serial: Update binding for PL01x serial UART arm: rpi: Define CONFIG_TFTP_TSIZE to show tftp size info arm: rpi: Bring in kernel device tree files arm: rpi: Device tree modifications for U-Boot arm: rpi: Add device tree files for Raspberry Pi 2 arm: rpi: Enable device tree control for Rasberry Pi arm: rpi: Enable device tree control for Rasberry Pi 2 arm: rpi: Drop the UART console platform data arm: rpi: Drop the GPIO platform data arm: rpi: Move to driver model for USB arm: rpi: Use driver model for Ethernet arch/arm/dts/Makefile | 3 + arch/arm/dts/bcm2835-rpi-b.dts | 24 ++++ arch/arm/dts/bcm2835.dtsi | 35 +++++ arch/arm/dts/bcm2836-rpi-2-b.dts | 30 +++++ arch/arm/dts/bcm2836.dtsi | 42 ++++++ arch/arm/dts/bcm283x-common.dtsi | 157 ++++++++++++++++++++++ arch/arm/dts/bcm283x-rpi.dtsi | 49 +++++++ arch/arm/dts/stv0991.dts | 2 +- arch/arm/mach-bcm283x/include/mach/gpio.h | 5 - board/raspberrypi/rpi/rpi.c | 24 ---- configs/rpi_2_defconfig | 6 + configs/rpi_defconfig | 6 + doc/device-tree-bindings/arm/bcm/brcm,bcm2835.txt | 8 ++ doc/device-tree-bindings/arm/bcm/brcm,bcm2836.txt | 10 ++ doc/device-tree-bindings/serial/pl01x.txt | 55 +++++++- drivers/gpio/bcm2835_gpio.c | 20 +++ drivers/serial/serial_pl01x.c | 6 +- include/configs/rpi-common.h | 6 +- include/dt-bindings/pinctrl/bcm2835.h | 27 ++++ 19 files changed, 474 insertions(+), 41 deletions(-) create mode 100644 arch/arm/dts/bcm2835-rpi-b.dts create mode 100644 arch/arm/dts/bcm2835.dtsi create mode 100644 arch/arm/dts/bcm2836-rpi-2-b.dts create mode 100644 arch/arm/dts/bcm2836.dtsi create mode 100644 arch/arm/dts/bcm283x-common.dtsi create mode 100644 arch/arm/dts/bcm283x-rpi.dtsi create mode 100644 doc/device-tree-bindings/arm/bcm/brcm,bcm2835.txt create mode 100644 doc/device-tree-bindings/arm/bcm/brcm,bcm2836.txt create mode 100644 include/dt-bindings/pinctrl/bcm2835.h -- 2.5.0.rc2.392.g76e840b

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[U-Boot] Issue with USB mass storage (thumb drives)
by Schrempf Frieder 20 May '16

20 May '16

Hello, I'm using U-Boot on a custom i.MX6 board and I'm having problems while reading (large) files from USB thumb drives. I wouldn't really mind if this only happened with some specific USB device, but the problem occurs with 3 out of 4 tested thumb drives while loading a 100M test file. The devices that work seem to be rather old ones. The same issue is also reported here: https://community.freescale.com/thread/377911 I can reproduce this behaviour with u-boot-imx v2014.04 and with mainline u-boot v2015.10 and v2016.01. Can someone tell me if this is a known issue? What could be the reason for this and how can I get this working? Thanks! U-Boot 2016.01 (Feb 02 2016 - 10:31:32 +0100) CPU: Freescale i.MX6SOLO rev1.3 at 792MHz CPU: Industrial temperature grade (-40C to 105C) at 31C Reset cause: POR Board: MX6EXCEET DRAM: 1 GiB NAND: 256 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 SF: Detected EN25Q80 with page size 256 Bytes, erase size 4 KiB, total 1 MiB No panel detected: default to Hannstar-XGA Display: Hannstar-XGA (1024x768) In: serial Out: serial Err: serial Net: Found Micrel KS8051/KS8081 PHY FEC Hit any key to stop autoboot: 0 => usb start starting USB... USB0: Port not available. USB1: USB EHCI 1.00 scanning bus 1 for devices... 2 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found scanning usb for ethernet devices... 0 Ethernet Device(s) found => fatload usb 0 0x18000000 test.file reading test.file EHCI timed out on TD - token=0xac008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x128d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x801f8c80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 EHCI timed out on TD - token=0x80008d80 Error reading cluster ** Unable to read file test.file **

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[U-Boot] [PATCH] arm: mvebu: theadorable: Enable CONFIG_ZERO_BOOTDELAY_CHECK
by Stefan Roese 20 May '16

20 May '16

Enable bootdelay 0 check so that booting can be interrupted even with bootdelay configured to 0. Signed-off-by: Stefan Roese <sr(a)denx.de> --- include/configs/theadorable.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index 5864f27..6c0e7dc 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -76,6 +76,7 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ +#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_SYS_ALT_MEMTEST #define CONFIG_PREBOOT -- 2.8.1

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[U-Boot] [PATCH] arm: mvebu: a38x: Weed out floating point use
by Marek Vasut 20 May '16

20 May '16

For reason unknown, recently, the DDR init code writers are really fond of hiding some small floating point operating deep in their creations. This patch removes one from the Marvell A38x code. Instead of returning size of chip as float from ddr3_get_device_size() in GiB units, return it as int in MiB units. Since this would interfere with the huge switch code in ddr3_calc_mem_cs_size(), rework the code to match the change. Before this patch, the cs_mem_size variable could have these values: ( { 16, 32 } x { 8, 16 } x { 0.01, 0.5, 1, 2, 4, 8 } ) / 8 = { 0.000000, 0.001250, 0.002500, 0.005000, 0.062500, 0.125000, 0.250000, 0.500000, 1.000000, 2.000000, 4.000000, } The switch code checked for a subset of the resulting RAM sizes, which is in range 128 MiB ... 2048 MiB. With this patch, the cs_mem_size variable can have these values: ( { 16, 32 } x { 8, 16 } x { 0, 512, 1024, 2048, 4096, 8192 } ) / 8 = { 0, 64, 128, 256, 512, 1024, 2048, 4096 } To retain previous behavior, filter out 0 MiB (invalid size), 64 MiB and 4096 MiB options. Removing the floating point stuff also saves 1.5k from text segment: clearfog : spl/u-boot-spl:all -1592 spl/u-boot-spl:text -1592 Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Dirk Eibach <dirk.eibach(a)gdsys.cc> Cc: Stefan Roese <sr(a)denx.de> --- drivers/ddr/marvell/a38x/ddr3_init.c | 29 ++++++++++------------------- 1 file changed, 10 insertions(+), 19 deletions(-) diff --git a/drivers/ddr/marvell/a38x/ddr3_init.c b/drivers/ddr/marvell/a38x/ddr3_init.c index ee05f57..55baad4 100644 --- a/drivers/ddr/marvell/a38x/ddr3_init.c +++ b/drivers/ddr/marvell/a38x/ddr3_init.c @@ -678,7 +678,7 @@ u32 ddr3_get_device_width(u32 cs) return (device_width == 0) ? 8 : 16; } -float ddr3_get_device_size(u32 cs) +static int ddr3_get_device_size(u32 cs) { u32 device_size_low, device_size_high, device_size; u32 data, cs_low_offset, cs_high_offset; @@ -695,15 +695,15 @@ float ddr3_get_device_size(u32 cs) switch (device_size) { case 0: - return 2; + return 2048; case 2: - return 0.5; + return 512; case 3: - return 1; + return 1024; case 4: - return 4; + return 4096; case 5: - return 8; + return 8192; case 1: default: DEBUG_INIT_C("Error: Wrong device size of Cs: ", cs, 1); @@ -711,13 +711,13 @@ float ddr3_get_device_size(u32 cs) * Small value will give wrong emem size in * ddr3_calc_mem_cs_size */ - return 0.01; + return 0; } } int ddr3_calc_mem_cs_size(u32 cs, u32 *cs_size) { - float cs_mem_size; + int cs_mem_size; /* Calculate in GiB */ cs_mem_size = ((ddr3_get_bus_width() / ddr3_get_device_width(cs)) * @@ -731,21 +731,12 @@ int ddr3_calc_mem_cs_size(u32 cs, u32 *cs_size) */ cs_mem_size *= DDR_CONTROLLER_BUS_WIDTH_MULTIPLIER; - if (cs_mem_size == 0.125) { - *cs_size = 128 << 20; - } else if (cs_mem_size == 0.25) { - *cs_size = 256 << 20; - } else if (cs_mem_size == 0.5) { - *cs_size = 512 << 20; - } else if (cs_mem_size == 1) { - *cs_size = 1 << 30; - } else if (cs_mem_size == 2) { - *cs_size = 2 << 30; - } else { + if (!cs_mem_size || (cs_mem_size == 64) || (cs_mem_size == 4096)) { DEBUG_INIT_C("Error: Wrong Memory size of Cs: ", cs, 1); return MV_BAD_VALUE; } + *cs_size = cs_mem_size << 20; return MV_OK; } -- 2.7.0

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[U-Boot] [PATCH 1/4] spi: fsl_qspi: Fix issues on arm64
by Yuan Yao 19 May '16

19 May '16

From: Yuan Yao <yao.yuan(a)nxp.com> The address value and size value get from dts "reg" property have type of u64 on arm64. If we assign those values to "u32" variables, driver can't work correctly. Converting the type of those variables to fdt_xxx_t. Signed-off-by: Yuan Yao <yao.yuan(a)freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar(a)freescale.com> Signed-off-by: Yuan Yao <yao.yuan(a)nxp.com> --- drivers/spi/fsl_qspi.c | 46 +++++++++++++++++++++++++++------------------- 1 file changed, 27 insertions(+), 19 deletions(-) diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index cb8d929..96fb909 100644 --- a/drivers/spi/fsl_qspi.c +++ b/drivers/spi/fsl_qspi.c @@ -92,9 +92,9 @@ DECLARE_GLOBAL_DATA_PTR; struct fsl_qspi_platdata { u32 flags; u32 speed_hz; - u32 reg_base; - u32 amba_base; - u32 amba_total_size; + fdt_addr_t reg_base; + fdt_addr_t amba_base; + fdt_size_t amba_total_size; u32 flash_num; u32 num_chipselect; }; @@ -940,8 +940,13 @@ static int fsl_qspi_probe(struct udevice *bus) priv->flags = plat->flags; priv->speed_hz = plat->speed_hz; - priv->amba_base[0] = plat->amba_base; - priv->amba_total_size = plat->amba_total_size; + /* + * QSPI SFADR width is 32bits, the max dest addr is 4GB-1. + * AMBA memory zone should be located on the 0~4GB space + * even on a 64bits cpu. + */ + priv->amba_base[0] = (u32)plat->amba_base; + priv->amba_total_size = (u32)plat->amba_total_size; priv->flash_num = plat->flash_num; priv->num_chipselect = plat->num_chipselect; @@ -984,10 +989,7 @@ static int fsl_qspi_probe(struct udevice *bus) static int fsl_qspi_ofdata_to_platdata(struct udevice *bus) { - struct reg_data { - u32 addr; - u32 size; - } regs_data[2]; + struct fdt_resource res_regs, res_mem; struct fsl_qspi_platdata *plat = bus->platdata; const void *blob = gd->fdt_blob; int node = bus->of_offset; @@ -996,10 +998,16 @@ static int fsl_qspi_ofdata_to_platdata(struct udevice *bus) if (fdtdec_get_bool(blob, node, "big-endian")) plat->flags |= QSPI_FLAG_REGMAP_ENDIAN_BIG; - ret = fdtdec_get_int_array(blob, node, "reg", (u32 *)regs_data, - sizeof(regs_data)/sizeof(u32)); + ret = fdt_get_named_resource(blob, node, "reg", "reg-names", + "QuadSPI", &res_regs); + if (ret) { + debug("Error: can't get regs base addresses(ret = %d)!\n", ret); + return -ENOMEM; + } + ret = fdt_get_named_resource(blob, node, "reg", "reg-names", + "QuadSPI-memory", &res_mem); if (ret) { - debug("Error: can't get base addresses (ret = %d)!\n", ret); + debug("Error: can't get AMBA base addresses(ret = %d)!\n", ret); return -ENOMEM; } @@ -1017,16 +1025,16 @@ static int fsl_qspi_ofdata_to_platdata(struct udevice *bus) plat->num_chipselect = fdtdec_get_int(blob, node, "num-cs", FSL_QSPI_MAX_CHIPSELECT_NUM); - plat->reg_base = regs_data[0].addr; - plat->amba_base = regs_data[1].addr; - plat->amba_total_size = regs_data[1].size; + plat->reg_base = res_regs.start; + plat->amba_base = res_mem.start; + plat->amba_total_size = res_mem.end - res_mem.start + 1; plat->flash_num = flash_num; - debug("%s: regs=<0x%x> <0x%x, 0x%x>, max-frequency=%d, endianess=%s\n", + debug("%s: regs=<0x%llx> <0x%llx, 0x%llx>, max-frequency=%d, endianess=%s\n", __func__, - plat->reg_base, - plat->amba_base, - plat->amba_total_size, + (u64)plat->reg_base, + (u64)plat->amba_base, + (u64)plat->amba_total_size, plat->speed_hz, plat->flags & QSPI_FLAG_REGMAP_ENDIAN_BIG ? "be" : "le" ); -- 2.1.0.27.g96db324

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[U-Boot] [PATCH RESEND 0/2] cmd: fdt: Add device tree overlays support
by Maxime Ripard 19 May '16

19 May '16

Hi, The device tree overlays are a great solution to the issue raised by the bunch expandable boards we find everywhere these days, like the Beaglebone, Raspberry Pi or CHIP. However, most of the time, the overlays are applied through a mechanism involving the firmware request interface in Linux, that is only fully functional once the userspace has been mounted and is running. Some expansion boards might need to be enabled before that, because they simply need to patch the DT early on, or need to be initialized early in order to be fully functional, or because they provide access to the root filesystem. In these cases, having the bootloader applying the overlay before Linux starts seems like the easiest solution. This implementation doesn't provide all the Linux fancyness though, there's no transactional application, which means that if the overlay cannot be applied for a reason while you're still halfway through the application, you're probably screwed. It also cannot remove an overlay, but I don't think that is currently a use-case. Let me know what you think, Maxime Maxime Ripard (2): cmd: fdt: Narrow the check for fdt addr cmd: fdt: add fdt overlay application subcommand cmd/Makefile | 2 +- cmd/fdt.c | 21 ++- cmd/fdt_overlay.c | 464 ++++++++++++++++++++++++++++++++++++++++++++++++++ include/fdt_support.h | 2 +- 4 files changed, 486 insertions(+), 3 deletions(-) create mode 100644 cmd/fdt_overlay.c -- 2.8.0

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[U-Boot] [PATCH 0/3] dm: gpio: Add driver for MPC85xx GPIO controller
by Mario Six 19 May '16

19 May '16

The functions for accessing GPIOs on MPC85xx are hardcoded in arch/powerpc/include/asm/mpc85xx_gpio.h This leads to problems if another GPIO controller supporting the driver model is to be used simultaneously. Therefore, this patch moves the "static" functions into a DM-compatible driver, and also introduces a set of functions into the GPIO uclass that expose the controller's capability to switch individual GPIOs into open-drain-mode. Mario Six (3): dm: gpio: Add driver for MPC85XX GPIO controller dm: gpio: Add methods for open drain setting dm: gpio: Implement open drain for MPC85XX GPIO arch/powerpc/include/asm/arch-mpc85xx/gpio.h | 2 + arch/powerpc/include/asm/immap_85xx.h | 2 + drivers/gpio/Kconfig | 6 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-uclass.c | 30 ++++ drivers/gpio/mpc85xx_gpio.c | 223 +++++++++++++++++++++++++++ include/asm-generic/gpio.h | 29 ++++ 7 files changed, 293 insertions(+) create mode 100644 drivers/gpio/mpc85xx_gpio.c -- 2.7.0.GIT

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[U-Boot] [PATCH 1/2] powerpc/mpc85xx: SECURE BOOT- Enable chain of trust in SPL
by Sumit Garg 18 May '16

18 May '16

As part of Chain of Trust for Secure boot, the SPL U-Boot will validate the next level U-boot image. Add a new function spl_validate_uboot to perform the validation. Enable hardware crypto operations in SPL using SEC block. In case of Secure Boot, PAMU is not bypassed. For allowing SEC block access to CPC configured as SRAM, configure PAMU. Reviewed-by: Ruchika Gupta <ruchika.gupta(a)nxp.com> Signed-off-by: Aneesh Bansal <aneesh.bansal(a)nxp.com> Signed-off-by: Sumit Garg <sumit.garg(a)nxp.com> --- arch/powerpc/cpu/mpc8xxx/fsl_pamu.c | 8 +++++ arch/powerpc/cpu/mpc8xxx/pamu_table.c | 8 +++++ arch/powerpc/include/asm/fsl_secure_boot.h | 26 +++++++++++++++ board/freescale/common/fsl_chain_of_trust.c | 50 +++++++++++++++++++++++++++++ common/Makefile | 2 ++ drivers/Makefile | 1 + drivers/crypto/fsl/jr.c | 16 +++++++++ drivers/mtd/nand/fsl_ifc_spl.c | 24 ++++++++++++++ include/fsl_validate.h | 1 + 9 files changed, 136 insertions(+) diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c index 9421f1e..ede8e66 100644 --- a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c +++ b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c @@ -239,15 +239,23 @@ int pamu_init(void) spaact_size = sizeof(struct paace) * NUM_SPAACT_ENTRIES; /* Allocate space for Primary PAACT Table */ +#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_PPAACT_ADDR)) + ppaact = (void *)CONFIG_SPL_PPAACT_ADDR; +#else ppaact = memalign(PAMU_TABLE_ALIGNMENT, ppaact_size); if (!ppaact) return -1; +#endif memset(ppaact, 0, ppaact_size); /* Allocate space for Secondary PAACT Table */ +#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SPAACT_ADDR)) + sec = (void *)CONFIG_SPL_SPAACT_ADDR; +#else sec = memalign(PAMU_TABLE_ALIGNMENT, spaact_size); if (!sec) return -1; +#endif memset(sec, 0, spaact_size); ppaact_phys = virt_to_phys((void *)ppaact); diff --git a/arch/powerpc/cpu/mpc8xxx/pamu_table.c b/arch/powerpc/cpu/mpc8xxx/pamu_table.c index 26c5ea4..a8e6f51 100644 --- a/arch/powerpc/cpu/mpc8xxx/pamu_table.c +++ b/arch/powerpc/cpu/mpc8xxx/pamu_table.c @@ -28,6 +28,14 @@ void construct_pamu_addr_table(struct pamu_addr_tbl *tbl, int *num_entries) i++; #endif +#if (defined(CONFIG_SPL_BUILD) && (CONFIG_SYS_INIT_L3_VADDR)) + tbl->start_addr[i] = + (uint64_t)virt_to_phys((void *)CONFIG_SYS_INIT_L3_VADDR); + tbl->size[i] = 256 * 1024; /* 256K CPC flash */ + tbl->end_addr[i] = tbl->start_addr[i] + tbl->size[i] - 1; + + i++; +#endif debug("PAMU address\t\t\tsize\n"); for (j = 0; j < i ; j++) debug("%llx \t\t\t%llx\n", tbl->start_addr[j], tbl->size[j]); diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index c45cace..e801517 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -72,6 +72,30 @@ #ifdef CONFIG_CHAIN_OF_TRUST +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_DM 1 +#define CONFIG_SPL_CRYPTO_SUPPORT +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +/* + * PPAACT and SPAACT table for PAMU must be placed on DDR after DDR init + * due to space crunch on CPC and thus malloc will not work. + */ +#define CONFIG_SPL_PPAACT_ADDR 0x2e000000 +#define CONFIG_SPL_SPAACT_ADDR 0x2f000000 +#define CONFIG_SPL_JR0_LIODN_S 454 +#define CONFIG_SPL_JR0_LIODN_NS 458 +/* + * Define the key hash for U-Boot here if public/private key pair used to + * sign U-boot are different from the SRK hash put in the fuse + * Example of defining KEY_HASH is + * #define CONFIG_SPL_UBOOT_KEY_HASH \ + * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" + * else leave it defined as NULL + */ + +#define CONFIG_SPL_UBOOT_KEY_HASH NULL +#endif /* ifdef CONFIG_SPL_BUILD */ + #define CONFIG_CMD_ESBC_VALIDATE #define CONFIG_CMD_BLOB #define CONFIG_FSL_SEC_MON @@ -87,6 +111,7 @@ #define CONFIG_FSL_CAAM #endif +#ifndef CONFIG_SPL_BUILD /* fsl_setenv_chain_of_trust() must be called from * board_late_init() */ @@ -124,5 +149,6 @@ #endif /* #ifdef CONFIG_BOOTSCRIPT_COPY_RAM */ #include <config_fsl_chain_trust.h> +#endif /* #ifndef CONFIG_SPL_BUILD */ #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */ #endif diff --git a/board/freescale/common/fsl_chain_of_trust.c b/board/freescale/common/fsl_chain_of_trust.c index ecfcc82..d24149b 100644 --- a/board/freescale/common/fsl_chain_of_trust.c +++ b/board/freescale/common/fsl_chain_of_trust.c @@ -6,7 +6,17 @@ #include <common.h> #include <fsl_validate.h> +#include <fsl_secboot_err.h> #include <fsl_sfp.h> +#include <dm/root.h> + +#ifdef CONFIG_ADDR_MAP +#include <asm/mmu.h> +#endif + +#ifdef CONFIG_FSL_CORENET +#include <asm/fsl_pamu.h> +#endif #ifdef CONFIG_LS102XA #include <asm/arch/immap_ls102xa.h> @@ -52,6 +62,7 @@ int fsl_check_boot_mode_secure(void) return 0; } +#ifndef CONFIG_SPL_BUILD int fsl_setenv_chain_of_trust(void) { /* Check Boot Mode @@ -68,3 +79,42 @@ int fsl_setenv_chain_of_trust(void) setenv("bootcmd", CONFIG_CHAIN_BOOT_CMD); return 0; } +#endif + +#ifdef CONFIG_SPL_BUILD +void spl_validate_uboot(uint32_t hdr_addr, uint32_t img_addr) +{ + int res; + + /* Check Boot Mode + * If Boot Mode is Non-Secure, skip validation + */ + if (fsl_check_boot_mode_secure() == 0) + return; + + printf("SPL: Validating U-Boot image\n"); + +#ifdef CONFIG_ADDR_MAP + init_addr_map(); +#endif + +#ifdef CONFIG_FSL_CORENET + if (pamu_init() < 0) + fsl_secboot_handle_error(ERROR_ESBC_PAMU_INIT); +#endif + +#ifdef CONFIG_FSL_CAAM + if (sec_init() < 0) + fsl_secboot_handle_error(ERROR_ESBC_SEC_INIT); +#endif + +#if defined(CONFIG_DM) + dm_init_and_scan(false); +#endif + res = fsl_secboot_validate(hdr_addr, CONFIG_SPL_UBOOT_KEY_HASH, + img_addr); + + if (res == 0) + printf("SPL: Validation of U-boot successful\n"); +} +#endif diff --git a/common/Makefile b/common/Makefile index 117178a..b070780 100644 --- a/common/Makefile +++ b/common/Makefile @@ -89,6 +89,8 @@ obj-$(CONFIG_USB_KEYBOARD) += usb_kbd.o endif # !CONFIG_SPL_BUILD ifdef CONFIG_SPL_BUILD +# core +obj-$(CONFIG_SPL_CRYPTO_SUPPORT) += hash.o obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o obj-$(CONFIG_SPL_NET_SUPPORT) += miiphyutil.o diff --git a/drivers/Makefile b/drivers/Makefile index e7eab66..943959b 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -36,6 +36,7 @@ obj-$(CONFIG_SPL_WATCHDOG_SUPPORT) += watchdog/ obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += usb/host/ obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/ obj-$(CONFIG_SPL_SATA_SUPPORT) += block/ +obj-$(CONFIG_SPL_CRYPTO_SUPPORT) += crypto/ else diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index b766470..29950cc 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -550,10 +550,26 @@ int sec_init(void) sec_out32(&sec->mcfgr, mcr); #ifdef CONFIG_FSL_CORENET +#ifdef CONFIG_SPL_BUILD + /* For SPL Build, Set the Liodns in SEC JR0 for + * creating PAMU entries corresponding to these. + * For normal build, these are set in set_liodns(). + */ + liodn_ns = CONFIG_SPL_JR0_LIODN_NS & JRNSLIODN_MASK; + liodn_s = CONFIG_SPL_JR0_LIODN_S & JRSLIODN_MASK; + + liodnr = sec_in32(&sec->jrliodnr[0].ls) & + ~(JRNSLIODN_MASK | JRSLIODN_MASK); + liodnr = liodnr | + (liodn_ns << JRNSLIODN_SHIFT) | + (liodn_s << JRSLIODN_SHIFT); + sec_out32(&sec->jrliodnr[0].ls, liodnr); +#else liodnr = sec_in32(&sec->jrliodnr[0].ls); liodn_ns = (liodnr & JRNSLIODN_MASK) >> JRNSLIODN_SHIFT; liodn_s = (liodnr & JRSLIODN_MASK) >> JRSLIODN_SHIFT; #endif +#endif ret = jr_init(); if (ret < 0) { diff --git a/drivers/mtd/nand/fsl_ifc_spl.c b/drivers/mtd/nand/fsl_ifc_spl.c index cbeb74a..30aa966 100644 --- a/drivers/mtd/nand/fsl_ifc_spl.c +++ b/drivers/mtd/nand/fsl_ifc_spl.c @@ -11,6 +11,9 @@ #include <asm/io.h> #include <fsl_ifc.h> #include <linux/mtd/nand.h> +#ifdef CONFIG_CHAIN_OF_TRUST +#include <fsl_validate.h> +#endif static inline int is_blank(uchar *addr, int page_size) { @@ -268,6 +271,27 @@ void nand_boot(void) */ flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE); #endif + +#ifdef CONFIG_CHAIN_OF_TRUST + /* + * As U-Boot header is appended at end of U-boot image, so + * calculate U-boot header address using U-boot header size. + */ +#define CONFIG_U_BOOT_HDR_ADDR \ + ((CONFIG_SYS_NAND_U_BOOT_START + \ + CONFIG_SYS_NAND_U_BOOT_SIZE) - \ + CONFIG_U_BOOT_HDR_SIZE) + spl_validate_uboot(CONFIG_U_BOOT_HDR_ADDR, + CONFIG_SYS_NAND_U_BOOT_START); + /* + * In case of failure in validation, spl_validate_uboot would + * not return back in case of Production environment with ITS=1. + * Thus U-Boot will not start. + * In Development environment (ITS=0 and SB_EN=1), the function + * may return back in case of non-fatal failures. + */ +#endif + uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START; uboot(); } diff --git a/include/fsl_validate.h b/include/fsl_validate.h index 83efcf4..a064954 100644 --- a/include/fsl_validate.h +++ b/include/fsl_validate.h @@ -207,4 +207,5 @@ int fsl_secboot_blob_decap(cmd_tbl_t *cmdtp, int flag, int argc, int fsl_check_boot_mode_secure(void); int fsl_setenv_chain_of_trust(void); +void spl_validate_uboot(uint32_t hdr_addr, uint32_t img_addr); #endif -- 1.8.1.4

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[U-Boot] Porting Linux's MTD/NAND changes into U-Boot
by Boris Brezillon 18 May '16

18 May '16

Hi Scott, I've recently contributed a lot of MTD/NAND related patches (and intend to continue doing so). Some of them are transversal changes touching the MTD and NAND framework internals, which implies patching all NAND drivers along with the core changes. All those changes are required to properly handle modern NANDs (MLC/TLC NANDs), and I need them to add proper NAND support to the sunxi platform (and more particularly to the C.H.I.P from NextThing Co.). So my question is, how should I port those changes to U-Boot? I see that your doing "synchronization commits", but in my case this mean including a bunch of driver specific changes into this "sync commit". I think it's also worth mentioning that I plan to heavily rework the Linux NAND framework to improve NAND performances on modern NAND controllers and clarify the NAND chip / NAND controller concepts, and other people are also working on merging the BBT code of the NAND and OneNAND framework. Which unfortunately means that we're not done porting invasive changes to U-Boot :-/. Any advice is welcome. Thanks, Boris -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com

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