February 2016 - U-Boot

[U-Boot] [PATCH v0 0/5] Some improvements for mvebu/a38x
by dirk.eibach＠gdsys.cc 24 Mar '16

24 Mar '16

From: Dirk Eibach <dirk.eibach(a)gdsys.cc> Dirk Eibach (5): pci: mvebu: Fix Armada 38x support arm: mvebu: Add gpio support arm: mvebu: Fix SAR1_CPU_CORE_MASK arm: mvebu: Fix ddr3_init() cpu config spi: Add support for Armada 38x second controller arch/arm/mach-mvebu/include/mach/gpio.h | 41 ++++++++++++++++- arch/arm/mach-mvebu/include/mach/soc.h | 1 + .../ddr/marvell/a38x/ddr3_hws_hw_training_def.h | 7 +-- drivers/ddr/marvell/a38x/ddr3_init.c | 2 - drivers/pci/pci_mvebu.c | 22 ++++----- drivers/spi/kirkwood_spi.c | 52 +++++++++++++++++++--- 6 files changed, 98 insertions(+), 27 deletions(-) -- 2.1.3

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[U-Boot] [PATCH] arm: mvebu: enable generic distro boot config
by Dennis Gilmore 24 Mar '16

24 Mar '16

Switch all of the mvebu boards to support disto generic booting This will enable Fedora, Debian and other distros to support mvebu systems easier. Tested on SolidRun ClearFog Signed-off-by: Dennis Gilmore <dgilmore(a)redhat.com> --- include/configs/clearfog.h | 5 --- include/configs/mv-common.h | 86 ++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 85 insertions(+), 6 deletions(-) diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index f0de827..926b3c5 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -104,11 +104,6 @@ #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ #define CONFIG_SYS_ALT_MEMTEST -/* Keep device tree and initrd in lower memory so the kernel can access them */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0x10000000\0" \ - "initrd_high=0x10000000\0" - /* SPL */ /* * Select the boot device here diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index d12d725..e219243 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -57,7 +57,7 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ 115200,230400, 460800, 921600 } /* auto boot */ -#define CONFIG_BOOTDELAY 3 /* default enable autoboot */ +#define CONFIG_BOOTDELAY 2 /* default enable autoboot */ #define CONFIG_PREBOOT #define CONFIG_OF_LIBFDT /* Device tree support */ @@ -152,4 +152,88 @@ #define CONFIG_LZO #endif +#ifndef CONFIG_SPL_BUILD +#include <config_distro_defaults.h> + +/* +* 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc. +* 32M uncompressed kernel, 16M compressed kernel, 1M fdt, +* 1M script, 1M pxe and the ramdisk at the end. +*/ +#define SDRAM_OFFSET(x) 0x0##x + +#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000)) +#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000)) +#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000)) +#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000)) +#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000)) + +#define MEM_LAYOUT_ENV_SETTINGS \ + "bootm_size=0xa000000\0" \ + "kernel_addr_r=" KERNEL_ADDR_R "\0" \ + "fdt_addr_r=" FDT_ADDR_R "\0" \ + "scriptaddr=" SCRIPT_ADDR_R "\0" \ + "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ + "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" + +#ifdef CONFIG_MMC +#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) +#else +#define BOOT_TARGET_DEVICES_MMC(func) +#endif + +#ifdef CONFIG_CMD_SATA +#define BOOT_TARGET_DEVICES_SATA(func) func(SATA, sata, 0) func(SATA, sata, 1) +#define CONFIG_PREBOOT "sata init" +#else +#define BOOT_TARGET_DEVICES_SATA(func) +#endif + +#ifdef CONFIG_USB_STORAGE +#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) +#else +#define BOOT_TARGET_DEVICES_USB(func) +#endif + +#define BOOT_TARGET_DEVICES(func) \ + BOOT_TARGET_DEVICES_MMC(func) \ + BOOT_TARGET_DEVICES_SATA(func) \ + BOOT_TARGET_DEVICES_USB(func) \ + func(PXE, pxe, na) + +#include <config_distro_bootcmd.h> + +#ifdef CONFIG_USB_KEYBOARD +#define CONSOLE_STDIN_SETTINGS \ + "preboot=usb start\0" \ + "stdin=serial,usbkbd\0" +#else +#define CONSOLE_STDIN_SETTINGS \ + "stdin=serial\0" +#endif + +#ifdef CONFIG_VIDEO +#define CONSOLE_STDOUT_SETTINGS \ + "stdout=serial,vga\0" \ + "stderr=serial,vga\0" +#else +#define CONSOLE_STDOUT_SETTINGS \ + "stdout=serial\0" \ + "stderr=serial\0" +#endif + +#define CONSOLE_ENV_SETTINGS \ + CONSOLE_STDIN_SETTINGS \ + CONSOLE_STDOUT_SETTINGS + +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONSOLE_ENV_SETTINGS \ + MEM_LAYOUT_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "console=ttyS0,115200\0" \ + BOOTENV +#else /* ifndef CONFIG_SPL_BUILD */ +#define CONFIG_EXTRA_ENV_SETTINGS +#endif + #endif /* _MV_COMMON_H */ -- 2.5.0

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[U-Boot] [PATCH 0/4] ARM: sheevaplug: misc fixes
by Peter Korsgaard 24 Mar '16

24 Mar '16

Hi, The following patch series fixes a number of issues I noticed while updating a sheevaplug from 2013.10 to 2016.01: Peter Korsgaard (4): ARM: sheevaplug: unbreak default environment ARM: sheevaplug: unbreak kernel bootargs / mtdparts command by dropping double mtdparts= ARM: sheevaplug: drop unneded 'usb start' from boot command ARM: sheevaplug: correct nand partition layout -- Bye, Peter Korsgaard

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[U-Boot] [PATCH] mtd: denali: fix warning when compiled for 64bit system
by Masahiro Yamada 23 Mar '16

23 Mar '16

The 64-bit compiler (ex. aarch64) emits "warning: cast from pointer to integer of different size". Make it work with 64bit DMA address while I am here. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- drivers/mtd/nand/denali.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index b94fb29..53e6956 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -747,7 +747,7 @@ static void denali_setup_dma(struct denali_nand_info *denali, int op) { uint32_t mode; const int page_count = 1; - uint32_t addr = (uint32_t)denali->buf.dma_buf; + uint64_t addr = (unsigned long)denali->buf.dma_buf; flush_dcache_range(addr, addr + sizeof(denali->buf.dma_buf)); @@ -765,7 +765,7 @@ static void denali_setup_dma(struct denali_nand_info *denali, int op) index_addr(denali, mode, addr); /* 3. set memory high address bits 64:32 */ - index_addr(denali, mode, 0); + index_addr(denali, mode, addr >> 32); #else mode = MODE_10 | BANK(denali->flash_bank); @@ -775,7 +775,7 @@ static void denali_setup_dma(struct denali_nand_info *denali, int op) index_addr(denali, mode | denali->page, 0x2000 | op | page_count); /* 2. set memory high address bits 23:8 */ - index_addr(denali, mode | ((addr >> 16) << 8), 0x2200); + index_addr(denali, mode | (((addr >> 16) & 0xffff) << 8), 0x2200); /* 3. set memory low address bits 23:8 */ index_addr(denali, mode | ((addr & 0xffff) << 8), 0x2300); -- 1.9.1

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[U-Boot] [PATCHv2 1/3] armv8: fsl-layerscape: add i/d-cache enable function to enable_caches
by Zhiqiang Hou 23 Mar '16

23 Mar '16

From: Hou Zhiqiang <Zhiqiang.Hou(a)freescale.com> This function assume that the d-cache and MMU has been enabled earlier, so it just created MMU table in main memory. But the assumption is not always correct, for example, the early setup is done in EL3, while enable_caches() is called when the PE has turned into another EL. Define the function mmu_setup() for fsl-layerscape to cover the weak one. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou(a)freescale.com> --- Tested on LS1043A RDB board V2: - Replace patch [PATCH 1/3] ARMv8/layerscape: Add mmu_init API arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 6ea28ed..3147870 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -393,15 +393,21 @@ int arch_cpu_init(void) return 0; } +void mmu_setup(void) +{ + final_mmu_setup(); +} + /* - * This function is called from lib/board.c. - * It recreates MMU table in main memory. MMU and d-cache are enabled earlier. - * There is no need to disable d-cache for this operation. + * This function is called from common/board_r.c. + * It recreates MMU table in main memory. */ void enable_caches(void) { - final_mmu_setup(); + mmu_setup(); __asm_invalidate_tlb_all(); + icache_enable(); + dcache_enable(); } #endif -- 2.1.0.27.g96db324

5 20

[U-Boot] [PATCH] eth: dtsec: fix TBI ANA setting bug in dtsec_configure_serdes()
by Yuanzheng Li 22 Mar '16

22 Mar '16

The TBI_ANA register is configurated with the wrong value 0x4001, refer to QorIQ Data Path Acceleration Architecture (DPAA) Reference Manual. It set the reserved areas, bit 1 and bit 11 to bit 15 in big endian, which should be cleared. But the normal functions of the auto-negotiation, e.g. Pause and Full Duplex, do not be set. There is no problem in the p2041rdb board, because the ppc is connected directly with the phy chip which support auto-negotiation by default in SGMII interface. But the link problem will occur when it is connected with a switch chip like BCM5389, the switch chip disable auto-negotiation by default, and the ppc also disable auto-negotiation, then there is no link between them. So use the vlue TBIANA_SETTINGS to enable the ppc's auto-negotiation. Signed-off-by: Yuanzheng Li <liyuanzheng01(a)163.com> Cc: York Sun <yorksun(a)freescale.com> --- drivers/net/fm/eth.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c index eb8e936..78c0988 100644 --- a/drivers/net/fm/eth.c +++ b/drivers/net/fm/eth.c @@ -81,7 +81,7 @@ qsgmii_loop: tsec_local_mdio_write(phyregs, in_be32(&regs->tbipa), 0, TBI_TBICON, TBICON_CLK_SELECT); tsec_local_mdio_write(phyregs, in_be32(&regs->tbipa), 0, TBI_ANA, - TBIANA_SGMII_ACK); + TBIANA_SETTINGS); tsec_local_mdio_write(phyregs, in_be32(&regs->tbipa), 0, TBI_CR, TBICR_SETTINGS); #endif -- 1.7.8

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[U-Boot] [PATCH] armv8/fsl-lsch2: fix sdhc clock frequency value
by Yangbo Lu 22 Mar '16

22 Mar '16

The eSDHC could select to use platform clock or peripheral clock to generate SD clock. The default selection is platform clock. So, fix the clock frequency value that's calculated for eSDHC. Signed-off-by: Yangbo Lu <yangbo.lu(a)nxp.com> --- arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c index 6f6a588..453a93d 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c @@ -106,9 +106,13 @@ void get_sys_info(struct sys_info *sys_info) #define HWA_CGA_M2_CLK_SEL 0x00000007 #define HWA_CGA_M2_CLK_SHIFT 0 #ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK rcw_tmp = in_be32(&gur->rcwsr[15]); rcw_tmp = (rcw_tmp & HWA_CGA_M2_CLK_SEL) >> HWA_CGA_M2_CLK_SHIFT; sys_info->freq_sdhc = freq_c_pll[1] / rcw_tmp; +#else + sys_info->freq_sdhc = sys_info->freq_systembus; +#endif #endif #if defined(CONFIG_FSL_IFC) -- 2.1.0.27.g96db324

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[U-Boot] [PATCH 2/2][v2] armv8: ls2085a: Remove phy configuration from QDS and RDB
by Prabhakar Kushwaha 22 Mar '16

22 Mar '16

From: Prabhakar Kushwaha <prabhakar(a)freescale.com> As phy_connect and phy_config are being called from DPAA2 driver. Remove calling of mentioned function from board file. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava(a)nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> --- Changes for v2: Sending as it is board/freescale/ls2080aqds/eth.c | 25 ------------------- board/freescale/ls2080ardb/eth_ls2080rdb.c | 39 ------------------------------ 2 files changed, 64 deletions(-) diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c index 42ff743..33ad7dc 100644 --- a/board/freescale/ls2080aqds/eth.c +++ b/board/freescale/ls2080aqds/eth.c @@ -548,12 +548,6 @@ void ls2080a_handle_phy_interface_sgmii(int dpmac_id) dpmac_info[dpmac_id].board_mux = EMI1_SLOT1; bus = mii_dev_for_muxval(EMI1_SLOT1); wriop_set_mdio(dpmac_id, bus); - dpmac_info[dpmac_id].phydev = phy_connect( - dpmac_info[dpmac_id].bus, - dpmac_info[dpmac_id].phy_addr, - NULL, - dpmac_info[dpmac_id].enet_if); - phy_config(dpmac_info[dpmac_id].phydev); break; case 2: /* Slot housing a SGMII riser card? */ @@ -562,12 +556,6 @@ void ls2080a_handle_phy_interface_sgmii(int dpmac_id) dpmac_info[dpmac_id].board_mux = EMI1_SLOT2; bus = mii_dev_for_muxval(EMI1_SLOT2); wriop_set_mdio(dpmac_id, bus); - dpmac_info[dpmac_id].phydev = phy_connect( - dpmac_info[dpmac_id].bus, - dpmac_info[dpmac_id].phy_addr, - NULL, - dpmac_info[dpmac_id].enet_if); - phy_config(dpmac_info[dpmac_id].phydev); break; case 3: break; @@ -606,12 +594,6 @@ serdes2: dpmac_info[dpmac_id].board_mux = EMI1_SLOT4; bus = mii_dev_for_muxval(EMI1_SLOT4); wriop_set_mdio(dpmac_id, bus); - dpmac_info[dpmac_id].phydev = phy_connect( - dpmac_info[dpmac_id].bus, - dpmac_info[dpmac_id].phy_addr, - NULL, - dpmac_info[dpmac_id].enet_if); - phy_config(dpmac_info[dpmac_id].phydev); break; case 5: break; @@ -679,13 +661,6 @@ void ls2080a_handle_phy_interface_qsgmii(int dpmac_id) dpmac_info[dpmac_id].board_mux = EMI1_SLOT1; bus = mii_dev_for_muxval(EMI1_SLOT1); wriop_set_mdio(dpmac_id, bus); - dpmac_info[dpmac_id].phydev = phy_connect( - dpmac_info[dpmac_id].bus, - dpmac_info[dpmac_id].phy_addr, - NULL, - dpmac_info[dpmac_id].enet_if); - - phy_config(dpmac_info[dpmac_id].phydev); break; case 3: break; diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c b/board/freescale/ls2080ardb/eth_ls2080rdb.c index db50e4e..58ea746 100644 --- a/board/freescale/ls2080ardb/eth_ls2080rdb.c +++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c @@ -20,42 +20,6 @@ DECLARE_GLOBAL_DATA_PTR; -int load_firmware_cortina(struct phy_device *phy_dev) -{ - if (phy_dev->drv->config) - return phy_dev->drv->config(phy_dev); - - return 0; -} - -void load_phy_firmware(void) -{ - int i; - u8 phy_addr; - struct phy_device *phy_dev; - struct mii_dev *dev; - phy_interface_t interface; - - /*Initialize and upload firmware for all the PHYs*/ - for (i = WRIOP1_DPMAC1; i <= WRIOP1_DPMAC8; i++) { - interface = wriop_get_enet_if(i); - if (interface == PHY_INTERFACE_MODE_XGMII) { - dev = wriop_get_mdio(i); - phy_addr = wriop_get_phy_address(i); - phy_dev = phy_find_by_mask(dev, 1 << phy_addr, - interface); - if (!phy_dev) { - printf("No phydev for phyaddr %d\n", phy_addr); - continue; - } - - /*Flash firmware for All CS4340 PHYS */ - if (phy_dev->phy_id == PHY_UID_CS4340) - load_firmware_cortina(phy_dev); - } - } -} - int board_eth_init(bd_t *bis) { #if defined(CONFIG_FSL_MC_ENET) @@ -125,9 +89,6 @@ int board_eth_init(bd_t *bis) } } - /* Load CORTINA CS4340 PHY firmware */ - load_phy_firmware(); - cpu_eth_init(bis); #endif /* CONFIG_FMAN_ENET */ -- 1.9.1

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[U-Boot] [PATCH 1/2][v2] driver: net: ldpaa_eth: Add support of PHY framework
by Prabhakar Kushwaha 22 Mar '16

22 Mar '16

This patch integrate DPAA2 ethernet driver existing PHY framework. Call phy_connect and phy_config as per available DPMAC id defined in SerDes Protcol. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava(a)nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> --- Changes for v2: Incorporated Joe Hershberger's comments drivers/net/ldpaa_eth/ldpaa_eth.c | 121 +++++++++++++++++++++++++++----------- 1 file changed, 87 insertions(+), 34 deletions(-) diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c index 7f96883..8a00bc3 100644 --- a/drivers/net/ldpaa_eth/ldpaa_eth.c +++ b/drivers/net/ldpaa_eth/ldpaa_eth.c @@ -14,15 +14,32 @@ #include <linux/compat.h> #include <fsl-mc/fsl_dpmac.h> +#include <fsl-mc/ldpaa_wriop.h> #include "ldpaa_eth.h" -#undef CONFIG_PHYLIB +#ifdef CONFIG_PHYLIB static int init_phy(struct eth_device *dev) { - /*TODO for external PHY */ + struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)dev->priv; + struct phy_device *phydev = NULL; + struct mii_dev *bus; - return 0; + bus = wriop_get_mdio(priv->dpmac_id); + if (bus == NULL) + return 0; + + phydev = phy_connect(bus, wriop_get_phy_address(priv->dpmac_id), + dev, wriop_get_enet_if(priv->dpmac_id)); + if (!phydev) { + printf("Failed to connect\n"); + return -1; + } + + priv->phydev = phydev; + + return phy_config(phydev); } +#endif #ifdef DEBUG static void ldpaa_eth_get_dpni_counter(void) @@ -380,7 +397,9 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) #ifdef DEBUG struct dpni_link_state link_state; #endif - int err; + int err = 0; + struct mii_dev *bus; + phy_interface_t enet_if; if (net_dev->state == ETH_STATE_ACTIVE) return 0; @@ -394,11 +413,48 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) printf("ERROR (DPL is deployed. No device available)\n"); return -ENODEV; } + /* DPMAC initialization */ err = ldpaa_dpmac_setup(priv); if (err < 0) goto err_dpmac_setup; +#ifdef CONFIG_PHYLIB + if (priv->phydev) + err = phy_startup(priv->phydev); + if (err) { + printf("%s: Could not initialize\n", + priv->phydev->dev->name); + goto err_dpamc_bind; + } +#else + priv->phydev = (struct phy_device *)malloc(sizeof(struct phy_device)); + memset(priv->phydev, 0, sizeof(struct phy_device)); + + priv->phydev->speed = SPEED_1000; + priv->phydev->link = 1; + priv->phydev->duplex = DUPLEX_FULL; +#endif + + bus = wriop_get_mdio(priv->dpmac_id); + enet_if = wriop_get_enet_if(priv->dpmac_id); + if ((bus == NULL) && + (enet_if == PHY_INTERFACE_MODE_XGMII)) { + priv->phydev = (struct phy_device *) + malloc(sizeof(struct phy_device)); + memset(priv->phydev, 0, sizeof(struct phy_device)); + + priv->phydev->speed = SPEED_10000; + priv->phydev->link = 1; + priv->phydev->duplex = DUPLEX_FULL; + } + + if (!priv->phydev->link) { + printf("%s: No link.\n", priv->phydev->dev->name); + err = -1; + goto err_dpamc_bind; + } + /* DPMAC binding DPNI */ err = ldpaa_dpmac_bind(priv); if (err) @@ -425,28 +481,24 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) return err; } -#ifdef CONFIG_PHYLIB - /* TODO Check this path */ - err = phy_startup(priv->phydev); - if (err) { - printf("%s: Could not initialize\n", priv->phydev->dev->name); - return err; - } -#else - priv->phydev->speed = SPEED_1000; - priv->phydev->link = 1; - priv->phydev->duplex = DUPLEX_FULL; -#endif - err = dpni_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle); if (err < 0) { printf("dpni_enable() failed\n"); return err; } - dpmac_link_state.rate = SPEED_1000; - dpmac_link_state.options = DPMAC_LINK_OPT_AUTONEG; - dpmac_link_state.up = 1; + dpmac_link_state.rate = priv->phydev->speed; + + if (priv->phydev->autoneg == AUTONEG_DISABLE) + dpmac_link_state.options &= ~DPMAC_LINK_OPT_AUTONEG; + else + dpmac_link_state.options |= DPMAC_LINK_OPT_AUTONEG; + + if (priv->phydev->duplex == DUPLEX_HALF) + dpmac_link_state.options |= DPMAC_LINK_OPT_HALF_DUPLEX; + + dpmac_link_state.up = priv->phydev->link; + err = dpmac_set_link_state(dflt_mc_io, MC_CMD_NO_FLAGS, priv->dpmac_handle, &dpmac_link_state); if (err < 0) { @@ -484,10 +536,7 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) goto err_qdid; } - if (!priv->phydev->link) - printf("%s: No link.\n", priv->phydev->dev->name); - - return priv->phydev->link ? 0 : -1; + return priv->phydev->link; err_qdid: err_rx_flow: @@ -495,9 +544,10 @@ err_rx_flow: err_dpni_bind: ldpaa_dpbp_free(); err_dpbp_setup: -err_dpamc_bind: dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle); err_dpni_setup: +err_dpamc_bind: + dpmac_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, priv->dpmac_handle); err_dpmac_setup: return err; } @@ -506,6 +556,9 @@ static void ldpaa_eth_stop(struct eth_device *net_dev) { struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)net_dev->priv; int err = 0; +#ifdef CONFIG_PHYLIB + struct mii_dev *bus = wriop_get_mdio(priv->dpmac_id); +#endif if ((net_dev->state == ETH_STATE_PASSIVE) || (net_dev->state == ETH_STATE_INIT)) @@ -531,7 +584,10 @@ static void ldpaa_eth_stop(struct eth_device *net_dev) printf("dpni_disable() failed\n"); #ifdef CONFIG_PHYLIB - phy_shutdown(priv->phydev); + if (priv->phydev && bus != NULL) + phy_shutdown(priv->phydev); + else + free(priv->phydev); #endif ldpaa_dpbp_free(); @@ -914,15 +970,12 @@ static int ldpaa_eth_netdev_init(struct eth_device *net_dev, net_dev->halt = ldpaa_eth_stop; net_dev->send = ldpaa_eth_tx; net_dev->recv = ldpaa_eth_pull_dequeue_rx; -/* - TODO: PHY MDIO information - priv->bus = info->bus; - priv->phyaddr = info->phy_addr; - priv->enet_if = info->enet_if; -*/ - if (init_phy(net_dev)) - return 0; +#ifdef CONFIG_PHYLIB + err = init_phy(net_dev); + if (err < 0) + return err; +#endif err = eth_register(net_dev); if (err < 0) { -- 1.9.1

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[U-Boot] [PATCH 1/2] boards: ls2080: Fix default bootargs
by York Sun 22 Mar '16

22 Mar '16

A white space is missing in multiple-line string for bootargs. Signed-off-by: York Sun <york.sun(a)nxp.com> --- include/configs/ls2080a_common.h | 2 +- include/configs/ls2080ardb.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 8bff81b..5e555aa 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -269,7 +269,7 @@ unsigned long long get_qixis_addr(void); " 0x580800000 \0" #define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \ - "earlycon=uart8250,mmio,0x21c0500" \ + "earlycon=uart8250,mmio,0x21c0500 " \ "ramdisk_size=0x2000000 default_hugepagesz=2m" \ " hugepagesz=2m hugepages=256" #define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x580700000 &&" \ diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index b2c0181..3ca8d08 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -333,7 +333,7 @@ unsigned long get_board_sys_clk(void); #undef CONFIG_BOOTARGS #define CONFIG_BOOTARGS "console=ttyS1,115200 root=/dev/ram0 " \ - "earlycon=uart8250,mmio,0x21c0600" \ + "earlycon=uart8250,mmio,0x21c0600 " \ "ramdisk_size=0x2000000 default_hugepagesz=2m" \ " hugepagesz=2m hugepages=256" -- 1.7.9.5

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