February 2016 - U-Boot

[U-Boot] [ANN] U-Boot v2016.03-rc1 released
by Tom Rini 03 Feb '16

03 Feb '16

Hey all, I've pushed v2016.03-rc1 out to the repository (and I see it) and tarballs will exist soon in the usual locations. The merge window is now closed. I intended to tag and push this on Monday but got caught up with some other stuff and decided it wouldn't hurt to just do it today, so here we are. There's a lot of things in here now but one thing I do want to call special attention to is that we've changed some of the default targets now when OF_CONTROL is set. The full thread can be seen at http://lists.denx.de/pipermail/u-boot/2016-February/244174.html but in short, when OF_CONTROL is set before we would have u-boot-dtb.img as the thing which could boot without changes and u-boot.img as the one needing a device tree added (same with .bin) and now u-boot.img has a device tree if it should have one and u-boot-nodtb.img is for cases where you add one in some other way (again, same with .bin). Thanks all and please report on problems you see and things I need to pickup (I know I have some stuff in my queue to apply ASAP). -- Tom

2 1

[U-Boot] [PATCHv4 0/9] Migrate NXP/Freescale Vybrid based boards to support pure DT
by Bhuvanchandra DV 02 Feb '16

02 Feb '16

Changes since v3: - Add missing space in device tree. - Reorder the patchset to avoid broken state. Changes since v2: - Split the patch for updating the license string. - Reorder the patchset to avoid broken state. Changes since v1: - Update the license string in device tree's. - Update all lpuart's uart nodes in device tree. - Dropped *_dtb_defconfig and updated the default defconfig's with DT support. - Reordered defconfig's using defconfig via savedefconfig. - Use one patch to update all Vybrid based board defconfig's. - Dropped vybrid_gpio driver legacy code. Thanks! Stefan for pointing this. - Dropped the legacy way of enabling GPIO, UART and SPI on NXP/Freescale Vybrid based board's. - Compile checked for vf610twr and pcm052 since I don't have access to such hardware at my end. Reviewer's and tester's welcome! Bhuvanchandra DV (9): arm: vybrid: Enable lpuart support arm: vybrid: Update the license string arm: colibri-vf: Enable serial support arm: vf610-twr: Add device tree file's arm: pcm052: Add device tree file's arm: vybrid: Update defconfig's arm: vybrid: Drop enabling GPIO, SPI and UART in legacy mode dm: lpuart: Drop the legacy code dm: vybrid_gpio: Drop legacy code arch/arm/dts/Makefile | 4 +- arch/arm/dts/pcm052.dts | 22 +++++++++ arch/arm/dts/vf-colibri.dtsi | 15 ++++-- arch/arm/dts/vf.dtsi | 48 +++++++++++++++++-- arch/arm/dts/vf500-colibri.dts | 5 -- arch/arm/dts/vf610-colibri.dts | 5 -- arch/arm/dts/vf610-twr.dts | 22 +++++++++ configs/colibri_vf_defconfig | 8 ++++ configs/colibri_vf_dtb_defconfig | 14 ------ configs/pcm052_defconfig | 7 +++ configs/vf610twr_defconfig | 7 +++ configs/vf610twr_nand_defconfig | 7 +++ drivers/gpio/vybrid_gpio.c | 18 ------- drivers/serial/serial_lpuart.c | 101 +-------------------------------------- include/configs/colibri_vf.h | 13 ----- include/configs/pcm052.h | 3 -- include/configs/vf610twr.h | 3 -- 17 files changed, 131 insertions(+), 171 deletions(-) create mode 100644 arch/arm/dts/pcm052.dts create mode 100644 arch/arm/dts/vf610-twr.dts delete mode 100644 configs/colibri_vf_dtb_defconfig -- 2.7.0

2 11

[U-Boot] [PATCH] imx: mx6sxsabresd: Add MCIMX28LCD display support
by Ye Li 02 Feb '16

02 Feb '16

The i.MX6SX SABRESD board supports MCIMX28LCD (800x480x24) at LCDIF1 port, enable this display feature by adding relevant BSP codes and configurations. Signed-off-by: Ye Li <ye.li(a)nxp.com> --- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 61 +++++++++++++++++++++++++++ include/configs/mx6sxsabresd.h | 20 +++++++++ 2 files changed, 81 insertions(+), 0 deletions(-) diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index 56dc020..886c883 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -59,6 +59,9 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ PAD_CTL_ODE) +#define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ + PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm) + int dram_init(void) { gd->ram_size = PHYS_SDRAM_SIZE; @@ -458,6 +461,60 @@ int board_qspi_init(void) } #endif +#ifdef CONFIG_VIDEO_MXS +static iomux_v3_cfg_t const lcd_pads[] = { + MX6_PAD_LCD1_CLK__LCDIF1_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_ENABLE__LCDIF1_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_HSYNC__LCDIF1_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_VSYNC__LCDIF1_VSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA00__LCDIF1_DATA_0 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA01__LCDIF1_DATA_1 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA02__LCDIF1_DATA_2 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA03__LCDIF1_DATA_3 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA04__LCDIF1_DATA_4 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA05__LCDIF1_DATA_5 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA06__LCDIF1_DATA_6 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA07__LCDIF1_DATA_7 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA08__LCDIF1_DATA_8 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA09__LCDIF1_DATA_9 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA10__LCDIF1_DATA_10 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA11__LCDIF1_DATA_11 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA12__LCDIF1_DATA_12 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA13__LCDIF1_DATA_13 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA14__LCDIF1_DATA_14 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA15__LCDIF1_DATA_15 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA16__LCDIF1_DATA_16 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA17__LCDIF1_DATA_17 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA18__LCDIF1_DATA_18 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA19__LCDIF1_DATA_19 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA20__LCDIF1_DATA_20 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA21__LCDIF1_DATA_21 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA22__LCDIF1_DATA_22 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_DATA23__LCDIF1_DATA_23 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD1_RESET__GPIO3_IO_27 | MUX_PAD_CTRL(NO_PAD_CTRL), + + /* Use GPIO for Brightness adjustment, duty cycle = period */ + MX6_PAD_SD1_DATA2__GPIO6_IO_4 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static int setup_lcd(void) +{ + enable_lcdif_clock(LCDIF1_BASE_ADDR); + + imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads)); + + /* Reset the LCD */ + gpio_direction_output(IMX_GPIO_NR(3, 27) , 0); + udelay(500); + gpio_direction_output(IMX_GPIO_NR(3, 27) , 1); + + /* Set Brightness to high */ + gpio_direction_output(IMX_GPIO_NR(6, 4) , 1); + + return 0; +} +#endif + int board_init(void) { /* Address of boot parameters */ @@ -471,6 +528,10 @@ int board_init(void) board_qspi_init(); #endif +#ifdef CONFIG_VIDEO_MXS + setup_lcd(); +#endif + return 0; } diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 0aec296..29e9c08 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -36,6 +36,7 @@ "fdt_addr=0x88000000\0" \ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ + "videomode=video=ctfb:x:800,y:480,depth:24,pclk:29850,le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0\0" \ "mmcdev=2\0" \ "mmcpart=1\0" \ "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ @@ -195,6 +196,25 @@ #define FSL_QSPI_FLASH_NUM 2 #endif +#ifndef CONFIG_SPL_BUILD +#define CONFIG_VIDEO +#ifdef CONFIG_VIDEO +#define CONFIG_CFB_CONSOLE +#define CONFIG_VIDEO_MXS +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_SW_CURSOR +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_CMD_BMP +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_VIDEO_BMP_LOGO +#define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR +#endif +#endif + #define CONFIG_ENV_OFFSET (8 * SZ_64K) #define CONFIG_ENV_SIZE SZ_8K #define CONFIG_ENV_IS_IN_MMC -- 1.7.4.1

2 1

[U-Boot] [PATCH 1/2] imx: mx6sx: Fix issue in LCDIF clock enablement
by Ye Li 02 Feb '16

02 Feb '16

Wrong checking for the base_addr paramter with LCDIF1 and LCDIF2. Always enter the -EINVAL return. Signed-off-by: Ye Li <ye.li(a)nxp.com> --- arch/arm/cpu/armv7/mx6/clock.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index 27a3f2f..007204d 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -742,8 +742,8 @@ int enable_lcdif_clock(u32 base_addr) u32 lcdif_clk_sel_mask, lcdif_ccgr3_mask; if (is_cpu_type(MXC_CPU_MX6SX)) { - if ((base_addr == LCDIF1_BASE_ADDR) || - (base_addr == LCDIF2_BASE_ADDR)) { + if ((base_addr != LCDIF1_BASE_ADDR) && + (base_addr != LCDIF2_BASE_ADDR)) { puts("Wrong LCD interface!\n"); return -EINVAL; } -- 1.7.4.1

2 5

[U-Boot] [PATCH] mx6slevk: Remove CONFIG_ETHPRIME option
by Fabio Estevam 02 Feb '16

02 Feb '16

From: Fabio Estevam <fabio.estevam(a)nxp.com> As mx6slevk has only one Ethernet port, we don't need to declare CONFIG_ETHPRIME, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam(a)nxp.com> --- include/configs/mx6slevk.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 6937924..6423796 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -53,7 +53,6 @@ #define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0 #define CONFIG_PHYLIB -- 1.9.1

2 1

[U-Boot] [PATCH V2] imx: MX6DQ{P}/DL:SABRESD Fix bmode eMMC failure
by Peng Fan 02 Feb '16

02 Feb '16

From: Ye Li <ye.li(a)nxp.com> The BOOTCFG value used by bmode for SABRESD eMMC boot are actually for SD card. Fixed the value to correct one. Signed-off-by: Ye Li <ye.li(a)nxp.com> Signed-off-by: Peng Fan <peng.fan(a)nxp.com> Reviewed-by: Stefano Babic <sbabic(a)denx.de> Cc: Fabio Estevam <fabio.estevam(a)nxp.com> --- Change V2: Fix commit log, following Fabio's comments. board/freescale/mx6sabresd/mx6sabresd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index d20953d..42f89ab 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -638,7 +638,7 @@ static const struct boot_mode board_boot_modes[] = { {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, {"sd3", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, /* 8 bit bus width */ - {"emmc", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {"emmc", MAKE_CFGVAL(0x60, 0x58, 0x00, 0x00)}, {NULL, 0}, }; #endif -- 2.6.2

3 2

[U-Boot] [PATCH] tqma6_wru4: Fix the reset delay for the the LAN8720 PHY
by Fabio Estevam 02 Feb '16

02 Feb '16

From: Fabio Estevam <fabio.estevam(a)nxp.com> According to the LAN8720 datasheet tpurstd (time that reset line should stay asserted) is 25ms. So do as suggested by the LAN8720 datasheet. Signed-off-by: Fabio Estevam <fabio.estevam(a)nxp.com> --- board/tqc/tqma6/tqma6_wru4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/tqc/tqma6/tqma6_wru4.c b/board/tqc/tqma6/tqma6_wru4.c index 4427799..c9a7ab7 100644 --- a/board/tqc/tqma6/tqma6_wru4.c +++ b/board/tqc/tqma6/tqma6_wru4.c @@ -177,7 +177,7 @@ static void setup_iomuxc_enet(void) ret = gpio_request(ENET_PHY_RESET_GPIO, "phy-reset"); if (!ret) gpio_direction_output(ENET_PHY_RESET_GPIO , 0); - udelay(1000); + udelay(25000); gpio_set_value(ENET_PHY_RESET_GPIO, 1); } -- 1.9.1

2 1

[U-Boot] [PATCH] mx6slevk: Fix the reset delay for the the LAN8720 PHY
by Fabio Estevam 02 Feb '16

02 Feb '16

From: Fabio Estevam <fabio.estevam(a)nxp.com> Since commit 59370f3fcd1350 ("net: phy: delay only if reset handler is registered") Ethernet is no longer functional. This commit does not have an issue in itself, but it revelead a problem with the Ethernet initialization. According to the LAN8720 datasheet tpurstd (time that reset line should stay asserted) is 25ms. So do as suggested in order to have Ethernet working again. Signed-off-by: Fabio Estevam <fabio.estevam(a)nxp.com> --- board/freescale/mx6slevk/mx6slevk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index 5eab4b5..721ec21 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -156,7 +156,7 @@ static void setup_iomux_fec(void) /* Reset LAN8720 PHY */ gpio_direction_output(ETH_PHY_RESET , 0); - udelay(1000); + udelay(25000); gpio_set_value(ETH_PHY_RESET, 1); } -- 1.9.1

2 1

[U-Boot] [PATCH v3 1/2] mx6: soc: Add ENET2 mac address support
by Ye Li 02 Feb '16

02 Feb '16

The i.MX6SX and i.MX6UL has two ENET controllers, add support for reading MAC address from fuse for ENET2. Signed-off-by: Ye Li <ye.li(a)nxp.com> --- Changes for v3: - Modify dev_id check expression according to Fabio's comment. Changes for v2: - Add second MAC address to README.imx6. - Rename mac_addr_low and mac_addr_high fields to mac_addr0 and mac_addr1 to align with the reigster names in RM. arch/arm/cpu/armv7/mx6/soc.c | 32 +++++++++++++++++++++-------- arch/arm/include/asm/arch-mx6/imx-regs.h | 23 ++------------------ doc/README.imx6 | 5 +++- 3 files changed, 30 insertions(+), 30 deletions(-) diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index bf5ae8c..ebe42b8 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -364,15 +364,29 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) struct fuse_bank4_regs *fuse = (struct fuse_bank4_regs *)bank->fuse_regs; - u32 value = readl(&fuse->mac_addr_high); - mac[0] = (value >> 8); - mac[1] = value ; - - value = readl(&fuse->mac_addr_low); - mac[2] = value >> 24 ; - mac[3] = value >> 16 ; - mac[4] = value >> 8 ; - mac[5] = value ; + if ((is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL)) && + dev_id == 1) { + u32 value = readl(&fuse->mac_addr2); + mac[0] = value >> 24 ; + mac[1] = value >> 16 ; + mac[2] = value >> 8 ; + mac[3] = value ; + + value = readl(&fuse->mac_addr1); + mac[4] = value >> 24 ; + mac[5] = value >> 16 ; + + } else { + u32 value = readl(&fuse->mac_addr1); + mac[0] = (value >> 8); + mac[1] = value ; + + value = readl(&fuse->mac_addr0); + mac[2] = value >> 24 ; + mac[3] = value >> 16 ; + mac[4] = value >> 8 ; + mac[5] = value ; + } } #endif diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index f24525e..5c45bf6 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -715,39 +715,22 @@ struct fuse_bank1_regs { u32 rsvd7[3]; }; -#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL)) struct fuse_bank4_regs { u32 sjc_resp_low; u32 rsvd0[3]; u32 sjc_resp_high; u32 rsvd1[3]; - u32 mac_addr_low; + u32 mac_addr0; u32 rsvd2[3]; - u32 mac_addr_high; + u32 mac_addr1; u32 rsvd3[3]; - u32 mac_addr2; + u32 mac_addr2; /*For i.MX6SX and i.MX6UL*/ u32 rsvd4[7]; u32 gp1; u32 rsvd5[3]; u32 gp2; u32 rsvd6[3]; }; -#else -struct fuse_bank4_regs { - u32 sjc_resp_low; - u32 rsvd0[3]; - u32 sjc_resp_high; - u32 rsvd1[3]; - u32 mac_addr_low; - u32 rsvd2[3]; - u32 mac_addr_high; - u32 rsvd3[0xb]; - u32 gp1; - u32 rsvd4[3]; - u32 gp2; - u32 rsvd5[3]; -}; -#endif struct aipstz_regs { u32 mprot0; diff --git a/doc/README.imx6 b/doc/README.imx6 index e26ab71..7c9a4ac 100644 --- a/doc/README.imx6 +++ b/doc/README.imx6 @@ -7,7 +7,10 @@ SoC. ----------------------------------- 1.1 MAC Address: It is stored in fuse bank 4, with the 32 lsbs in word 2 and the - 16 msbs in word 3. + 16 msbs in word 3[15:0]. + For i.MX6SX and i.MX6UL, they have two MAC addresses. The second MAC address + is stored in fuse bank 4, with the 16 lsb in word 3[31:16] and the 32 msbs in + word 4. Example: -- 1.7.4.1

2 3

[U-Boot] [PATCH] tools: mxsboot: Use more portable cpu_to_le32()
by Bin Meng 02 Feb '16

02 Feb '16

Currently when building mxsboot on certain machines it reports: HOSTCC tools/mxsboot tools/mxsboot.c: In function 'mx28_create_sd_image': tools/mxsboot.c:560: warning: implicit declaration of function 'htole32' /tmp/cchLIV6q.o: In function 'main': mxsboot.c:(.text+0x6d8): undefined reference to 'htole32' mxsboot.c:(.text+0x6e7): undefined reference to 'htole32' mxsboot.c:(.text+0x6f6): undefined reference to 'htole32' mxsboot.c:(.text+0x705): undefined reference to 'htole32' mxsboot.c:(.text+0x711): undefined reference to 'htole32' /tmp/cchLIV6q.o:mxsboot.c:(.text+0x71d): more undefined references to 'htole32' follow collect2: ld returned 1 exit status make[1]: *** [tools/mxsboot] Error 1 make: *** [tools] Error 2 The solution is to use cpu_to_le32() instead which is more portable, just like other U-Boot tools [1] do. [1] http://lists.denx.de/pipermail/u-boot/2014-October/192919.html Suggested-by: Marek Vasut <marex(a)denx.de> Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> --- tools/mxsboot.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/tools/mxsboot.c b/tools/mxsboot.c index 3434c81..457f435 100644 --- a/tools/mxsboot.c +++ b/tools/mxsboot.c @@ -557,15 +557,15 @@ static int mx28_create_sd_image(int infd, int outfd) cb = (struct mx28_sd_config_block *)buf; - cb->signature = htole32(0x00112233); - cb->primary_boot_tag = htole32(0x1); - cb->secondary_boot_tag = htole32(0x1); - cb->num_copies = htole32(1); - cb->drv_info[0].chip_num = htole32(0x0); - cb->drv_info[0].drive_type = htole32(0x0); - cb->drv_info[0].tag = htole32(0x1); - cb->drv_info[0].first_sector_number = htole32(sd_sector + 4); - cb->drv_info[0].sector_count = htole32((size - 4) / 512); + cb->signature = cpu_to_le32(0x00112233); + cb->primary_boot_tag = cpu_to_le32(0x1); + cb->secondary_boot_tag = cpu_to_le32(0x1); + cb->num_copies = cpu_to_le32(1); + cb->drv_info[0].chip_num = cpu_to_le32(0x0); + cb->drv_info[0].drive_type = cpu_to_le32(0x0); + cb->drv_info[0].tag = cpu_to_le32(0x1); + cb->drv_info[0].first_sector_number = cpu_to_le32(sd_sector + 4); + cb->drv_info[0].sector_count = cpu_to_le32((size - 4) / 512); wr_size = write(outfd, buf, size); if (wr_size != size) { -- 1.8.2.1

3 2