February 2016 - U-Boot

[U-Boot] [PATCH v2] sunxi: power: add support for sy8106a driver
by Jelle van der Waa 23 Feb '16

23 Feb '16

SY8106A is a PMIC which is used on the Allwinner H3 Orange Pi Pc and Plus board. The VOUT1_SEL register is implemented to set the default V-CPU voltage to 1200 mV. This driver is required to retain the SY8106A V-CPU voltage after a software reset. On cold boot the default SY8106A output voltage is selected by a pair of resistors and happens to be 1.2V on the Orange Pi PC and Plus. Signed-off-by: Jelle van der Waa <jelle(a)vdwaa.nl> Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> Tested-by: Siarhei Siamashka <siarhei.siamashka(a)gmail.com> Acked-by: Siarhei Siamashka <siarhei.siamashka(a)gmail.com> --- Changes in v2 - Fixed typo in commit message thea => the. - Made config R_I2C_ENABLE depend on SY8106A_POWER. - Removed 'default n' from config R_I2C_ENABLE - Changed SY8106A_POWER description from "most" to "some" boards. - Added license/copyright to include/sy8106a.h and drivers/power/sy8106a.c. --- board/sunxi/Kconfig | 5 ++++- board/sunxi/board.c | 5 +++++ configs/orangepi_pc_defconfig | 2 +- drivers/power/Kconfig | 16 ++++++++++++++++ drivers/power/Makefile | 1 + drivers/power/sy8106a.c | 29 +++++++++++++++++++++++++++++ include/configs/sunxi-common.h | 6 ++++-- include/sy8106a.h | 11 +++++++++++ 8 files changed, 71 insertions(+), 4 deletions(-) create mode 100644 drivers/power/sy8106a.c create mode 100644 include/sy8106a.h diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index a334aa3..5e9d3af 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -372,11 +372,14 @@ config I2C3_ENABLE See I2C0_ENABLE help text. endif +if SUNXI_GEN_SUN6I config R_I2C_ENABLE bool "Enable the PRCM I2C/TWI controller" - default n + # This is used for the pmic on H3 + default y if SY8106A_POWER ---help--- Set this to y to enable the I2C controller which is part of the PRCM. +endif if MACH_SUN7I config I2C4_ENABLE diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 420481a..15b7af6 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -25,6 +25,7 @@ #include <asm/io.h> #include <nand.h> #include <net.h> +#include <sy8106a.h> #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) /* So that we can use pin names in Kconfig and sunxi_name_to_gpio() */ @@ -436,6 +437,10 @@ void sunxi_board_init(void) int power_failed = 0; unsigned long ramsize; +#ifdef CONFIG_SY8106A_POWER + power_failed = sy8106a_set_vout1(CONFIG_SY8106A_VOUT1_VOLT); +#endif + #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER power_failed = axp_init(); diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig index ea9ed87..29a8da6 100644 --- a/configs/orangepi_pc_defconfig +++ b/configs/orangepi_pc_defconfig @@ -12,4 +12,4 @@ CONFIG_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y -CONFIG_R_I2C_ENABLE=y +CONFIG_SY8106A_POWER=y diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index 10683a2..adc6455 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -48,6 +48,13 @@ config AXP818_POWER Say y here to enable support for the axp818 pmic found on A83T dev board. +config SY8106A_POWER + boolean "SY8106A pmic support" + depends on MACH_SUN8I_H3 + ---help--- + Select this to enable support for the SY8106A pmic found on some + H3 boards. + endchoice config AXP_DCDC1_VOLT @@ -232,4 +239,13 @@ config AXP_ELDO3_VOLT 1.2V for the SSD2828 chip (converter of parallel LCD interface into MIPI DSI). +config SY8106A_VOUT1_VOLT + int "SY8106A pmic VOUT1 voltage" + depends on SY8106A_POWER + default 1200 + ---help--- + Set the voltage (mV) to program the SY8106A pmic VOUT1. This + is typically used to power the VDD-CPU and should be 1200mV. + Values can range from 680mV till 1950mV. + endmenu diff --git a/drivers/power/Makefile b/drivers/power/Makefile index 0fdbca3..690faa0 100644 --- a/drivers/power/Makefile +++ b/drivers/power/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_AXP221_POWER) += axp221.o obj-$(CONFIG_AXP818_POWER) += axp818.o obj-$(CONFIG_EXYNOS_TMU) += exynos-tmu.o obj-$(CONFIG_FTPMU010_POWER) += ftpmu010.o +obj-$(CONFIG_SY8106A_POWER) += sy8106a.o obj-$(CONFIG_TPS6586X_POWER) += tps6586x.o obj-$(CONFIG_TWL4030_POWER) += twl4030.o obj-$(CONFIG_TWL6030_POWER) += twl6030.o diff --git a/drivers/power/sy8106a.c b/drivers/power/sy8106a.c new file mode 100644 index 0000000..bbf116f --- /dev/null +++ b/drivers/power/sy8106a.c @@ -0,0 +1,29 @@ +/* + * (C) Copyright 2016 + * Jelle van der Waa <jelle(a)vdwaa.nl> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <i2c.h> +#include <sy8106a.h> + +#define SY8106A_I2C_ADDR 0x65 +#define SY8106A_VOUT1_SEL 1 +#define SY8106A_VOUT1_SEL_ENABLE (1 << 7) + +static u8 sy8106a_mvolt_to_cfg(int mvolt, int min, int max, int div) +{ + if (mvolt < min) + mvolt = min; + else if (mvolt > max) + mvolt = max; + + return (mvolt - min) / div; +} + +int sy8106a_set_vout1(unsigned int mvolt) +{ + u8 data = sy8106a_mvolt_to_cfg(mvolt, 680, 1950, 10) | SY8106A_VOUT1_SEL_ENABLE; + return i2c_write(SY8106A_I2C_ADDR, SY8106A_VOUT1_SEL, 1, &data, 1); +} diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index b4dfb3c..40850e5 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -206,7 +206,8 @@ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK /* I2C */ -#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER +#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ + defined CONFIG_SY8106A_POWER #define CONFIG_SPL_I2C_SUPPORT #endif @@ -240,7 +241,8 @@ extern int soft_i2c_gpio_scl; /* PMU */ #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ - defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER + defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \ + defined CONFIG_SY8106A_POWER #define CONFIG_SPL_POWER_SUPPORT #endif diff --git a/include/sy8106a.h b/include/sy8106a.h new file mode 100644 index 0000000..32e8c43 --- /dev/null +++ b/include/sy8106a.h @@ -0,0 +1,11 @@ +/* + * (C) Copyright 2016 + * Jelle van der Waa <jelle(a)vdwaa.nl> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef _SY8106A_PMIC_H_ + +int sy8106a_set_vout1(unsigned int mvolt); + +#endif -- 2.7.1

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[U-Boot] [PATCH] mx53ard: Move to booting zImage
by Fabio Estevam 23 Feb '16

23 Feb '16

Move to booting a zImage kernel by default to align with the other i.MX boards. While at it, adjust the fdt_addr so that we can boot a standard mainline kernel. Signed-off-by: Fabio Estevam <fabio.estevam(a)nxp.com> --- include/configs/mx53ard.h | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h index fdb4134..25a4630 100644 --- a/include/configs/mx53ard.h +++ b/include/configs/mx53ard.h @@ -31,6 +31,8 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_MXC_GPIO +#define CONFIG_CMD_BOOTZ + #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI #define CONFIG_NAND_MXC @@ -93,12 +95,12 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ - "uimage=uImage\0" \ + "uimage=zImage\0" \ "console=ttymxc0\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "fdt_addr=0x71000000\0" \ + "fdt_addr=0x78000000\0" \ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ @@ -130,16 +132,16 @@ "run mmcargs; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ "if run loadfdt; then " \ - "bootm ${loadaddr} - ${fdt_addr}; " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ "else " \ "if test ${boot_fdt} = try; then " \ - "bootm; " \ + "bootz; " \ "else " \ "echo WARN: Cannot load the DT; " \ "fi; " \ "fi; " \ "else " \ - "bootm; " \ + "bootz; " \ "fi;\0" \ "netargs=setenv bootargs console=${console},${baudrate} " \ "root=/dev/nfs " \ @@ -154,16 +156,16 @@ "${get_cmd} ${uimage}; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ - "bootm ${loadaddr} - ${fdt_addr}; " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ "else " \ "if test ${boot_fdt} = try; then " \ - "bootm; " \ + "bootz; " \ "else " \ "echo WARN: Cannot load the DT; " \ "fi; " \ "fi; " \ "else " \ - "bootm; " \ + "bootz; " \ "fi;\0" #define CONFIG_BOOTCOMMAND \ -- 1.9.1

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Re: [U-Boot] Problem with attaching UBI partition
by Bakhvalov, Denis (Nokia - PL/Wroclaw) 23 Feb '16

23 Feb '16

Hi, I found that I have problem with reading flash contents: When dumping the flash from Linux env: $ cat /dev/mtd5 > /tmp/flash.bin 00000000: 55424923 01000000 00000000 00000003 But when I dump the flash contents from U-Boot I see this: => sf read 0x1B000000 0x01B00000 0x1000 => md 0x1B000000 1b000000: 494255ff 00000123 00000000 00000000 So, that's why I see this print: ubi0 warning: ubi_io_read_ec_hdr: bad magic number at PEB 0: ff554249 instead of 55424923 I will investigate why data was read from flash incorrectly. Best regards, Denis Bakhvalov

1 0

[U-Boot] [PATCH] test/py: Add option to skip SPL signature checking
by Michal Simek 23 Feb '16

23 Feb '16

Provide user option to skip SPL signature verification for cases where u-boot is build with SPL support but full U-Boot is also verified without SPL. If you want to support this feature please add env__spl_skipped = True to your boardenv configuration file. For example Xilinx Zynq is using this feature where the same u-boot binary is checked with SPL and without SPL(with FSBL). Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- test/py/u_boot_console_base.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/test/py/u_boot_console_base.py b/test/py/u_boot_console_base.py index d6502c6e64cb..e50885d51aa4 100644 --- a/test/py/u_boot_console_base.py +++ b/test/py/u_boot_console_base.py @@ -307,7 +307,9 @@ class ConsoleBase(object): config_spl = bcfg.get('config_spl', 'n') == 'y' config_spl_serial_support = bcfg.get('config_spl_serial_support', 'n') == 'y' - if config_spl and config_spl_serial_support: + config_spl_skip = self.config.env.get('env__spl_skipped', + False) + if config_spl and config_spl_serial_support and not config_spl_skip: m = self.p.expect([pattern_u_boot_spl_signon] + self.bad_patterns) if m != 0: -- 1.9.1

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[U-Boot] [PATCH 1/2] serial: dcc: Move driver to DM
by Michal Simek 23 Feb '16

23 Feb '16

Enabling this driver requires some DT changes. Adding DCC to root or main bus: dcc: dcc { compatible = "arm,dcc"; u-boot,dm-pre-reloc; }; Extend alias list to link DCC: serial0 = &uart0; serial1 = &uart1; serial2 = &dcc; Change stdout-path to point to dcc port. stdout-path = "serial2:115200n8"; Also add support for debug uart to help with early debug. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- drivers/serial/Kconfig | 5 ++++ drivers/serial/arm_dcc.c | 63 +++++++++++++++++++++++++++++------------------- 2 files changed, 43 insertions(+), 25 deletions(-) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index fac317610e2a..7c18a6218b1f 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -119,6 +119,11 @@ config DEBUG_UART_UARTLITE You will need to provide parameters to make this work. The driver will be available until the real driver-model serial is running. +config DEBUG_UART_ARM_DCC + bool "ARM DCC" + help + Select this to enable a debug UART using the ARM DCC port. + config DEBUG_UART_ZYNQ bool "Xilinx Zynq" help diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c index 4624666e8a2c..07981e18ee49 100644 --- a/drivers/serial/arm_dcc.c +++ b/drivers/serial/arm_dcc.c @@ -1,6 +1,7 @@ /* * Copyright (C) 2004-2007 ARM Limited. * Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj(a)jcrosoft.com> + * Copyright (C) 2015 - 2016 Xilinx, Inc, Michal Simek * * SPDX-License-Identifier: GPL-2.0 * @@ -16,6 +17,7 @@ */ #include <common.h> +#include <dm.h> #include <serial.h> #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V7) @@ -94,12 +96,7 @@ #define TIMEOUT_COUNT 0x4000000 -static int arm_dcc_init(void) -{ - return 0; -} - -static int arm_dcc_getc(void) +static int arm_dcc_getc(struct udevice *dev) { int ch; register unsigned int reg; @@ -112,7 +109,7 @@ static int arm_dcc_getc(void) return ch; } -static void arm_dcc_putc(char ch) +static int arm_dcc_putc(struct udevice *dev, char ch) { register unsigned int reg; unsigned int timeout_count = TIMEOUT_COUNT; @@ -123,41 +120,57 @@ static void arm_dcc_putc(char ch) break; } if (timeout_count == 0) - return; + return -EAGAIN; else write_dcc(ch); + + return 0; } -static int arm_dcc_tstc(void) +static int arm_dcc_pending(struct udevice *dev, bool input) { register unsigned int reg; - can_read_dcc(reg); + if (input) { + can_read_dcc(reg); + } else { + can_write_dcc(reg); + } return reg; } -static void arm_dcc_setbrg(void) -{ -} +static const struct dm_serial_ops arm_dcc_ops = { + .putc = arm_dcc_putc, + .pending = arm_dcc_pending, + .getc = arm_dcc_getc, +}; + +static const struct udevice_id arm_dcc_ids[] = { + { .compatible = "arm,dcc", }, + { } +}; -static struct serial_device arm_dcc_drv = { +U_BOOT_DRIVER(serial_dcc) = { .name = "arm_dcc", - .start = arm_dcc_init, - .stop = NULL, - .setbrg = arm_dcc_setbrg, - .putc = arm_dcc_putc, - .puts = default_serial_puts, - .getc = arm_dcc_getc, - .tstc = arm_dcc_tstc, + .id = UCLASS_SERIAL, + .of_match = arm_dcc_ids, + .ops = &arm_dcc_ops, + .flags = DM_FLAG_PRE_RELOC, }; -void arm_dcc_initialize(void) +#ifdef CONFIG_DEBUG_UART_ARM_DCC + +#include <debug_uart.h> + +static inline void _debug_uart_init(void) { - serial_register(&arm_dcc_drv); } -__weak struct serial_device *default_serial_console(void) +static inline void _debug_uart_putc(int ch) { - return &arm_dcc_drv; + arm_dcc_putc(NULL, ch); } + +DEBUG_UART_FUNCS +#endif -- 1.9.1

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[U-Boot] [PATCH v3 0/3] Kbuild fixes
by Masahiro Yamada 23 Feb '16

23 Feb '16

Changes in v3: - Drop 2/4 ("kbuild: sunxi: fix build rule of sunxi-spl.bin") as well Changes in v2: - Drop 3/5 ("kbuild: use $(call cmd, ) rather than $(call if_changed, ) where possible") - add tools/fdtgrep to the dependency Masahiro Yamada (3): kbuild: remove unneeded ifdef conditionals around build rules kbuild: add missing FORCE where $(call if_changed, ) is used kbuild: fix build rule of u-boot-spl.dtb Makefile | 12 ++++++------ scripts/Makefile.spl | 18 +++++++----------- 2 files changed, 13 insertions(+), 17 deletions(-) -- 1.9.1

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[U-Boot] uboot fdt commands
by Damien Wei Huang 23 Feb '16

23 Feb '16

Hi This question is regarding to uboot commands I use the uboot "fdt mknode" command to create two nodes as below uboot> fdt resize uboot> fdt mknode /my_light_pinctrl uboot> fdt set /my_light_pintrl fsl,pins <1 2 3 4 5 6> uboot> fdt mknode /my_light uboot> fdt /my_light pinctrl-names default uboot> fdt /my_light pinctrl-0 <asign to my_light_pinctrl> but I don't know to write and get the last line working in uboot, because I don't know the phandle of the newly created node "my_light_pinctrl". Can someone help? Cheers,

2 1

[U-Boot] [PATCH 00/16] image: Fix various test failures
by Simon Glass 23 Feb '16

23 Feb '16

Recent changes have broken the FIT and vboot tests. Also the SPI tests have been wrong since before the last release and were disabled. This series collects together the required fixes. Note: The FIT and vboot tests are hard to run (in that each requires manual effort). At some point we should be able to bring these into Stephen Warren's test framework. Simon Glass (16): image: Correct the OS location code to work on sandbox Revert "image-fit: Fix signature checking" image: Fix FIT and vboot tests to exit sandbox correctly trace: Fix compiler warnings in trace lib: Don't instrument the div64 function trace: Improve the trace test number recognition timer: Support tracing fully timer: Provide an early timer timer: Set up the real timer after driver model is available sandbox: timer: Support the early timer sandbox: Correct ordering of defconfig sandbox: Enable the early timer sandbox: spi: Add more debugging to SPI emulation sandbox: spi: Remove an incorrect free() spi: Correct two error return values spi: Re-enable the SPI flash tests cmd/trace.c | 4 ++-- common/board_f.c | 6 ++++++ common/board_r.c | 14 ++++++++++++-- common/bootm.c | 2 +- common/image-fit.c | 16 +++++++++++++--- configs/sandbox_defconfig | 11 ++++++----- drivers/mtd/spi/sandbox.c | 14 ++++++++++---- drivers/mtd/spi/sf_probe.c | 4 +--- drivers/mtd/spi/spi_flash.c | 2 +- drivers/timer/Kconfig | 10 ++++++++++ drivers/timer/sandbox_timer.c | 14 ++++++++++++-- drivers/timer/timer-uclass.c | 6 +++--- include/image.h | 5 +---- include/timer.h | 21 +++++++++++++++++++++ lib/div64.c | 3 ++- lib/time.c | 28 +++++++++++++++++++++------- test/dm/Makefile | 4 ++-- test/image/test-fit.py | 4 ++++ test/trace/test-trace.sh | 4 +++- test/vboot/sandbox-u-boot.dts | 3 +++ 20 files changed, 134 insertions(+), 41 deletions(-) -- 2.7.0.rc3.207.g0ac5344

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[U-Boot] fdtgrep results in Segmentation fault for 64bit DT
by Masahiro Yamada 23 Feb '16

23 Feb '16

Hi Simon, I am working on U-Boot support on my new ARMv8 SoC. I was hit by a problem with fdtgrep. (Note: CONFIG_SPL_OF_CONTROL is on UniPhier SoC family) CC spl/lib/time.o CC spl/lib/rand.o CC spl/lib/vsprintf.o CC spl/lib/panic.o CC spl/lib/strto.o LD spl/lib/built-in.o LDS spl/u-boot-spl.lds LD spl/u-boot-spl OBJCOPY spl/u-boot-spl-nodtb.bin FDTGREP spl/u-boot-spl.dtb Error: FDT_ERR_BADMAGIC make[2]: *** [spl/u-boot-spl.dtb] Error 1 make[1]: *** [spl/u-boot-spl] Error 2 make[1]: Leaving directory `/home/yamada/workspace/u-boot-unph' make: *** [u-boot] Error 2 On my command line, $ tools/fdtgrep -b u-boot,dm-pre-reloc -RT dts/dt.dtb -n /chosen -O dtb Segmentation fault (core dumped) Could you take a look? My DT looks like follows: (It was taken from linux/arch/arm/boot/dts/socionext/uniphier-ph1-ld10-ref.dts, and it is working on Linux. I just added "u-boot,dm-pre-reloc" to some nodes. So it should be correct.) yamada@beagle:~/workspace/u-boot-unph$ fdtdump dts/dt.dtb /dts-v1/; // magic: 0xd00dfeed // totalsize: 0x18f8 (6392) // off_dt_struct: 0x38 // off_dt_strings: 0x178c // off_mem_rsvmap: 0x28 // version: 17 // last_comp_version: 16 // boot_cpuid_phys: 0x0 // size_dt_strings: 0x16c // size_dt_struct: 0x1754 / { compatible = "socionext,ph1-ld10-ref", "socionext,ph1-ld10"; #address-cells = <0x00000002>; #size-cells = <0x00000002>; interrupt-parent = <0x00000001>; model = "UniPhier PH1-LD10 Reference Board"; cpus { #address-cells = <0x00000002>; #size-cells = <0x00000000>; cpu-map { cluster0 { core0 { cpu = <0x00000002>; }; core1 { cpu = <0x00000003>; }; }; cluster1 { core0 { cpu = <0x00000004>; }; core1 { cpu = <0x00000005>; }; }; }; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x00000000 0x00000000>; enable-method = "spin-table"; cpu-release-addr = <0x00000000 0x80000100>; linux,phandle = <0x00000002>; phandle = <0x00000002>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x00000000 0x00000001>; enable-method = "spin-table"; cpu-release-addr = <0x00000000 0x80000100>; linux,phandle = <0x00000003>; phandle = <0x00000003>; }; cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x00000000 0x00000100>; enable-method = "spin-table"; cpu-release-addr = <0x00000000 0x80000100>; linux,phandle = <0x00000004>; phandle = <0x00000004>; }; cpu@101 { device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x00000000 0x00000101>; enable-method = "spin-table"; cpu-release-addr = <0x00000000 0x80000100>; linux,phandle = <0x00000005>; phandle = <0x00000005>; }; }; clocks { uart_clk { #clock-cells = <0x00000000>; compatible = "fixed-clock"; clock-frequency = <0x038185a0>; linux,phandle = <0x00000007>; phandle = <0x00000007>; }; i2c_clk { #clock-cells = <0x00000000>; compatible = "fixed-clock"; clock-frequency = <0x02faf080>; linux,phandle = <0x0000000c>; phandle = <0x0000000c>; }; }; timer { compatible = "arm,armv8-timer"; interrupts = <0x00000001 0x0000000d 0x00000f01 0x00000001 0x0000000e 0x00000f01 0x00000001 0x0000000b 0x00000f01 0x00000001 0x0000000a 0x00000f01>; }; soc { compatible = "simple-bus"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>; u-boot,dm-pre-reloc; serial@54006800 { compatible = "socionext,uniphier-uart"; status = "okay"; reg = <0x54006800 0x00000040>; interrupts = <0x00000000 0x00000021 0x00000004>; pinctrl-names = "default"; pinctrl-0 = <0x00000006>; clocks = <0x00000007>; u-boot,dm-pre-reloc; }; serial@54006900 { compatible = "socionext,uniphier-uart"; status = "disabled"; reg = <0x54006900 0x00000040>; interrupts = <0x00000000 0x00000023 0x00000004>; pinctrl-names = "default"; pinctrl-0 = <0x00000008>; clocks = <0x00000007>; }; serial@54006a00 { compatible = "socionext,uniphier-uart"; status = "disabled"; reg = <0x54006a00 0x00000040>; interrupts = <0x00000000 0x00000025 0x00000004>; pinctrl-names = "default"; pinctrl-0 = <0x00000009>; clocks = <0x00000007>; }; serial@54006b00 { compatible = "socionext,uniphier-uart"; status = "disabled"; reg = <0x54006b00 0x00000040>; interrupts = <0x00000000 0x000000b1 0x00000004>; pinctrl-names = "default"; pinctrl-0 = <0x0000000a>; clocks = <0x00000007>; }; i2c@58780000 { compatible = "socionext,uniphier-fi2c"; status = "okay"; reg = <0x58780000 0x00000080>; #address-cells = <0x00000001>; #size-cells = <0x00000000>; interrupts = <0x00000000 0x00000029 0x00000004>; pinctrl-names = "default"; pinctrl-0 = <0x0000000b>; clocks = <0x0000000c>; clock-frequency = <0x000186a0>; }; i2c@58781000 { compatible = "socionext,uniphier-fi2c"; status = "disabled"; reg = <0x58781000 0x00000080>; #address-cells = <0x00000001>; #size-cells = <0x00000000>; interrupts = <0x00000000 0x0000002a 0x00000004>; pinctrl-names = "default"; pinctrl-0 = <0x0000000d>; clocks = <0x0000000c>; clock-frequency = <0x000186a0>; }; i2c@58782000 { compatible = "socionext,uniphier-fi2c"; status = "disabled"; reg = <0x58782000 0x00000080>; #address-cells = <0x00000001>; #size-cells = <0x00000000>; interrupts = <0x00000000 0x0000002b 0x00000004>; pinctrl-names = "default"; pinctrl-0 = <0x0000000e>; clocks = <0x0000000c>; clock-frequency = <0x000186a0>; }; i2c@58783000 { compatible = "socionext,uniphier-fi2c"; status = "disabled"; reg = <0x58783000 0x00000080>; #address-cells = <0x00000001>; #size-cells = <0x00000000>; interrupts = <0x00000000 0x0000002c 0x00000004>; pinctrl-names = "default"; pinctrl-0 = <0x0000000f>; clocks = <0x0000000c>; clock-frequency = <0x000186a0>; }; i2c@58784000 { compatible = "socionext,uniphier-fi2c"; reg = <0x58784000 0x00000080>; #address-cells = <0x00000001>; #size-cells = <0x00000000>; interrupts = <0x00000000 0x0000002d 0x00000004>; clocks = <0x0000000c>; clock-frequency = <0x00061a80>; }; i2c@58785000 { compatible = "socionext,uniphier-fi2c"; reg = <0x58785000 0x00000080>; #address-cells = <0x00000001>; #size-cells = <0x00000000>; interrupts = <0x00000000 0x00000019 0x00000004>; clocks = <0x0000000c>; clock-frequency = <0x00061a80>; }; i2c@58786000 { compatible = "socionext,uniphier-fi2c"; reg = <0x58786000 0x00000080>; #address-cells = <0x00000001>; #size-cells = <0x00000000>; interrupts = <0x00000000 0x0000001a 0x00000004>; clocks = <0x0000000c>; clock-frequency = <0x00061a80>; }; system-bus@58c00000 { compatible = "socionext,uniphier-system-bus"; reg = <0x58c00000 0x00000400>; #address-cells = <0x00000002>; #size-cells = <0x00000001>; }; smpctrl@59800000 { compatible = "socionext,uniphier-smpctrl"; reg = <0x59801000 0x00000400>; }; pinctrl@5f801000 { compatible = "socionext,ph1-ld10-pinctrl", "syscon"; reg = <0x5f801000 0x00000e00>; u-boot,dm-pre-reloc; emmc_grp { groups = "emmc", "emmc_dat8"; function = "emmc"; }; emmc_grp_1v8 { groups = "emmc", "emmc_dat8"; function = "emmc"; }; i2c0_grp { groups = "i2c0"; function = "i2c0"; linux,phandle = <0x0000000b>; phandle = <0x0000000b>; }; i2c1_grp { groups = "i2c1"; function = "i2c1"; linux,phandle = <0x0000000d>; phandle = <0x0000000d>; }; i2c2_grp { groups = "i2c2"; function = "i2c2"; linux,phandle = <0x0000000e>; phandle = <0x0000000e>; }; i2c3_grp { groups = "i2c3"; function = "i2c3"; linux,phandle = <0x0000000f>; phandle = <0x0000000f>; }; sd_grp { groups = "sd"; function = "sd"; }; sd_grp_1v8 { groups = "sd"; function = "sd"; }; sd1_grp { groups = "sd1"; function = "sd1"; }; sd1_grp_1v8 { groups = "sd1"; function = "sd1"; }; uart0_grp { groups = "uart0"; function = "uart0"; u-boot,dm-pre-reloc; linux,phandle = <0x00000006>; phandle = <0x00000006>; }; uart1_grp { groups = "uart1"; function = "uart1"; linux,phandle = <0x00000008>; phandle = <0x00000008>; }; uart2_grp { groups = "uart2"; function = "uart2"; linux,phandle = <0x00000009>; phandle = <0x00000009>; }; uart3_grp { groups = "uart3"; function = "uart3"; linux,phandle = <0x0000000a>; phandle = <0x0000000a>; }; usb0_grp { groups = "usb0"; function = "usb0"; }; usb1_grp { groups = "usb1"; function = "usb1"; }; usb2_grp { groups = "usb2"; function = "usb2"; }; usb3_grp { groups = "usb3"; function = "usb3"; }; }; interrupt-controller@5fe00000 { compatible = "arm,gic-v3"; reg = <0x5fe00000 0x00010000 0x5fe80000 0x00080000>; interrupt-controller; #interrupt-cells = <0x00000003>; interrupts = <0x00000001 0x00000009 0x00000004>; linux,phandle = <0x00000001>; phandle = <0x00000001>; }; }; memory { device_type = "memory"; reg = <0x00000000 0x80000000 0x00000000 0xc0000000>; }; chosen { stdout-path = "serial0:115200n8"; }; aliases { serial0 = "/soc/serial@54006800"; serial1 = "/soc/serial@54006900"; serial2 = "/soc/serial@54006a00"; serial3 = "/soc/serial@54006b00"; i2c0 = "/soc/i2c@58780000"; i2c1 = "/soc/i2c@58781000"; i2c2 = "/soc/i2c@58782000"; i2c3 = "/soc/i2c@58783000"; i2c4 = "/soc/i2c@58784000"; i2c5 = "/soc/i2c@58785000"; i2c6 = "/soc/i2c@58786000"; }; }; -- Best Regards Masahiro Yamada

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[U-Boot] [PATCH 1/3][v3] Pointers in ESBC header made 32 bit
by Aneesh Bansal 23 Feb '16

23 Feb '16

For the Chain of Trust, the esbc_validate command supports 32 bit fields for location of the image. In the header structure definition, these were declared as pointers which made them 64 bit on a 64 bit core. Signed-off-by: Aneesh Bansal <aneesh.bansal(a)freescale.com> --- Changes in v3: Patch Rebased and removed compile time warnings board/freescale/common/fsl_validate.c | 20 ++++++++++---------- include/fsl_validate.h | 14 +++++++------- 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c index 5283648..465676f 100644 --- a/board/freescale/common/fsl_validate.c +++ b/board/freescale/common/fsl_validate.c @@ -63,12 +63,12 @@ static u32 check_ie(struct fsl_secboot_img_priv *img) * address */ #if defined(CONFIG_MPC85xx) -int get_csf_base_addr(ulong *csf_addr, ulong *flash_base_addr) +int get_csf_base_addr(u32 *csf_addr, u32 *flash_base_addr) { struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); u32 csf_hdr_addr = in_be32(&gur->scratchrw[0]); u32 csf_flash_offset = csf_hdr_addr & ~(CONFIG_SYS_PBI_FLASH_BASE); - ulong flash_addr, addr; + u32 flash_addr, addr; int found = 0; int i = 0; @@ -76,7 +76,7 @@ int get_csf_base_addr(ulong *csf_addr, ulong *flash_base_addr) flash_addr = flash_info[i].start[0]; addr = flash_info[i].start[0] + csf_flash_offset; if (memcmp((u8 *)addr, barker_code, ESBC_BARKER_LEN) == 0) { - debug("Barker found on addr %lx\n", addr); + debug("Barker found on addr %x\n", addr); found = 1; break; } @@ -94,7 +94,7 @@ int get_csf_base_addr(ulong *csf_addr, ulong *flash_base_addr) /* For platforms like LS1020, correct flash address is present in * the header. So the function reqturns flash base address as 0 */ -int get_csf_base_addr(ulong *csf_addr, ulong *flash_base_addr) +int get_csf_base_addr(u32 *csf_addr, u32 *flash_base_addr) { struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); u32 csf_hdr_addr = in_be32(&gur->scratchrw[0]); @@ -108,11 +108,11 @@ int get_csf_base_addr(ulong *csf_addr, ulong *flash_base_addr) } #endif -static int get_ie_info_addr(ulong *ie_addr) +static int get_ie_info_addr(u32 *ie_addr) { struct fsl_secboot_img_hdr *hdr; struct fsl_secboot_sg_table *sg_tbl; - ulong flash_base_addr, csf_addr; + u32 flash_base_addr, csf_addr; if (get_csf_base_addr(&csf_addr, &flash_base_addr)) return -1; @@ -127,11 +127,11 @@ static int get_ie_info_addr(ulong *ie_addr) */ #if defined(CONFIG_FSL_TRUST_ARCH_v1) && defined(CONFIG_FSL_CORENET) sg_tbl = (struct fsl_secboot_sg_table *) - (((ulong)hdr->psgtable & ~(CONFIG_SYS_PBI_FLASH_BASE)) + + (((u32)hdr->psgtable & ~(CONFIG_SYS_PBI_FLASH_BASE)) + flash_base_addr); #else sg_tbl = (struct fsl_secboot_sg_table *)(csf_addr + - (ulong)hdr->psgtable); + (u32)hdr->psgtable); #endif /* IE Key Table is the first entry in the SG Table */ @@ -142,7 +142,7 @@ static int get_ie_info_addr(ulong *ie_addr) *ie_addr = sg_tbl->src_addr; #endif - debug("IE Table address is %lx\n", *ie_addr); + debug("IE Table address is %x\n", *ie_addr); return 0; } @@ -549,7 +549,7 @@ static int read_validate_esbc_client_header(struct fsl_secboot_img_priv *img) if (memcmp(hdr->barker, barker_code, ESBC_BARKER_LEN)) return ERROR_ESBC_CLIENT_HEADER_BARKER; - sprintf(buf, "%p", hdr->pimg); + sprintf(buf, "%x", hdr->pimg); setenv("img_addr", buf); if (!hdr->img_size) diff --git a/include/fsl_validate.h b/include/fsl_validate.h index c460534..92dd98b 100644 --- a/include/fsl_validate.h +++ b/include/fsl_validate.h @@ -82,14 +82,14 @@ struct fsl_secboot_img_hdr { u32 psign; /* signature offset */ u32 sign_len; /* length of the signature in bytes */ union { - struct fsl_secboot_sg_table *psgtable; /* ptr to SG table */ - u8 *pimg; /* ptr to ESBC client image */ + u32 psgtable; /* ptr to SG table */ + u32 pimg; /* ptr to ESBC client image */ }; union { u32 sg_entries; /* no of entries in SG table */ u32 img_size; /* ESBC client image size in bytes */ }; - ulong img_start; /* ESBC client entry point */ + u32 img_start; /* ESBC client entry point */ u32 sg_flag; /* Scatter gather flag */ u32 uid_flag; u32 fsl_uid_0; @@ -133,7 +133,7 @@ struct srk_table { */ struct fsl_secboot_sg_table { u32 len; /* length of the segment in bytes */ - ulong src_addr; /* ptr to the data segment */ + u32 src_addr; /* ptr to the data segment */ }; #else /* @@ -146,8 +146,8 @@ struct fsl_secboot_sg_table { struct fsl_secboot_sg_table { u32 len; u32 trgt_id; - ulong src_addr; - ulong dst_addr; + u32 src_addr; + u32 dst_addr; }; #endif @@ -162,7 +162,7 @@ struct fsl_secboot_sg_table { */ struct fsl_secboot_img_priv { uint32_t hdr_location; - ulong ie_addr; + u32 ie_addr; u32 key_len; struct fsl_secboot_img_hdr hdr; -- 1.8.1.4

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