August 2015 - U-Boot

[U-Boot] [PATCH] FSL SPI read fix.
by Dale Smith 14 Dec '15

14 Dec '15

The fsl spi engine is non functional when reading from a device. This patch fixes it. Note that none of the other spi interfaces parse through the datastream looking for 0x0b bytes. -Dale diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c index a1ebd33..737719b 100644 --- a/drivers/spi/fsl_espi.c +++ b/drivers/spi/fsl_espi.c @@ -291,17 +291,10 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out, debug("***spi_xfer:...%08x readed\n", tmpdin); } } - if (data_in) { - memcpy(data_in, buffer + 2 * cmd_len, tran_len); - if (*buffer == 0x0b) { - data_in += tran_len; - data_len -= tran_len; - *(int *)buffer += tran_len; - } - } spi_cs_deactivate(slave); } - + if (data_in) + memcpy(data_in, buffer + rx_offset, len); free(buffer); return 0; }

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Re: [U-Boot] [linux-sunxi] Mainline U-Boot, EHCI, usbkbd not working (workaround)
by B.R. Oake 13 Dec '15

13 Dec '15

(This started on the linux-sunxi mailing list but will hopefully be of interest on the U-Boot list) On 04/01/15 13:45, Lars Doelle wrote: > while testing with mainline u-boot, I came over the > problem, that the USB keyboard is not recognized. > > The device is an A20-OLinuXIno-LIME2. I used the > current A20-OLinuXino-Lime2_defconfig for building. > > In my understanding, the issue should be reproducible > with all devices having an EHCI root hub. > > --- > sun7i# usb reset > (Re)start USB... > USB0: USB EHCI 1.00 > scanning bus 0 for devices... cannot reset port 1!? > 1 USB Device(s) found > USB1: USB EHCI 1.00 > scanning bus 1 for devices... 1 USB Device(s) found > scanning usb for storage devices... 0 Storage Device(s) found > sun7i# usb tree > USB device tree: > 1 Hub (480 Mb/s, 0mA) > u-boot EHCI Host Controller > > 2 Hub (480 Mb/s, 0mA) > u-boot EHCI Host Controller > --- > > As a workaround, i plugged an USB hub in between: > [...] I also have this problem. I've tried three different USB keyboards on an A20-Olinuxino-Micro and a Banana Pi, and I always get that error "cannot reset port N!?" where N is whichever USB socket I've plugged it into, and U-Boot cannot see the keyboard. Once Linux has loaded, the keyboard works without any trouble. Can anyone suggest what is causing this? Thank you, B.R. Oake.

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[U-Boot] [PATCH] arm: ls1021a: Ensure Generic Timer disabled before jumping into the OS
by Alison Wang 30 Nov '15

30 Nov '15

This patch addresses a problem mentioned recently on this mailing list: [1]. In that posting a LS1021 based system was locking up at about 5 minutes after boot,but the problem was mysteriously related to the toolchain used for building u-boot.Debugging the problem reveals a stuck interrupt 29 on the GIC. It appears Freescale's LS1021 support in u-boot erroneously sets the 64-bit ARM generic PL1 physical time CompareValue register to all-ones with a 32-bit value.This causes the timer compare to fire 344 seconds after u-boot configures it.Depending on how fast u-boot gets the kernel booted,this amounts to about 5-minutes of Linux uptime before locking up. Apparently the bug is masked by some toolchains. Perhaps this is explained by default compiler options, word sizes, or binutils versions. To fix the above issue, the generic physical timer is disabled before jumping to the OS. [1] https://lists.yoctoproject.org/pipermail/meta-freescale/2015-June/014400.ht… Signed-off-by: Chris Kilgour <techie(a)whiterocker.com> Signed-off-by: Alison Wang <alison.wang(a)freescale.com> --- arch/arm/cpu/armv7/ls102xa/cpu.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c index 75f0d8c..298422f 100644 --- a/arch/arm/cpu/armv7/ls102xa/cpu.c +++ b/arch/arm/cpu/armv7/ls102xa/cpu.c @@ -346,3 +346,13 @@ void smp_kick_all_cpus(void) out_be32(&gur->brrl, 0x2); } #endif + +void arch_preboot_os(void) +{ + unsigned long ctrl; + + /* Disable PL1 Physical Timer */ + asm("mrc p15, 0, %0, c14, c2, 1" : "=r" (ctrl)); + ctrl &= ~ARCH_TIMER_CTRL_ENABLE; + asm("mcr p15, 0, %0, c14, c2, 1" : : "r" (ctrl)); +} -- 2.1.0.27.g96db324

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[U-Boot] [PATCH] arm: ls1021a: Ensure LS1021 ARM Generic Timer CompareValue Set 64-bit
by Alison Wang 30 Nov '15

30 Nov '15

This patch addresses a problem mentioned recently on this mailing list: [1]. In that posting a LS1021 based system was locking up at about 5 minutes after boot, but the problem was mysteriously related to the toolchain used for building u-boot. Debugging the problem reveals a stuck interrupt 29 on the GIC. It appears Freescale's LS1021 support in u-boot erroneously sets the 64-bit ARM generic PL1 physical time CompareValue register to all-ones with a 32-bit value. This causes the timer compare to fire 344 seconds after u-boot configures it. Depending on how fast u-boot gets the kernel booted, this amounts to about 5-minutes of Linux uptime before locking up. Apparently the bug is masked by some toolchains. Perhaps this is explained by default compiler options, word sizes, or binutils versions. At any rate this patch makes the manipulation explicitly 64-bit which alleviates the issue. [1] https://lists.yoctoproject.org/pipermail/meta-freescale/2015-June/014400.ht… Signed-off-by: Chris Kilgour <techie(a)whiterocker.com> Signed-off-by: Alison Wang <alison.wang(a)freescale.com> --- arch/arm/cpu/armv7/ls102xa/timer.c | 3 ++- arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/ls102xa/timer.c b/arch/arm/cpu/armv7/ls102xa/timer.c index 11b17b2..e6a32ca 100644 --- a/arch/arm/cpu/armv7/ls102xa/timer.c +++ b/arch/arm/cpu/armv7/ls102xa/timer.c @@ -56,7 +56,8 @@ static inline unsigned long long us_to_tick(unsigned long long usec) int timer_init(void) { struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR; - unsigned long ctrl, val, freq; + unsigned long ctrl, freq; + unsigned long long val; /* Enable System Counter */ writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr); diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index ee547fb..34854da 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -31,7 +31,7 @@ #define RCWSR4_SRDS1_PRTCL_SHIFT 24 #define RCWSR4_SRDS1_PRTCL_MASK 0xff000000 -#define TIMER_COMP_VAL 0xffffffff +#define TIMER_COMP_VAL 0xffffffffffffffffull #define ARCH_TIMER_CTRL_ENABLE (1 << 0) #define SYS_COUNTER_CTRL_ENABLE (1 << 24) -- 2.1.0.27.g96db324

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[U-Boot] [PATCH v4 00/33] dm: Introduce Rockchip RK3288 support
by Simon Glass 10 Nov '15

10 Nov '15

The Rockchip RK3288 is based on a quad-core Cortex-A17 CPU and has a good set of peripherals. Various full-featured U-Boot ports are available and this is an attempt to bring those features into mainline. With this series the Firefly RK3288 can boot to a prompt from an SD card. Since much of the code is generic, this also supports the Radxa Rock 2. Since there is no device tree available for that yet, it uses the same config and device tree as the Firefly. This works because not all peripherals are supported, so the differences don't matter. Support for booting from USB OTG is also provided, using the on-chip boot ROM and the rkflashtool utility. This can boot as far as SPL, but there is no support for reading U-Boot proper from USB as yet. This requires implementing a suitable protocol (perhaps DFU or Rockchip's proprietary one) in SPL. Support is also provided for the Hisense Chromebook, which is based on the same SoC. In this case it boots from SPI rather than an SD card. This seriea makes use of driver model including a number of recently added uclasses: - Clocks - setting and getting PLL and peripheral clocks - Pinctrl - adjusting pin multiplexing settings - Reset - reseting the board or SoC - RAM - setting up RAM controllers and detecting the available RAM - MMC - MMC controllers (using the existing block device framework) - LEDs - turning LEDs on and off, with only a GPIO driver so far This series avoids hard-coding RK3288-specific code into the build. There is a CONFIG_ROCKCHIP_RK3288 but it only *adds* support for RK3288. In principle another CONFIG could add support for a different Rockchip SoC with only the device tree selecting which one U-Boot works on. Support is provided in mkimage to build these image types: - rkimage - suitable for packaging up SPL to be sent to the boot ROM over USB OTG - rksd - suitable for writing to an SD card Much of the source and ideas for this series came from downstream Rockchip U-Boot trees. SDRAM init came from Coreboot. In most cases it has been pretty heavily cleaned up / rewritten to meet U-Boot style and remove hard-coding of things. Drivers are provided for: - Clocks - Pinctrl - SoC reset - DDR3 SDRAM - I2C - SPI - GPIOs - LEDs using GPIOS - MMC - Firefly main PMIC (ACT8846) and included regulators These are lightly tested and doubtless some problems exist with some, particularly I2C. One problem with device tree is that U-Boot has no way of dropping features it does not need or use. For SPL this problem needs to be solved and this series uses a new 'fdtgrep' tool for this. The 45KB Firefly device tree reduces to a 6KB bytes when unused material is removed. SDRAM timings are also in the device tree. There is a large amount of additional work to bring other Rockchip drivers and features into mainline U-Boot, so this is only a start. Note: This series sits on top of Masahiro's RFC pinctrl series. I wanted to get a new version out while we wait for this to make it to mainline. You can find this series at u-boot-dm/rockchip-working. Changes in v4: - Add a set_state_simple() method - Adjust the defconfig file to suit mainline - Rename pinctrl.h to dm/pinctrl.h - Tweak the cover letter a little, drop mention of patches already applied - Use CONFIG_SPL_LED instead of CONFIG_SPL_LED_SUPPORT Changes in v3: - Add device tree bindings for CRU and DMC - Add various new patches to get RK3288 booting to a prompt - Make use of additional features since version 2 - Update README to mention available drivers - Update clock rate to always be 24MHz Changes in v2: - Drop use of CONFIG_USE_PRIVATE_LIBGCC=y - Tidy up license headers and remove SPL #ifdefs Masahiro Yamada (1): dm: do not return pointer if NULL is given to devp of device_bind() Simon Glass (32): pinctrl: Correct build errors in the pinctrl_simple pinctrl: Add help text to Kconfig pinctrl: Add the concept of peripheral IDs mmc: Support bypass mode with the get_mmc_clk() method dm: Improve handling of a missing uclass dm: Provide better debugging when a device fails to bind arm: reset: Avoid a build error when the reset uclass is enabled rockchip: Add serial support rockchip: Bring in RK3288 device tree file includes and bindings rockchip: rk3288: dts: Make core devices available early mkimage: Allow padding to any length mkimage: Allow the original file size to be recorded rockchip: Add the rkimage format to mkimage rockchip: Add support for the SD image rockchip: Add support for the SPI image rockchip: gpio: Add rockchip GPIO driver rockchip: Add basic peripheral and clock definitions power: Add support for ACT8846 PMIC power: regulator: Add a driver for ACT8846 regulators rockchip: rk3288: Add clock driver rockchip: rk3288: Add header files for PMU and GRF rockchip: rk3288: Add SoC reset driver rockchip: rk3288: Add a simple syscon driver rockchip: rk3288: Add pinctrl driver rockchip: rk3288: Add SDRAM init rockchip: Add an MMC driver rockchip: Add core SoC start-up code rockchip: Add I2C driver rockchip: Add SPI driver rockchip: Add basic support for firefly-rk3288 rockchip: Add basic support for jerry rockchip: Add a simple README arch/arm/Kconfig | 10 + arch/arm/Makefile | 1 + arch/arm/dts/Makefile | 3 + arch/arm/dts/cros-ec-sbs.dtsi | 16 + arch/arm/dts/rk3288-firefly.dts | 75 + arch/arm/dts/rk3288-firefly.dtsi | 457 ++++++ arch/arm/dts/rk3288-jerry.dts | 203 +++ arch/arm/dts/rk3288-thermal.dtsi | 88 ++ arch/arm/dts/rk3288-veyron-chromebook.dtsi | 200 +++ arch/arm/dts/rk3288-veyron.dtsi | 844 +++++++++++ arch/arm/dts/rk3288.dtsi | 1473 ++++++++++++++++++++ arch/arm/include/asm/arch-rockchip/clock.h | 45 + arch/arm/include/asm/arch-rockchip/cru_rk3288.h | 185 +++ arch/arm/include/asm/arch-rockchip/ddr_rk3288.h | 484 +++++++ arch/arm/include/asm/arch-rockchip/gpio.h | 28 + arch/arm/include/asm/arch-rockchip/grf_rk3288.h | 768 ++++++++++ arch/arm/include/asm/arch-rockchip/hardware.h | 20 + arch/arm/include/asm/arch-rockchip/i2c.h | 70 + arch/arm/include/asm/arch-rockchip/periph.h | 54 + arch/arm/include/asm/arch-rockchip/pmu_rk3288.h | 89 ++ arch/arm/include/asm/arch-rockchip/sdram.h | 92 ++ arch/arm/lib/Makefile | 2 + arch/arm/mach-rockchip/Kconfig | 41 + arch/arm/mach-rockchip/Makefile | 13 + arch/arm/mach-rockchip/board-spl.c | 290 ++++ arch/arm/mach-rockchip/board.c | 46 + arch/arm/mach-rockchip/common.c | 28 + arch/arm/mach-rockchip/rk3288/Kconfig | 26 + arch/arm/mach-rockchip/rk3288/Makefile | 9 + arch/arm/mach-rockchip/rk3288/reset_rk3288.c | 47 + arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 878 ++++++++++++ arch/arm/mach-rockchip/rk3288/syscon_rk3288.c | 25 + board/firefly/firefly-rk3288/Kconfig | 15 + board/firefly/firefly-rk3288/MAINTAINERS | 6 + board/firefly/firefly-rk3288/Makefile | 7 + board/firefly/firefly-rk3288/firefly-rk3288.c | 7 + board/google/chromebook_jerry/Kconfig | 15 + board/google/chromebook_jerry/MAINTAINERS | 6 + board/google/chromebook_jerry/Makefile | 7 + board/google/chromebook_jerry/jerry.c | 7 + board/google/common/Makefile | 2 +- common/image.c | 3 + configs/chromebook_jerry_defconfig | 43 + configs/firefly-rk3288_defconfig | 43 + doc/README.rockchip | 246 ++++ .../clock/rockchip,rk3188-cru.txt | 61 + .../clock/rockchip,rk3288-cru.txt | 61 + .../clock/rockchip,rk3288-dmc.txt | 155 ++ doc/device-tree-bindings/clock/rockchip.txt | 77 + .../pinctrl/rockchip,pinctrl.txt | 157 +++ .../thermal/rockchip-thermal.txt | 68 + drivers/clk/Makefile | 1 + drivers/clk/clk_rk3288.c | 618 ++++++++ drivers/core/device.c | 10 +- drivers/core/root.c | 5 +- drivers/core/uclass.c | 7 +- drivers/gpio/Kconfig | 9 + drivers/gpio/Makefile | 1 + drivers/gpio/rk_gpio.c | 123 ++ drivers/i2c/Kconfig | 9 + drivers/i2c/Makefile | 1 + drivers/i2c/rk_i2c.c | 391 ++++++ drivers/mmc/Kconfig | 9 + drivers/mmc/Makefile | 1 + drivers/mmc/dw_mmc.c | 2 +- drivers/mmc/exynos_dw_mmc.c | 2 +- drivers/mmc/rockchip_mmc.c | 98 ++ drivers/pinctrl/Kconfig | 22 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/pinctrl-uclass.c | 41 +- drivers/pinctrl/rockchip/Makefile | 8 + drivers/pinctrl/rockchip/pinctrl_rk3288.c | 441 ++++++ drivers/power/pmic/Kconfig | 9 + drivers/power/pmic/Makefile | 1 + drivers/power/pmic/act8846.c | 90 ++ drivers/power/regulator/Kconfig | 9 + drivers/power/regulator/Makefile | 1 + drivers/power/regulator/act8846.c | 155 ++ drivers/serial/Kconfig | 9 + drivers/serial/Makefile | 1 + drivers/serial/serial_rockchip.c | 43 + drivers/spi/Kconfig | 9 + drivers/spi/Makefile | 1 + drivers/spi/rk_spi.c | 375 +++++ drivers/spi/rk_spi.h | 121 ++ include/configs/chromebook_jerry.h | 16 + include/configs/firefly-rk3288.h | 15 + include/configs/rk3288_common.h | 98 ++ include/dm/pinctrl.h | 61 + include/dt-bindings/clock/rk3288-cru.h | 370 +++++ include/dt-bindings/clock/rockchip,rk808.h | 11 + include/dt-bindings/pinctrl/rockchip.h | 26 + include/dt-bindings/power-domain/rk3288.h | 11 + include/dwmmc.h | 16 +- include/image.h | 5 +- include/power/act8846_pmic.h | 37 + tools/Makefile | 3 + tools/imagetool.h | 1 + tools/mkimage.c | 23 +- tools/rkcommon.c | 72 + tools/rkcommon.h | 28 + tools/rkimage.c | 65 + tools/rksd.c | 102 ++ tools/rkspi.c | 119 ++ 104 files changed, 11274 insertions(+), 25 deletions(-) create mode 100644 arch/arm/dts/cros-ec-sbs.dtsi create mode 100644 arch/arm/dts/rk3288-firefly.dts create mode 100644 arch/arm/dts/rk3288-firefly.dtsi create mode 100644 arch/arm/dts/rk3288-jerry.dts create mode 100644 arch/arm/dts/rk3288-thermal.dtsi create mode 100644 arch/arm/dts/rk3288-veyron-chromebook.dtsi create mode 100644 arch/arm/dts/rk3288-veyron.dtsi create mode 100644 arch/arm/dts/rk3288.dtsi create mode 100644 arch/arm/include/asm/arch-rockchip/clock.h create mode 100644 arch/arm/include/asm/arch-rockchip/cru_rk3288.h create mode 100644 arch/arm/include/asm/arch-rockchip/ddr_rk3288.h create mode 100644 arch/arm/include/asm/arch-rockchip/gpio.h create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rk3288.h create mode 100644 arch/arm/include/asm/arch-rockchip/hardware.h create mode 100644 arch/arm/include/asm/arch-rockchip/i2c.h create mode 100644 arch/arm/include/asm/arch-rockchip/periph.h create mode 100644 arch/arm/include/asm/arch-rockchip/pmu_rk3288.h create mode 100644 arch/arm/include/asm/arch-rockchip/sdram.h create mode 100644 arch/arm/mach-rockchip/Kconfig create mode 100644 arch/arm/mach-rockchip/Makefile create mode 100644 arch/arm/mach-rockchip/board-spl.c create mode 100644 arch/arm/mach-rockchip/board.c create mode 100644 arch/arm/mach-rockchip/common.c create mode 100644 arch/arm/mach-rockchip/rk3288/Kconfig create mode 100644 arch/arm/mach-rockchip/rk3288/Makefile create mode 100644 arch/arm/mach-rockchip/rk3288/reset_rk3288.c create mode 100644 arch/arm/mach-rockchip/rk3288/sdram_rk3288.c create mode 100644 arch/arm/mach-rockchip/rk3288/syscon_rk3288.c create mode 100644 board/firefly/firefly-rk3288/Kconfig create mode 100644 board/firefly/firefly-rk3288/MAINTAINERS create mode 100644 board/firefly/firefly-rk3288/Makefile create mode 100644 board/firefly/firefly-rk3288/firefly-rk3288.c create mode 100644 board/google/chromebook_jerry/Kconfig create mode 100644 board/google/chromebook_jerry/MAINTAINERS create mode 100644 board/google/chromebook_jerry/Makefile create mode 100644 board/google/chromebook_jerry/jerry.c create mode 100644 configs/chromebook_jerry_defconfig create mode 100644 configs/firefly-rk3288_defconfig create mode 100644 doc/README.rockchip create mode 100644 doc/device-tree-bindings/clock/rockchip,rk3188-cru.txt create mode 100644 doc/device-tree-bindings/clock/rockchip,rk3288-cru.txt create mode 100644 doc/device-tree-bindings/clock/rockchip,rk3288-dmc.txt create mode 100644 doc/device-tree-bindings/clock/rockchip.txt create mode 100644 doc/device-tree-bindings/pinctrl/rockchip,pinctrl.txt create mode 100644 doc/device-tree-bindings/thermal/rockchip-thermal.txt create mode 100644 drivers/clk/clk_rk3288.c create mode 100644 drivers/gpio/rk_gpio.c create mode 100644 drivers/i2c/rk_i2c.c create mode 100644 drivers/mmc/rockchip_mmc.c create mode 100644 drivers/pinctrl/rockchip/Makefile create mode 100644 drivers/pinctrl/rockchip/pinctrl_rk3288.c create mode 100644 drivers/power/pmic/act8846.c create mode 100644 drivers/power/regulator/act8846.c create mode 100644 drivers/serial/serial_rockchip.c create mode 100644 drivers/spi/rk_spi.c create mode 100644 drivers/spi/rk_spi.h create mode 100644 include/configs/chromebook_jerry.h create mode 100644 include/configs/firefly-rk3288.h create mode 100644 include/configs/rk3288_common.h create mode 100644 include/dt-bindings/clock/rk3288-cru.h create mode 100644 include/dt-bindings/clock/rockchip,rk808.h create mode 100644 include/dt-bindings/pinctrl/rockchip.h create mode 100644 include/dt-bindings/power-domain/rk3288.h create mode 100644 include/power/act8846_pmic.h create mode 100644 tools/rkcommon.c create mode 100644 tools/rkcommon.h create mode 100644 tools/rkimage.c create mode 100644 tools/rksd.c create mode 100644 tools/rkspi.c -- 2.5.0.457.gab17608

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[U-Boot] [RFC][PATCH 00/25] eeprom: Cleanup and support for multiple i2c busses
by Marek Vasut 10 Nov '15

10 Nov '15

This patch series first zaps a couple of ancient boards and ugly code which was in the way of proper cleanup for the eeprom command. Once that is done, the eeprom command undergoes proper cleaning. Finally, there is one patch which adds support for selecting on which bus the I2C EEPROM is. This functionality seems to be in high demand, which is exactly the reason why some boards decided to implement this themselves :-( This series makes U-Boot also less IoT, since it removes all the nice PHP, CSS and SQL stuff from it ;-) Marek Vasut (25): ppc: Zap ICU862 board ppc: Zap MHPC board ppc: Zap Hymod board ppc: Zap HWW1U1A board ppc: Zap IDS8247 board ppc: Zap TQM8260 board ppc: Zap TQM8272 board arm: Zap tricorder-eeprom eeprom: Shuffle code around eeprom: Zap CONFIG_SYS_I2C_MULTI_EEPROMS eeprom: Zap CONFIG_SYS_EEPROM_X40430 eeprom: Zap eeprom_probe() eeprom: Zap CONFIG_SPI_X eeprom: Pull out the I/O code eeprom: Pull out address computation eeprom: Make eeprom_write_enable() weak eeprom: Pull out CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS eeprom: Suck the ifdef into eeprom_init() eeprom: Pull out CONFIG_SYS_EEPROM_PAGE_WRITE_BITS eeprom: Pull out transfer length computation eeprom: Pull out the RW loop eeprom: Cultivate the ifdef mess eeprom: Add bus argument to eeprom_init() eeprom: Add support for selecting i2c bus eeprom: Clean up checkpatch issues README | 5 - arch/powerpc/cpu/mpc8260/Kconfig | 16 - arch/powerpc/cpu/mpc8260/ether_fcc.c | 27 +- arch/powerpc/cpu/mpc8260/interrupts.c | 10 +- arch/powerpc/cpu/mpc8260/pci.c | 2 - arch/powerpc/cpu/mpc8260/start.S | 14 - arch/powerpc/cpu/mpc83xx/start.S | 11 - arch/powerpc/cpu/mpc85xx/Kconfig | 4 - arch/powerpc/cpu/mpc8xx/Kconfig | 8 - arch/powerpc/cpu/mpc8xx/cpu_init.c | 2 - arch/powerpc/cpu/mpc8xx/fec.c | 40 +- arch/powerpc/include/asm/u-boot.h | 3 - board/corscience/tricorder/Makefile | 2 +- board/corscience/tricorder/tricorder-eeprom.c | 251 ------- board/corscience/tricorder/tricorder-eeprom.h | 41 -- board/eltec/mhpc/Kconfig | 12 - board/eltec/mhpc/MAINTAINERS | 6 - board/eltec/mhpc/Makefile | 8 - board/eltec/mhpc/flash.c | 414 ----------- board/eltec/mhpc/mhpc.c | 465 ------------- board/eltec/mhpc/u-boot.lds.debug | 121 ---- board/exmeritus/hww1u1a/Kconfig | 12 - board/exmeritus/hww1u1a/MAINTAINERS | 6 - board/exmeritus/hww1u1a/Makefile | 12 - board/exmeritus/hww1u1a/ddr.c | 34 - board/exmeritus/hww1u1a/gpios.h | 56 -- board/exmeritus/hww1u1a/hww1u1a.c | 268 -------- board/exmeritus/hww1u1a/law.c | 18 - board/exmeritus/hww1u1a/tlb.c | 90 --- board/hymod/Kconfig | 9 - board/hymod/MAINTAINERS | 6 - board/hymod/Makefile | 8 - board/hymod/bsp.c | 387 ----------- board/hymod/config.mk | 14 - board/hymod/eeprom.c | 678 ------------------ board/hymod/env.c | 221 ------ board/hymod/fetch.c | 91 --- board/hymod/flash.c | 490 ------------- board/hymod/flash.h | 140 ---- board/hymod/global_env | 145 ---- board/hymod/hymod.c | 521 -------------- board/hymod/hymod.h | 305 --------- board/hymod/input.c | 91 --- board/hymod/u-boot.lds | 132 ---- board/hymod/u-boot.lds.debug | 121 ---- board/icu862/Kconfig | 9 - board/icu862/MAINTAINERS | 7 - board/icu862/Makefile | 8 - board/icu862/flash.c | 575 ---------------- board/icu862/icu862.c | 199 ------ board/icu862/pcmcia.c | 262 ------- board/icu862/u-boot.lds | 82 --- board/icu862/u-boot.lds.debug | 122 ---- board/ids/ids8247/Kconfig | 12 - board/ids/ids8247/MAINTAINERS | 6 - board/ids/ids8247/Makefile | 11 - board/ids/ids8247/ids8247.c | 390 ----------- board/tqc/tqm8260/Kconfig | 12 - board/tqc/tqm8260/MAINTAINERS | 16 - board/tqc/tqm8260/Makefile | 8 - board/tqc/tqm8260/README | 415 ----------- board/tqc/tqm8260/tqm8260.c | 352 ---------- board/tqc/tqm8272/Kconfig | 12 - board/tqc/tqm8272/MAINTAINERS | 6 - board/tqc/tqm8272/Makefile | 8 - board/tqc/tqm8272/nand.c | 264 ------- board/tqc/tqm8272/tqm8272.c | 944 -------------------------- board/tqc/tqm8272/tqm8272.h | 37 - common/cmd_eeprom.c | 501 +++++--------- common/env_eeprom.c | 4 +- configs/HWW1U1A_defconfig | 3 - configs/ICU862_100MHz_defconfig | 4 - configs/ICU862_defconfig | 3 - configs/IDS8247_defconfig | 3 - configs/MHPC_defconfig | 3 - configs/TQM8255_AA_defconfig | 4 - configs/TQM8260_AA_defconfig | 4 - configs/TQM8260_AB_defconfig | 4 - configs/TQM8260_AC_defconfig | 4 - configs/TQM8260_AD_defconfig | 4 - configs/TQM8260_AE_defconfig | 4 - configs/TQM8260_AF_defconfig | 4 - configs/TQM8260_AG_defconfig | 4 - configs/TQM8260_AH_defconfig | 4 - configs/TQM8260_AI_defconfig | 4 - configs/TQM8265_AA_defconfig | 4 - configs/TQM8272_defconfig | 3 - configs/hymod_defconfig | 3 - include/asm-generic/u-boot.h | 3 - include/common.h | 8 +- include/commproc.h | 32 - include/configs/BSC9131RDB.h | 1 - include/configs/BSC9132QDS.h | 1 - include/configs/C29XPCIE.h | 1 - include/configs/CPCI405AB.h | 1 - include/configs/CPCI750.h | 1 - include/configs/DB64360.h | 1 - include/configs/DB64460.h | 1 - include/configs/DU440.h | 1 - include/configs/HWW1U1A.h | 460 ------------- include/configs/ICU862.h | 443 ------------ include/configs/IDS8247.h | 462 ------------- include/configs/MHPC.h | 369 ---------- include/configs/P1010RDB.h | 1 - include/configs/PMC440.h | 1 - include/configs/TQM8260.h | 620 ----------------- include/configs/TQM8272.h | 735 -------------------- include/configs/TQM834x.h | 1 - include/configs/W7OLMC.h | 1 - include/configs/W7OLMG.h | 1 - include/configs/acadia.h | 1 - include/configs/am335x_evm.h | 1 - include/configs/am43xx_evm.h | 1 - include/configs/axs101.h | 1 - include/configs/bamboo.h | 1 - include/configs/canyonlands.h | 1 - include/configs/cpci5200.h | 1 - include/configs/ebony.h | 1 - include/configs/hymod.h | 728 -------------------- include/configs/icon.h | 1 - include/configs/intip.h | 1 - include/configs/katmai.h | 1 - include/configs/km/km-powerpc.h | 1 - include/configs/km/km_arm.h | 1 - include/configs/korat.h | 1 - include/configs/ks2_evm.h | 1 - include/configs/luan.h | 1 - include/configs/m28evk.h | 1 - include/configs/mecp5200.h | 1 - include/configs/motionpro.h | 1 - include/configs/ocotea.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - include/configs/p1_twr.h | 1 - include/configs/pcm051.h | 1 - include/configs/pengwyn.h | 1 - include/configs/pf5200.h | 1 - include/configs/sequoia.h | 1 - include/configs/t3corp.h | 1 - include/configs/taishan.h | 1 - include/configs/tricorder.h | 1 - include/configs/walnut.h | 1 - include/configs/yosemite.h | 1 - include/pcmcia.h | 2 - include/status_led.h | 19 - tools/bddb/README | 116 ---- tools/bddb/badsubmit.php | 23 - tools/bddb/bddb.css | 207 ------ tools/bddb/brlog.php | 109 --- tools/bddb/browse.php | 147 ---- tools/bddb/config.php | 16 - tools/bddb/create_tables.sql | 90 --- tools/bddb/defs.php | 710 ------------------- tools/bddb/dodelete.php | 65 -- tools/bddb/dodellog.php | 57 -- tools/bddb/doedit.php | 186 ----- tools/bddb/doedlog.php | 76 --- tools/bddb/donew.php | 230 ------- tools/bddb/donewlog.php | 86 --- tools/bddb/edit.php | 131 ---- tools/bddb/edlog.php | 86 --- tools/bddb/execute.php | 33 - tools/bddb/index.php | 38 -- tools/bddb/new.php | 120 ---- tools/bddb/newlog.php | 54 -- 164 files changed, 174 insertions(+), 15976 deletions(-) delete mode 100644 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delete mode 100644 tools/bddb/dodelete.php delete mode 100644 tools/bddb/dodellog.php delete mode 100644 tools/bddb/doedit.php delete mode 100644 tools/bddb/doedlog.php delete mode 100644 tools/bddb/donew.php delete mode 100644 tools/bddb/donewlog.php delete mode 100644 tools/bddb/edit.php delete mode 100644 tools/bddb/edlog.php delete mode 100644 tools/bddb/execute.php delete mode 100644 tools/bddb/index.php delete mode 100644 tools/bddb/new.php delete mode 100644 tools/bddb/newlog.php Cc: Tom Rini <trini(a)ti.com> -- 2.1.1

4 36

[U-Boot] Using spi_alloc_slave() from SPL
by Fabio Estevam 10 Nov '15

10 Nov '15

Hi, I am trying to use spi_flash_probe() inside SPL on a custom mx6 board. The idea is to read some parameters from the SPI NOR flash and configure the DDR accordingly. This is similar to what gw_ventana_spl.c does, but it reads from i2c eeprom instead of SPI NOR. Here are the changes just to illustrate the problem: --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -692,6 +692,19 @@ int checkboard(void) #ifdef CONFIG_SPL_BUILD #include <spl.h> #include <libfdt.h> +#include <spi_flash.h> +#include <spi.h> + +static int read_spi_flash(void) +{ + struct spi_flash *spi; + char buf[2]; + + spi = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, + CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); + return spi_flash_read(spi, 0, 2, buf); +} const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = { .dram_sdclk_0 = 0x00020030, @@ -837,6 +850,8 @@ void board_init_f(ulong dummy) /* UART clocks enabled and gd valid - init serial console */ preloader_console_init(); + read_spi_flash(); + /* DDR initialization */ spl_dram_init(); diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 41162ca..f5dfaf7 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -12,6 +12,10 @@ #ifdef CONFIG_SPL #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) +#define CONFIG_SPL_SPI_LOAD #include "imx6_spl.h" #endif @@ -35,6 +39,12 @@ #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */ #endif +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED + #define CONFIG_CMD_PCI #ifdef CONFIG_CMD_PCI #define CONFIG_PCI -- 1.9.1 The when I run it: U-Boot SPL 2015.07-08202-g6dcdca1-dirty (Aug 06 2015 - 10:18:33) mxc_spi: SPI Slave not allocated ! spi_flash_probe() ---> spi_setup_slave() ----> spi_alloc_slave() which fails on mxc_spi.c As read_spi_flash() is called prior to the DDR initialization, spi_alloc_slave() fails. Is there a way to avoid calling spi_alloc_slave() in the SPL case? Any ideas on how to fix this? Thanks, Fabio Estevam

5 15

[U-Boot] [PATCH 0/7] Add board detection for Odroid XU3 / XU3Lite / XU4
by Przemyslaw Marczak 06 Nov '15

06 Nov '15

This patchset adds: - define the CPU name for Chromebook Peach Pi as Exynos5800 - set the cpu id of Exynos5422 to 0x5422 - S2MPS11 PMIC I/O driver - Exynos5420-compatible (9-channel, 12-bit) ADC driver - board detection for Odroid XU3 / XU3lite / XU4 This was tested on Odroid XU3 and XU3 Lite, without the XU4, but I'm waiting for reply from the Odroid forum users. Tested with buildman for samsung. Available on github: https://github.com/bobenstein/u-boot/tree/xu3-patchset-test Przemyslaw Marczak (7): s5p: cpu_info: use defined CPU name if available peach-pi: define CPU name for SoC Exynos5800 Exynos5422/5800: set cpu id to 0x5422 dm: pmic: add s2mps11 PMIC I/O driver odroid-xu3: enable s2mps11 PMIC support Exynos: add internal ADC driver exynos5-dt: add board detection for Odroid XU3/XU3L/XU4. arch/arm/cpu/armv7/s5p-common/cpu_info.c | 5 ++ arch/arm/dts/exynos5422-odroidxu3.dts | 7 ++ arch/arm/mach-exynos/Makefile | 1 + arch/arm/mach-exynos/adc.c | 83 ++++++++++++++++++++++ arch/arm/mach-exynos/clock.c | 16 ++--- arch/arm/mach-exynos/clock_init_exynos5.c | 2 +- arch/arm/mach-exynos/common_setup.h | 4 +- arch/arm/mach-exynos/include/mach/adc.h | 45 ++++++++++++ arch/arm/mach-exynos/include/mach/cpu.h | 10 +-- arch/arm/mach-exynos/include/mach/gpio.h | 4 +- arch/arm/mach-exynos/pinmux.c | 2 +- arch/arm/mach-exynos/power.c | 2 +- board/samsung/common/exynos5-dt.c | 114 ++++++++++++++++++++++++++++++ configs/odroid-xu3_defconfig | 3 + doc/device-tree-bindings/pmic/s2mps11.txt | 17 +++++ drivers/power/pmic/Kconfig | 14 ++++ drivers/power/pmic/Makefile | 1 + drivers/power/pmic/s2mps11.c | 60 ++++++++++++++++ include/configs/odroid_xu3.h | 12 ++++ include/configs/peach-pi.h | 2 + include/power/s2mps11.h | 109 ++++++++++++++++++++++++++++ 21 files changed, 493 insertions(+), 20 deletions(-) create mode 100644 arch/arm/mach-exynos/adc.c create mode 100644 doc/device-tree-bindings/pmic/s2mps11.txt create mode 100644 drivers/power/pmic/s2mps11.c create mode 100644 include/power/s2mps11.h -- 1.9.1

6 105

[U-Boot] [PATCH V2] t1040d4rdb: assign muxed pins to qe-tdm when set hwconfig qe-tdm
by Zhao Qiang 02 Nov '15

02 Nov '15

qe-tdm is muxed with diu, if hwconfig setted as qe-tdm, assign muxed pins to qe-tdm, then delete diu node from device tree. Signed-off-by: Zhao Qiang <qiang.zhao(a)freescale.com> --- changes for v2 - move fdt_del_diu to arch/powerpc/cpu/mpc85xx/fdt.c - add new .h file arch/powerpc/include/asm/fsl_fdt.h for FSL-FDT arch/powerpc/cpu/mpc85xx/fdt.c | 11 +++++++++++ arch/powerpc/include/asm/fsl_fdt.h | 11 +++++++++++ board/freescale/t104xrdb/cpld.h | 1 + board/freescale/t104xrdb/t104xrdb.c | 10 ++++++++++ 4 files changed, 33 insertions(+) create mode 100644 arch/powerpc/include/asm/fsl_fdt.h diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index d4c3d9d..7270be1 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -13,6 +13,7 @@ #include <asm/processor.h> #include <linux/ctype.h> #include <asm/io.h> +#include <asm/fsl_fdt.h> #include <asm/fsl_portals.h> #include <hwconfig.h> #ifdef CONFIG_FSL_ESDHC @@ -943,3 +944,13 @@ int ft_verify_fdt(void *fdt) return 1; } + +void fdt_del_diu(void *blob) +{ + int nodeoff = 0; + + while ((nodeoff = fdt_node_offset_by_compatible(blob, 0, + "fsl,diu")) >= 0) { + fdt_del_node(blob, nodeoff); + } +} diff --git a/arch/powerpc/include/asm/fsl_fdt.h b/arch/powerpc/include/asm/fsl_fdt.h new file mode 100644 index 0000000..82e8f45 --- /dev/null +++ b/arch/powerpc/include/asm/fsl_fdt.h @@ -0,0 +1,11 @@ +/* + * Copyright 2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef _FSL_FDT_H_ +#define _FSL_FDT_H_ + +void fdt_del_diu(void *blob); + +#endif diff --git a/board/freescale/t104xrdb/cpld.h b/board/freescale/t104xrdb/cpld.h index 2fb4105..86de26c 100644 --- a/board/freescale/t104xrdb/cpld.h +++ b/board/freescale/t104xrdb/cpld.h @@ -44,3 +44,4 @@ void cpld_write(unsigned int reg, u8 value); cpld_write(offsetof(struct cpld_data, reg), value) #define MISC_CTL_SG_SEL 0x80 #define MISC_CTL_AURORA_SEL 0x02 +#define MISC_MUX_QE_TDM 0xc0 diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c index d982dfc..3227652 100644 --- a/board/freescale/t104xrdb/t104xrdb.c +++ b/board/freescale/t104xrdb/t104xrdb.c @@ -6,12 +6,14 @@ #include <common.h> #include <command.h> +#include <hwconfig.h> #include <netdev.h> #include <linux/compiler.h> #include <asm/mmu.h> #include <asm/processor.h> #include <asm/cache.h> #include <asm/immap_85xx.h> +#include <asm/fsl_fdt.h> #include <asm/fsl_law.h> #include <asm/fsl_serdes.h> #include <asm/fsl_portals.h> @@ -110,6 +112,12 @@ int misc_init_r(void) MISC_CTL_SG_SEL | MISC_CTL_AURORA_SEL); #if defined(CONFIG_T1040D4RDB) + if (hwconfig("qe-tdm")) { + CPLD_WRITE(sfp_ctl_status, CPLD_READ(sfp_ctl_status) | + MISC_MUX_QE_TDM); + printf("QECSR : 0x%02x, mux to qe-tdm\n", + CPLD_READ(sfp_ctl_status)); + } /* Mask all CPLD interrupt sources, except QSGMII interrupts */ if (CPLD_READ(sw_ver) < 0x03) { debug("CPLD SW version 0x%02x doesn't support int_mask\n", @@ -149,5 +157,7 @@ int ft_board_setup(void *blob, bd_t *bd) fdt_fixup_fman_ethernet(blob); #endif + if (hwconfig("qe-tdm")) + fdt_del_diu(blob); return 0; } -- 2.1.0.27.g96db324

2 1

[U-Boot] [PATCH] net: cancel timeout handler after DHCPACK
by Stefan Brüns 29 Oct '15

29 Oct '15

Timeout handler should be stopped after reception of DHCPACK. If "autoload" is not set, the handler is immediately replaced by the TFTP handler, otherwise it may trigger before the next boot stage begins. Signed-off-by: Stefan Brüns <stefan.bruens(a)rwth-aachen.de> --- net/bootp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/net/bootp.c b/net/bootp.c index c6b0847..ac14044 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -1026,6 +1026,7 @@ static void dhcp_handler(uchar *pkt, unsigned dest, struct in_addr sip, dhcp_state = BOUND; printf("DHCP client bound to address %pI4 (%lu ms)\n", &net_ip, get_timer(bootp_start)); + net_set_timeout_handler(0, (thand_f *)0); bootstage_mark_name(BOOTSTAGE_ID_BOOTP_STOP, "bootp_stop"); -- 2.1.4

2 2