February 2015 - U-Boot

Re: [U-Boot] How to have U-boot loading U-boot
by Wolfgang Denk 04 Feb '15

04 Feb '15

Dear Jean-Christophe Lallemand, In message <9FDDF58442D8154DBF9BB9A68CE7AD9CEC6E3F1A91(a)CHUCK.dvlt.local> you wrote: > > I've stumbled upon SPL in my search for a good solution but my impression was that all the image loading stuff and therefore validation was not in there. So add it? > So I thought that would solve half of my problems but create new ones and having a plain u-boot loading another u-boot would perhaps be a better approach. I doubt that. You would have to run two different builds and/or modify the build process; instead you can have it all done in a simgle build, in a standard and community-supported way. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Ernest asks Frank how long he has been working for the company. "Ever since they threatened to fire me."

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[U-Boot] AM335x ChiliSOM support
by Rostislav Lisovy 04 Feb '15

04 Feb '15

Hello; I just started working with the ChiliSOM module [1] -- in my particular case it is part of the Chiliboard [2]. The ChiliSOM is a nice little module based on the TI AM335x ARM SoC. I already started porting the mainline U-boot for it. The DRAM and serial console seem to work so far. I hope the rest (Ethernet, USB) won't be that painful. When implementing the support for this SOM I copy-pasted a lot of code (almost all of it) from the ti/am335x/board.c. I had to copy the linker script and include/configs/am335x_evm.h (which has reference to the particular linkerscript) as well. Not only I know this is very wrong, I do not like it. One possibility would be to modify the ti/am335x/board.c to be able to work with this SOM, although the code reading the board identification (from serial EEPROM) at the beginning of many functions seem to be an issue. Not very elegant solution would be to #ifndef them for all the other boards with the exception of the ChiliSOM. Another possibility would be to have an extra board.c, however the include/configs/am335x_evm.h will be used as a configuration file with the CONFIG_SYS_LDSCRIPT somehow (how?) pointing to some generic am335x linker script. Is there an interest in ChiliSOM U-boot support? What is the most elegant way resulting in the least code duplication? I will appreciate your help. Best regards; Rostislav Lisovy [1] http://www.grinn.pl/en/som [2] http://test.chiliboard.org/ http://chiliboard.org/

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[U-Boot] [PATCH v5 0/7] Exynos5: Fix warnings and enrich clock_get_periph_rate
by Akshay Saraswat 04 Feb '15

04 Feb '15

This patch series does following changes - 1. Removing compiler warnings for clock_get_periph_rate. 2. Adding and enabling support for Exynos542x in clock_get_periph_rate. 3. Replacing peripheral specific function calls with clock_get_periph_rate. 4. Remove code from clocks file which became useless due to introduction of clock_get_periph_rate. Changes since v4: - Added Reviewed-by in patches 3 and 5. - Split patch 6 of version 4 into two patches 6 and 7. Changes since v3: - Added Reviewed-by & Tested-by in patches 1, 2 and 4. - Patch-3: Handled SPLL case in exynos542x_get_periph_rate. - Patch-3: Changed EXYNOS542x -> EXYNOS542X in pll_src_bit enum. - Merged pathces 5 and 6 of version 3. - Patch-6: New patch for dealing with variety of mask bits. Changes since v2: - Patch-1: Added debug message for unknown periph IDs. - Patch-2: Changed exynos5420 -> exynos542x in comment. - Patch-3: Fixed enum and soc_get_periph_rate switch. - Patch-3: Added checks for negative values in soc_get_periph_rate. - Patch-4: Added checks for negative values in soc_get_periph_rate. Changes since v1: - Added 2 new patches. Akshay Saraswat (7): Exynos5: Fix compiler warnings due to clock_get_periph_rate Exynos542x: Move exynos5420_get_pll_clk up and rename Exynos542x: Add and enable get_periph_rate support Exynos5: Fix exynos5_get_periph_rate calculations Exynos5: Use clock_get_periph_rate generic API Exynos: clock: change mask bits as per peripheral Exynos: Clock: Cleanup soc_get_periph_rate arch/arm/cpu/armv7/exynos/clock.c | 619 ++++++++++++++++----------------- arch/arm/include/asm/arch-exynos/clk.h | 4 + 2 files changed, 296 insertions(+), 327 deletions(-) -- 1.9.1

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[U-Boot] falcon mode for signed FIT images
by Belisko Marek 04 Feb '15

04 Feb '15

Hi all, is it possible to start FIT signed kernel from SPL (falcon mode)? Thanks, marek -- as simple and primitive as possible ------------------------------------------------- Marek Belisko - OPEN-NANDRA Freelance Developer Ruska Nova Ves 219 | Presov, 08005 Slovak Republic Tel: +421 915 052 184 skype: marekwhite twitter: #opennandra web: http://open-nandra.com

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[U-Boot] Let's bury CONFIG_NEEDS_MANUAL_RELOC
by Graeme Russ 04 Feb '15

04 Feb '15

Hi Guys, Since I did the initial 'full relocation' for x86 way back when (http://git.denx.de/?p=u-boot.git;a=commit;h=1c409bc7101a24ecd47a13a4e851845…), there has been a lot of chatter about the ongoing need for CONFIG_NEEDS_MANUAL_RELOC. I think it's about time we looked really hard at this define and come to a definitive conclusion as to IF and HOW we can get rid of it for the remaining architectures that use it (being avr32, m68k, nds32, and sparc). First, a bit of a primer on why and how I finally killed off CONFIG_NEEDS_MANUAL_RELOC for x86... Despite the best intentions of the 'manual' relocation performed by U-Boot, there were still instances where the U-Boot binary referenced the 'unrelocated' image which typically resides in flash (NOR flash in the case of the x86 board I was using). I only finally tracked this down through some arduous debugging of random crashes during the writing of a new U-Boot image to the NOR flash. After a lot of digging around, I managed to get a good understanding of the ELF binary format for x86 and compiler/linker flags needed in order to generate a binary image that could be relocated. It turns out that for x86, it was the -pic and --emit-relocs ld flags (Oddly, I cannot find the -pic flag in the gnu ld documentation maybe it's depricated?) The --emit-relocs flags leaves the relocation sections (for x86 the section of interest is .rela.dyn) in the final image. These sections list all the locations in the final binary that need to be adjusted if the image is loaded at a different address than the one it is compiled for. You can see the processing in do_elf_reloc_fixups() in arch/x86/lib/relocate.c Keep in mind that the relocation sections are NOT copied to RAM - they are only used once after U-Boot is copied to RAM to locate the memory locations that need to be adjusted. So the crux of generic relocation is to generate a stripped binary with all necessary ELF relocation information located AFTER the text and data sections which are copied to RAM So the first question that we need to answer is: Do the avr32, m68k, nds32, and sparc toolchains support the generation of the relevant sections needed to perform relocation in a manner similar to x86 (i.e generation of relocation references into sections of the final U-Boot binary)? Regards, Graeme

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[U-Boot] Hang when enabling DCache on a iMX6 board
by Boris Brezillon 04 Feb '15

04 Feb '15

Hello, I'm currently porting the SECO iMX6 uQ7 board to mainline, but I'm facing a hang when enabling DCache (CONFIG_SYS_DCACHE_OFF undefined). Last week I asked on the #u-boot chan if anybody already encountered such a bug, and someone (named malik) suggested to check my DDR timings. After a few more tests and checks I decided to port my changes to an older version (2014.04), and it apparently works. I haven't bisected to find the exact commit that makes it fails yet, but before doing that I'd like to know if anyone else already experienced this kind of problem, or has any idea of what could cause this. Here is my public repository containing two branches [1], the seco-mainline branch contains my port based on the master branch and the seco-2014.04 contains the same work based on the 2014.04 tag. Best Regards, Boris [1]https://github.com/bbrezillon/u-boot-seco -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com

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[U-Boot] [PATCH] lcd: Add support for CONFIG_LCD_NOSTDOUT
by Hannes Petermaier 04 Feb '15

04 Feb '15

- Adds support for CONFIG_LCD_NOSTDOUT, which prevents switching stdout to the LCD screen, usefull in case when only lcd_puts(...), lcd_printf(...) is used for displaying status informations. Signed-off-by: Hannes Petermaier <oe5hpm(a)oevsv.at> --- README | 7 +++++++ common/lcd.c | 9 ++++++--- 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/README b/README index 216f0c7..4792068 100644 --- a/README +++ b/README @@ -1702,6 +1702,13 @@ CBFS (Coreboot Filesystem) support Normally display is black on white background; define CONFIG_SYS_WHITE_ON_BLACK to get it inverted. + CONFIG_LCD_NOSTDOUT + Normally 'stdout' is redirected to LCD-screen after + initialization. Define CONFIG_LCD_NOSTDOUT to avoid this. + Useful in case where only lcd_puts(...), lcd_printf(...) + functions of the framework are used and 'normal' u-boot + console remains e.g. on serial-line. + CONFIG_LCD_ALIGNMENT Normally the LCD is page-aligned (tyically 4KB). If this is diff --git a/common/lcd.c b/common/lcd.c index aa81522..eac1b87 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -400,12 +400,12 @@ __weak int lcd_get_size(int *line_length) int drv_lcd_init(void) { - struct stdio_dev lcddev; - int rc; - lcd_base = (void *) gd->fb_base; lcd_init(lcd_base); /* LCD initialization */ +#ifndef CONFIG_LCD_NOSTDOUT + struct stdio_dev lcddev; + int rc; /* Device initialization */ memset(&lcddev, 0, sizeof(lcddev)); @@ -419,6 +419,9 @@ int drv_lcd_init(void) rc = stdio_register(&lcddev); return (rc == 0) ? 1 : rc; +#else + return 0; +#endif } /*----------------------------------------------------------------------*/ -- 1.7.9.5

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[U-Boot] [PATCH 1/2] sunxi: video: Do not use CONFIG_SYS_MEM_TOP_HIDE for the framebuffer
by Hans de Goede 04 Feb '15

04 Feb '15

Do not use CONFIG_SYS_MEM_TOP_HIDE for the framebuffer, instead override board_get_usable_ram_top to make sure that u-boot is not relocated into the area where we want to use the framebuffer, and patch the devicetree from sunxi_simplefb_setup() to tell the kernel to not touch the framebuffer. This makes u-boot properly see the framebuffer as dram, and initalize the level 2 cache for it, fixing the very slow cfb scrolling problem. As an added bonus this stops us from reserving the framebuffer when simplefb is not used because an older kernel is booted, or hdp is used and no hdmi cable was plugged in, freeing up the memory for kernel use in these cases. Reported-by: Siarhei Siamashka <siarhei.siamashka(a)gmail.com> Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- drivers/video/sunxi_display.c | 22 +++++++++++++++++++++- include/configs/sunxi-common.h | 8 +++----- 2 files changed, 24 insertions(+), 6 deletions(-) diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi_display.c index f5f24fc..a120e71 100644 --- a/drivers/video/sunxi_display.c +++ b/drivers/video/sunxi_display.c @@ -1060,6 +1060,11 @@ static const char *sunxi_get_mon_desc(enum sunxi_monitor monitor) return NULL; /* never reached */ } +ulong board_get_usable_ram_top(ulong total_size) +{ + return gd->ram_top - CONFIG_SUNXI_MAX_FB_SIZE; +} + void *video_hw_init(void) { static GraphicDevice *graphic_device = &sunxi_display.graphic_device; @@ -1076,7 +1081,7 @@ void *video_hw_init(void) memset(&sunxi_display, 0, sizeof(struct sunxi_display)); printf("Reserved %dkB of RAM for Framebuffer.\n", - CONFIG_SUNXI_FB_SIZE >> 10); + CONFIG_SUNXI_MAX_FB_SIZE >> 10); gd->fb_base = gd->ram_top; video_get_ctfb_res_modes(RES_MODE_1024x768, 24, &mode, @@ -1194,6 +1199,7 @@ int sunxi_simplefb_setup(void *blob) { static GraphicDevice *graphic_device = &sunxi_display.graphic_device; int offset, ret; + u64 start, size; const char *pipeline = NULL; #ifdef CONFIG_MACH_SUN4I @@ -1237,6 +1243,20 @@ int sunxi_simplefb_setup(void *blob) return 0; /* Keep older kernels working */ } + /* + * Do not report the framebuffer as free RAM to Linux, note we cannot + * use fdt_add_mem_rsv() here, because then it is still seen as RAM, + * and Linux refuses to iomap RAM on ARM, see: + * linux/arch/arm/mm/ioremap.c around line 301. + */ + start = gd->bd->bi_dram[0].start; + size = gd->bd->bi_dram[0].size - CONFIG_SUNXI_MAX_FB_SIZE; + ret = fdt_fixup_memory_banks(blob, &start, &size, 1); + if (ret) { + eprintf("Cannot setup simplefb: Error reserving memory\n"); + return ret; + } + ret = fdt_setup_simplefb_node(blob, offset, gd->fb_base, graphic_device->winSizeX, graphic_device->winSizeY, graphic_device->winSizeX * graphic_device->gdfBytesPP, diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 3d69861..bf60dcb 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -259,10 +259,10 @@ #ifdef CONFIG_VIDEO /* - * The amount of RAM that is reserved for the FB. This will not show up as - * RAM to the kernel, but will be reclaimed by a KMS driver in future. + * The amount of RAM to keep free at the top of RAM when relocating u-boot, + * to use as framebuffer. This must be a multiple of 4096. */ -#define CONFIG_SUNXI_FB_SIZE (9 << 20) +#define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20) /* Do we want to initialize a simple FB? */ #define CONFIG_VIDEO_DT_SIMPLEFB @@ -280,8 +280,6 @@ /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ #define CONFIG_VGA_AS_SINGLE_DEVICE -#define CONFIG_SYS_MEM_TOP_HIDE ((CONFIG_SUNXI_FB_SIZE + 0xFFF) & ~0xFFF) - /* To be able to hook simplefb into dt */ #ifdef CONFIG_VIDEO_DT_SIMPLEFB #define CONFIG_OF_BOARD_SETUP -- 2.1.0

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[U-Boot] [PATCH v2] drivers/video/am335x-fb: Add possibility to wait for stable power/picture
by Hannes Petermaier 04 Feb '15

04 Feb '15

Often on boards exists a circuit which switches power on/off to LCD display. Due to the need of limiting the in-rush current the output voltage from this circuit rises "slowly", so it is necessary to wait a bit (VCC ramp up time) before starting output on LCD-pins. This time is specified in <n> ms within the panel-settings, called "pup_delay" Further some LCDs need a couple of frames to stabilize the image on it. We have now the possibility to wait some time after starting output on LCD. This time is also specified in <n> ms within panel-settings, called "pon_delay" Signed-off-by: Hannes Petermaier <oe5hpm(a)oevsv.at> --- Changes for V2: None --- drivers/video/am335x-fb.c | 13 ++++++++----- drivers/video/am335x-fb.h | 9 +++++++-- 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c index ab98941..6f95649 100644 --- a/drivers/video/am335x-fb.c +++ b/drivers/video/am335x-fb.c @@ -127,6 +127,12 @@ int am335xfb_init(struct am335x_lcdpanel *panel) memset((void *)gd->fb_base, 0, 0x20); *(unsigned int *)gd->fb_base = 0x4000; + /* turn ON display through powercontrol function if accessible */ + if (0 != panel->panel_power_ctrl) + panel->panel_power_ctrl(1); + + debug("am335x-fb: wait for stable power ...\n"); + mdelay(panel->pup_delay); lcdhw->clkc_enable = LCD_CORECLKEN | LCD_LIDDCLKEN | LCD_DMACLKEN; lcdhw->raster_ctrl = 0; lcdhw->ctrl = LCD_CLK_DIVISOR(panel->pxl_clk_div) | LCD_RASTER_MODE; @@ -159,11 +165,8 @@ int am335xfb_init(struct am335x_lcdpanel *panel) gd->fb_base += 0x20; /* point fb behind palette */ - /* turn ON display through powercontrol function if accessible */ - if (0 != panel->panel_power_ctrl) { - mdelay(panel->pon_delay); - panel->panel_power_ctrl(1); - } + debug("am335x-fb: waiting picture to be stable.\n."); + mdelay(panel->pon_delay); return 0; } diff --git a/drivers/video/am335x-fb.h b/drivers/video/am335x-fb.h index 8a0b131..7f799d1 100644 --- a/drivers/video/am335x-fb.h +++ b/drivers/video/am335x-fb.h @@ -55,9 +55,14 @@ struct am335x_lcdpanel { unsigned int vsw; /* Vertical Sync Pulse Width */ unsigned int pxl_clk_div; /* Pixel clock divider*/ unsigned int pol; /* polarity of sync, clock signals */ + unsigned int pup_delay; /* + * time in ms after power on to + * initialization of lcd-controller + * (VCC ramp up time) + */ unsigned int pon_delay; /* - * time in ms for turning on lcd after - * initializing lcd-controller + * time in ms after initialization of + * lcd-controller (pic stabilization) */ void (*panel_power_ctrl)(int); /* fp for power on/off display */ }; -- 1.7.10.4

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Re: [U-Boot] [PATCH v5 7/7] Exynos: Clock: Cleanup soc_get_periph_rate
by Akshay Saraswat 04 Feb '15

04 Feb '15

Hi, >Hi Akshay, > >On 02/03/2015 05:27 PM, Akshay Saraswat wrote: >> Cleaning up soc_get_periph_rate to make the logic easy to >> comprehend. >> > >Could you give more detailed description? We did just a cleanup here by removing I2C sepecific calculations because we can now have a generic div and pre-div calculation. Only intention of doing it is making code clean and easily understandable. I don't know what else to write for that. Please suggest. :) > >> Signed-off-by: Akshay Saraswat <akshay.s(a)samsung.com> >> --- >> Changes since v4: >> - New patch. >> >> arch/arm/cpu/armv7/exynos/clock.c | 76 +++++++++++++++++---------------------- >> 1 file changed, 33 insertions(+), 43 deletions(-) >> >> diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c >> index 3884d4b..8724bc7 100644 >> --- a/arch/arm/cpu/armv7/exynos/clock.c >> +++ b/arch/arm/cpu/armv7/exynos/clock.c >> @@ -366,8 +366,8 @@ static struct clk_bit_info *get_clk_bit_info(int peripheral) >> static unsigned long exynos5_get_periph_rate(int peripheral) >> { >> struct clk_bit_info *bit_info = get_clk_bit_info(peripheral); >> - unsigned long sclk, sub_clk = 0; >> - unsigned int src, div, sub_div = 0; >> + unsigned long sclk = 0; >> + unsigned int src = 0, div = 0, sub_div = 0; >> struct exynos5_clock *clk = >> (struct exynos5_clock *)samsung_get_base_clock(); >> >> @@ -389,30 +389,30 @@ static unsigned long exynos5_get_periph_rate(int peripheral) >> break; >> case PERIPH_ID_I2S0: >> src = readl(&clk->src_mau); >> - div = readl(&clk->div_mau); >> + div = sub_div = readl(&clk->div_mau); >> case PERIPH_ID_SPI0: >> case PERIPH_ID_SPI1: >> src = readl(&clk->src_peric1); >> - div = readl(&clk->div_peric1); >> + div = sub_div = readl(&clk->div_peric1); >> break; >> case PERIPH_ID_SPI2: >> src = readl(&clk->src_peric1); >> - div = readl(&clk->div_peric2); >> + div = sub_div = readl(&clk->div_peric2); >> break; >> case PERIPH_ID_SPI3: >> case PERIPH_ID_SPI4: >> src = readl(&clk->sclk_src_isp); >> - div = readl(&clk->sclk_div_isp); >> + div = sub_div = readl(&clk->sclk_div_isp); >> break; >> case PERIPH_ID_SDMMC0: >> case PERIPH_ID_SDMMC1: >> src = readl(&clk->src_fsys); >> - div = readl(&clk->div_fsys1); >> + div = sub_div = readl(&clk->div_fsys1); >> break; >> case PERIPH_ID_SDMMC2: >> case PERIPH_ID_SDMMC3: >> src = readl(&clk->src_fsys); >> - div = readl(&clk->div_fsys2); >> + div = sub_div = readl(&clk->div_fsys2); >> break; >> case PERIPH_ID_I2C0: >> case PERIPH_ID_I2C1: >> @@ -422,12 +422,10 @@ static unsigned long exynos5_get_periph_rate(int peripheral) >> case PERIPH_ID_I2C5: >> case PERIPH_ID_I2C6: >> case PERIPH_ID_I2C7: >> - sclk = exynos5_get_pll_clk(MPLL); >> - sub_div = ((readl(&clk->div_top1) >> bit_info->div_bit) >> - & bit_info->div_mask) + 1; >> - div = ((readl(&clk->div_top0) >> bit_info->prediv_bit) >> - & bit_info->prediv_mask) + 1; >> - return (sclk / sub_div) / div; >> + src = EXYNOS_SRC_MPLL; >> + div = readl(&clk->div_top0); >> + sub_div = readl(&clk->div_top1); >> + break; >> default: >> debug("%s: invalid peripheral %d", __func__, peripheral); >> return -1; >> @@ -446,29 +444,26 @@ static unsigned long exynos5_get_periph_rate(int peripheral) >> case EXYNOS_SRC_VPLL: >> sclk = exynos5_get_pll_clk(VPLL); >> break; >> - default: >> - return 0; > >Why remove? I think it's better to use default label and also how about >add debug log? Removing because anyways we are going to calculate & return 0 for non-existent src or sclk. I have initialized src and sclk above with value zero. > >> } >> >> - /* Ratio clock division for this peripheral */ >> - if (bit_info->div_bit >= 0) { >> - sub_div = (div >> bit_info->div_bit) & bit_info->div_mask; >> - sub_clk = sclk / (sub_div + 1); >> - } >> + /* Clock divider ratio for this peripheral */ >> + if (bit_info->div_bit >= 0) >> + div = (div >> bit_info->div_bit) & bit_info->div_mask; >> >> - if (bit_info->prediv_bit >= 0) { >> - div = (div >> bit_info->prediv_bit) & bit_info->prediv_mask; >> - return sub_clk / (div + 1); >> - } >> + /* Clock pre-divider ratio for this peripheral */ >> + if (bit_info->prediv_bit >= 0) >> + sub_div = (sub_div >> bit_info->prediv_bit) >> + & bit_info->prediv_mask; >> >> - return sub_clk; >> + /* Calculate and return required clock rate */ >> + return (sclk / (div + 1)) / (sub_div + 1); >> } >> >> static unsigned long exynos542x_get_periph_rate(int peripheral) >> { >> struct clk_bit_info *bit_info = get_clk_bit_info(peripheral); >> - unsigned long sclk, sub_clk = 0; >> - unsigned int src, div, sub_div = 0; >> + unsigned long sclk = 0; >> + unsigned int src = 0, div = 0, sub_div = 0; >> struct exynos5420_clock *clk = >> (struct exynos5420_clock *)samsung_get_base_clock(); >> >> @@ -516,10 +511,9 @@ static unsigned long exynos542x_get_periph_rate(int peripheral) >> case PERIPH_ID_I2C8: >> case PERIPH_ID_I2C9: >> case PERIPH_ID_I2C10: >> - sclk = exynos542x_get_pll_clk(MPLL); >> - sub_div = ((readl(&clk->div_top1) >> bit_info->div_bit) >> - & bit_info->div_mask) + 1; >> - return sclk / sub_div; >> + src = EXYNOS542X_SRC_MPLL; >> + div = readl(&clk->div_top1); >> + break; >> default: >> debug("%s: invalid peripheral %d", __func__, peripheral); >> return -1; >> @@ -541,23 +535,19 @@ static unsigned long exynos542x_get_periph_rate(int peripheral) >> case EXYNOS542X_SRC_RPLL: >> sclk = exynos542x_get_pll_clk(RPLL); >> break; >> - default: >> - return 0; > >Ditto. > >> } >> >> - /* Ratio clock division for this peripheral */ >> - if (bit_info->div_bit >= 0) { >> + /* Clock divider ratio for this peripheral */ >> + if (bit_info->div_bit >= 0) >> div = (div >> bit_info->div_bit) & bit_info->div_mask; >> - sub_clk = sclk / (div + 1); >> - } >> >> - if (bit_info->prediv_bit >= 0) { >> + /* Clock pre-divider ratio for this peripheral */ >> + if (bit_info->prediv_bit >= 0) >> sub_div = (sub_div >> bit_info->prediv_bit) >> - & bit_info->prediv_mask; >> - return sub_clk / (sub_div + 1); >> - } >> + & bit_info->prediv_mask; >> >> - return sub_clk; >> + /* Calculate and return required clock rate */ >> + return (sclk / (div + 1)) / (sub_div + 1); >> } >> >> unsigned long clock_get_periph_rate(int peripheral) >> > >Thanks. > Regards, Akshay Saraswat

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