February 2015 - U-Boot

[U-Boot] [PATCH V2 00/13] common lcd refactor
by Nikita Kiryanov 10 Feb '15

10 Feb '15

This series is part of my ongoing efforts to cleanup common/lcd code (and at some point merge it with the CONFIG_VIDEO code). This series focuses on eliminating platform specific #defines from lcd.c code, and then adds a few platform independent code refactors and cleanups on top of that. A small note on the series: - The patch "lcd: split configuration_get_cmap" turned out to be a little problematic: the goal was to move all platform specific code to the appropriate lcd/fb drivers, and keep the generic case in lcd.c as a weak function. This was not possible to do for configuration_get_cmap(), because the weak version still has to compile even if it is overridden, and unfortunately the generic case references panel_info, which is a struct that varies depending on the configuration, and does not always have a cmap field. This demonstrated that the visibility of panel_info should be reviewed, and that there might be a need for some kind of lcd_generic driver. Since this may warrant a series of its own, I opted to tentatively implement the generic configuration_get_cmap() function in lcd.h as static function, and plan to revisit it in the next series. The end result was compile tested on arm and powerpc, and tested on cm_t35 (splash screen feature). Rebased on current mainline. Changes in V2: - Minor commit message changes (such as s/platform specific/platform-specific/, s/Raspberry Pi config file is updated to compile the new file/Raspberry Pi is updated to accommodate the changes/) - patch 2: define configuration_get_cmap() prototype only once. Cc: Bo Shen <voice.shen(a)atmel.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Anatolij Gustschin <agust(a)denx.de> Nikita Kiryanov (13): lcd: move platform-specific structs to their own headers lcd: split configuration_get_cmap lcd: atmel: move atmel-specific fb_put_word to atmel_lcdfb lcd: mpc8xx: move mpc823-specific fb_put_byte to mpc8xx_lcd.c lcd: atmel: introduce lcd_logo_set_cmap lcd: mpc823: move mpc823-specific lcd_logo_set_cmap code to mpc8xx_lcd.c lcd: logo: move generic cmap setting to lcd_logo_set_cmap() lcd: introduce lcd_set_cmap lcd: remove unused includes lcd: various cleanups lcd: rename bitmap_plot to better represent its functionality lcd: dt: extract simplefb support lcd: split splash code into its own function board/raspberrypi/rpi/rpi.c | 1 + common/Makefile | 1 + common/lcd.c | 358 ++++++++++--------------------------------- common/lcd_simplefb.c | 59 +++++++ common/splash.c | 16 ++ drivers/video/atmel_hlcdfb.c | 13 ++ drivers/video/atmel_lcdfb.c | 51 ++++++ drivers/video/exynos_fb.c | 9 ++ drivers/video/mpc8xx_lcd.c | 29 ++++ drivers/video/pxa_lcd.c | 6 + include/atmel_lcd.h | 38 +++++ include/exynos_lcd.h | 81 ++++++++++ include/fdt_simplefb.h | 14 ++ include/lcd.h | 311 ++++++------------------------------- include/mpc823_lcd.h | 43 ++++++ include/pxa_lcd.h | 80 ++++++++++ include/splash.h | 11 +- 17 files changed, 574 insertions(+), 547 deletions(-) create mode 100644 common/lcd_simplefb.c create mode 100644 include/atmel_lcd.h create mode 100644 include/exynos_lcd.h create mode 100644 include/fdt_simplefb.h create mode 100644 include/mpc823_lcd.h create mode 100644 include/pxa_lcd.h -- 1.9.1

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[U-Boot] [PATCH 1/3] video: Update MXS LCDIF driver for mx6sx
by Ye.Li 10 Feb '15

10 Feb '15

Add a new interface "mxs_lcd_panel_setup" to setup fb parameters and specifies the LCDIF controller for multiple controllers of iMX6SX. Pass fb parameters via "videomode" env remains work if the new interface is not called before video initialization. Modify LCDIF clock interface "mxs_set_lcdclk" to support multiple LCDIF controllers on iMX6SX. Signed-off-by: Ye.Li <B37916(a)freescale.com> --- arch/arm/cpu/arm926ejs/mxs/clock.c | 4 +- arch/arm/include/asm/arch-mxs/clock.h | 2 +- drivers/video/mxsfb.c | 57 +++++++++++++++++++++++++++------ include/mxsfb.h | 15 +++++++++ 4 files changed, 65 insertions(+), 13 deletions(-) create mode 100644 include/mxsfb.h diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c b/arch/arm/cpu/arm926ejs/mxs/clock.c index e9d8800..ca020ca 100644 --- a/arch/arm/cpu/arm926ejs/mxs/clock.c +++ b/arch/arm/cpu/arm926ejs/mxs/clock.c @@ -5,7 +5,7 @@ * on behalf of DENX Software Engineering GmbH * * Based on code from LTIB: - * Copyright (C) 2010 Freescale Semiconductor, Inc. + * Copyright (C) 2010-2014 Freescale Semiconductor, Inc. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -309,7 +309,7 @@ void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq) bus, tgtclk, freq); } -void mxs_set_lcdclk(uint32_t freq) +void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq) { struct mxs_clkctrl_regs *clkctrl_regs = (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; diff --git a/arch/arm/include/asm/arch-mxs/clock.h b/arch/arm/include/asm/arch-mxs/clock.h index fc9d75b..8840335 100644 --- a/arch/arm/include/asm/arch-mxs/clock.h +++ b/arch/arm/include/asm/arch-mxs/clock.h @@ -46,7 +46,7 @@ uint32_t mxc_get_clock(enum mxc_clock clk); void mxs_set_ioclk(enum mxs_ioclock io, uint32_t freq); void mxs_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal); void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq); -void mxs_set_lcdclk(uint32_t freq); +void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq); /* Compatibility with the FEC Ethernet driver */ #define imx_get_fecclk() mxc_get_clock(MXC_AHB_CLK) diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c index 03b0f88..2653862 100644 --- a/drivers/video/mxsfb.c +++ b/drivers/video/mxsfb.c @@ -18,6 +18,10 @@ #include <asm/imx-common/dma.h> #include "videomodes.h" +#include <linux/string.h> +#include <linux/list.h> +#include <linux/fb.h> + #define PS2KHZ(ps) (1000000000UL / (ps)) @@ -35,6 +39,22 @@ __weak void mxsfb_system_setup(void) { } +static int setup; +static struct fb_videomode fbmode; +static int depth; + +int mxs_lcd_panel_setup(struct fb_videomode mode, int bpp, + uint32_t base_addr) +{ + fbmode = mode; + depth = bpp; + panel.isaBase = base_addr; + + setup = 1; + + return 0; +} + /* * DENX M28EVK: * setenv videomode @@ -50,15 +70,15 @@ __weak void mxsfb_system_setup(void) static void mxs_lcd_init(GraphicDevice *panel, struct ctfb_res_modes *mode, int bpp) { - struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE; + struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)(panel->isaBase); uint32_t word_len = 0, bus_width = 0; uint8_t valid_data = 0; /* Kick in the LCDIF clock */ - mxs_set_lcdclk(PS2KHZ(mode->pixclock)); + mxs_set_lcdclk(panel->isaBase, PS2KHZ(mode->pixclock)); /* Restart the LCDIF block */ - mxs_reset_block(&regs->hw_lcdif_ctrl_reg); + mxs_reset_block((struct mxs_register_32 *)&regs->hw_lcdif_ctrl); switch (bpp) { case 24: @@ -140,15 +160,32 @@ void *video_hw_init(void) puts("Video: "); - /* Suck display configuration from "videomode" variable */ - penv = getenv("videomode"); - if (!penv) { - puts("MXSFB: 'videomode' variable not set!\n"); - return NULL; + if (!setup) { + + /* Suck display configuration from "videomode" variable */ + penv = getenv("videomode"); + if (!penv) { + printf("MXSFB: 'videomode' variable not set!\n"); + return NULL; + } + + bpp = video_get_params(&mode, penv); + panel.isaBase = MXS_LCDIF_BASE; + } else { + mode.xres = fbmode.xres; + mode.yres = fbmode.yres; + mode.pixclock = fbmode.pixclock; + mode.left_margin = fbmode.left_margin; + mode.right_margin = fbmode.right_margin; + mode.upper_margin = fbmode.upper_margin; + mode.lower_margin = fbmode.lower_margin; + mode.hsync_len = fbmode.hsync_len; + mode.vsync_len = fbmode.vsync_len; + mode.sync = fbmode.sync; + mode.vmode = fbmode.vmode; + bpp = depth; } - bpp = video_get_params(&mode, penv); - /* fill in Graphic device struct */ sprintf(panel.modeIdent, "%dx%dx%d", mode.xres, mode.yres, bpp); diff --git a/include/mxsfb.h b/include/mxsfb.h new file mode 100644 index 0000000..a4e27a8 --- /dev/null +++ b/include/mxsfb.h @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MXSFB_H__ +#define __MXSFB_H__ + +#ifdef CONFIG_VIDEO_MXS +int mxs_lcd_panel_setup(struct fb_videomode mode, int bpp, + uint32_t base_addr); +#endif + +#endif /* __MXSFB_H__ */ -- 1.7.4.1

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[U-Boot] [v3 PATCH 0/3] Add support for booting mx28 boards without a battery
by Graeme Russ 10 Feb '15

10 Feb '15

This series adds support for booting mx28 based boards which do not include a battery as per Freescale application note AN4199 Patch 1 adds SPL debug output to help track down where early init of the power block and SDRAM fails (define DEBUG and CONFIG_SPL_SERIAL_SUPPORT in order to enable) Patch 2 (which implements booting without a battery) is based on a patch submitted to the Freescale community forums by Damien Gotfroi (define CONFIG_SYS_MXS_VDD5V_ONLY to enable) Patch 3 adds a useful halt upon completion of SPL in the case that the board is booted in JTAG mode. If SPL debug is enabled, 'Waiting for JTAG user' will be printed to the console when SPL has completed Changes in v2 - Dropped patch which adds Reachtech G2C1 board in order to allow the 'no battery' functionality to be mainlined as soon as possible - Removed the patch which moved the PLL power up from spl_power_init.c to spl_mem_init.c - This patch will be considered in future rework of the power block and SDRAM initialisation code Changes in v3 - Clarified commit message for patch 2 - Used explicit define in patch 2 (define == 0x00, so no functional change) - Removed extra blank line from patch #3 Graeme Russ (3): arm: mxs: Add debug outputs and comments to mxs SPL source files arm: mxs: Enable booting of mx28 without battery arm: mxs: Add 'Wait for JTAG user' if booted in JTAG mode arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 6 ++ arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c | 13 +++- arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 18 +++++ arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 110 ++++++++++++++++++++++++++-- arch/arm/include/asm/arch-mxs/sys_proto.h | 17 +++++ 5 files changed, 157 insertions(+), 7 deletions(-) -- 1.9.3

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[U-Boot] [PATCH] imx: mx6: Fixed AIPS3 base address issue
by Ye.Li 10 Feb '15

10 Feb '15

Should use AIPS3 configuration address 0x0227C000 to set AIPS3, not the AIPS3 base address. Additional, replace AIPS1_BASE_ADDR to AIPS3_ARB_BASE_ADDR to align with AIPS1 and AIPS2, and resolve the AIPS3_ARB_BASE_ADDR undefine problem. Signed-off-by: Ye.Li <B37916(a)freescale.com> --- arch/arm/cpu/armv7/mx6/soc.c | 2 +- arch/arm/include/asm/arch-mx6/imx-regs.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 5f5f497..e599a12 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -109,7 +109,7 @@ void init_aips(void) aips1 = (struct aipstz_regs *)AIPS1_BASE_ADDR; aips2 = (struct aipstz_regs *)AIPS2_BASE_ADDR; #ifdef CONFIG_MX6SX - aips3 = (struct aipstz_regs *)AIPS3_BASE_ADDR; + aips3 = (struct aipstz_regs *)AIPS3_CONFIG_BASE_ADDR; #endif /* diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 5314298..1983f2d 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -88,8 +88,8 @@ #define AIPS2_ARB_BASE_ADDR 0x02100000 #define AIPS2_ARB_END_ADDR 0x021FFFFF #ifdef CONFIG_MX6SX -#define AIPS3_BASE_ADDR 0x02200000 -#define AIPS3_END_ADDR 0x022FFFFF +#define AIPS3_ARB_BASE_ADDR 0x02200000 +#define AIPS3_ARB_END_ADDR 0x022FFFFF #define WEIM_ARB_BASE_ADDR 0x50000000 #define WEIM_ARB_END_ADDR 0x57FFFFFF #define QSPI1_ARB_BASE_ADDR 0x60000000 -- 1.7.4.1

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[U-Boot] [PATCH] imx: imximage: Add QuadSPI boot support
by Ye.Li 10 Feb '15

10 Feb '15

Add QuadSPI boot support to imximage tool. Note: The QuadSPI configuration parameters at offset 0x400 are not included in this patch. Need other tools to generate the parameters part. Signed-off-by: Ye.Li <B37916(a)freescale.com> --- tools/imximage.c | 2 ++ tools/imximage.h | 2 ++ 2 files changed, 4 insertions(+), 0 deletions(-) diff --git a/tools/imximage.c b/tools/imximage.c index 526b7d4..6cb2e9e 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -38,6 +38,7 @@ static table_entry_t imximage_boot_offset[] = { {FLASH_OFFSET_SATA, "sata", "SATA Disk", }, {FLASH_OFFSET_SD, "sd", "SD Card", }, {FLASH_OFFSET_SPI, "spi", "SPI Flash", }, + {FLASH_OFFSET_QSPI, "qspi", "QSPI NOR Flash", }, {-1, "", "Invalid", }, }; @@ -52,6 +53,7 @@ static table_entry_t imximage_boot_loadsize[] = { {FLASH_LOADSIZE_SATA, "sata", "SATA Disk", }, {FLASH_LOADSIZE_SD, "sd", "SD Card", }, {FLASH_LOADSIZE_SPI, "spi", "SPI Flash", }, + {FLASH_LOADSIZE_QSPI, "qspi", "QSPI NOR Flash", }, {-1, "", "Invalid", }, }; diff --git a/tools/imximage.h b/tools/imximage.h index 5b5ad0e..36fe095 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -29,6 +29,7 @@ #define FLASH_OFFSET_ONENAND 0x100 #define FLASH_OFFSET_NOR 0x1000 #define FLASH_OFFSET_SATA FLASH_OFFSET_STANDARD +#define FLASH_OFFSET_QSPI 0x1000 /* Initial Load Region Size */ #define FLASH_LOADSIZE_UNDEFINED 0xFFFFFFFF @@ -39,6 +40,7 @@ #define FLASH_LOADSIZE_ONENAND 0x400 #define FLASH_LOADSIZE_NOR 0x0 /* entire image */ #define FLASH_LOADSIZE_SATA FLASH_LOADSIZE_STANDARD +#define FLASH_LOADSIZE_QSPI 0x0 /* entire image */ #define IVT_HEADER_TAG 0xD1 #define IVT_VERSION 0x40 -- 1.7.4.1

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[U-Boot] [PATCH] imx: mx6qsabreauto: Change to use common GPMI IO clock function
by Ye.Li 10 Feb '15

10 Feb '15

Since a clock function setup_gpmi_io_clk is implemented for GPMI IO clock settings, change to use this common function in GPMI setup. Signed-off-by: Ye.Li <B37916(a)freescale.com> --- board/freescale/mx6qsabreauto/mx6qsabreauto.c | 25 ++----------------------- 1 files changed, 2 insertions(+), 23 deletions(-) diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index 59387ff..a90360f 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -311,30 +311,9 @@ static void setup_gpmi_nand(void) /* config gpmi nand iomux */ imx_iomux_v3_setup_multiple_pads(gpmi_pads, ARRAY_SIZE(gpmi_pads)); - /* gate ENFC_CLK_ROOT clock first,before clk source switch */ - clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); - clrbits_le32(&mxc_ccm->CCGR4, - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK); - - /* config gpmi and bch clock to 100 MHz */ - clrsetbits_le32(&mxc_ccm->cs2cdr, - MXC_CCM_CS2CDR_ENFC_CLK_PODF_MASK | - MXC_CCM_CS2CDR_ENFC_CLK_PRED_MASK | - MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK, - MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) | + setup_gpmi_io_clk((MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) | MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) | - MXC_CCM_CS2CDR_ENFC_CLK_SEL(3)); - - /* enable ENFC_CLK_ROOT clock */ - setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); - - /* enable gpmi and bch clock gating */ - setbits_le32(&mxc_ccm->CCGR4, - MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | - MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_OFFSET); + MXC_CCM_CS2CDR_ENFC_CLK_SEL(3))); /* enable apbh clock gating */ setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); -- 1.7.4.1

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[U-Boot] [PATCH 00/17] sunxi: musb otg controller support
by Hans de Goede 10 Feb '15

10 Feb '15

Hi Marek, Ian, et al, I'm very happy to present this patch series, which is the last pieze of the puzzle to make it possible for people to use u-boot on sunxi devices without needing to resort to putting a soldering iron to their tablet :) With this series sunxi tablet owners can simply plug in a usb keyboard into the otg port of their tablet (how boring). Interestingly enough getting the musb code to work on sunxi was quite east, most of my time went into fixing generic usb / musb issues, which should help on other boards too :) This entire series is based on u-boot-sunxi/next and for some of the sunxi specific patches there will likely be conflicts when applied directly to master, therefor I would like to suggest the following scheme for getting this upstream: 1) Add patches 1-5 to u-boot-sunxi/next (once reviewed) 2) Add patches 6-16 to u-boot-usb/next (once reviewed) 3) Get both trees pulled by Tom 4) Add patch 17 to u-boot-sunxi As for reviewing, Marek can you review patches 3-16 please (so all those intended for u-boot-usb/next + patch 3-5), and Ian can you review patches 1-5 and 17 please ? Thanks & Regards, Hans

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[U-Boot] [PATCH] ARM: rmobile: silk: Remove initialization of ACTLR.SMP
by Nobuhiro Iwamatsu 10 Feb '15

10 Feb '15

Initialization of ACTLR.SMP is in lowlevel_init. This remove duplicate function. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj(a)renesas.com> --- board/renesas/silk/silk.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/board/renesas/silk/silk.c b/board/renesas/silk/silk.c index 6bba41e..8fb729a 100644 --- a/board/renesas/silk/silk.c +++ b/board/renesas/silk/silk.c @@ -40,18 +40,6 @@ void s_init(void) /* QoS */ qos_init(); - -#ifndef CONFIG_DCACHE_OFF - /* - * The caches are disabled when ACTLR.SMP is set to 0 - * regardless of the value of the SCTLR.C (cache enable bit) - * on Cortex-A7 MPCore - */ - asm volatile( - "mrc 15, 0, r0, c1, c0, 1\n" /* read ACTLR */ - "orr r0, r0, #(1 << 6)\n" /* set ACTLR.SMP bit */ - "mcr p15, 0, r0, c1, c0, 1\n"); /* write ACTLR */ -#endif } #define TMU0_MSTP125 (1 << 25) -- 2.1.4

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[U-Boot] [PATCH v2] arm: rmobile: r8a7794: Enable SMP mode of Auxiliary Control Register
by Nobuhiro Iwamatsu 10 Feb '15

10 Feb '15

r8a7794 uses ARM SoC of CA7 base. If we want to use dcache on CA7, we need to enable SMP bit of Auxiliary Control Register. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj(a)renesas.com> --- v2: Add CONFIG_DCACHE_OFF. arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S b/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S index d47546a..a5dbbea 100644 --- a/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S +++ b/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S @@ -40,7 +40,7 @@ do_lowlevel_init: and r1, r1, #0x7F00 lsrs r1, r1, #8 cmp r1, #0x4C /* 0x4C is ID of r8a7794 */ - beq _exit_init_l2_a15 + beq _enable_actlr_smp /* surpress wfe if ca15 */ tst r4, #4 @@ -64,6 +64,16 @@ do_lowlevel_init: orrne r0, r0, #0x20 /* L2CTLR[5] */ #endif mcrne p15, 1, r0, c9, c0, 2 + + b _exit_init_l2_a15 + +_enable_actlr_smp: /* R8A7794 only (CA7) */ +#ifndef CONFIG_DCACHE_OFF + mrc p15, 0, r0, c1, c0, 1 + orr r0, r0, #0x40 + mcr p15, 0, r0, c1, c0, 1 +#endif + _exit_init_l2_a15: ldr r3, =(CONFIG_SYS_INIT_SP_ADDR) sub sp, r3, #4 -- 2.1.3

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[U-Boot] [PATCH] arm: rmobile: silk: Migrate serial driver to drivers model
by Nobuhiro Iwamatsu 10 Feb '15

10 Feb '15

From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj(a)renesas.com> This adds drivers model support of serial port to Silk board, and migrate serial port to drivers model. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj(a)renesas.com> --- board/renesas/silk/silk.c | 14 ++++++++++++++ configs/silk_defconfig | 2 ++ include/configs/silk.h | 3 --- 3 files changed, 16 insertions(+), 3 deletions(-) diff --git a/board/renesas/silk/silk.c b/board/renesas/silk/silk.c index 8818211..6bba41e 100644 --- a/board/renesas/silk/silk.c +++ b/board/renesas/silk/silk.c @@ -9,6 +9,8 @@ #include <common.h> #include <malloc.h> +#include <dm.h> +#include <dm/platform_data/serial_sh.h> #include <asm/processor.h> #include <asm/mach-types.h> #include <asm/io.h> @@ -173,3 +175,15 @@ void reset_cpu(ulong addr) val |= 0x02; i2c_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x13, 1, &val, 1); } + +static const struct sh_serial_platdata serial_platdata = { + .base = SCIF2_BASE, + .type = PORT_SCIF, + .clk = 14745600, + .clk_mode = EXT_CLK, +}; + +U_BOOT_DEVICE(alt_serials) = { + .name = "serial_sh", + .platdata = &serial_platdata, +}; diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 515ee33..3130e93 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -1,3 +1,5 @@ CONFIG_ARM=y CONFIG_RMOBILE=y CONFIG_TARGET_SILK=y +CONFIG_DM=y +CONFIG_DM_SERIAL=y diff --git a/include/configs/silk.h b/include/configs/silk.h index a4235e9..00a3158 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -39,8 +39,6 @@ /* SCIF */ #define CONFIG_SCIF_CONSOLE -#define CONFIG_CONS_SCIF2 -#define CONFIG_SCIF_USE_EXT_CLK /* FLASH */ #define CONFIG_SPI @@ -71,7 +69,6 @@ #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) #define CONFIG_P_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 24) -#define CONFIG_SH_SCIF_CLK_FREQ 14745600 /* External Clock */ #define CONFIG_SYS_TMU_CLK_DIV 4 -- 2.1.4

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