February 2015 - U-Boot

[U-Boot] Please pull u-boot-sunxi master
by Hans de Goede 23 Feb '15

23 Feb '15

Hi Tom, We've build-up a small collection of fixes for sunxi. Please pull u-boot-sunxi/master into master, highlights: 1) Various bug fixes 2) Add support for 1 new board The following changes since commit 1320112c8aa58345d71a5a46f3bf6a52589f1f2b: Merge branch 'master' of git://git.denx.de/u-boot-fdt (2015-02-18 08:46:50 -0500) are available in the git repository at: http://git.denx.de/u-boot-sunxi.git master for you to fetch changes up to 77ef136950b4649ff4844c3b72dab107a9c565a0: sunxi: Machine id hack to prevent loading buggy sunxi-3.4 kernels (2015-02-21 16:54:29 +0100) ---------------------------------------------------------------- Hans de Goede (8): sunxi: video: Add support for LCD reset pin sunxi: video: Add support for LCD panels which need to be configured via i2c sunxi: video: Add support for tl059wv5c0 lcd panels sunxi: mmc: Always declare High Capacity capability sunxi: Add support for the UTOO P66 tablet sunxi: musb: Check Vbus-det before enabling otg port power sunxi: Fix sun5i mbus speed when booting old kernels sunxi: Set the /chosen/stdout-path fdt property for sunxi boards Siarhei Siamashka (1): sunxi: Machine id hack to prevent loading buggy sunxi-3.4 kernels arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 9 +++++ board/sunxi/Kconfig | 48 +++++++++++++++++++++++++++ board/sunxi/board.c | 10 ++++++ configs/Ampe_A76_defconfig | 1 + configs/Chuwi_V7_CW0825_defconfig | 1 + configs/Hyundai_A7HD_defconfig | 1 + configs/Inet_86VS_defconfig | 1 + configs/TZX-Q8-713B7_defconfig | 1 + configs/UTOO_P66_defconfig | 21 ++++++++++++ drivers/mmc/sunxi_mmc.c | 6 +--- drivers/usb/musb-new/sunxi.c | 29 ++++++++++++++++ drivers/video/sunxi_display.c | 18 +++++++++- include/configs/sun4i.h | 4 +-- include/configs/sun5i.h | 4 +-- include/configs/sun7i.h | 4 +-- include/configs/sunxi-common.h | 46 +++++++++++++++++++++++++ 16 files changed, 192 insertions(+), 12 deletions(-) create mode 100644 configs/UTOO_P66_defconfig Regards, Hans

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[U-Boot] 2015.04-rc2 tarball is missing from FTP
by Guillaume Gardet 23 Feb '15

23 Feb '15

Hi, 2015.04-rc2 tarball is missing from FTP. Could you add it, please? Guillaume

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[U-Boot] Git clone using http or rsync broken
by Guillaume Gardet 23 Feb '15

23 Feb '15

Hi, git clone using http or rsync protocols does not work whereas it is given here: http://www.denx.de/wiki/view/DULG/UBootVersions "git clone http://git.denx.de/u-boot.git" just hangs with: Cloning into 'u-boot'... And "git clone rsync://git.denx.de/u-boot.git" returns: Cloning into 'u-boot'... @ERROR: Unknown module 'u-boot.git' rsync error: error starting client-server protocol (code 5) at main.c(1647) [Receiver=3.1.0] fatal: Could not run rsync to get refs Any idea what is wrong? Guillaume

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[U-Boot] [PATCH v2 1/4] mmc: fsl_esdhc: Add CMD11 support to switch to 1.8V
by Otavio Salvador 23 Feb '15

23 Feb '15

This adds support to switch to 1.8V in case CMD11 succeeds. Signed-off-by: Otavio Salvador <otavio(a)ossystems.com.br> --- Changes in v2: - Fixed split string (Marek) drivers/mmc/fsl_esdhc.c | 29 ++++++++++++++++++++++------- include/fsl_esdhc.h | 2 ++ include/mmc.h | 1 + 3 files changed, 25 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index c55eb28..6a3e147 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -54,19 +54,21 @@ struct fsl_esdhc { uint fevt; /* Force event register */ uint admaes; /* ADMA error status register */ uint adsaddr; /* ADMA system address register */ - char reserved2[160]; /* reserved */ + char reserved2[100]; /* reserved */ + uint vendorspec; /* Vendor Specific register */ + char reserved3[59]; /* reserved */ uint hostver; /* Host controller version register */ - char reserved3[4]; /* reserved */ - uint dmaerraddr; /* DMA error address register */ char reserved4[4]; /* reserved */ - uint dmaerrattr; /* DMA error attribute register */ + uint dmaerraddr; /* DMA error address register */ char reserved5[4]; /* reserved */ + uint dmaerrattr; /* DMA error attribute register */ + char reserved6[4]; /* reserved */ uint hostcapblt2; /* Host controller capabilities register 2 */ - char reserved6[8]; /* reserved */ + char reserved7[8]; /* reserved */ uint tcr; /* Tuning control register */ - char reserved7[28]; /* reserved */ + char reserved8[28]; /* reserved */ uint sddirctl; /* SD direction control register */ - char reserved8[712]; /* reserved */ + char reserved9[712]; /* reserved */ uint scr; /* eSDHC control register */ }; @@ -341,6 +343,15 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) goto out; } + /* Switch voltage to 1.8V if CMD11 succeeded */ + if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V) { + esdhc_setbits32(&regs->vendorspec, ESDHC_VENDORSPEC_VSELECT); + + printf("Run CMD11 1.8V switch\n"); + /* Sleep for 5 ms - max time for card to switch to 1.8V */ + udelay(5000); + } + /* Workaround for ESDHC errata ENGcm03648 */ if (!data && (cmd->resp_type & MMC_RSP_BUSY)) { int timeout = 2500; @@ -413,6 +424,10 @@ out: while ((esdhc_read32(&regs->sysctl) & SYSCTL_RSTD)) ; } + + /* If this was CMD11, then notify that power cycle is needed */ + if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V) + printf("CMD11 to switch to 1.8V mode failed, card requires power cycle.\n"); } esdhc_write32(&regs->irqstat, -1); diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index c1b6648..e3d6581 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -154,6 +154,8 @@ #define ESDHC_HOSTCAPBLT_DMAS 0x00400000 #define ESDHC_HOSTCAPBLT_HSS 0x00200000 +#define ESDHC_VENDORSPEC_VSELECT 0x00000002 /* Use 1.8V */ + struct fsl_esdhc_cfg { u32 esdhc_base; u32 sdhc_clk; diff --git a/include/mmc.h b/include/mmc.h index 56d97bb..e4b071e 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -88,6 +88,7 @@ #define SD_CMD_SEND_RELATIVE_ADDR 3 #define SD_CMD_SWITCH_FUNC 6 #define SD_CMD_SEND_IF_COND 8 +#define SD_CMD_SWITCH_UHS18V 11 #define SD_CMD_APP_SET_BUS_WIDTH 6 #define SD_CMD_ERASE_WR_BLK_START 32 -- 2.1.4

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[U-Boot] [PATCH] board: tbs2910: Gate clock when switching async clock muxes
by Soeren Moch 23 Feb '15

23 Feb '15

According to the i.MX6Q Reference Manual, clocks must be gated when switching input clocks of async clock muxes. So use clock gates. Avoid ldb_di0_ipu clock, because there is no clock gate for this signal. There have never been any complaints about problems with the old code, but the new approach is in line with the recommendations in the manual. Signed-off-by: Soeren Moch <smoch(a)web.de> -- Cc: Stefano Babic <sbabic(a)denx.de> --- board/tbs/tbs2910/tbs2910.c | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c index dfa430e..42b166d 100644 --- a/board/tbs/tbs2910/tbs2910.c +++ b/board/tbs/tbs2910/tbs2910.c @@ -326,21 +326,25 @@ static void setup_display(void) reg &= ~BM_ANADIG_PLL_VIDEO_BYPASS; writel(reg, &ccm->analog_pll_video); - /* select video pll for ldb_di0_clk */ - reg = readl(&ccm->cs2cdr); - reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK); - writel(reg, &ccm->cs2cdr); + /* gate ipu1_di0_clk */ + reg = readl(&ccm->CCGR3); + reg &= ~MXC_CCM_CCGR3_LDB_DI0_MASK; + writel(reg, &ccm->CCGR3); - /* select ldb_di0_clk / 7 for ldb_di0_ipu_clk */ - reg = readl(&ccm->cscmr2); - reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV; - writel(reg, &ccm->cscmr2); - - /* select ldb_di0_ipu_clk for ipu1_di0_clk -> 65MHz pixclock */ + /* select video_pll clock / 7 for ipu1_di0_clk -> 65MHz pixclock */ reg = readl(&ccm->chsccdr); - reg |= (CHSCCDR_CLK_SEL_LDB_DI0 - << MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); + reg &= ~(MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK | + MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK | + MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK); + reg |= (2 << MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_OFFSET) | + (6 << MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET) | + (0 << MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); writel(reg, &ccm->chsccdr); + + /* enable ipu1_di0_clk */ + reg = readl(&ccm->CCGR3); + reg |= MXC_CCM_CCGR3_LDB_DI0_MASK; + writel(reg, &ccm->CCGR3); } #endif /* CONFIG_VIDEO_IPUV3 */ -- 1.9.1

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[U-Boot] [PATCH v3 0/3] imx: mx6slevk add pmic support
by Peng Fan 23 Feb '15

23 Feb '15

This patch set is extracted from the previous "imx:mx6 add ldo bypass" patch set, with only one return value change. patch 1/3 is add pad settings for I2C1 patch 2/3 is add I2C and PMIC support in board header file patch 3/3 is to add pmic support for mx6slevk. patch 3/3 is from patch 3/12 in previous "imx:mx6 add ldo bypass" patch, with only one small change is return value. Changes v3: Take Fabio's suggestion, for patch 3/3, remove ret variable, and directly "return pfuze_mode_init(xxx)" Changes v2: Changing "return -EIO" to "return ret". Peng Fan (3): imx:mx6sl add I2c pad settings imx:mx6slevk add pmic and i2c configuration imx:mx6slevk implement power init board arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 5 ++++ board/freescale/mx6slevk/mx6slevk.c | 42 ++++++++++++++++++++++++++++++ include/configs/mx6slevk.h | 12 +++++++++ 3 files changed, 59 insertions(+) -- 1.8.4

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[U-Boot] [RFC PATCH v1 0/1] Generating kwb image for custom board
by Chris Packham 23 Feb '15

23 Feb '15

Hi, I'm trying to get u-boot 2015.01 up and running on a custom board using an integrated version of Marvell's Armada-XP in a switch ASIC (the Marvell term is MSYS). One thing I ran into after extracting the DDR initialisation from the Marvell bootloader was that the Bootrom Firmware (Marvell's pre-bootloader) reported the following BootROM 1.34 Booting from SPI flash BootROM: Bad header at offset 00000000 BootROM: Bad header at offset 00200000 ... After a bit of debugging I found that this was because the binary.0 for my board had a length of 0x0148ec which doesn't conform to the following requirement in the Marvell functional spec -- "The header length in bytes. The value must be aligned to 4B." While I could pad out my binary.0 it seems safer to update kwbimage.c to conform with the specification. The original issue still exists in master but I suspect now that master is using a u-boot-spl image for the Armada-XP boards the spl image is implicitly conformant. Chris Packham (1): kwbimage: Align v1 binary header to 4B tools/kwbimage.c | 1 + 1 file changed, 1 insertion(+) -- 2.2.0.rc0

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[U-Boot] [PATCH 1/2] mc34704: Add the definition of ONOFFA bit
by Fabio Estevam 23 Feb '15

23 Feb '15

ONOFFA is the bit 3 of the GENERAL2 register. Add its definition. Signed-off-by: Fabio Estevam <festevam(a)gmail.com> --- include/mc34704.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/mc34704.h b/include/mc34704.h index 53716e0..482d51a 100644 --- a/include/mc34704.h +++ b/include/mc34704.h @@ -40,6 +40,7 @@ enum { /* GENERAL2 register fields */ #define ONOFFE (1 << 0) #define ONOFFD (1 << 1) +#define ONOFFA (1 << 3) #define ALLOFF (1 << 4) #endif /* __MC34704_H__ */ -- 1.9.1

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[U-Boot] [PATCH 0/2] dfu: allow to autoset configuration
by Przemyslaw Marczak 23 Feb '15

23 Feb '15

Since the dfu supports multiple inferfaces, using a single ${dfu_alt_info} variable, or manually presetting it for various interfaces is uncomfortable. The interface is given as an argument to the dfu/thor commands, so it can be easy used to set the environment. The odroid, as an example, can boot from SD and eMMC cards, but the boot binary offsets are little different. Now the proper data in ${dfu_alt_info} is set automatically. Inha Song (1): odroid: adjust get_dfu_alt_*() functions to new declarations Przemyslaw Marczak (1): dfu: samsung: move call to set_dfu_alt_info() to dfu common code board/samsung/common/board.c | 3 --- board/samsung/common/misc.c | 6 +++--- board/samsung/odroid/odroid.c | 31 +++++++++++++++++-------------- drivers/dfu/dfu.c | 3 +++ include/dfu.h | 3 +++ include/samsung/misc.h | 5 ++--- 6 files changed, 28 insertions(+), 23 deletions(-) -- 1.9.1

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[U-Boot] Enable splash screen for dm 365
by NewToThis 22 Feb '15

22 Feb '15

Hi How do I enable the splash screen on dm 365 while booting up? I am using a custom davinci board running arago project. -- View this message in context: http://u-boot.10912.n7.nabble.com/Enable-splash-screen-for-dm-365-tp206299.… Sent from the U-Boot mailing list archive at Nabble.com.

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