February 2015 - U-Boot

[U-Boot] [PATCH 00/11] usb: dwc3: Fixes and improvements for DWC3 driver
by Lukasz Majewski 03 Mar '15

03 Mar '15

Those patches should be applied on top of Kishon Vijay Abraham I work (v1) [40 patches]: https://patchwork.ozlabs.org/patch/442467/ "dra7xx: am43xx: add dwc3 gadget driver support and enable dfu" Those changes fixes composite, DFU and UMS gadgets - as a result relevant tests (available at test/{dfu|ums} pass. Test HW: Odroid XU3 - Exynos5422 There is one important thing to note: Since on our setup Data and Instruction Caches seems to be broken (or at least don't behave as expected) the comments regarding cache management in DWC3 still applies. I will look on them at v2 of this patch set. This code should be also easily applicable on top of v2. Inha Song (1): usb: dwc3: Add BIT() macro Joonyoung Shim (1): usb: dwc3: make dwc3_set_mode to static Marek Szyprowski (3): usb: dwc3: add a workaround for too small OUT requests usb: dwc3: gadget: add common endpoint configuration for dwc3 udc driver usb: dwc3: optimize interrupt loop Łukasz Majewski (6): usb: composite: Add .reset callback to usb_gadget_driver structure usb: dwc3: linux-compat: Fix: Adding missing include files usb: dwc3: Set usbdrd phy ctrl and mode in dwc3 core usb: dwc3: gadget: Set all ctrl fields of Transfer Control Blocks (TRB) to be LST usb: dwc3: gadget: Set non EP0 max packet limit to 512B usb: dwc3: Correct clean up code for requests drivers/usb/dwc3/core.c | 86 +++++++++++++++++++++++++++++++++++---- drivers/usb/dwc3/core.h | 3 +- drivers/usb/dwc3/gadget.c | 76 ++++++++++++++++------------------ drivers/usb/dwc3/linux-compat.h | 3 ++ drivers/usb/gadget/composite.c | 1 + drivers/usb/gadget/epautoconf.c | 21 +++++++++- drivers/usb/gadget/gadget_chips.h | 8 ++++ include/dwc3-uboot.h | 2 + 8 files changed, 149 insertions(+), 51 deletions(-) -- 2.0.0.rc2

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[U-Boot] [PATCH 0/9] ARM: tegra: pinmux: Tegra210 support
by Stephen Warren 03 Mar '15

03 Mar '15

From: Stephen Warren <swarren(a)nvidia.com> This series performs a few small cleanups to or parameterizations of the existing Tegra pinmux driver, and adds Tegra210 support. The Tegra210 code isn't actually used yet, since the balance of the Tegra210 support is not yet present. However, it should start appearing soon. I've at least compile-tested this by over-writing the Tegra124 pinmux driver and Jetson TK1 board pinmux data tables with the Tegra210 versions. TomW, note I made a couple minor tweaks since the latest version I sent internally; let's apply this version upstream. Stephen Warren (9): ARM: tegra: pinmux: add note re: drive group field defines ARM: tegra: pinmux: simplify some defines ARM: tegra: pinmux: handle feature removal on newer SoCs ARM: tegra: pinmux: move some type definitions ARM: tegra: pinmux: partially handle varying register layouts ARM: tegra: pinmux: support hsm/schmitt on pins ARM: tegra: pinmux: account for different drivegroup base registers ARM: tegra: pinmux: support Tegra210's e_io_hv pin option ARM: tegra: pinmux: add Tegra210 support arch/arm/cpu/tegra-common/pinmux-common.c | 211 ++++++++++++-- arch/arm/cpu/tegra210-common/pinmux.c | 195 +++++++++++++ arch/arm/include/asm/arch-tegra/pinmux.h | 107 ++++--- arch/arm/include/asm/arch-tegra114/pinmux.h | 14 +- arch/arm/include/asm/arch-tegra124/pinmux.h | 14 +- arch/arm/include/asm/arch-tegra20/pinmux.h | 1 + arch/arm/include/asm/arch-tegra210/pinmux.h | 416 ++++++++++++++++++++++++++++ arch/arm/include/asm/arch-tegra30/pinmux.h | 11 +- 8 files changed, 906 insertions(+), 63 deletions(-) create mode 100644 arch/arm/cpu/tegra210-common/pinmux.c create mode 100644 arch/arm/include/asm/arch-tegra210/pinmux.h -- 1.9.1

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[U-Boot] [PATCH V2 1/2] ARM: tegra: add function to clear pinmux CLAMPING bit
by Stephen Warren 03 Mar '15

03 Mar '15

From: Stephen Warren <swarren(a)nvidia.com> This is needed to correctly apply the new Jetson TK1 pinmux config. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- v2: * Use clrbits_le32() rather than open-code read/modify/write statements. * Update pinmux_set_tristate_input_clamping to match. --- arch/arm/cpu/tegra-common/pinmux-common.c | 12 ++++++++---- arch/arm/include/asm/arch-tegra/pinmux.h | 3 ++- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/tegra-common/pinmux-common.c b/arch/arm/cpu/tegra-common/pinmux-common.c index 6e3ab0c14ca2..64baed45d591 100644 --- a/arch/arm/cpu/tegra-common/pinmux-common.c +++ b/arch/arm/cpu/tegra-common/pinmux-common.c @@ -94,11 +94,15 @@ void pinmux_set_tristate_input_clamping(void) { u32 *reg = _R(APB_MISC_PP_PINMUX_GLOBAL_0); - u32 val; - val = readl(reg); - val |= CLAMP_INPUTS_WHEN_TRISTATED; - writel(val, reg); + setbits_le32(reg, CLAMP_INPUTS_WHEN_TRISTATED); +} + +void pinmux_clear_tristate_input_clamping(void) +{ + u32 *reg = _R(APB_MISC_PP_PINMUX_GLOBAL_0); + + clrbits_le32(reg, CLAMP_INPUTS_WHEN_TRISTATED); } #endif diff --git a/arch/arm/include/asm/arch-tegra/pinmux.h b/arch/arm/include/asm/arch-tegra/pinmux.h index da477697bf02..ab764960fa7f 100644 --- a/arch/arm/include/asm/arch-tegra/pinmux.h +++ b/arch/arm/include/asm/arch-tegra/pinmux.h @@ -81,8 +81,9 @@ struct pmux_pingrp_config { }; #if !defined(CONFIG_TEGRA20) && !defined(CONFIG_TEGRA30) -/* Set the pinmux CLAMP_INPUTS_WHEN_TRISTATED bit */ +/* Set/clear the pinmux CLAMP_INPUTS_WHEN_TRISTATED bit */ void pinmux_set_tristate_input_clamping(void); +void pinmux_clear_tristate_input_clamping(void); #endif /* Set the mux function for a pin group */ -- 1.9.1

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[U-Boot] [U-boot][PATCH] keystone2: add support for UART download
by Vitaly Andrianov 03 Mar '15

03 Mar '15

Currently to flash u-boot image onto NAND or SPI NOR flash, very first time user need to use Code Composer Studio (CCS). This is cumbersome for an user not familiar with CCS. This patch add simpler procedure using uart boot mode for K2 EVMs. When UART bootmode is set and board is rebooted, the ROM boot loader transfers the image at the beginning of the MSMC. After the transfer is complete the boot-loader sets the PC to the first MSMC address 0x0c000000. The u-boot.bin is linked to the address 0x0c001000. In order to use the u-boot.bin as an image for UART download, we need to add 4K zeros prefix that act as 1K NOP instructions before reaching 0xc001000. Signed-off-by: Vitaly Andrianov <vitalya(a)ti.com> Acked-by: Murali Karicheri <m-karicheri2(a)ti.com> Tested-by: Murali Karicheri <m-karicheri2(a)ti.com> --- Makefile | 6 ++++++ board/ti/ks2_evm/README | 17 +++++++++++++++++ 2 files changed, 23 insertions(+) diff --git a/Makefile b/Makefile index 36a9a28..7a86cac 100644 --- a/Makefile +++ b/Makefile @@ -940,6 +940,12 @@ u-boot-nand.gph: u-boot.bin FORCE $(call if_changed,mkimage) @dd if=/dev/zero bs=8 count=1 2>/dev/null >> $@ +u-boot.uart.pad: + @dd if=/dev/zero bs=4 count=1024 2>/dev/null > $@ + +u-boot.uart: u-boot.uart.pad u-boot.bin FORCE + $(call if_changed,cat) + # x86 uses a large ROM. We fill it with 0xff, put the 16-bit stuff (including # reset vector) at the top, Intel ME descriptor at the bottom, and U-Boot in # the middle. diff --git a/board/ti/ks2_evm/README b/board/ti/ks2_evm/README index 9ee90a4..a1fc943 100644 --- a/board/ti/ks2_evm/README +++ b/board/ti/ks2_evm/README @@ -81,6 +81,23 @@ To build u-boot-nand.gph >make k2hk_evm_defconfig >make u-boot-nand.gph +To build u-boot.uart + >make k2hk_evm_defconfig + >make u-boot.uart + + +Load and Run U-Boot on keystone EVMs using UART download +======================================================== + +Open BMC and regular UART terminals. + +1. On the regular UART port start xmodem transfer of the u-boot.uart +2. Using BMC terminal set the ARM-UART bootmode and reboot the EVM + BMC> bootmode #4 + MBC> reboot +3. When xmodem is complete you should see the u-boot starts on the UART port + + Load and Run U-Boot on keystone EVMs using CCS ========================================= -- 1.9.1

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[U-Boot] [PATCH V3 0/11] ARM: OMAP3-DRA7: CP15 erratum workarounds and improvements
by Nishanth Menon 03 Mar '15

03 Mar '15

Hi, The third incarnation of this series to address various ideas of previous V2 series. I will skip the full blurb and point to V1/V2 links for the usual blurb. Changes since V2: - Added documentation revisioning info with ARM erratums - patch series are split up to address ARM erratums first followed by TI OMAP conversion - More OMAP3 now get erratum implementation - had to redo rx51 a little - I think is better helps exynos: https://patchwork.ozlabs.org/patch/443271/ https://patchwork.ozlabs.org/patch/441863/ - Rearranged the series to address generic ARM first followed by rest. V2: http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/213060 V1: http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/212174 Nishanth Menon (10): ARM: Introduce erratum workaround for 798870 ARM: Introduce erratum workaround for 454179 ARM: Introduce erratum workaround for 430973 ARM: Introduce erratum workaround for 621766 ARM: OMAP: Change set_pl310_ctrl_reg to be generic ARM: OMAP3: Rename omap3.h to omap.h to be generic as all SoCs ARM: OMAP3: Get rid of omap3_gp_romcode_call and replace with omap_smc1 ARM: OMAP5 / DRA7: Setup L2 Aux Control Register with recommended configuration ARM: OMAP3: Enable workaround for ARM errata 454179, 430973, 621766 ARM: OMAP3: rx51: Enable workaround for ARM errata 454179, 430973, 621766 Praveen Rao (1): ARM: DRA7 / OMAP5: Add workaround for ARM errata 798870 README | 8 +++ arch/arm/cpu/armv7/Makefile | 2 +- arch/arm/cpu/armv7/cp15.c | 29 ++++++++++ arch/arm/cpu/armv7/omap-common/Makefile | 2 +- arch/arm/cpu/armv7/omap-common/lowlevel_init.S | 15 +++-- arch/arm/cpu/armv7/omap3/board.c | 60 +++++++------------- arch/arm/cpu/armv7/omap3/lowlevel_init.S | 11 ---- arch/arm/cpu/armv7/omap4/hwinit.c | 4 +- arch/arm/cpu/armv7/omap5/hwinit.c | 23 ++++++++ arch/arm/cpu/armv7/start.S | 53 +++++++++++++++++ .../arm/include/asm/arch-omap3/{omap3.h => omap.h} | 0 arch/arm/include/asm/arch-omap3/sys_proto.h | 3 +- arch/arm/include/asm/arch-omap4/sys_proto.h | 5 +- arch/arm/include/asm/arch-omap5/sys_proto.h | 4 ++ arch/arm/include/asm/armv7.h | 5 ++ board/nokia/rx51/rx51.c | 19 ++++--- include/configs/am3517_crane.h | 6 +- include/configs/am3517_evm.h | 6 +- include/configs/cm_t35.h | 6 +- include/configs/cm_t3517.h | 6 +- include/configs/dig297.h | 6 +- include/configs/mcx.h | 6 +- include/configs/nokia_rx51.h | 6 +- include/configs/omap3_evm.h | 2 +- include/configs/omap3_evm_common.h | 4 ++ include/configs/omap3_evm_quick_mmc.h | 2 +- include/configs/omap3_evm_quick_nand.h | 2 +- include/configs/omap3_logic.h | 6 +- include/configs/omap3_mvblx.h | 6 +- include/configs/omap3_pandora.h | 6 +- include/configs/omap3_sdp3430.h | 6 +- include/configs/omap3_zoom1.h | 2 +- include/configs/tam3517-common.h | 6 +- include/configs/tao3530.h | 6 +- include/configs/ti_omap3_common.h | 7 ++- include/configs/ti_omap5_common.h | 3 + include/configs/tricorder.h | 6 +- 37 files changed, 262 insertions(+), 87 deletions(-) create mode 100644 arch/arm/cpu/armv7/cp15.c rename arch/arm/include/asm/arch-omap3/{omap3.h => omap.h} (100%) Regards, Nishanth Menon -- 1.7.9.5

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[U-Boot] [PATCH] spl_mem_init.c : Added support for mDDR in SPL for i.MX28
by Marco Cavallini 03 Mar '15

03 Mar '15

Signed-off-by: Marco Cavallini <m.cavallini(a)koansoftware.com> --- arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index a744e5d..9e11288 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -315,9 +315,27 @@ static void mx28_mem_init(void) debug("SPL: Initialising mx28 SDRAM Controller\n"); +#ifndef CONFIG_SYS_MXS_mDDR /* Set DDR2 mode */ writel(PINCTRL_EMI_DS_CTRL_DDR_MODE_DDR2, &pinctrl_regs->hw_pinctrl_emi_ds_ctrl_set); +#else + /* Set mDDR mode */ + writel( PINCTRL_EMI_DS_CTRL_ADDRESS_MA_MASK | + PINCTRL_EMI_DS_CTRL_CONTROL_MA_MASK | + PINCTRL_EMI_DS_CTRL_DUALPAD_MA_MASK | + PINCTRL_EMI_DS_CTRL_SLICE3_MA_MASK | + PINCTRL_EMI_DS_CTRL_SLICE2_MA_MASK | + PINCTRL_EMI_DS_CTRL_SLICE1_MA_MASK | + PINCTRL_EMI_DS_CTRL_SLICE0_MA_MASK, + &pinctrl_regs->hw_pinctrl_emi_ds_ctrl); + + /* Configure Pins 0-15 as EMI pins */ + writel(0, &pinctrl_regs->hw_pinctrl_muxsel10); + writel(0, &pinctrl_regs->hw_pinctrl_muxsel11); + writel(0, &pinctrl_regs->hw_pinctrl_muxsel12); + writel(0, &pinctrl_regs->hw_pinctrl_muxsel13); +#endif /* * Configure the DRAM registers -- 1.7.9.5

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[U-Boot] [PATCH v5 0/5] Clean out SPL and enable driver model
by Simon Glass 03 Mar '15

03 Mar '15

This series includes a few more patches aimed at getting rid of gdata, the parallel global_data structure introduced on some ARM boards. It also collects together the other patches which have been sent previously, so that everything is in one place. I would like get this agreed and applied to u-boot-dm this week if possible so that we will at last have driver model available in SPL. This series is available at u-boot-dm/spl-working. Changes in v5: - Rebase to master Changes in v4: - Squash the gdata revert patch into this one - Allow gdata to survive unless CONFIG_DM is defined, for now - Rebase on top of dm/master - Adjust README to mention that lowlevel_init() should have no stack - Add new patch to make the export interface support CONFIG_SYS_MALLOC_SIMPLE Changes in v3: - Drop extra blank line Changes in v2: - Remove gdata definition from ARM spl header file also - Rebase on top of the SPI series - Move docs to top-level README file and expand them to cover U-Boot proper - Add Kconfig settings Simon Glass (5): arm: Reduce the scope of lowlevel_init() arm: spl: Avoid setting up a duplicate global data structure dm: tegra: Enable driver model in SPL and adjust the GPIO driver arm: spl: Allow board_init_r() to run with a larger stack Make export interface support CONFIG_SYS_MALLOC_SIMPLE Kconfig | 18 ++++++++++ README | 69 ++++++++++++++++++++++++++++++++++++++ arch/arm/cpu/armv7/lowlevel_init.S | 23 +++++++------ arch/arm/include/asm/spl.h | 2 ++ arch/arm/lib/crt0.S | 13 +++++-- arch/arm/lib/spl.c | 4 +++ arch/arm/mach-tegra/Kconfig | 3 ++ board/nvidia/seaboard/seaboard.c | 4 +-- common/spl/spl.c | 35 +++++++++++++++++++ drivers/gpio/Makefile | 4 +++ drivers/gpio/tegra_gpio.c | 27 ++++++--------- include/_exports.h | 2 ++ include/configs/tegra-common.h | 6 ---- include/exports.h | 2 ++ 14 files changed, 174 insertions(+), 38 deletions(-) -- 2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH] ARMv8: Bug fix of dcache_disable()
by fenghua＠phytium.com.cn 03 Mar '15

03 Mar '15

From: David Feng <fenghua(a)phytium.com.cn> The cache disable operation shoud be performed after flush_dcache_all(). If cache disable operation is performed before flush_dcache_all(), flush_dcache_all() store data directly to memory and may be overrided by data copy in cache. Signed-off-by: David Feng <fenghua(a)phytium.com.cn> --- arch/arm/cpu/armv8/cache_v8.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index 9dbcdf2..dc2fc8c 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -124,9 +124,10 @@ void dcache_disable(void) if (!(sctlr & CR_C)) return; + flush_dcache_all(); + set_sctlr(sctlr & ~(CR_C|CR_M)); - flush_dcache_all(); __asm_invalidate_tlb_all(); } -- 1.7.9.5

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[U-Boot] [PATCH V2 0/9] ARM: OMAP3-DRA7: CP15 erratum workarounds and improvements
by Nishanth Menon 03 Mar '15

03 Mar '15

Hi, uggh.. realized that u-boot mailing list does not like too many recipients.. So, just tom and list this time.. Sorry for the spam V1: http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/212174 V2 of this series is a culmination of a) bunch of refactoring to ensure common code in generic logic - cpuid mostly b) split the arm generic patch (patch #4 out.. to allow independent review) c) Saw a chance to incorporate OMAP3 into the same framework, and in fact can exactly allow exynos also do the job: https://patchwork.ozlabs.org/patch/440852/A https://patchwork.ozlabs.org/patch/442646/ https://patchwork.ozlabs.org/patch/442297/ (obviously the code has changed since the original omap3 implementation) Carrying on the blurb as posted previously :) Triggered by a user report, it was seen that recommended errata workaround and performance trade-offs as recommended by TI architects for ARM configuration was not being followed in OMAP5+ ARM A15 platforms in u-boot configuration. Note OMAP5, DRA7 all share the same cortex A15 revision (ID=0x412fc0f2) and the workarounds and improvement configurations apply equally. Certain errata workaround done in this series obviously have the controversy potential considering that each of the SoCs implement workaround based on secure monitor calls, but both the service requested and the parameters of secure monitor calls can be widely variant. Examples: OMAP family of processors have quite the family of SMC calls: https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/a… meanwhile Exynos has a much simpler invocation: https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/a… To maintain some resemblance of symmetry the following series introduces a arch/machine dependent errata macro which must be enabled prior to any of such workarounds can be implemented. I am open to better ways of doing this which might benefit others in ARM community with similar needs. Lets discuss. These patches are based on: v2015.04-rc1 but also apply on latest master. Note:(OMAP3 is just build tested.. as I stated previously) ./MAKEALL -s omap3 v2015.04-rc1: http://pastebin.ubuntu.com/10397352/ v2015.04-rc1+ this series: http://pastebin.ubuntu.com/10397267/ (same sets of failures of build - no regressions introduced that I could see). Angela Stegmaier (1): configs: ti_omap5_common: Enable workaround for ARM errata 798870 Nishanth Menon (7): ARM: OMAP: Change set_pl310_ctrl_reg to be generic ARM: OMAP3: Rename omap3.h to omap.h to be generic as all SoCs ARM: OMAP3: Get rid of omap3_gp_romcode_call and replace with omap_smc1 ARM: Provide a mechanism to invoke SoC specific errata WA for CP15 ARM: OMAP3: Introduce OMAP3 Cortex-A8 revision specific errata configs: ti_omap3_common: Enable workaround for ARM errata 454179, 430973, 621766 ARM: OMAP5 / DRA7: Setup L2 Aux Control Register with recommended configuration Praveen Rao (1): ARM: DRA7 / OMAP5: Add workaround for ARM errata 798870 README | 9 ++++ arch/arm/cpu/armv7/omap-common/Makefile | 2 +- arch/arm/cpu/armv7/omap-common/lowlevel_init.S | 15 ++++-- arch/arm/cpu/armv7/omap3/board.c | 24 ++-------- arch/arm/cpu/armv7/omap3/lowlevel_init.S | 48 +++++++++++++++----- arch/arm/cpu/armv7/omap4/hwinit.c | 4 +- arch/arm/cpu/armv7/omap5/Makefile | 1 + arch/arm/cpu/armv7/omap5/hwinit.c | 16 +++++++ arch/arm/cpu/armv7/omap5/lowlevel_init.S | 46 +++++++++++++++++++ arch/arm/cpu/armv7/start.S | 14 ++++++ .../arm/include/asm/arch-omap3/{omap3.h => omap.h} | 0 arch/arm/include/asm/arch-omap3/sys_proto.h | 3 +- arch/arm/include/asm/arch-omap4/sys_proto.h | 5 +- arch/arm/include/asm/arch-omap5/sys_proto.h | 4 ++ include/configs/am3517_crane.h | 2 +- include/configs/am3517_evm.h | 2 +- include/configs/cm_t35.h | 2 +- include/configs/cm_t3517.h | 2 +- include/configs/dig297.h | 2 +- include/configs/mcx.h | 2 +- include/configs/nokia_rx51.h | 2 +- include/configs/omap3_evm.h | 2 +- include/configs/omap3_evm_quick_mmc.h | 2 +- include/configs/omap3_evm_quick_nand.h | 2 +- include/configs/omap3_logic.h | 2 +- include/configs/omap3_mvblx.h | 2 +- include/configs/omap3_pandora.h | 2 +- include/configs/omap3_sdp3430.h | 2 +- include/configs/omap3_zoom1.h | 2 +- include/configs/tam3517-common.h | 2 +- include/configs/tao3530.h | 2 +- include/configs/ti_omap3_common.h | 8 +++- include/configs/ti_omap5_common.h | 4 ++ include/configs/tricorder.h | 2 +- 34 files changed, 178 insertions(+), 61 deletions(-) create mode 100644 arch/arm/cpu/armv7/omap5/lowlevel_init.S rename arch/arm/include/asm/arch-omap3/{omap3.h => omap.h} (100%) Regards, Nishanth Menon -- 1.7.9.5

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Re: [U-Boot] Fwd: Re: u-boot tftp problem
by PF4Public 02 Mar '15

02 Mar '15

>When working with large TFTP packets (probably 4096 bytes, as set in your board config file), U-Boot TFTP code sends wrong acknowledges for the TFTP packets. But what is clear from traffic dumps is that a packet size never exceeds 516 when downloading from Linux machine's tftpd. Am I missing something here? >Reduce your TFTP blksize, by commenting CONFIG_TFTPBLOCKSIZE in your board config. The default value is 1468, which should work fine. I have tried reducing tftpblocksize with editenv command of U-Boot, that ensured reduced blocksizes, which was clearly visible in tcpdump, but sadly it didn't change a thing. Btw I cannot find CONFIG_TFTPBLOCKSIZE in the whole source tree of U-Boot: "grep -r CONFIG_TFTPBLOCKSIZE ." and "grep -r TFTPBLOCKSIZE ." gave no output. Best regards

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