December 2015 - U-Boot

[U-Boot] [PATCH 08/11] drivers/ddr/marvell: Default DRAM_ECC to 0
by Phil Sutter 13 Dec '15

13 Dec '15

Not all boards implementing an Armada XP chip are equipped with ECC RAM. Defining DRAM_ECC to 1 enables ECC without a chance to turn it off in board configs, which breaks DDR training for them. Signed-off-by: Phil Sutter <phil(a)nwl.cc> --- drivers/ddr/marvell/axp/ddr3_axp_config.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ddr/marvell/axp/ddr3_axp_config.h b/drivers/ddr/marvell/axp/ddr3_axp_config.h index a672044..800d2d1 100644 --- a/drivers/ddr/marvell/axp/ddr3_axp_config.h +++ b/drivers/ddr/marvell/axp/ddr3_axp_config.h @@ -44,7 +44,7 @@ * DDR3_TRAINING_DEBUG - Debug prints of internal code */ #define DDR_TARGET_FABRIC 5 -#define DRAM_ECC 1 +#define DRAM_ECC 0 #ifdef MV_DDR_32BIT #define BUS_WIDTH 32 -- 2.5.3

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[U-Boot] [PATCH 07/11] mvebu: Fix shortcoming of Marvell BSP board detection
by Phil Sutter 13 Dec '15

13 Dec '15

Signed-off-by: Phil Sutter <phil(a)nwl.cc> --- arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c index 702273a..6c7738c 100644 --- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c +++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c @@ -70,8 +70,9 @@ static u32 board_id_get(void) /* * Return 0 here for custom board as this should not be used * for custom boards. + * -- Spoke Marvell and forgot that DB_88F78XX0_BP_ID == 0. */ - return 0; + return INVALID_BOARD_ID; #endif } -- 2.5.3

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[U-Boot] [PATCH 06/11] drivers/pci/pci_mvebu: Fix for boards with X4 lanes
by Phil Sutter 13 Dec '15

13 Dec '15

Armada XP has support for X4 lanes, boards specify this in their serdes_cfg. During PEX init in high_speed_env_lib.c, the configuration is stored in GEN_PURP_RES_2_REG. When enumerating PEX, subsequent interfaces of an X4 lane must be skipped. Otherwise the enumeration hangs up the board. The way this is implemented here is not exactly beautiful, but it mimics how Marvell's BSP does it. Alternatively we could get the information using board_serdes_cfg_get(), but that won't lead to clean code, either. Especially since the ugly includes will have to be done anyway. Signed-off-by: Phil Sutter <phil(a)nwl.cc> --- drivers/pci/pci_mvebu.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c index fd2744d..aab53f4 100644 --- a/drivers/pci/pci_mvebu.c +++ b/drivers/pci/pci_mvebu.c @@ -18,6 +18,11 @@ #include <asm/arch/soc.h> #include <linux/mbus.h> +#if defined(CONFIG_ARMADA_XP) +#include "../ddr/marvell/axp/ddr3_init.h" +#include "../../arch/arm/mach-mvebu/serdes/axp/board_env_spec.h" +#endif + DECLARE_GLOBAL_DATA_PTR; /* PCIe unit register offsets */ @@ -155,6 +160,16 @@ static void mvebu_get_port_lane(struct mvebu_pcie *pcie, int pex_idx, } #endif +#if defined(CONFIG_ARMADA_XP) +static int mvebu_pex_unit_is_x4(int pex_idx) +{ + int pex_unit = pex_idx < 9 ? pex_idx >> 2 : 3; + u32 mask = (0x0f << (pex_unit * 8)); + + return (reg_read(GEN_PURP_RES_2_REG) & mask) == mask; +} +#endif + static inline bool mvebu_pcie_link_up(struct mvebu_pcie *pcie) { u32 val; @@ -419,5 +434,11 @@ void pci_init_board(void) writel(0, pcie->base + PCIE_BAR_HI_OFF(0)); bus = hose->last_busno + 1; + +#if defined(CONFIG_ARMADA_XP) + /* need to skip more for X4 links, otherwise scan will hang */ + if (mvebu_pex_unit_is_x4(i)) + i += 3; +#endif } } -- 2.5.3

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[U-Boot] [PATCH 05/11] axp: Fix debugging support in DDR3 write leveling
by Phil Sutter 13 Dec '15

13 Dec '15

If MV_DEBUG_WL is defined, DEBUG_WL_S and DEBUG_WL_D macros are missing. In addition to that, get rid of debug output printing non-existent counter variable. Signed-off-by: Phil Sutter <phil(a)nwl.cc> --- drivers/ddr/marvell/axp/ddr3_write_leveling.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/ddr/marvell/axp/ddr3_write_leveling.c b/drivers/ddr/marvell/axp/ddr3_write_leveling.c index df3a3df..da384f3 100644 --- a/drivers/ddr/marvell/axp/ddr3_write_leveling.c +++ b/drivers/ddr/marvell/axp/ddr3_write_leveling.c @@ -22,6 +22,8 @@ DEBUG_WL_FULL_S(s); DEBUG_WL_FULL_D(d, l); DEBUG_WL_FULL_S("\n") #ifdef MV_DEBUG_WL +#define DEBUG_WL_S(s) puts(s) +#define DEBUG_WL_D(d, l) printf("%x", d) #define DEBUG_RL_S(s) \ debug_cond(ddr3_get_log_level() >= MV_LOG_LEVEL_2, "%s", s) #define DEBUG_RL_D(d, l) \ @@ -1229,8 +1231,6 @@ static int ddr3_write_leveling_single_cs(u32 cs, u32 freq, int ratio_2to1, DEBUG_WL_FULL_D((u32) phase, 1); DEBUG_WL_FULL_S(", Delay = "); DEBUG_WL_FULL_D((u32) delay, 1); - DEBUG_WL_FULL_S(", Counter = "); - DEBUG_WL_FULL_D((u32) i, 1); DEBUG_WL_FULL_S("\n"); /* Drive DQS high for one cycle - All data PUPs */ -- 2.5.3

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[U-Boot] [PATCH 04/11] README: Review the u-boot porting guide list
by Phil Sutter 13 Dec '15

13 Dec '15

* There is no boards.cfg anymore, so drop (1). * Creating flash.c and u-boot.lds seems not mandatory as well. * Adjusting the enumerators for the above implicitly fixed for double items numbered (3). Signed-off-by: Phil Sutter <phil(a)nwl.cc> --- README | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/README b/README index 4fee706..dcc9478 100644 --- a/README +++ b/README @@ -5153,14 +5153,11 @@ If the system board that you have is not listed, then you will need to port U-Boot to your hardware platform. To do this, follow these steps: -1. Add a new configuration option for your board to the toplevel - "boards.cfg" file, using the existing entries as examples. - Follow the instructions there to keep the boards in order. -2. Create a new directory to hold your board specific code. Add any +1. Create a new directory to hold your board specific code. Add any files you need. In your board directory, you will need at least - the "Makefile", a "<board>.c", "flash.c" and "u-boot.lds". -3. Create a new configuration file "include/configs/<board>.h" for - your board + the "Makefile" and a "<board>.c". +2. Create a new configuration file "include/configs/<board>.h" for + your board. 3. If you're porting U-Boot to a new CPU, then also create a new directory to hold your CPU specific code. Add any files you need. 4. Run "make <board>_defconfig" with your new name. -- 2.5.3

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[U-Boot] [PATCH 03/11] mvebu: Fix for non-DM ehci-marvell support
by Phil Sutter 13 Dec '15

13 Dec '15

This mimics the relevant code in mach-kirkwood headers. The *_winctrl_calcsize functions are identical, as well as the MVCPU_WIN_* macros. Implementing shared headers/code between mvebu and kirkwood is left for someone with a better knowledge of how u-boot is organized internally. Signed-off-by: Phil Sutter <phil(a)nwl.cc> --- arch/arm/mach-mvebu/cpu.c | 21 +++++++++++++++++++++ arch/arm/mach-mvebu/include/mach/cpu.h | 3 +++ arch/arm/mach-mvebu/include/mach/soc.h | 9 ++++++++- 3 files changed, 32 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index 895ad92..d3b9789 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -46,6 +46,27 @@ void reset_cpu(unsigned long ignored) ; } +/* + * Window Size + * Used with the Base register to set the address window size and location. + * Must be programmed from LSB to MSB as sequence of ones followed by + * sequence of zeros. The number of ones specifies the size of the window in + * 64 KByte granularity (e.g., a value of 0x00FF specifies 256 = 16 MByte). + * NOTE: A value of 0x0 specifies 64-KByte size. + */ +unsigned int mvebu_winctrl_calcsize(unsigned int sizeval) +{ + int i; + unsigned int j = 0; + u32 val = sizeval >> 1; + + for (i = 0; val >= 0x10000; i++) { + j |= (1 << i); + val = val >> 1; + } + return 0x0000ffff & j; +} + int mvebu_soc_family(void) { u16 devid = (readl(MVEBU_REG_PCIE_DEVID) >> 16) & 0xffff; diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h index 5e8bf0c..484638b 100644 --- a/arch/arm/mach-mvebu/include/mach/cpu.h +++ b/arch/arm/mach-mvebu/include/mach/cpu.h @@ -13,6 +13,9 @@ #ifndef __ASSEMBLY__ +#define MVEBU_CPU_WIN_CTRL_DATA(size, target, attr, en) (en | (target << 4) \ + | (attr << 8) | (mvebu_winctrl_calcsize(size) << 16)) + #define MVEBU_REG_PCIE_DEVID (MVEBU_REG_PCIE_BASE + 0x00) #define MVEBU_REG_PCIE_REVID (MVEBU_REG_PCIE_BASE + 0x08) diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index 22abde0..a62a220 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -96,8 +96,15 @@ #define SDRAM_MAX_CS 4 #define SDRAM_ADDR_MASK 0xFF000000 +/* MVEBU USB Host controller */ +#define MVUSB0_BASE MVEBU_AXP_USB_BASE +#define MVUSB0_CPU_ATTR_DRAM_CS0 CPU_ATTR_DRAM_CS0 +#define MVUSB0_CPU_ATTR_DRAM_CS1 CPU_ATTR_DRAM_CS1 +#define MVUSB0_CPU_ATTR_DRAM_CS2 CPU_ATTR_DRAM_CS2 +#define MVUSB0_CPU_ATTR_DRAM_CS3 CPU_ATTR_DRAM_CS3 + /* MVEBU CPU memory windows */ -#define MVCPU_WIN_CTRL_DATA CPU_WIN_CTRL_DATA +#define MVCPU_WIN_CTRL_DATA MVEBU_CPU_WIN_CTRL_DATA #define MVCPU_WIN_ENABLE CPU_WIN_ENABLE #define MVCPU_WIN_DISABLE CPU_WIN_DISABLE -- 2.5.3

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[U-Boot] [PATCH 02/11] drivers/spi/kirkwood_spi: Fix debugging with CONFIG_DM_SPI
by Phil Sutter 13 Dec '15

13 Dec '15

The debug printing tries to reference slave->bus and slave->cs which don't exist when CONFIG_DM_SPI is defined. Signed-off-by: Phil Sutter <phil(a)nwl.cc> --- drivers/spi/kirkwood_spi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index e7b0982..0439bb2 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -161,8 +161,10 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, unsigned int tmpdout, tmpdin; int tm, isread = 0; +#ifndef CONFIG_DM_SPI debug("spi_xfer: slave %u:%u dout %p din %p bitlen %u\n", slave->bus, slave->cs, dout, din, bitlen); +#endif if (flags & SPI_XFER_BEGIN) spi_cs_activate(slave); -- 2.5.3

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[U-Boot] [PATCH 01/11] drivers/pci: Fix for debug builds without CONFIG_PCI_ENUM_ONLY
by Phil Sutter 13 Dec '15

13 Dec '15

The debug printing references bar_res, which exists only if CONFIG_PCI_ENUM_ONLY is not defined. Therefore move it into the ifdef'd area. Signed-off-by: Phil Sutter <phil(a)nwl.cc> --- drivers/pci/pci_auto_old.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/pci_auto_old.c b/drivers/pci/pci_auto_old.c index 932eab8..8f17779 100644 --- a/drivers/pci/pci_auto_old.c +++ b/drivers/pci/pci_auto_old.c @@ -98,11 +98,11 @@ void pciauto_setup_device(struct pci_controller *hose, bar_res = prefetch; else bar_res = mem; -#endif debug("PCI Autoconfig: BAR %d, %s, size=0x%llx, ", bar_nr, bar_res == prefetch ? "Prf" : "Mem", (unsigned long long)bar_size); +#endif } #ifndef CONFIG_PCI_ENUM_ONLY -- 2.5.3

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[U-Boot] [PATCH v2 1/4] arm: socfpga: cyclone5-socdk: Enabling U-Boot environment in QSPI
by Chin Liang See 13 Dec '15

13 Dec '15

Enabling the support of storing U-Boot environment within serial NOR flash. By default, its still store into SDMMC Signed-off-by: Chin Liang See <clsee(a)altera.com> Cc: Dinh Nguyen <dinguyen(a)opensource.altera.com> Cc: Dinh Nguyen <dinh.linux(a)gmail.com> Cc: Pavel Machek <pavel(a)denx.de> Cc: Marek Vasut <marex(a)denx.de> Cc: Stefan Roese <sr(a)denx.de> --- Changes for v2 - remove the undef --- include/configs/socfpga_cyclone5_socdk.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h index 67bb35f..340b2c7 100644 --- a/include/configs/socfpga_cyclone5_socdk.h +++ b/include/configs/socfpga_cyclone5_socdk.h @@ -58,9 +58,15 @@ #endif +/* U-Boot environment */ #define CONFIG_ENV_IS_IN_MMC +#ifdef CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ +#elif CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#define CONFIG_ENV_OFFSET 0x400000 +#endif /* USB */ #ifdef CONFIG_CMD_USB -- 1.9.2.468.g3f0c02a

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[U-Boot] Very confusing variable=name behaviour
by Pavel Machek 12 Dec '15

12 Dec '15

Hi! I'm getting quite crazy behaviour of variables in recent u-boot: VERSION = 2016 PATCHLEVEL = 01 SUBLEVEL = EXTRAVERSION = -rc1 Bytes transferred = 104656 (198d0 hex) => bootm_boot_mode=nonsec => echo $bootm_boot_mode nonsec => prinetenv bootm_boot_mode Unknown command 'prinetenv' - try 'help' => printenv bootm_boot_mode ## Error: "bootm_boot_mode" not defined => echo $bootm_boot_mode nonsec => What is going on there? C-level "getenv" fails on such variable, too. bootm_boot_mode = '<NULL>' Explicit setenv behaves as expected: => setenv bootm_boot_mode nonsec => echo $bootm_boot_mode nonsec => printenv bootm_boot_mode bootm_boot_mode=nonsec => Best regards, Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

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